Method for processing a stacked structure

Abstract

A method for processing a stack of layers to provide a stack of discrete layer elements, comprising the steps of: preparing a stack of layers including a first layer 20 provided by a first material; a third layer 16 provided by a solid electrolyte; and a second layer 18 located between the first and third layers, the second layer having a thickness of at least 500 nm and provided by a second material comprising at least 95 atomic % amorphous silicon; and removing a portion of the first layer 20 through its thickness to provide a stack of discrete layer elements provided by the first material. removing portions of the second layer 18 through a thickness thereof to form second discrete layer elements 18a provided by a second material, the second discrete layer elements being disposed between the first discrete layer elements 20a and the solid electrolyte; and etching the third layer 16 using the second discrete layer elements 18a as an etching mask to form third discrete layer elements 16a provided by the solid electrolyte, the first, second and third discrete layer elements providing a stack of discrete layer elements.

Description

Technical Field

[0001] The present invention relates to a method for processing a stacked structure, in particular, a method for processing a stacked structure in which the layers are provided by components of a battery.

Background Art

[0002] Solid micro-batteries typically include a thin layer of active stack. The active stack is formed by two electrodes (anode and cathode) separated by a solid electrolyte. Usually, the anode current collector is provided on the surface of the electrolyte On the opposite side of on the surface of the anode, and the cathode current collector is provided on the surface of the electrolyte On the opposite side of on the surface of the cathode.

[0003] Typically, solid micro-batteries are formed by depositing individual thin layers on a wafer. For efficiency reasons, multiple micro-batteries are usually formed on a single wafer. This requires that each battery component (e.g., cathode, anode, or electrolyte) be provided as a layer containing a plurality of discrete elements, and each discrete element provides a part of a respective micro-battery. The plurality of discrete elements usually form a regular arrangement on the surface of the wafer.

[0004] The process of providing a layer containing a plurality of discrete elements is known as "patterning" of the layer. This can be achieved by depositing the layer through a shadow mask presenting a plurality of openings. The mask is placed on the surface of the substrate and held in place during deposition. Next, the shadow mask is removed, and the deposited layer exhibits the required distribution of discrete elements, i.e., the required pattern.

[0005] This masking technique has the drawback that particle contamination may occur on the surface of the substrate, which has an adverse effect on the performance of the micro-battery. Furthermore, the process of placing a mask on the substrate can result in scratching of the substrate, which also has an adverse effect on the performance of the battery. Additionally, when the size of the micro-battery is small, masking can generate edge or shadow effects, resulting in insufficient alignment of discrete layer elements within an individual stack and / or large wasteful areas between stacks.

[0006] Therefore, it is often desirable to avoid the masking technique and use alternative patterning techniques such as etching of the deposition layer. Since the physical and chemical properties of the layers are different, individually etched layers may be required. However, this process can have an adverse effect on the quality of the interface between the etched layer and the subsequently deposited layer.

[0007] Therefore, it is desirable to provide a method for patterning the layers of a stack structure while reducing these adverse effects.

Summary of the Invention

[0008] In a first aspect, the present invention can provide a method for processing a stack of layers to provide a stack of discrete layer elements, the method comprising: · a first layer provided by a first material; · a third layer provided by a solid electrolyte; · a second layer located between the first layer and the third layer, the second layer having a thickness of at least 500 nm and being provided by a second material containing at least 95 atomic% amorphous silicon; preparing a stack of layers including; removing a portion in the thickness direction of the first layer to form a first discrete layer element provided by the first material; Removing a portion of the second layer in the thickness direction to form a second discrete layer element provided by the second material, the second discrete layer element being disposed between the first discrete layer element and the solid electrolyte; Using the second discrete layer element as an etching mask to etch a third layer to form a third discrete layer element provided by the solid electrolyte; The first, second, and third discrete layer elements provide a stack of discrete layer elements.

[0009] By using the second discrete layer element as a mask during etching of the third layer, the quality of the interface between the second layer and the third layer can be maintained. Thus, contamination and / or degradation of the surface of the electrolyte layer that can typically occur when the electrolyte is etched prior to deposition of the second layer can be avoided (such contamination and / or degradation can occur, for example, by oxidation of the electrolyte surface or incomplete removal of the photoresist resin from the electrolyte surface).

[0010] To avoid misunderstanding, the step of using the second discrete layer element as an etching mask refers to the dimensions of the mask being defined by the periphery of the second discrete layer element. The first discrete layer element is typically also intended to be present during etching of the third layer, but its periphery may not exactly correspond to that of the etching mask provided by the second discrete element layer.

[0011] Typically, the second material comprises at least 98 atomic% amorphous silicon, preferably at least 99 atomic% amorphous silicon. In some cases, the second material consists essentially of amorphous silicon. The term "amorphous" means that the silicon atoms of the second material do not exhibit long-range structural order.

[0012] Surprisingly, when a discrete layer element (hereinafter referred to as the "amorphous silicon layer element", corresponding to the second discrete layer element) containing at least 95 atomic% of amorphous silicon is used as a mask during the etching of the electrolyte layer, it has been found that the amorphous silicon material retains its ability to function as the anode of the battery. This is unexpected because it is well known that the performance of silicon solar cells degrades when silicon is exposed to moisture (as a result, it is generally considered necessary to provide a sealing element to prevent the ingress of moisture into the battery).

[0013] Accordingly, the second layer can be directly deposited with a required thickness of at least 500 nm to provide the anode. This is considered to be the minimum anode thickness for providing an operable battery with a useful capacity level.

[0014] This minimum thickness is thought to help balance the capacitance ratio between the cathode and anode of the battery. That is, this minimum thickness is thought to limit the relative volume expansion of the amorphous silicon material when it functions as the anode of the battery, and this volume expansion results from the lithiation of the amorphous silicon material during the charging of the battery.

[0015] The use of a full-thickness amorphous silicon element as an etching mask is in contrast to the method described in U.S. Patent No. 9,373,864, where, for example, a pattern made from a silicon layer having a thickness of 5 - 100 nm is used as an etching mask for etching the electrolyte layer. After this etching process, a lithium-based layer is deposited on the pattern and lithium atoms diffuse into the pattern, and as a result, the lithium-based layer and the pattern form a lithium-based electrode.

[0016] The present invention avoids the complex step of forming a lithium-based electrode after the etching process. Further, the present invention can deposit a current collector (as the first layer) directly on a layer (i.e., the second layer) containing at least 95 atomic% amorphous silicon before the step of etching the electrolyte. This can help maintain the quality of the interface between the second layer and the current collector.

[0017] The term "discrete layer element" is intended to refer to a portion of a layer that has a defined perimeter and is not in direct contact with other portions of that layer. Discrete layer elements typically have a substantially square, rectangular, or circular perimeter. Usually, each discrete layer element provides a component of the battery.

[0018] In one example of the method of the present invention, the method may further include, after the step of etching the third layer, the step of modifying a second discrete layer element to provide a modified second discrete layer element, the modified second discrete layer element having a perimeter that encloses a region smaller than the region enclosed by the perimeter of the second discrete layer element.

[0019] For example, the method of the present invention may further include, after the step of etching the third layer, the step of trimming a second discrete layer element around at least a portion of its perimeter to provide a modified second discrete layer element.

[0020] The step of trimming the second discrete layer element can serve to remove the peripheral portion of the element that may be damaged through the step of etching the third layer, thus further improving the ability of the second discrete layer element and providing a high-quality anode.

[0021] In some cases, the step of etching the third layer using the second discrete layer element as an etch mask has been found to undercut the etch mask by the etchant. That is, the etchant removes the electrolyte that was originally in contact with the mask at the periphery of the mask. When the stack of discrete layer elements is incorporated into the battery, this loss of electrolyte at the periphery of the second discrete layer element can result in the electrolyte no longer providing an effective separator between the cathode and the anode, and as a result, a short circuit can occur.

[0022] To help prevent this and to assist the electrolyte in providing an effective separator between the cathode and the anode, the step of trimming the second discrete layer element preferably results in the modified second discrete layer element being completely disposed within the boundary defined by the periphery of the third discrete layer element. For example, the modified second discrete layer element may have a periphery that coincides with the periphery of the third discrete layer element.

[0023] The step of trimming the second discrete layer element around at least a portion of its periphery may include an etching process. The etching may be performed using a dry etching process such as a plasma etching process. The etching process can be mechanical (e.g., ion beam milling using argon plasma) and / or chemical (e.g., reactive ion etching where species such as SF6 react with the first layer and / or the second layer to produce volatile reaction products). For example, in some cases, the plasma etching process is performed using a plasma containing argon and / or SF6.

[0024] In other cases, the trimming can be performed, for example, by laser ablation.

[0025] Generally, during the step of trimming the second discrete layer element, the first discrete layer element is also trimmed around at least a portion of its periphery to provide a modified first discrete layer element.

[0026] In some cases, the first and second discrete layer elements can be trimmed through an etching process in which a portion of the surface of the first discrete layer element facing in a direction opposite to the second discrete layer element is protected by a mask, and the etchant removes the exposed portion of the first discrete layer element and the portion underlying the second discrete layer element.

[0027] Typically, when the first and second discrete layer elements are trimmed in a single procedure, this procedure includes a photolithography process. In this procedure, a photoresist layer can be applied to the surface of the first discrete layer element and exposed to a pattern of light that causes a chemical change within a specific portion of the photoresist layer. Next, a solvent (i.e., developer) can be applied to the photoresist layer, and its effect varies depending on the chemical change caused by the light pattern (e.g., a positive photoresist layer becomes more soluble in the developer after exposure to UV light, while a negative photoresist layer becomes less soluble in the developer after exposure to UV light). Thus, a masking layer can be provided on the surface of the first discrete layer element, the masking layer leaves at least a portion of the first discrete layer element exposed, and the exposed portion of the first discrete layer element extends around at least a portion of the periphery of the first discrete layer element. Thus, selective etching of the first discrete layer element can be performed, followed by etching of the portion of the second discrete layer element that is exposed during this process.

[0028] In some cases, the second discrete layer element can be trimmed independently of the first discrete layer element. However, this is less preferred.

[0029] In other cases, the step of modifying the second discrete layer element can include the step of creating trenches in the second discrete layer element, the trenches extending in the thickness direction of the second discrete layer element and defining a boundary between the modified second discrete layer element and the separated portion of the second discrete layer element, the separated portion extending around at least a portion of the periphery of the second discrete layer element.

[0030] Typically, in such cases, the modified second discrete layer element is configured to be electrically connectable to an external device, while the separated portion of the second discrete layer element is configured to remain separated from this external device. For example, the modified second discrete layer element may provide a part of the anode contact pad.

[0031] Generally, the trench defines the entire perimeter of the modified second discrete layer element. In fact, in such cases, the trench forms a closed loop. In such cases, the separated portion of the second discrete layer element generally extends around the entire periphery of the second discrete layer element.

[0032] Generally, the trench has a bottom surface and sidewalls extending in a direction away from the bottom surface. The sidewalls are generally aligned with each other, but other configurations are possible. For example, the sidewalls may tend to converge in a direction towards the bottom surface of the trench (i.e., the trench may taper in a direction towards the bottom surface of the trench).

[0033] In some cases, the trench has a bottom surface that is in the same plane as the interface between the second discrete layer element and the third discrete layer element. In other cases, the trench extends into the third discrete layer element such that the bottom surface of the trench is within the third discrete layer element.

[0034] Generally, the trench passes through both the first discrete layer element and the second discrete layer element.

[0035] Typically, the trench is created by an etching process. The etching can be carried out using a dry etching process such as a plasma etching process. The etching process can be mechanical (e.g., ion beam milling using argon plasma) and / or chemical (e.g., reactive ion etching where species such as SF6 react with the first and / or second discrete layer elements to produce volatile reaction products). For example, in some cases, the plasma etching process is performed using a plasma containing argon and / or SF6.

[0036] In other cases, the trench can be formed, for example, by laser ablation.

[0037] The step of creating the trench can include a photolithography process. For example, a photoresist layer can be applied to the surface of the first discrete layer element and exposed to a pattern of light that causes a chemical change within a specific portion of the photoresist layer. Next, a solvent (i.e., developer) is typically applied to the photoresist layer, and its effect varies depending on the chemical change caused by the light pattern (e.g., a positive photoresist layer becomes more soluble in the developer after exposure to UV light, while a negative photoresist layer becomes less soluble in the developer after exposure to UV light). Thus, a masking layer is typically provided on the surface of the first discrete layer element, and the masking layer leaves at least a portion of the first discrete layer element exposed, and this portion corresponds to the planned path of the trench. Thus, selective etching of the first discrete layer element can be performed, followed by etching of the portion of the second discrete layer element that is exposed during this process.

[0038] Typically, the width of the trench is 1 to 100 μm.

[0039] Typically, the cathode layer is provided on the surface of the second discrete layer element On the opposite side of and the surface of the third discrete layer element, and at least a portion of the trench is created in a portion of the second discrete layer element Directly opposite that is part of the cathode layer.

[0040] In one example of the method of the present invention, the second discrete layer element can be modified by both trimming the second discrete layer element around at least a portion of its periphery and creating a trench in the second discrete layer element.

[0041] Generally, in the method according to the first aspect of the present invention, the step of removing a portion in the thickness direction of the first layer to form a first discrete layer element and the step of removing a portion in the thickness direction of the second layer to form a second discrete layer element are performed in a single procedure. This can help improve the efficiency of the patterning process.

[0042] Typically, the step of removing a portion in the thickness direction of the first layer to form a first discrete layer element includes etching the first layer so as to expose a portion of the second layer. Typically, the step of removing a portion in the thickness direction of the second layer to form a second discrete layer element includes etching the second layer so as to expose a portion of the third layer. In some cases, the same etching can be applied to both the first layer and the second layer.

[0043] Typically, the step of removing a portion in the thickness direction of the first layer includes a photolithography step. That is, a photoresist layer is applied to the surface of the first layer and exposed to a pattern of light that causes a chemical change within a certain portion of the photoresist layer. Next, a solvent (i.e., developer) is applied to the photoresist layer, and its effect varies depending on the chemical change caused by the light pattern (e.g., a positive photoresist layer becomes more soluble in the developer after exposure to UV light, while a negative photoresist layer becomes less soluble in the developer after exposure to UV light). Thus, a masking layer is provided on the surface of the first layer, enabling selective etching of the first layer.

[0044] The first and / or second layer can be etched using a dry etching process such as a plasma etching process. The etching process can be mechanical (e.g., ion beam milling using argon plasma) and / or chemical (e.g., reactive ion etching in which species such as SF6 react with the first and / or second layer to produce volatile reaction products).

[0045] For example, in some cases, the plasma etching process is performed using a plasma containing argon and / or SF6. This plasma exhibits good etching selectivity between amorphous silicon and the solid electrolyte, that is, it is considered to etch amorphous silicon at a significantly faster rate than the electrolyte so that the electrolyte layer (i.e., the third layer) effectively acts as an etch stop layer.

[0046] In some cases, the plasma etching process is performed using a process gas selected from the group consisting of argon, a mixture of HBr and Cl2, and SF6.

[0047] In another example of the method according to the present invention, the step of removing a portion in the thickness direction of the second layer to form a second discrete layer element is performed using laser ablation.

[0048] Typically, the step of etching the third layer is performed using an aqueous etchant. The etchant can have a neutral, alkaline, or acidic pH value. For example, the etchant can be water. When the etchant is an acid, the etchant can be selected from the group consisting of phosphoric acid, sulfuric acid, hydrochloric acid, and nitric acid. When the etchant is alkaline, the etchant can be provided by an aqueous solution of potassium hydroxide. The aqueous etchants are considered to exhibit good etching selectivity between amorphous silicon and the solid electrolyte. That is, they can etch the electrolyte layer (i.e., the third layer) at a significantly faster rate than the amorphous silicon layer elements.

[0049] In some cases, the cathode layer is provided on the surface of the second layer and Is on the opposite side the third layer, and the cathode layer is provided by a cathode material. For example, during the formation of the layer stack, the electrolyte layer can be deposited on the cathode layer. The cathode material can comprise, for example, a crystalline oxide.

[0050] The solid electrolyte can be provided by any material that is ion-conductive but electrically insulating. Usually, the solid electrolyte is provided by a material selected from the group consisting of LiPON, LiSiPON, LiSiCON, thio-LiSiCON, LiPBON, LiBON, amorphous lithium silicate compounds, and doped amorphous lithium silicate compounds.

[0051] The first material is usually selected from the group consisting of platinum, nickel, molybdenum, copper, titanium nitride, aluminum, gold, and stainless steel. When the first material is provided by a single metallic element, the minimum purity of the first material is usually greater than 95 atomic %, preferably greater than 98 atomic %, more preferably greater than 99 atomic %. In such a case, the first material can provide the anode current collector of a battery including a stack of discrete layer elements provided by the method of the present invention.

[0052] In some cases, the first material is selected from the group consisting of platinum and titanium nitride.

[0053] In some cases, the second layer can have a thickness of at least 700 nm. In some cases, the second layer can have a thickness of at least 900 nm. Usually, the second layer has a thickness of 2 μm or less. In some cases, the second layer has a thickness of 3 μm or less. In some cases, the second layer has a thickness of 5 μm or less. Thus, for example, the second layer can have a thickness of 500 nm to 5 μm. In some cases, the second layer can have a thickness of 500 nm to 3 μm. In some cases, the second layer can have a thickness of 700 nm to 3 μm. In some cases, the second layer can have a thickness of 900 nm to 3 μm.

[0054] The second layer and Is on the opposite sideWhen a cathode layer is provided on the surface of the third layer, the thickness of the cathode layer can be at least twice the thickness of the second layer, and in some cases, can be at least three times the thickness of the second layer. In some cases, the thickness of the cathode layer can be 10 times or less the thickness of the second layer, and in some cases, can be 8 times or less the thickness of the second layer. Therefore, for example, the thickness of the cathode layer can be 2 to 10 times the thickness of the second layer, and in some cases, can be 3 to 8 times the thickness of the second layer.

[0055] The thickness ratio of the cathode layer to the second layer (including at least 95 atomic% amorphous silicon) is preferably selected to balance the capacity ratio between the anode and the cathode of the battery incorporating these layers. That is, this thickness ratio is considered to limit the relative volume expansion when amorphous silicon functions as the anode in the battery, and this volume expansion results from the lithiation of amorphous silicon during the charging of the battery.

[0056] Generally, the third layer has a thickness of 1 to 5 μm. In some cases, the thickness of the third layer is 2 to 4 μm.

[0057] Generally, the first layer has a thickness of 100 to 500 nm. In some cases, the first layer has a thickness of 200 to 400 nm.

[0058] Generally, the method of the present invention can provide a plurality of stacks of discrete layer elements, and the plurality of stacks of discrete layer elements are offset from each other in the plane of the first, second, and / or third layers. Usually, the plurality of stacks of discrete layer elements are arranged on the wafer in a regular array.

[0059] In a second aspect, the present invention can provide an electrochemical cell including at least the following discrete layer elements stacked in the following order: · A first discrete layer element provided by a first material; · A second discrete layer element provided by a second material having a thickness of at least 500 nm and including at least 95 atomic% amorphous silicon; · A third discrete layer element provided by a solid electrolyte; · A fourth discrete layer element containing a cathode active material; The trench is provided in the thickness direction of the second discrete layer element, and the trench has a bottom surface that is either at the interface between the second discrete layer element and the third discrete layer element or within the third discrete layer element. The trench defines a boundary between the modified second discrete layer element and the separated portion of the second discrete layer element, and the separated portion extends around at least a part of the periphery of the second discrete layer element.

[0060] Normally, the trench defines the entire periphery of the modified second discrete layer element.

[0061] Normally, the width of the trench is in the range of 1 to 100 μm.

[0062] Normally, the trench further extends through the first discrete layer element.

[0063] Normally, the trench has sidewalls extending from the bottom surface, and the sidewalls are aligned with each other.

[0064] Normally, at least a part of the trench is provided in a part of the second discrete layer element that is directly opposite the fourth discrete layer element.

[0065] The solid electrolyte can be provided by any material that is ion-conductive but electrically insulating. Normally, the solid electrolyte is provided by a material selected from the group consisting of LiPON, LiSiPON, LiSiCON, thio-LiSiCON, LiPBON, LiBON, amorphous lithium silicate compounds, and doped amorphous lithium silicate compounds.

[0066] The first material is usually selected from the group consisting of platinum, nickel, molybdenum, copper, titanium nitride, aluminum, gold, and stainless steel. When the first material is provided by a single metallic element, the minimum purity of the first material is usually greater than 95 atomic %, preferably greater than 98 atomic %, more preferably greater than 99 atomic %.

[0067] In some cases, the first material is selected from the group consisting of platinum and titanium nitride.

[0068] Usually, the first discrete layer element provides an anode current collector for the electrochemical cell.

[0069] Generally, the cathode active material is provided by a crystalline oxide.

[0070] Usually, the second material contains at least 98 atomic % amorphous silicon, preferably at least 99 atomic % amorphous silicon. In some cases, the second material consists essentially of amorphous silicon. The term "amorphous" means that the silicon atoms of the second material do not exhibit long-range structural order.

[0071] In some cases, the second discrete layer element can have a thickness of at least 700 nm. In some cases, the second discrete layer element can have a thickness of at least 900 nm. Usually, the second discrete layer element has a thickness of 2 μm or less. In some cases, the second discrete layer element has a thickness of 3 μm or less. In some cases, the second discrete layer element has a thickness of 5 μm or less. Thus, for example, the second discrete layer element can have a thickness of 500 nm to 5 μm. In some cases, the second discrete layer element can have a thickness of 500 nm to 3 μm. In some cases, the second discrete layer element can have a thickness of 700 nm to 3 μm. In some cases, the second discrete layer element can have a thickness of 900 nm to 3 μm.

[0072] In some cases, the thickness of the fourth discrete layer element can be at least twice the thickness of the second discrete layer element, and in some cases, it can be at least three times the thickness of the second discrete layer element. In some cases, the thickness of the fourth discrete layer element can be 10 times or less the thickness of the second discrete layer element, and in some cases, it can be 8 times or less the thickness of the second discrete layer element. Thus, for example, the thickness of the fourth discrete layer element can be 2 to 10 times the thickness of the second discrete layer element, and in some cases, it can be 3 to 8 times the thickness of the second discrete layer element.

[0073] The ratio of the thickness of the fourth discrete layer element (including the cathode active material) to the thickness of the second discrete layer element (including at least 95 atomic% amorphous silicon) is preferably selected to balance the capacity ratio between the anode and the cathode of the electrochemical cell. That is, this thickness ratio is considered to limit the relative volume expansion of amorphous silicon when it functions as the anode of the cell, and this volume expansion results from the lithiation of amorphous silicon during charging of the cell.

[0074] Generally, the third discrete layer element has a thickness of 1 to 5 μm. In some cases, the third discrete layer element has a thickness of 2 to 4 μm.

[0075] Generally, the first discrete layer element has a thickness of 100 to 500 nm. In some cases, the first discrete layer element has a thickness of 200 to 400 nm.

[0076] Here, the present invention will be described with reference to the following figures as examples.

Brief Description of the Drawings

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BEST MODE FOR CARRYING OUT THE INVENTION

[0078] Referring to FIGS. 1 to 8, the manufacture of a battery incorporating the process according to the first example of the method of the present invention includes the steps of preparing a substrate 10 and depositing a layer 12 on the surface of the substrate. The layer 12 includes an adhesive layer and a metal layer. Subsequently, the layer 12 is etched through a photolithography procedure to provide a cathode current collector 12a. The photolithography procedure includes the deposition of a photoresist layer (not shown) on the surface of the layer 12, the processing of the photoresist layer to form a mask, subsequent etching using ion beam milling or wet chemical etching, and the removal of the photoresist layer thereafter.

[0079] The substrate 10 is typically provided by a sapphire (aluminum oxide) wafer, but other materials such as silicon, glass, or ceramic may be used. When a silicon substrate is used, it may include a passivation layer such as silicon nitride or silicon oxide. The substrate may be provided by a wafer of a non-conductive, semi-conductive, or conductive material. When the substrate is provided by a wafer of a semi-conductive or conductive material, it is preferable to provide a non-conductive film on the surface of the wafer that contacts the cathode current collector 12.

[0080] Referring to FIGS. 3 and 4, the cathode layer 14 is deposited on the cathode current collector 12a and the uncovered surface of the substrate 10 (suitable cathode materials are known in the art). Subsequently, the cathode layer is etched through a photolithography procedure to provide a cathode 14a having a footprint similar to that of the cathode current collector 12a (for example, the cathode may generally be slightly larger than the cathode current collector to provide a contact pad for connecting the battery to an external device while leaving the current collector portion of the cathode uncovered). The photolithography procedure includes the deposition of a photoresist layer (not shown) on the surface of the layer 14, the processing of the photoresist layer to form a mask, subsequent etching of the layer 14, and the removal of the photoresist layer.

[0081] Referring to FIG. 5, the LiPON electrolyte layer 16 is deposited to a thickness of 3 μm by high-frequency sputtering on the cathode 14a and the uncovered surfaces of the cathode current collector 12a and the substrate 10. The amorphous silicon (a-Si) layer 18 is deposited to a thickness of 1 μm on the electrolyte layer 16 using electron beam physical vapor deposition from a target having a purity of at least 99 atomic %. The platinum layer 20 is deposited to a thickness of 300 nm on the silicon layer 18 using DC sputtering from a target having a purity of at least 99.99 atomic %. The LiPON electrolyte layer 16, the amorphous silicon layer 18, and the platinum layer 20 are sequentially deposited without removing the sample from the vacuum chamber. This helps to prevent contamination of the interfaces between the layers 16, 18, and 20.

[0082] Referring to FIG. 6, the platinum layer 20 and the amorphous silicon layer 18 are etched in a single photolithography procedure to provide the anode current collector 20a and the anode 18a, respectively. The photolithography procedure includes deposition of a photoresist layer (not shown) on the surface of the layer 20, treatment of the photoresist layer to form a mask, followed by reactive ion etching with an inductively coupled plasma containing SF6, and removal of the photoresist layer. The footprints of the current collector 20a and the anode 18a on the substrate 10 are larger than that of the cathode 14a.

[0083] Referring to FIG. 7, the electrolyte layer 16 is etched using water as an etchant and the current collector 20a and the anode 18a bonded as a hard mask. The aqueous etchant tends to undercut the hard mask, and as a result, the etched electrolyte layer 16a has a smaller footprint on the substrate 10 than the current collector 20a and the anode 18a. That is, the anode 18a tends to protrude from the etched electrolyte layer 16a. However, the footprint of the etched electrolyte layer 16a remains larger than that of the cathode 14a, and as a result, the cathode 14a is completely surrounded by the cathode current collector 12a and the etched electrode layer 16a.

[0084] Referring to FIG. 8, the current collector 20a and the anode 18a are trimmed using a photolithography process to provide a trimmed current collector 20b and a trimmed anode 18b. Accordingly, the footprint of the current collector and the anode on the substrate is reduced to match that of the etched electrolyte 16a (alternatively, the footprint of the current collector and the anode on the substrate can be reduced to be smaller than that of the etched electrolyte as shown in FIG. 9 (where the footprint of the trimmed current collector 20c and the trimmed anode 18c is smaller than that of the etched electrolyte 16a)). That is, the trimmed anode 20b does not protrude from the etched electrolyte 16a. The trimming procedure includes the deposition of a photoresist layer (not shown) on the surface of layer 20, the processing of the photoresist layer to form a mask, followed by reactive ion etching with an inductively coupled plasma containing SF6, and the removal of the photoresist layer.

[0085] The trimming process is thought to provide one or both of the following advantages. · The extent of overhang of the anode 18a with respect to the etched electrolyte 16a is reduced or eliminated, and as a result, the risk of short circuit between the cathode 14a and the trimmed anode 18b (which, if not the case, could occur, for example, through contact between the anode 18a and the cathode current collector 12a) is reduced, and / or · The material at the periphery of the anode that could have been damaged by the action of the aqueous etchant can be partially or wholly removed.

[0086] In an alternative example of the method according to the present invention, the battery components are assembled and configured as described above with reference to FIGS. 1 to 7, and subsequently, a battery is provided as shown in FIG. 10.

[0087] Referring to FIG. 10, in an alternative example of the method according to the present invention, the trench 22 is created in the current collector and the anode instead of trimming the current collector and the anode. The trench is within the periphery of the current collector 20a and the anode 18a (as shown in FIG. 7), forms a closed loop, and divides each of the current collector and the anode into an active portion and an inactive portion. The active portions 18d, 20d of the anode and the current collector are contained within the closed loop provided by the trench, while the inactive portions 18e and 20e of the anode and the current collector are outside of this loop. As shown in FIG. 7, the outer periphery of the inactive portions 18e, 20e substantially coincides with the periphery of the current collector 20a and the anode 18a.

[0088] In fact, the trench 22 defines the outer periphery of the modified current collector and the modified anode.

[0089] The anode contact pad (not shown) of the battery is provided within the trench loop. As a result, when the battery is connected to an external device, the active portions 18d, 20d of the anode and the current collector form part of an electrical circuit, while the inactive portions 18e, 20e of the anode and the current collector are insulated from the electrical circuit. Thus, the portions 18e, 20e of the anode and the current collector may protrude from the etched electrolyte 16a, but the risk of short - circuiting the battery is reduced. Further, the material of the outer peripheral portion 18e of the anode may be damaged by the action of the aqueous etchant during the etching of the electrolyte layer, but this material is insulated from the electrical circuit created when the battery is connected to an external device.

[0090] Generally, the trench 22 is disposed directly opposite a portion of the cathode 14a, but this does not apply to the portion of the trench 22 that defines the contour of the anode contact pad (not shown). That is, most of the trench is normally within the footprint of the cathode 14a.

[0091] The trench is formed through a process of depositing a photoresist layer (not shown) on the surface of the current collector 20a (shown in FIG. 7), and processing the photoresist layer to form a mask that defines the path followed by the trench. Subsequently, reactive ion etching with inductively coupled plasma containing SF6 and removal of the photoresist layer are performed.

[0092] The bottom surface of the trench is in the same plane as the interface between the anode and the electrolyte layer 16a. The side walls of the trench extend from the electrolyte layer 16a and are aligned with each other. The width of the trench is typically 50 μm.

[0093] FIG. 11 shows a graph of a plurality of charge and discharge cycles measured from a battery such as that in FIG. 8, plotted as voltage versus time. This supports the good performance of the battery and indicates that the shaping process used did not interfere with or impair the operation of the battery. In particular, it is surprising that the use of the combination of the current collector 20a and the anode 18a as a hard mask during the etching of the electrolyte layer 16 with water did not have an adverse effect on the performance of the amorphous silicon anode.

[0094] FIG. 12 shows a graph of data from a plurality of cycles, plotted as the charge and discharge capacities measured in consecutive cycles of a battery such as that in FIG. 8. The capacity is maintained at a reasonable level throughout the cycles, with only a slight decrease, which is comparable to the expected values of thin-film batteries manufactured by similar conventional methods. Furthermore, this supports the good performance of the battery and indicates that the shaping process used did not interfere with or impair the operation of the battery.

[0095] · The anode current collector 20a provides an example of a first discrete layer element formed by the method according to the first aspect of the present invention. · The anode 18a provides an example of a second discrete layer element formed by the method according to the first aspect of the present invention. · The etched electrolyte layer 16a provides an example of a third discrete layer element formed by the method according to the first aspect of the present invention. ·The trimmed anode 18b provides an example of a modified second discrete layer element formed in any variation of the method according to the first aspect of the present invention. ·The active part 18d of the anode provides a further example of a modified second discrete layer element formed in a further optional variation of the method according to the first aspect of the present invention.

Claims

Claim 1 A method for processing a stack of layers to provide a stack of discrete layer elements, the method comprising: - a first layer provided by a first material; - a third layer provided by a solid electrolyte; - a second layer positioned between the first layer and the third layer, the second layer being provided by a second material having a thickness of at least 500 nm and containing at least 95 atomic% amorphous silicon; - a cathode layer provided on a surface of the third layer opposite the second layer; preparing a stack of layers including; removing a portion in the thickness direction of the first layer to form a first discrete layer element provided by the first material; removing a portion in the thickness direction of the second layer to form a second discrete layer element provided by the second material, the second discrete layer element being disposed between the first discrete layer element and the solid electrolyte; using the second discrete layer element as an etching mask to etch the third layer to form a third discrete layer element provided by the solid electrolyte; including; the first, second, and third discrete layer elements providing the stack of discrete layer elements; the method further comprising, after the step of etching the third layer, modifying the second discrete layer element to provide a modified second discrete layer element; wherein a periphery of the modified second discrete layer element encloses a region smaller than a region enclosed by a periphery of the second discrete layer element. Claim 2 The step of providing the modified second discrete layer element includes: one or more of trimming the second discrete layer element around at least a portion of its periphery and / or creating trenches within the second discrete layer element; the trenches extending in a thickness direction of the second discrete layer element and defining a boundary between the modified second discrete layer element and a separated portion of the second discrete layer element; the separated portion extending around at least a portion of the periphery of the second discrete layer element, the method according to claim 1. Claim 3 The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, and further, the trench defines the entire circumference of the modified second discrete layer element, the method according to claim 2.

4. The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, and further, the trench is created through an etching process, the method according to claim 2 or 3.

5. The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, and further, the trench extends at least to the interface between the second discrete layer element and the third discrete layer element such that the bottom surface of the trench is in the same plane as the interface between the second discrete layer element and the third discrete layer element or within the third discrete layer element, the method according to any one of claims 2 to 4.

6. The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, and further, the width of the trench is from 1 to 100 μm, the method according to any one of claims 2 to 5.

7. The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, the trench has a bottom surface and side walls, the bottom surface is aligned with the interface between the modified second discrete layer element and the third discrete layer element, the side walls extend laterally with respect to the bottom surface and are aligned with each other, the method according to any one of claims 2 to 6.

8. The step of providing the modified second discrete layer element includes the step of creating a trench in the second discrete layer element, the cathode layer is provided on the surface of the third discrete layer element opposite to the second discrete layer element, and at least a part of the trench is created in a part of the second discrete layer element directly opposite to the cathode layer, the method according to any one of claims 2 to 7.

9. The method according to claim 1, further comprising the step of trimming the second discrete layer element around at least a part of its periphery after the step of etching the third layer to provide a modified second discrete layer element.

10. The method according to claim 9, wherein the changed second discrete layer element is completely disposed within a boundary defined by the periphery of the third discrete layer element. **Claim 11** The method according to any one of claims 1 to 10, wherein the step of removing a thicknesswise portion of the first layer to form the first discrete layer element and the step of removing a thicknesswise portion of the second layer to form the second discrete layer element are performed in a single procedure. **Claim 12** The method according to any one of claims 1 to 11, wherein the step of removing a thicknesswise portion of the first layer to form the first discrete layer element and / or the step of removing a thicknesswise portion of the second layer to form the second discrete layer element includes etching each layer. **Claim 13** The method according to claim 12, wherein the step of removing a thicknesswise portion of the first layer includes a photolithography procedure. **Claim 14** The method according to claim 12 or 13, wherein the step of etching each layer includes using a dry etching process. **Claim 15** The method according to claim 14, wherein the dry etching process is a plasma etching process. **Claim 16** The plasma etching process is performed using a plasma containing argon and / or SF ６ The method according to claim 15, wherein the plasma contains argon and / or SF **Claim 17** The method according to any one of claims 1 to 11, wherein the step of removing a thicknesswise portion of the second layer to form the second discrete layer element is performed using laser ablation. **Claim 18** The method according to any one of claims 1 to 17, wherein the step of etching the third layer is performed using an aqueous etchant having a neutral, alkaline, or acidic pH value. **Claim 19** The method according to claim 18, wherein the aqueous etchant is water. **Claim 20** The method according to any one of claims 1 to 19, wherein the solid electrolyte is provided by a material selected from the group consisting of LiPON, LiSiPON, thio-LiSiCON, LiBON, amorphous lithium silicate compounds, and doped amorphous lithium silicate compounds. **Claim 21** The method according to any one of claims 1 to 20, wherein the first material is selected from the group consisting of platinum, nickel, molybdenum, copper, titanium nitride, aluminum, gold, and stainless steel. **Claim 22** The method according to any one of claims 1 to 21, wherein the second layer has a thickness of at least 700 nm.

23. The method according to any one of claims 1 to 22, wherein a plurality of said stacks of discrete layer elements are provided, and the plurality of stacks of discrete layer elements are offset from each other in the plane of said first, said second and / or said third layer.

24. The method according to claim 23, wherein the plurality of stacks of discrete layer elements are arranged on the substrate in a regular array.

25. An electrochemical cell comprising at least the following discrete layer elements stacked in the following order: - A first discrete layer element provided by a first material; - A second discrete layer element provided by a second material having a thickness of at least 500 nm and containing at least 95 atomic% amorphous silicon; - A third discrete layer element provided by a solid electrolyte; and - A fourth discrete layer element containing a cathode active material; wherein said second discrete layer element projects from said third discrete layer element; A trench is provided in the thickness direction of said second discrete layer element, and the trench has a bottom surface located either at the interface between said second discrete layer element and said third discrete layer element or within said third discrete layer element, wherein the width of said trench is from 1 to 100 μm, wherein said trench defines a boundary between a modified second discrete layer element and a separated portion of said second discrete layer element, said separated portion extending around at least a part of the periphery of said second discrete layer element, an electrochemical cell.

26. The electrochemical cell according to claim 25, wherein said trench defines the entire circumference of said modified second discrete layer element.

27. The electrochemical cell according to claim 25 or 26, wherein said trench further extends through said first discrete layer element.

28. The electrochemical cell according to any one of claims 25 to 27, wherein said trench has side walls extending from said bottom surface, and said side walls are aligned with each other.

29. The electrochemical cell according to any one of claims 25 to 28, wherein at least a part of said trench is provided within a part of said second discrete layer element located directly opposite said fourth discrete layer element.

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