Light emission drive circuit, time series control method, and display panel

Abstract

A light emission driving circuit, a time series control method, and a display panel, which can reduce the complexity of the architecture of the light emission driving circuit. The light emission driving circuit includes N sub light emission driving circuits connected in cascade, and the nth sub light emission driving circuit includes a first pull-up control module (10), a pull-up module (20), a first pull-down control module (30), a second pull-down control module (40), and a pull-down module (50), in which the first pull-up control module (10) is used to pull up the potential of a first node (P) to a first potential in a trigger stage (I). The first pull-down control module (30) is used to pull down the potential of the first node (P) to a second potential in an output stage (II), and pull up the potential of the first node (P) to a third potential in a reset stage (III). The pull-up module (20) is used to pull up the light emission driving signal (EM) of the nth stage to a high potential. The second pull-down control module is used to pull up the potential of the second node (Q) to a fourth potential in the output stage (II). The pull-down module (50) is used to pull down the emission drive signal (EM) of the nth stage to a low potential.

Description

Technical Field

[0001] This disclosure claims the priority of a Chinese patent application filed with the China National Intellectual Property Administration on March 3, 2023, with an application number of 202310197985.0 and an invention title of "Light Emitting Driving Circuit, Time Series Control Method, and Display Panel", and all of its contents are incorporated into this disclosure by reference. The present invention relates to the field of display technologies, and in particular, to a light emitting driving circuit, a time series control method, and a display panel.

Background Art

[0002] Light emitting elements such as organic light emitting diodes (OLEDs) have characteristics such as being thin, light, energy-saving, having a wide color gamut, and high contrast, and are thus widely applied to products such as televisions and mobile phones.

[0003] OLEDs are self-luminous and usually require a corresponding light emitting control signal to be provided by a light emitting driving circuit, except that a corresponding scanning signal needs to be provided by a row scanning driving circuit.

[0004] However, the current light emitting driving circuit has a complex architecture and requires many modules or components to realize the control of the light emitting control signal.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One of the objectives of the embodiments of this disclosure is to provide a light emitting driving circuit, a time series control method, and a display panel to solve the problem that the current light emitting driving circuit has a complex architecture and requires many modules or components to realize the control of the light emitting control signal.

Means for Solving the Problems

[0006] According to a first aspect, an embodiment of this disclosure is a light emitting driving circuit, comprising including N cascaded sub-light-emitting drive circuits, the n-th (n ∈ [1, N]) sub-light-emitting drive circuit includes a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, and a pull-down module, the input terminal of the first pull-up control module accesses the first power supply, the control terminal accesses the first clock signal and the light-emitting drive signal of the (n + 1)-th stage, and the output terminal is electrically connected to the first node, the first pull-up control module is used to pull up the potential of the first node to the first potential at the trigger stage, the input terminal of the first pull-down control module accesses the light-emitting drive signal of the (n - 1)-th stage, the control terminal accesses the second clock signal, and the output terminal is electrically connected to the first node, the first pull-down control module is used to pull down the potential of the first node to the second potential at the output stage and pull up the potential of the first node to the third potential at the reset stage, the input terminal of the pull-up module accesses the first power supply, the control terminal is electrically connected to the first node, and the output terminal is electrically connected to the light-emitting drive signal output terminal, the pull-up module is used to pull up the n-th stage light-emitting drive signal output from the light-emitting drive signal output terminal to a high potential when the potential of the first node is the first potential or the third potential, the input terminal of the second pull-down control module accesses the first clock signal and the first power supply respectively, the control terminal accesses the first node and the second clock signal respectively, and the output terminal is electrically connected to the second node, the second pull-down control module is used to pull up the potential of the second node to the fourth potential at the output stage, the input terminal of the pull-down module accesses the second power supply, the control terminal is electrically connected to the second node, and the output terminal is electrically connected to the light-emitting drive signal output terminal, When the potential of the second node is the fourth potential, the pull-down module is used to pull down the potential of the n-th stage of the light-emitting driving signal output from the light-emitting driving signal output terminal to a low potential.

[0007] As one embodiment of the embodiments of the present disclosure, the n-th sub-light-emitting driving circuit further includes a second pull-up control module. One end of the second pull-up control module is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting driving signal output terminal. The second pull-up control module is used to pull up the potential of the first node from the first potential to the fifth potential in the reset stage. When the potential of the first node is the fifth potential, the pull-up module is used to pull up the potential of the n-th stage of the light-emitting driving signal output from the light-emitting driving signal output terminal.

[0008] As one embodiment of the embodiments of the present disclosure, the n-th sub-light-emitting driving circuit further includes a second pull-up control module. One end of the second pull-up control module is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting driving signal output terminal. The second pull-up control module is used to pull up the potential of the first node from the first potential to the fifth potential in the reset stage. When the potential of the first node is the fifth potential, the pull-up module is used to pull up the potential of the n-th stage of the light-emitting driving signal output from the light-emitting driving signal output terminal.

[0009] As one embodiment of the embodiments of the present disclosure, the second pull-up control module includes a first capacitor. One end of the first capacitor is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting driving signal output terminal.

[0010] As one embodiment of the embodiments of the present disclosure, the first pull-up control module includes a first transistor and a second transistor, The control pole of the first transistor accesses the first clock signal, the first pole is electrically connected to the first power supply, and the second pole is electrically connected to the first pole of the second transistor, The control pole of the second transistor accesses the light emission drive signal of the (n + 1)-th stage, and the second pole is electrically connected to the first node.

[0011] As one embodiment of the embodiments of the present disclosure, the second pull-down control module includes a third transistor, a fourth transistor, and a second capacitor, The control pole of the third transistor is electrically connected to the first node, the first pole accesses the first clock signal, and the second pole is electrically connected to the first pole of the fourth transistor, The control pole of the fourth transistor accesses the second clock signal, and the second pole is electrically connected to the second node, One end of the second capacitor is electrically connected to the first power supply, and the other end is electrically connected to the second pole of the third transistor.

[0012] As one embodiment of the embodiments of the present disclosure, the n-th sub-light emission drive circuit further includes a first maintenance module and a second maintenance module, The input end of the first maintenance module accesses the second power supply, the control end is electrically connected to the first node, and the output end is electrically connected to the second node, The first maintenance module is used to maintain the potential of the second node when the potential of the first node is the first potential, The input end of the second maintenance module accesses the second power supply, the control end is electrically connected to the second node, and the output end is electrically connected to the first node, The second maintenance module maintains the potential of the first node when the potential of the second node is the fourth potential.

[0013] As one embodiment of the embodiments of the present disclosure, the first maintenance module includes a fifth transistor, For the fifth transistor, a first pole thereof is electrically connected to the second power supply, a control pole thereof is electrically connected to the first node, and a second pole thereof is electrically connected to the second node.

[0014] As one embodiment of the embodiments of the present disclosure, the second maintenance module includes a sixth transistor, For the sixth transistor, a first pole thereof is electrically connected to the second power supply, a control pole thereof is electrically connected to the second node, and a second pole thereof is electrically connected to the first node.

[0015] As one embodiment of the embodiments of the present disclosure, the pull-up module includes a seventh transistor, For the seventh transistor, a control pole thereof is electrically connected to the first node, a first pole thereof accesses the first power supply, and a second pole thereof is electrically connected to the light-emitting drive signal output terminal.

[0016] As one embodiment of the embodiments of the present disclosure, the first pull-down control module includes an eighth transistor, For the eighth transistor, a control pole thereof accesses the second clock signal, a first pole thereof accesses the light-emitting drive signal of the (n-1)th stage, and a second pole thereof is electrically connected to the first node.

[0017] As one embodiment of the embodiments of the present disclosure, the pull-down module includes a ninth transistor, For the ninth transistor, a control pole thereof is electrically connected to the second node, a first pole thereof accesses the second power supply, and a second pole thereof is electrically connected to the light-emitting drive signal output terminal.

[0018] As one embodiment of the embodiments of the present disclosure, the nth sub-light-emitting drive circuit further includes a current stabilization module, For the current stabilization module, an input terminal thereof is electrically connected to the first node, a control terminal thereof is electrically connected to the first power supply, and an output terminal thereof is electrically connected to a control terminal of the second pull-down control module. The current stabilization module is used to stabilize the current at the control end of the pull-up module.

[0019] As one embodiment of the embodiments of the present disclosure, the current stabilization module includes a tenth transistor. For the tenth transistor, the control electrode is electrically connected to the first power supply, the first electrode is electrically connected to the first node, and the second electrode is electrically connected to the control end of the second pull-down control module.

[0020] According to a second aspect, an embodiment of the present disclosure is a time series control method applied to the light-emitting drive circuit described in any one of the above first aspects or the first aspect. When applied to the light-emitting drive circuit, the method includes: In a trigger stage, controlling the second clock signal line to output a second clock signal at a low potential so that the first pull-down control module is turned off. When the light-emitting drive signal of the (n + 1)-th stage is at a high potential, controlling the first clock signal line to output a first clock signal at a high potential so that the first pull-up control module is turned on, the potential of the first node is pulled up to a first potential, and the second pull-down control module is charged. In an output stage, controlling the first clock signal line to output a first clock signal at a low potential so that the first pull-up control module is turned off, the first pull-down control module is turned on, the second pull-down control module discharges, and controlling the second clock signal line to output a second clock signal at a high potential so that the potential of the second node is pulled up to a fourth potential. In a reset stage, when the light-emitting drive signal of the (n - 1)-th stage is at a high potential, controlling the second clock signal line to output a second clock signal at a high potential so that the first pull-down control module is turned on and the potential of the first node is pulled up to a third potential.

[0021] According to a third aspect, an embodiment of the present disclosure is a display panel, including: The light-emitting drive circuit described in any one of the above first aspects or the first aspect. including a plurality of pixel drive circuits connected to the light emission drive circuit; The light emission drive circuit is used to output a corresponding light emission drive signal for each of the pixel drive circuits.

Effect of the Invention

[0022] The technical solution according to an embodiment of the present disclosure includes N cascaded sub-light-emitting drive circuits. The nth (n ∈ [1, N]) sub-light-emitting drive circuit includes a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, and a pull-down module. The input terminal of the first pull-up control module is connected to the first power supply, the control terminal is connected to the first clock signal and the light-emitting drive signal of the (n + 1)th stage, the output terminal is electrically connected to the first node, and the first pull-up control module is used to pull up the potential of the first node to the first potential at the trigger stage. The input terminal of the first pull-down control module is connected to the light-emitting drive signal of the (n - 1)th stage, the control terminal is connected to the second clock signal, the output terminal is electrically connected to the first node, and the first pull-down control module is used to pull down the potential of the first node to the second potential at the output stage and pull up the potential of the first node to the third potential at the reset stage. The input terminal of the pull-up module is connected to the first power supply, the control terminal is electrically connected to the first node, the output terminal is electrically connected to the light-emitting drive signal output terminal, and the pull-up module is used to pull up the nth light-emitting drive signal output from the light-emitting drive signal output terminal to a high potential when the potential of the first node is the first potential or the third potential. The input terminal of the second pull-down control module is connected to the first clock signal and the first power supply respectively, the control terminal is connected to the first node and the second clock signal respectively, the output terminal is electrically connected to the second node, and the second pull-down control module is used to pull up the potential of the second node to the fourth potential at the output stage. The input terminal of the pull-down module is connected to the second power supply, the control terminal is electrically connected to the second node, the output terminal is electrically connected to the light-emitting drive signal output terminal, and the pull-down module is used to pull down the nth light-emitting drive signal output from the light-emitting drive signal output terminal to a low potential when the potential of the second node is the fourth potential.In the above technical solution, each stage of the sub-light-emitting drive circuit can modulate a desired light-emitting control signal according to a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, a pull-down module, and corresponding connection relationships. Since the number of such modules is small, the architecture of the light-emitting drive circuit can be simplified, and the complexity of the architecture of the light-emitting drive circuit can be reduced.

Brief Description of the Drawings

[0023] To more clearly illustrate the means in the embodiments of the present disclosure, the drawings required in the following description of the embodiments are briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and those skilled in the art can also obtain other drawings based on these drawings without creative labor.

Figure 1

Figure 2

Embodiments for Carrying Out the Invention

[0024] To make the objectives, technical solutions, and advantages of the present disclosure more clear, the embodiments of the present disclosure will be described in more detail below in connection with the drawings.

[0025] The terms used in the embodiment part of the embodiments of the present disclosure are only for explaining the specific embodiments of the present disclosure and are not for limiting the present disclosure. Several of the following specific embodiments can be combined with each other, and for the same or similar concepts or processes, the description may be omitted in some embodiments.

[0026] The light-emitting device in the embodiments of the present disclosure may be any one of an OLED, a Quantum Dot Light Emitting Diode (QLED), and a Mini Light Emitting Diode (Mini LED). In this embodiment, it will be exemplarily described by taking the case where the light-emitting device is an OLED as an example.

[0027] FIG. 1 is a schematic circuit structure diagram of the nth sub-light-emitting driving circuit in the light-emitting driving circuit according to the embodiment of the present disclosure. The light-emitting driving circuit according to the embodiment of the present disclosure may include N cascaded sub-light-emitting driving circuits, where n ∈ [1, N]. As shown in FIG. 1, the nth sub-light-emitting driving circuit according to the embodiment of the present disclosure may include a first pull-up control module 10, a pull-up module 20, a first pull-down control module 30, a second pull-down control module 40, and a pull-down module 50.

[0028] The input terminal of the first pull-up control module 10 accesses the first power supply VDD, the control terminal accesses the first clock signal CKB and the light-emitting driving signal EM+1 of the (n + 1)th stage, the output terminal is electrically connected to the first node P, and the first pull-up control module 10 is used to pull up the potential of the first node P to the first potential at the trigger stage. The first power supply VDD may be a DC power supply that outputs a high-potential voltage, and the first potential may be a high potential.

[0029] It should be noted that when n = N, the control terminal of the first pull-up control module 10 accesses the first clock signal CKB and the pull-up signal, and the first pull-up control module 10 is controlled to be turned on by both the pull-up signal and the first clock signal CKB so as to pull up the potential of the first node P to the first potential.

[0030] The first pull-down control module 30 has its input terminal accessing the light-emitting drive signal EM-1 of the (n-1)-th stage (when n = 1, the input terminal of the first pull-down control module 30 accesses the start signal STE), its control terminal accessing the second clock signal CK, and its output terminal electrically connected to the first node P. The first pull-down control module 30 pulls down the potential of the first node P to the second potential in the output stage and pulls up the potential of the first node P to the third potential in the reset stage. The phase of the second clock signal CK is opposite to the phase of the first clock signal CKB. The second potential is a low potential, and the third potential is a high potential.

[0031] The pull-up module 20 has its input terminal connected to the first power supply VDD, its control terminal electrically connected to the first node P, and its output terminal electrically connected to the light-emitting drive signal output terminal. When the potential of the first node P is the first potential or the third potential (i.e., in the trigger stage and the reset stage), the pull-up module 20 pulls up the n-th stage light-emitting drive signal EM output from the light-emitting drive signal output terminal to a high potential.

[0032] The second pull-down control module 40 has its input terminal accessing the first clock signal CKB and the first power supply VDD respectively, its control terminal connected to the first node P and the second clock signal CK respectively, and its output terminal electrically connected to the second node Q. The second pull-down control module 40 is used to pull up the potential of the second node Q to the fourth potential in the output stage. The fourth potential is a high potential.

[0033] The pull-down module 50 has its input terminal connected to the second power supply VSS, its control terminal electrically connected to the second node Q, and its output terminal electrically connected to the light-emitting drive signal output terminal. When the potential of the second node Q is the fourth potential (i.e., in the output stage), the pull-down module 50 is used to pull down the n-th stage light-emitting drive signal EM output from the light-emitting drive signal output terminal to a low potential. The second power supply VSS may be a DC power supply that outputs a low potential voltage.

[0034] The light-emitting driving signal output terminal of the sub-light-emitting driving circuit of the nth stage outputs the light-emitting driving signal EM of the nth stage at a high potential in the trigger stage and the reset stage, and outputs the light-emitting driving signal EM of the nth stage at a low potential in the output stage. In this way, the sub-light-emitting driving circuit of the nth stage can modulate a desired light-emitting control signal (i.e., the light-emitting driving signal EM of the nth stage) by the first pull-up control module 10, the pull-up module 20, the first pull-down control module 30, the second pull-down control module 40, the pull-down module 50, and the corresponding connection relationship. By using only five modules, the architecture of the light-emitting driving circuit can be simplified, and the complexity of the architecture of the light-emitting driving circuit can be reduced.

[0035] The nth sub-light-emitting driving circuit may further include a second pull-up control module 60. One end of the second pull-up control module 60 is electrically connected to the control end of the pull-up module 20, and the other end is electrically connected to the light-emitting driving signal output terminal. The second pull-up control module 60 pulls up the potential of the first node P from the first potential to the fifth potential in the reset stage, and the fifth potential is a high potential and higher than the first potential. When the potential of the first node P is the fifth potential, the pull-up module 20 may pull up the potential of the light-emitting driving signal EM of the nth stage output from the light-emitting driving signal output terminal. Since the first node P is electrically connected to the control end of the pull-up module 20, the potential of the first node P is the potential of the control end of the pull-up module 20. That is, in the reset stage, the second pull-up control module 60 pulls up the potential of the control end of the pull-up module 20 from the first potential to the fifth potential. In this way, the pull-up module 20 can make the potential of the light-emitting driving signal EM of the nth stage closer to the ideal value (i.e., the potential of the first power supply VDD).

[0036] The nth sub-light-emitting driving circuit may further include a first sustain module 70 and a second sustain module 80. The input terminal of the first sustain module 70 accesses the second power supply VSS, the control terminal is electrically connected to the first node P, the output terminal is electrically connected to the second node Q. When the potential of the first node P is the first potential or the fifth potential (i.e., the trigger stage), the first sustain module 70 maintains the low potential of the second node Q, so as to continuously turn off the pull-down module 50, and only outputs the high-potential nth-stage light-emitting driving signal EM to the light-emitting driving signal output terminal.

[0037] The input terminal of the second sustain module 80 is connected to the second power supply VSS, the control terminal is electrically connected to the second node Q, the output terminal is electrically connected to the first node P. When the potential of the second node Q is the fourth potential (i.e., the output stage), the second sustain module 80 maintains the low potential of the first node P, so as to continuously turn off the pull-up module 20, and only outputs the low-potential nth-stage light-emitting driving signal EM to the light-emitting driving signal output terminal.

[0038] The nth sub-light-emitting driving circuit may further include a current stabilization module 90. The input terminal of the current stabilization module 90 is electrically connected to the first node P, the control terminal is electrically connected to the first power supply VDD, the output terminal is electrically connected to the control terminal of the second pull-down control module 40. The current stabilization module 90 can stabilize the current of the control terminal of the pull-up module 20, so that the pull-up module 20 can pull up the potential of the nth-stage light-emitting driving signal EM more stably, and the nth-stage light-emitting driving signal EM output from the pull-up light-emitting driving signal output terminal also becomes more stable.

[0039] Specifically, the first pull-up control module 10 may include a first transistor T1 and a second transistor T2. The control pole of the first transistor T1 accesses the first clock signal CKB, the first pole is electrically connected to the first power supply VDD, and the second pole is electrically connected to the first pole of the second transistor T2.

[0040] The second transistor T2 has its control electrode accessing the light-emitting driving signal EM+1 of the (n+1)-th stage, and its second electrode electrically connected to the first node P.

[0041] The pull-up module 20 may include a seventh transistor T7. The seventh transistor T7 has its control electrode electrically connected to the first node P, its first electrode accessing the first power supply VDD, and its second electrode electrically connected to the light-emitting driving signal output terminal.

[0042] The first pull-down control module 30 may include an eighth transistor T8. The eighth transistor T8 has its control electrode accessing the second clock signal CK, its first electrode accessing the light-emitting driving signal EM-1 of the (n-1)-th stage (when n = 1, the first electrode of the eighth transistor T8 accesses the start signal STE), and its second electrode electrically connected to the first node P.

[0043] The second pull-down control module 40 may include a third transistor T3, a fourth transistor T4, and a second capacitor C2. The third transistor T3 has its control electrode electrically connected to the first node P, its first electrode accessing the first clock signal CKB, and its second electrode electrically connected to the first electrode of the fourth transistor T4.

[0044] The fourth transistor T4 has its control electrode accessing the second clock signal CK, and its second electrode electrically connected to the second node Q.

[0045] One end of the second capacitor C2 is electrically connected to the first power supply VDD, and the other end is electrically connected to the second electrode of the third transistor T3.

[0046] The pull-down module 50 may include a ninth transistor T9. The ninth transistor T9 has its control electrode electrically connected to the second node Q, its first electrode accessing the second power supply VSS, and its second electrode electrically connected to the light-emitting driving signal output terminal.

[0047] The second pull-up control module 60 may include a first capacitor C1. One end of the first capacitor C1 is electrically connected to the control electrode of the seventh transistor T7, and the other end is electrically connected to the light-emitting drive signal output end.

[0048] The first maintenance module 70 may include a fifth transistor T5. The first pole of the fifth transistor T5 is electrically connected to the second power supply VSS, the control electrode is electrically connected to the first node P, and the second pole is electrically connected to the second node Q.

[0049] The second maintenance module 80 may include a sixth transistor T6. The first pole of the sixth transistor T6 is electrically connected to the second power supply VSS, the control electrode is electrically connected to the second node Q, and the second pole is electrically connected to the first node P.

[0050] The current stabilization module 90 may include a tenth transistor. The control electrode of the tenth transistor is electrically connected to the first power supply VDD, the first pole is electrically connected to the first node P, and the second pole is electrically connected to the control electrode of the third transistor T3.

[0051] The first transistor T1, the second transistor T2, the fourth transistor T4, and the eighth transistor T8 may be PMOS transistors or NMOS transistors. When the transistor is a PMOS transistor, the first pole of the transistor is the source, the second pole is the drain, and the control electrode is the gate. When the transistor is an NMOS transistor, the first pole of the transistor is the drain, the second pole is the source, and the control electrode is the gate. In this embodiment, it is described by taking the example that all the above transistors are NMOS transistors.

[0052] Embodiments of the present disclosure provide a time series control method applied to the above light emission driving circuit. In the trigger stage, control is performed to output a second clock signal CK with a low potential on the second clock signal CK line so that the first pull-down control module 30 is turned off. When the light emission driving signal EM+1 of the (n + 1)-th stage is at a high potential, the first pull-up control module 10 is turned on, the potential of the first node P is pulled up to the first potential, and control is performed to output a first clock signal CKB with a high potential on the first clock signal CKB line so that the second pull-down control module 40 is charged.

[0053] In the output stage, control is performed to output a first clock signal CKB with a low potential on the first clock signal CKB line so that the first pull-up control module 10 is turned off, the first pull-down control module 30 is turned on, the second pull-down control module 40 discharges, and control is performed to output a second clock signal CK with a high potential on the second clock signal CK line so that the potential of the second node Q is pulled up to the fourth potential.

[0054] In the reset stage, when the light emission driving signal EM-1 of the (n - 1)-th stage is at a high potential, the first pull-down control module 30 is turned on, and control is performed to output a second clock signal CK with a high potential on the second clock signal CK line so that the potential of the first node P is pulled up to the third potential.

[0055] FIG. 2 is a timing diagram of controlling a sub-light emission driving circuit by the time series control method according to an embodiment of the present disclosure. As shown in FIG. 2, in the trigger stage I, the second clock signal CK is at a low level, and the fourth transistor T4 and the eighth transistor T8 are turned off. The first clock signal CKB and the light emission driving signal EM+1 of the (n + 1)-th stage are at a high level, the first transistor T1 and the second transistor T2 are turned on, the potential of the first node P is pulled up to the first potential, the first capacitor C1 is charged, the seventh transistor T7 is turned on, and the high potential of the first power supply VDD is written to the light emission driving signal output terminal through the turned-on seventh transistor T7, and the light emission driving signal EM of the n-th stage with the high potential at the light emission driving signal output terminal is output. At the same time, the high potential of the first node P turns on the third transistor T3, the second capacitor C2 is charged, and the high potential first clock signal CKB is written to the node N1 through the third transistor T3, N1 is maintained at a high level, the temporary storage operation of the signal is completed, the second node Q is maintained at a low level, and the ninth transistor T9 is turned off. Further, the high potential of the first node P turns on the fifth transistor T5, the low potential of the second power supply VSS is written to the second node Q, the second node Q is maintained at a low level, and the ninth transistor T9 remains turned off.

[0056] Immediately after the output stage II starts, the first clock signal CKB becomes low, and the first transistor T1 turns off. The second clock signal CK becomes high, the eighth transistor T8 turns on, and the low potential (i.e., the second potential) of the light-emitting drive signal EM-1 of the (n-1)th stage is written to the first node P, and the third transistor T3 and the seventh transistor T7 turn off. The fourth transistor T4 turns on, the second capacitor C2 discharges, and the high potential (i.e., the fourth potential) of the node N1 is written to the second node Q. The ninth transistor T9 turns on, and the low potential of the second power supply VSS is written to the light-emitting drive signal output terminal through the turned-on ninth transistor T9, and the light-emitting drive signal output terminal outputs the light-emitting drive signal EM of the nth stage with a low potential, and the switching of the high and low potentials of the light-emitting drive signal EM of the nth stage is completed. Also, the high potential of the second node Q turns on the sixth transistor T6, the low potential of the second power supply VSS is written to the first node P, the first node P is maintained at a low potential, and the seventh transistor T7 continues to turn off.

[0057] In the subsequent time of the output stage II, since both the light-emitting drive signal EM-1 of the (n-1)th stage and the light-emitting drive signal EM+1 of the (n+1)th stage continue to be at a low potential, the second transistor T2 continues to turn off. Despite the switching of the high and low potentials of the first clock signal CKB and the second clock signal CK, the potential of the first node P is maintained at a low potential. Also, despite the switching of the fourth transistor T4 between the on state and the off state due to the switching of the high and low potentials of the second clock signal CK, the second node Q is always maintained at a high potential. Therefore, throughout the output stage II, the light-emitting drive signal output terminal continues to output the light-emitting drive signal EM of the nth stage with a low potential.

[0058] In the reset stage III, as the emission driving signal EM-1 of the (n-1)-th stage is switched to a high level and the second clock signal CK becomes high, the eighth transistor T8 is turned on, and the high-level emission driving signal EM-1 of the (n-1)-th stage is written to the first node P. At this time, the first capacitor C1 is discharged, the potential of the gate of the seventh transistor T7 rises to the fifth potential, the seventh transistor T7 is turned on, and the high potential of VDD is written to the emission driving signal output terminal through the seventh transistor T7 that is turned on when the first power supply is turned on, and the emission driving signal output terminal outputs the emission driving signal EM of the n-th stage at a high level. Also, the high potential of the first node P turns on the fifth transistor T5, and the low potential of the second power supply VSS is written to the second node Q, and the second node Q is maintained at a low potential, keeping the ninth transistor T9 turned off.

[0059] An embodiment of the present disclosure is a display panel, including the above-mentioned emission driving circuit and a plurality of pixel driving circuits connected to the emission driving circuit, and the emission driving circuit is used to output corresponding emission driving signals for each pixel driving circuit.

[0060] Note that the circuit modules described in the embodiments of the present disclosure do not specifically limit the pixel driving circuit. In some other embodiments of the present disclosure, the pixel driving circuit may include more or fewer circuit modules than shown, or some circuit modules may be combined, or some circuit modules may be divided. Each circuit module may include more or fewer components than shown. The illustrated circuit modules may be implemented by hardware, software, or a combination of software and hardware.

[0061] The technical solution according to an embodiment of the present disclosure includes N cascaded sub-light-emitting drive circuits. The nth (n ∈ [1, N]) sub-light-emitting drive circuit includes a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, and a pull-down module. The input terminal of the first pull-up control module is connected to the first power supply, the control terminal is connected to the first clock signal and the light-emitting drive signal of the (n + 1)th stage, the output terminal is electrically connected to the first node, and the first pull-up control module is used to pull up the potential of the first node to the first potential at the trigger stage. The input terminal of the first pull-down control module is connected to the light-emitting drive signal of the (n - 1)th stage, the control terminal is connected to the second clock signal, the output terminal is electrically connected to the first node, and the first pull-down control module is used to pull down the potential of the first node to the second potential at the output stage and pull up the potential of the first node to the third potential at the reset stage. The input terminal of the pull-up module is connected to the first power supply, the control terminal is electrically connected to the first node, the output terminal is electrically connected to the light-emitting drive signal output terminal, and the pull-up module is used to pull up the nth stage light-emitting drive signal output from the light-emitting drive signal output terminal to a high potential when the potential of the first node is the first potential or the third potential. The input terminals of the second pull-down control module are respectively connected to the first clock signal and the first power supply, the control terminals are respectively connected to the first node and the second clock signal, the output terminal is electrically connected to the second node, and the second pull-down control module is used to pull up the potential of the second node to the fourth potential at the output stage. The input terminal of the pull-down module is connected to the second power supply, the control terminal is electrically connected to the second node, the output terminal is electrically connected to the light-emitting drive signal output terminal, and the pull-down module is used to pull down the nth stage light-emitting drive signal output from the light-emitting drive signal output terminal to a low potential when the potential of the second node is the fourth potential.In the above technical solution, each stage of the sub-light-emitting drive circuit can modulate a desired light-emitting control signal by means of a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, a pull-down module, and a corresponding connection relationship. Since the number of such modules is small, the architecture of the light-emitting drive circuit can be simplified, and the complexity of the architecture of the light-emitting drive circuit can be reduced.

[0062] In the above embodiments, each embodiment has a focus. For parts not detailed or described in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0063] Also, the dimensional ratio relationship between the members in the drawings is only for convenience and does not reflect the actual dimensional ratio relationship between the members.

[0064] In the description of the present disclosure, the orientation or positional relationship indicated by terms such as "center", "longitudinal direction", "lateral direction", "up", "down", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for convenience and simplification of description, and does not indicate or imply that such devices or components must have a specific orientation and be configured and operated in a specific orientation. Therefore, it should not be understood as a limitation to the present invention.

[0065] In the description of the present disclosure, unless otherwise specified, the terms "mounted", "connected", and "connected" should be understood in a broad sense. For example, they may be fixedly connected, detachably connected, integrally connected, mechanically connected, electrically connected, directly connected, indirectly connected through an intermediate medium, or the interiors of two elements may communicate. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to specific situations.

[0066] Note that, when the term "comprising" is used in the description and claims of the present disclosure, it indicates the presence of the features, wholes, steps, operations, elements and / or assemblies to be described, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, assemblies and / or their combinations.

[0067] In the description of the present disclosure, unless otherwise specified, " / " indicates that the related objects before and after are in an "or" relationship. For example, A / B can represent A or B. "And / or" in the present disclosure only explains the relationship of the related objects, indicating that there are three relationships. For example, A and / or B may represent three cases: A exists alone, A and B exist simultaneously, and B exists alone, where A and B may be one or more.

[0068] Also, in the description of the present disclosure, unless otherwise specified, "a plurality" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can represent a, b, c, a-b, a-c, b-c or a-b-c, where a, b, c may be one or more.

[0069] Also, in the description of the specification and claims of the present disclosure, terms such as "first", "second", "third", etc. are for distinguishing similar objects and do not necessarily explain a specific order or sequence. The data used in this way may be appropriately exchanged so that the embodiments described herein can be implemented in an order other than that illustrated or described.

[0070] In this specification, when referring to "one embodiment" or "some embodiments", etc., it means that one or more embodiments of the present disclosure include the specific features, structures, or characteristics described in connection with that embodiment. Thus, statements such as "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. at different places in this specification do not necessarily refer to the same embodiment, unless otherwise specified, and mean "one or more but not all embodiments".

[0071] Finally, each of the above embodiments is only for explaining the technical solution of the present disclosure and is not a limitation. Despite having described the present disclosure in detail with reference to each of the above embodiments, those skilled in the art can still modify the technical solutions described in each of the above embodiments, or perform equivalent substitutions for some or all of the technical features therein. It should be understood that these modifications or substitutions do not deviate from the essence of the corresponding technical solutions from the scope of the technical solutions according to each embodiment of the present disclosure. (Other possible items) (Item 1) including N cascaded sub-light-emitting drive circuits, the nth (n ∈ [1, N]) sub-light-emitting drive circuit includes a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, and a pull-down module, the input end of the first pull-up control module accesses the first power supply, the control end accesses the first clock signal and the light-emitting drive signal of the (n + 1)th stage, and the output end is electrically connected to the first node, the first pull-up control module is used to pull up the potential of the first node to the first potential at the trigger stage, the input end of the first pull-down control module accesses the light-emitting drive signal of the (n - 1)th stage, the control end accesses the second clock signal, and the output end is electrically connected to the first node, The first pull-down control module is used to pull down the potential of the first node to a second potential in the output stage and pull up the potential of the first node to a third potential in the reset stage. The pull-up module has an input terminal accessing the first power supply, a control terminal electrically connected to the first node, and an output terminal electrically connected to the light-emitting drive signal output terminal. The pull-up module is used to pull up the potential of the nth-stage light-emitting drive signal output from the light-emitting drive signal output terminal to a high potential when the potential of the first node is the first potential or the third potential. The second pull-down control module has an input terminal accessing the first clock signal and the first power supply respectively, a control terminal accessing the first node and the second clock signal respectively, and an output terminal electrically connected to the second node. The second pull-down control module is used to pull up the potential of the second node to a fourth potential in the output stage. The pull-down module has an input terminal accessing the second power supply, a control terminal electrically connected to the second node, and an output terminal electrically connected to the light-emitting drive signal output terminal. The pull-down module is used to pull down the potential of the nth-stage light-emitting drive signal output from the light-emitting drive signal output terminal to a low potential when the potential of the second node is the fourth potential. Light-emitting drive circuit. (Item 2) The nth sub-light-emitting drive circuit further includes a second pull-up control module. One end of the second pull-up control module is electrically connected to the control terminal of the pull-up module, and the other end is electrically connected to the light-emitting drive signal output terminal. The second pull-up control module is used to pull up the potential of the first node from the first potential to a fifth potential in the reset stage. The pull-up module is used to pull up the potential of the nth-stage light-emitting drive signal output from the light-emitting drive signal output terminal when the potential of the first node is the fifth potential. The light-emitting driving circuit according to item 1. (Item 3) The second pull-up control module includes a first capacitor, One end of the first capacitor is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting driving signal output end. The light-emitting driving circuit according to item 2. (Item 4) The first pull-up control module includes a first transistor and a second transistor. The control electrode of the first transistor accesses the first clock signal, the first electrode is electrically connected to the first power supply, and the second electrode is electrically connected to the first electrode of the second transistor. The control electrode of the second transistor accesses the light-emitting driving signal of the (n + 1)-th stage, and the second electrode is electrically connected to the first node. The light-emitting driving circuit according to item 1. (Item 5) The second pull-down control module includes a third transistor, a fourth transistor, and a second capacitor. The control electrode of the third transistor is electrically connected to the first node, the first electrode accesses the first clock signal, and the second electrode is electrically connected to the first electrode of the fourth transistor. The control electrode of the fourth transistor accesses the second clock signal, and the second electrode is electrically connected to the second node. One end of the second capacitor is electrically connected to the first power supply, and the other end is electrically connected to the second electrode of the third transistor. The light-emitting driving circuit according to item 1. (Item 6) The n-th sub-light-emitting driving circuit further includes a first maintenance module and a second maintenance module. The input end of the first maintenance module accesses the second power supply, the control end is electrically connected to the first node, and the output end is electrically connected to the second node. The first maintenance module is used to maintain the potential of the second node when the potential of the first node is the first potential. The second maintenance module has an input terminal accessing the second power supply, a control terminal electrically connected to the second node, and an output terminal electrically connected to the first node. The second maintenance module maintains the potential of the first node when the potential of the second node is the fourth potential. The light-emitting driving circuit according to item 1. (Item 7) The first maintenance module includes a fifth transistor. The fifth transistor has a first pole electrically connected to the second power supply, a control pole electrically connected to the first node, and a second pole electrically connected to the second node. The light-emitting driving circuit according to item 6. (Item 8) The second maintenance module includes a sixth transistor. The sixth transistor has a first pole electrically connected to the second power supply, a control pole electrically connected to the second node, and a second pole electrically connected to the first node. The light-emitting driving circuit according to item 6. (Item 9) The pull-up module includes a seventh transistor. The seventh transistor has a control pole electrically connected to the first node, a first pole accessing the first power supply, and a second pole electrically connected to the light-emitting driving signal output terminal. The light-emitting driving circuit according to item 1. (Item 10) The first pull-down control module includes an eighth transistor. The eighth transistor has a control pole accessing the second clock signal, a first pole accessing the light-emitting driving signal of the (n - 1)-th stage, and a second pole electrically connected to the first node. The light-emitting driving circuit according to item 1. (Item 11) The pull-down module includes a ninth transistor. The ninth transistor has a control pole electrically connected to the second node, a first pole accessing the second power supply, and a second pole electrically connected to the light-emitting driving signal output terminal. The light-emitting driving circuit according to Item 1. (Item 12) The n-th sub-light-emitting driving circuit further includes a current stabilizing module. The current stabilizing module has an input terminal electrically connected to the first node, a control terminal electrically connected to the first power supply, and an output terminal electrically connected to the control terminal of the second pull-down control module. The current stabilizing module is used to stabilize the current of the control terminal of the pull-up module. The light-emitting driving circuit according to any one of Items 1 to 11. (Item 13) The current stabilizing module includes a tenth transistor. For the tenth transistor, the control electrode is electrically connected to the first power supply, the first electrode is electrically connected to the first node, and the second electrode is electrically connected to the control terminal of the second pull-down control module. The light-emitting driving circuit according to Item 12. (Item 14) A time-series control method applied to the light-emitting driving circuit according to any one of Items 1 to 13, In the trigger stage, control is performed so that the second clock signal line outputs a second clock signal with a low potential so that the second pull-down control module is turned off. When the light-emitting driving signal of the (n + 1)-th stage is at a high potential, the first pull-up control module is turned on, the potential of the first node is pulled up to the first potential, and control is performed so that the first clock signal line outputs a first clock signal with a high potential so that the second pull-down control module is charged. In the output stage, control is performed so that the first clock signal line outputs a first clock signal with a low potential so that the first pull-up control module is turned off. The first pull-down control module is turned on, the second pull-down control module discharges, and control is performed so that the second clock signal line outputs a second clock signal with a high potential so that the potential of the second node is pulled up to the fourth potential. In a reset stage, when the light emission driving signal of the (n-1)th stage is at a high potential, the first pull-down control module is turned on, and the second clock signal line outputs a high-potential second clock signal so that the potential of the first node is pulled up to a third potential. Time series control method. (Item 15) The light emission driving circuit according to any one of Items 1 to 13, A plurality of pixel driving circuits connected to the light emission driving circuit. The light emission driving circuit is used to output a corresponding light emission driving signal for each of the pixel driving circuits. Display panel.

Claims

1. including N cascaded sub-light-emitting drive circuits, the nth (n ∈ [1, N]) sub-light-emitting drive circuit includes a first pull-up control module, a pull-up module, a first pull-down control module, a second pull-down control module, and a pull-down module, the input terminal of the first pull-up control module accesses the first power supply, the control terminal accesses the first clock signal and the light-emitting drive signal of the (n + 1)th stage, and the output terminal is electrically connected to the first node, the first pull-up control module is used to pull up the potential of the first node to the first potential at the trigger stage, the input terminal of the first pull-down control module accesses the light-emitting drive signal of the (n - 1)th stage, the control terminal accesses the second clock signal, and the output terminal is electrically connected to the first node, the first pull-down control module is used to pull down the potential of the first node to the second potential at the output stage and pull up the potential of the first node to the third potential at the reset stage, the input terminal of the pull-up module accesses the first power supply, the control terminal is electrically connected to the first node, and the output terminal is electrically connected to the light-emitting drive signal output terminal, the pull-up module is used to pull up the nth light-emitting drive signal output from the light-emitting drive signal output terminal to a high potential when the potential of the first node is the first potential or the third potential, the input terminals of the second pull-down control module access the first clock signal and the first power supply respectively, the control terminals access the first node and the second clock signal respectively, and the output terminal is electrically connected to the second node, the second pull-down control module is used to pull up the potential of the second node to the fourth potential at the output stage, the input terminal of the pull-down module accesses the second power supply, the control terminal is electrically connected to the second node, and the output terminal is electrically connected to the light-emitting drive signal output terminal, the pull-down module is used to pull down the nth light-emitting drive signal output from the light-emitting drive signal output terminal to a low potential when the potential of the second node is the fourth potential, a light-emitting drive circuit.

2. the nth sub-light-emitting drive circuit further includes a second pull-up control module, One end of the second pull-up control module is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting drive signal output end. The second pull-up control module is used to pull up the potential of the first node to a fifth potential higher than the first potential and the third potential in the reset stage. When the potential of the first node is the fifth potential, the pull-up module is used to pull up the potential of the nth-stage light-emitting drive signal output from the light-emitting drive signal output end. The light-emitting drive circuit according to claim 1.

3. The second pull-up control module includes a first capacitor. One end of the first capacitor is electrically connected to the control end of the pull-up module, and the other end is electrically connected to the light-emitting drive signal output end. The light-emitting drive circuit according to claim 2.

4. The first pull-up control module includes a first transistor and a second transistor. The control pole of the first transistor accesses the first clock signal, the first pole is electrically connected to the first power supply, and the second pole is electrically connected to the first pole of the second transistor. The control pole of the second transistor accesses the light-emitting drive signal of the (n + 1)th stage, and the second pole is electrically connected to the first node. The light-emitting drive circuit according to claim 1.

5. The second pull-down control module includes a third transistor, a fourth transistor, and a second capacitor. The control pole of the third transistor is electrically connected to the first node, the first pole accesses the first clock signal, and the second pole is electrically connected to the first pole of the fourth transistor. The control pole of the fourth transistor accesses the second clock signal, and the second pole is electrically connected to the second node. One end of the second capacitor is electrically connected to the first power supply, and the other end is electrically connected to the second pole of the third transistor. The light-emitting drive circuit according to claim 1.

6. The nth sub-light-emitting drive circuit further includes a first maintenance module and a second maintenance module. The input end of the first maintenance module accesses the second power supply, the control end is electrically connected to the first node, and the output end is electrically connected to the second node. When the potential of the first node is the first potential, the first maintenance module is used to maintain the potential of the second node. The second maintenance module has an input terminal accessing the second power supply, a control terminal electrically connected to the second node, and an output terminal electrically connected to the first node. When the potential of the second node is the fourth potential, the second maintenance module maintains the potential of the first node. The light-emitting driving circuit according to claim 1.

7. The first maintenance module includes a fifth transistor. The fifth transistor has a first pole electrically connected to the second power supply, a control pole electrically connected to the first node, and a second pole electrically connected to the second node. The light-emitting driving circuit according to claim 6.

8. The second maintenance module includes a sixth transistor. The sixth transistor has a first pole electrically connected to the second power supply, a control pole electrically connected to the second node, and a second pole electrically connected to the first node. The light-emitting driving circuit according to claim 6.

9. The pull-up module includes a seventh transistor. The seventh transistor has a control pole electrically connected to the first node, a first pole accessing the first power supply, and a second pole electrically connected to the light-emitting driving signal output terminal. The light-emitting driving circuit according to claim 1.

10. The first pull-down control module includes an eighth transistor. The eighth transistor has a control pole accessing the second clock signal, a first pole accessing the light-emitting driving signal of the (n - 1)-th stage, and a second pole electrically connected to the first node. The light-emitting driving circuit according to claim 1.

11. The pull-down module includes a ninth transistor. The ninth transistor has a control pole electrically connected to the second node, a first pole accessing the second power supply, and a second pole electrically connected to the light-emitting driving signal output terminal. The light-emitting driving circuit according to claim 1.

12. The n-th sub-light-emitting driving circuit further includes a current stabilization module. The current stabilization module has an input terminal electrically connected to the first node, a control terminal electrically connected to the first power supply, and an output terminal electrically connected to the control terminal of the second pull-down control module. The current stabilization module is used to stabilize the current of the control terminal of the pull-up module. The light-emitting driving circuit according to claim 1.

13. The current stabilization module includes a tenth transistor. The control terminal of the 10th transistor is electrically connected to the first power supply, the first terminal is electrically connected to the first node, and the second terminal is electrically connected to the control terminal of the second pull-down control module. The light emission driving circuit according to claim 12.

14. A time series control method applied to the light emission driving circuit according to any one of claims 1, 4 to 13, In the trigger stage, control is performed so that the second clock signal line outputs a second clock signal with a low potential so that the first pull-down control module is turned off. When the light emission driving signal of the (n + 1) -th stage is at a high potential, the first pull-up control module is turned on, the potential of the first node is pulled up to the first potential, and control is performed so that the first clock signal line outputs a first clock signal with a high potential so that the second pull-down control module is charged. In the output stage, control is performed so that the first clock signal line outputs a first clock signal with a low potential so that the first pull-up control module is turned off. The first pull-down control module is turned on, the second pull-down control module discharges, and control is performed so that the second clock signal line outputs a second clock signal with a high potential so that the potential of the second node is pulled up to the fourth potential. In the reset stage, when the light emission driving signal of the (n - 1) -th stage is at a high potential, control is performed so that the first pull-down control module is turned on and the second clock signal line outputs a second clock signal with a high potential so that the potential of the first node is pulled up to the third potential. A time series control method.

15. A time series control method applied to the light emission driving circuit according to claim 2 or 3, In the trigger stage, control is performed so that the second clock signal line outputs a second clock signal with a low potential so that the first pull-down control module is turned off. When the light emission driving signal of the (n + 1) -th stage is at a high potential, the first pull-up control module is turned on, the potential of the first node is pulled up to the first potential, and control is performed so that the first clock signal line outputs a first clock signal with a high potential so that the second pull-down control module is charged. In the output stage, control is performed such that the first clock signal line outputs a first clock signal at a low potential so that the first pull-up control module is turned off, the first pull-down control module is turned on, the second pull-down control module discharges, and the potential of the second node is pulled up to a fourth potential, and the second clock signal line outputs a second clock signal at a high potential. In the reset stage, when the light emission drive signal of the (n - 1)-th stage is at a high potential, control is performed such that the first pull-down control module is turned on and the second clock signal line outputs a second clock signal at a high potential so that the potential of the first node is pulled up to a fifth potential. A time-series control method.

16. A light emission drive circuit according to any one of Claims 1 to 13, A plurality of pixel drive circuits connected to the light emission drive circuit, wherein the light emission drive circuit is used to output a corresponding light emission drive signal for each of the pixel drive circuits. A display panel.

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