Encoding of Byte Information on the Data Bus

Abstract

Data may be communicated from a sending device to a receiving device via enabled or selected byte positions or other data bit groups of the data bus. The sending device may determine the data values ​​to be sent over the data bus and may determine which byte positions are enabled or selected and which are not. The sending device may also determine a code. The code may be a value that is not included in the data values ​​sent over the data bus. The sending device may then send the selected data values ​​in selected byte positions of the data bus and send the code in unselected byte positions of the data bus. The sending device may also send the code to the receiving device separately from the data bit lanes of the data bus.

Description

Technical Field

[0001] Description of Related Art

[0001] A computing device can include multiple subsystems, cores, or other components. Such a computing device can be, for example, a portable computing device (PCD) such as a laptop or palmtop computer, a cellular phone or smartphone, a portable digital assistant, a portable game console, etc.

[0002]

[0002] The multiple subsystems, cores, or other components of a computing device can be included within the same integrated circuit chip or different chips. A "system-on-a-chip" or "SoC" is an example of one such chip that integrates a number of components to provide system-level functionality. For example, an SoC can include one or more types of processors such as central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), and neural processing units (NPUs). An SoC can include other processing subsystems such as a transceiver or "modem" subsystem that provides wireless connectivity, a memory subsystem, etc.

[0003]

[0003] Various subsystems can communicate with each other via a data bus. The data bus can be serial or parallel. A parallel data bus comprises a plurality of signal lines, also called bits, lanes, etc. The number of data bus lanes is sometimes called the data bus width. A memory bus is a common example of a parallel data bus. A wider data bus can help increase bandwidth, but some drawbacks of a wider data bus can include more chip area occupied by the data bus lanes, increased power consumption, a narrower timing margin, etc.

[0004]

[0004] Some types of memory devices can be configured with different data widths depending on the application or data requirements. A feature of some systems having memory configurable with different data widths is the ability to selectively write to only a portion or subset of the widest data width. A technique known as "byte-enable" enables the selected byte to be written within a wider data width block. For example, in the case of a 32-bit width (i.e., 4 bytes), only the least significant byte can be selected to be written instead of all 4 bytes. Byte-enable (BE) bits can be communicated from a transmitting subsystem to a receiving subsystem along with the corresponding data byte. A transmitting device (e.g., a processor) can selectively transmit data using only all or a subset of the bytes of the data bus. The transmitting device can use the BE bits to indicate the selected or enabled byte positions on the data bus. Based on the BE bits, the receiving device can process only the data received at the enabled byte positions on the data bus and ignore (i.e., not process) the data received at the non-enabled byte positions on the data bus. For example, a memory can write only to the data bytes that indicate that the BE bits are enabled.

[0005]

[0005] In a data bus system where each data byte includes one BE bit, as the byte-wide data bus becomes wider, the number of lanes reserved for BE bits rather than data increases. It is desirable to provide BE features that increase the efficient use of lanes for data.

Summary of the Invention

[0006]

[0006] Systems, methods, computer-readable media, and other examples for communicating data from a transmitting device to a receiving device via a data bus using a selected byte position or other data bit groups are disclosed.

[0007]

[0007] An exemplary method for data communication via a data bus may be provided. The data bus may have a plurality of data bit groups. Each data bit group may have a plurality of data bit lanes. The method may include determining, by a transmitting device, a set of selected data values to be transmitted via the data bus. The method may also include determining, by the transmitting device, selected data bit groups and non-selected data bit groups. The method may further include determining, by the transmitting device, a code representing non-selected data values not included in the set of selected data values. The method may further include transmitting, via the data bit lanes, to a receiving device, the selected data values in the selected data bit groups and the code in the non-selected data bit groups. The method may further include transmitting the code to the receiving device separately from the data bit lanes.

[0008]

[0008] An exemplary system for data communication via a data bus may be provided. The data bus may have a plurality of data bit groups. Each data bit group may have a plurality of data bit lanes. The exemplary system may include an encoder and a data word formatter. The encoder may be configured to determine a selected set of data values to be transmitted via the data bus. The data word formatter may be configured to determine selected data bit groups and non-selected data bit groups. The data word formatter may also be configured to determine a code representing non-selected data values not included in the selected set of data values. The data word formatter may be further configured to provide a data word having the selected data values in the selected data bit groups and the code in the non-selected data bit groups to a receiving device via the data bit lanes. The data word formatter may be further configured to provide the code to the receiving device via a plurality of code bit lanes separate from the data bit lanes.

[0009]

[0009] Another exemplary system for data communication via a data bus may be provided. The data bus may have a plurality of data bit groups. Each data bit group may have a plurality of data bit lanes. The system may include means for determining a selected set of data values to be transmitted via the data bus. The system may also include means for determining selected data bit groups and non-selected data bit groups. The system may further include means for determining a code representing non-selected data values not included in the selected set of data values. The system may further include means for transmitting to a receiving device via the data bit lanes the selected data values in the selected data bit groups and the code in the non-selected data bit groups. The system may further include means for transmitting the code to the receiving device separately from the data bit lanes.

[0010] Exemplary computer-readable media for data communication via a data bus may be provided. The data bus may have a plurality of data bit groups. Each data bit group may have a plurality of data bit lanes. The computer-readable media may comprise a non-transitory computer-readable media storing instructions in a computer-executable form. The instructions, when executed by a processing system of a computing device, may configure the processing system to control the following. The instructions may configure the processing system to determine a set of selected data values transmitted via the data bus. The instructions may also configure the processing system to determine selected data bit groups and non-selected data bit groups. The instructions may further configure the processing system to determine a code representing non-selected data values not included in the set of selected data values. The instructions may further configure the processing system to transmit, via the data bit lanes, to a receiving device, the selected data values in the selected data bit groups and the code in the non-selected data bit groups. The instructions may further configure the processing system to transmit a code to the receiving device separately from the data bit lanes.

Brief Description of the Drawings

[0011]

[0011] In the figures, like reference numerals refer to like parts throughout the various figures unless otherwise indicated. In the case of reference numerals with a letter designation such as "102A" or "102B", the letter designation may distinguish two like parts or elements present in the same figure. The letter designation for a reference numeral may be omitted when it is intended that the reference numeral encompasses all parts having the same reference numeral in all figures.

Figure 1

[0012] FIG. is a block diagram showing a system for communicating data between a transmitting device and a receiving device via a data bus according to an exemplary embodiment.

Figure 2

[0013] A data diagram showing an exemplary data word configuration in which the system of FIG. 1 can operate according to an exemplary embodiment.

Figure 3

[0014] A flowchart showing an exemplary method for communicating data between a transmitting device and a receiving device via a data bus according to an exemplary embodiment.

Figure 4

[0015] A block diagram showing a portion of a device configured to transmit or send data via a data bus according to an exemplary embodiment.

Figure 5

[0016] A data diagram showing an example of the operation of the transmitting device of FIG. 4.

Figure 6

[0017] A block diagram showing a portion of a device configured to receive data via a data bus according to an exemplary embodiment.

Figure 7

[0018] A flowchart showing an exemplary method for receiving data via a data bus according to an exemplary embodiment.

Figure 8

[0019] A block diagram showing another system for communicating data between a transmitting device and a receiving device via a data bus according to an exemplary embodiment.

Figure 9

[0020] A block diagram of a computing device according to an exemplary embodiment.

DETAILED DESCRIPTION OF THE INVENTION

[0012]

[0021] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." The term "illustrative" may be used herein as a synonym for "exemplary." Any aspect described herein as "exemplary" should not necessarily be construed as being more preferred or advantageous than other aspects.

[0013]

[0022] As shown in FIG. 1, the system 100 can include a transmitting device 102 and a receiving device 104. The transmitting device 102 and the receiving device 104 can be included on a system-on-chip or “SoC” 106. That is, each of the transmitting device 102 and the receiving device 104 can include electronic circuitry on the SoC 106. In one example, the transmitting device 102 can include a processor or processing circuitry, and the receiving device 104 can include a memory device having a configurable data width. In this exemplary embodiment, the transmitting device 102 and the receiving device 104 are on the same SoC 106, but in other embodiments, such transmitting and receiving devices can be on separate chips. For example, the transmitting device and the receiving device can be on separate “chiplets” within a package.

[0014]

[0023] A data bus 108 having several (“N”) data bit lanes can interconnect the transmitting device 102 and the receiving device 104. Each data bit lane can be an electrical signal conductor or path, such as a metallization strip on the SoC 106. The data bus 108 can communicate N bits of information or data in parallel, with each data bit lane communicating 1 bit of data. The data bus 108 can have a width expressed in bits, bytes, or any other unit. For purposes of the present disclosure, the width of the data bus 108 can be expressed in units called “data bit groups,” where each data bit group includes two or more data bit lanes. In one example, each data bit group can consist of 8 data bit lanes, i.e., 1 byte, and the data bus 108 can have a width of 256 bytes communicated over a total of N = 2048 lanes (i.e., 256 bytes × 8 lanes per byte).

[0015]

[0024] In this example, each data bit group comprises 8 bits (i.e., 1 byte), but in other examples, each data bit group may include any number of bits greater than or equal to 2. The terms "transmitting side" and "receiving side" are used for illustrative purposes, and the exemplary direction of data communication is indicated by the arrows on the data bus 108 in FIG. 1, but it should be understood that the data bus 108 may be bidirectional in other examples. Also, the term "data bus" is used for convenience and should not be construed as limiting. For example, the data bus 108 may be a complex data interconnect such as a type of data interconnect sometimes referred to as a network on a chip or "network-on-a-chip, NoC", an interconnect "fabric", etc. Although not shown in FIG. 1, a data bus according to the present disclosure can interconnect any number of different devices. Any such device that transmits data to another such device via the data bus can be a "transmitting side" device as the term is used herein. Similarly, any such device that receives data from another such device via the data bus can be a "receiving side" device as the term is used herein. In some examples, since some devices can be bidirectional (i.e., transceivers), the transmitting side device can be a bidirectional device configured in a mode for transmitting data, while the receiving side device can be a bidirectional device configured in a mode for receiving data.

[0016]

[0025] In addition, several (``M'' number) of code bit lanes 110 can interconnect the transmitting device 102 and the receiving device 104. Similar to the data bit lanes described above for the data bus 108, each code bit lane can be an electrical signal conductor or path, such as a metallization strip on the SoC 106. The code bit lanes 110 can communicate a code including M parallel code bits from the transmitting device 102 to the receiving device 104. The code may be of the same data size as each data bit group. In an example where each data bit group consists of eight data bit lanes, the code can include eight bits (i.e., M = eight code bit lanes 110). Nevertheless, in other examples, the code can include any other number of bits that does not conflict with the principles of operation described below. The code bit lanes 110 can be part of the same interconnection structure as the data bus 108, but the code bit lanes 110 and the data bus 108 are shown separately in FIG. 1 for clarity. Note that in the example shown in FIG. 1, at least N + M lanes interconnect or couple the transmitting device 102 and the receiving device 104.

[0017]

[0026] As shown in FIG. 2, an exemplary data word configuration 200 may consist of 256 bytes, and correspondingly, it may be communicated by a data bus 108 (FIG. 1) having N = 2048 lanes (i.e., 256 bytes × 8 lanes / byte). In the illustrated data word configuration 200, the byte positions are examples of the above-described data bit groups of the data bus 108 (FIG. 1). Thus, in the example shown in FIG. 2, the data word configuration 200 consists of a first byte position 202A (e.g., the least significant byte position), a second byte position 202B adjacent to the first byte position 202A, a third byte position 202C adjacent to the second byte position 202B, and so on, up to the 256th byte position 202N (e.g., the most significant byte position). In the illustrated example, the first byte position 202A can include the first bit b0 of the data word, the second bit b1 of the data word, the third bit b2 of the data word, and so on, up to the eighth bit b7 of the data word, the second byte position 202B can include the ninth bit b8 of the data word to the sixteenth bit b15 of the data word, the third byte position 202C can include the seventeenth bit b16 of the data word to the twenty-fourth bit b23 of the data word, and so on, up to the 256th byte position 202N that can include the 2041st bit b2040 of the data word to the 2048th bit b2047 of the data word.

[0018]

[0027] In FIG. 3, a method 300 for communicating data via a data bus is shown. The data bus can be configured as described above with respect to FIGS. 1-2. That is, the data bus can include two or more data bit groups, such as two or more bytes, where each data bit group includes two or more data bit lanes. The transmitting device can be configured to control some or all of method 300. For example, in an embodiment where the transmitting device includes a processor, the processor can be configured by software or firmware to control some or all of method 300. Also, the transmitting device or a part thereof (e.g., the processor) can be an example of means for performing the functions described in method 300. Method 300 can include the following features, functions, operations, etc. shown in blocks 302-310, which can be performed in any order that is not inconsistent with the description herein or in other ways. Blocks 302-310 are described in an order that helps to understand the exemplary method 300, but the method for communicating data from the transmitting device to the receiving device via the data bus is not limited to that order.

[0019]

[0028] As shown by block 302, method 300 may include determining a set of data values (i.e., selected data values) transmitted via a data bus. For example, a transmitting device can obtain data from another source and arrange or compile data values for transmission to a receiving device. In some examples, the data values transmitted to the receiving device can be the result of calculations performed by the transmitting device. Referring again to the example shown in FIG. 2, each data value can be 1 byte, i.e., 8 bits. In such examples, the data values can be in the range of 0 to 255. In some examples, the size of the set of selected data values can be related to the size of the data word. For example, data values up to 256 bytes can be selected and transmitted via the data bus. In such examples, the transmitting device can determine or provide that the selected data values are transmitted in the form of one 256-byte data word. In such examples, method 300 can be repeated any number of times to transmit any number of data words.

[0020]

[0029] As shown by block 304, method 300 may further include determining selected data bit groups and non-selected data bit groups. For example, the transmitting device may select which of the data bit groups to transmit selected data values in, and conversely, which of the data bit groups to not transmit any selected data values in. The transmitting device can select any or all of the data bit groups to collectively transmit a set of selected data values. Referring again to the example shown in FIG. 2, the transmitting device can select any of byte positions 202A - 202N to include data in the transfer or transmission operation from the transmitting device to the receiving device. The selected data bit groups (e.g., byte positions) may also be referred to as enabled data bit groups. In an example where the data bit groups are byte positions, the selected byte positions may also be referred to as enabled byte positions or enabled bytes. As described below, in some examples of method 300, the transmitting device may generate a data structure, such as an array or vector of bits, that can indicate which data bit groups are selected (or enabled) and which are not selected.

[0021]

[0030] As shown by block 306, method 300 may further include determining a code representing non-selected data values. The code or non-selected data values can be any data values not included in the set of selected data values.

[0022]

[0031] As shown by block 308, method 300 may further include transmitting to a receiving device, via a data bit lane, a selected data value in a selected data bit group and a code in a non-selected data bit group. In other words, in the transmitted data word, the selected data value is placed or included in the selected data bit group, and the code is placed or included in the non-selected data bit group. As shown by block 310, method 300 may also include transmitting a code to the receiving device separately from the data bit lane. For example, referring again to FIG. 1, the transmitting device 102 may transmit a code to the receiving device via a code bit lane 110.

[0023]

[0032] As shown in FIG. 4, system 400 may be configured to output a data word in which a selected data value is placed or included in a selected data bit group and a code is placed or included in a non-selected data bit group. System 400 may be configured to output or provide the data word via a data bus (not shown in FIG. 4). System 400 may be an example of a part of the above-described transmitting device 102 (FIG. 1). System 400 may include processor logic (e.g., programmed by software or firmware), discrete circuitry (e.g., finite state machine, combinatorial logic, etc.), or any combination thereof.

[0024]

[0033] The input data word 402 may include the set of selected data values described above at a position (e.g., byte position) corresponding to a selected data bit group (e.g., selected byte position). Positions within the input data word 402 that do not correspond to the selected data bit group, or conversely, that correspond to unselected data bit groups, may include any data value (i.e., a logical "don't care" value). The input data word 402 may have a configuration similar to the data word configuration 200 (FIG. 2) described above. The input BE vector 404 may consist of an array or vector of bits indicating which data bit groups within the input data word 402 are selected and which are not selected. The system 400 may maintain the input BE vector 404, for example, in the form of a data structure. In the example where the receiving device 104 (FIG. 1) is a memory having a bus with a configurable data width, the input BE vector 404 may indicate the selected (i.e., enabled) memory bus bytes (e.g., by a "1" bit) and the unselected (i.e., disabled) memory bus bytes (e.g., by a "0" bit).

[0025]

[0034] The binary-unary encoder 406 may be configured to receive, obtain, or otherwise determine a selected set of data values transmitted via a data bus. For example, the binary-unary encoder 406 may be configured to determine an input data word 402. Determining the input data word 402 may include, for example, receiving the input data word 402 from a data source such as another part of the transmitting device (not shown). The binary-unary encoder 406 may similarly receive or, in some cases, determine an input BE vector 404. The binary-unary encoder 406, which may also be referred to as a two's complement encoder or converter, may also be configured to use the input BE vector 404 to convert the input data word 402 into a bit vector of selected data values 408. As will be described below with reference to an example, the bit vector of selected data values 408 may include a "1" bit at each bit position (i.e., numerical index) equal to the selected data value and a "0" bit at each bit position (i.e., numerical index) not equal to the selected data value. As will be understood by those skilled in the art, the binary-unary encoder 406 may be implemented using a simple configuration of logic gates and advantageously provides a vectorized approach for indicating the selected data values described herein. Nevertheless, the binary-unary encoder 406 is merely an example of a circuit for determining a selected set of data values transmitted via a data bus, and other techniques and examples may be recalled by those skilled in the art in view of the description herein.

[0026]

[0035] The data word formatter 410 may be configured to receive an input data word 402, an input BE vector 404, and a bit vector 408 of selected data values. The data word formatter 410 may be further configured to use the bit vector of the selected data values 408 to determine a code representing unselected data values. For example, the data formatter 410 may be configured to select a bit position in the bit vector of the selected data value 408 that includes a "0" bit. If there are two or more bit positions that include a "0" bit, the data formatter 410 may select any one of them.

[0027]

[0036] The data formatter 410 may also be configured to determine selected bytes or other data bit groups and unselected bytes or other data bit groups. In the illustrated example, the data formatter 410 can use the input BE vector 404 to determine selected and unselected bytes.

[0028]

[0037] The data word formatter 410 may be further configured to provide an output data word to the receiving device (e.g., via the data bit lane 108 described above with respect to FIG. 1). The output data word can include selected data values within selected data bit groups and can include codes within unselected data bit groups. For example, the data word formatter 410 can place the selected byte values shown in the input data word 402 in the corresponding byte positions of the output data word and place codes in the remaining unselected byte positions of the output data word. The data word formatter 410 may also be configured to provide a code to the receiving device separately from the output data word (e.g., via the code bit lane 110 described above with respect to FIG. 1).

[0029]

[0038] FIG. 5 shows an example of the operation of the above-described system 400. In the illustrated example, the 256-bit input BE vector includes a “1” at bit position B255 (i.e., the most significant bit position) among other bit values (not all of which are shown for clarity), thereby indicating that the corresponding data bus byte position B255 is selected, the “1” at bit position b254 indicates that the corresponding data bus byte position B254 is selected, the “0” at bit position b253 indicates that the corresponding data bus byte position B253 is not selected, and the “1” at bit position b0 (i.e., the least significant bit position) indicates that the corresponding data bus byte position B0 is selected. The exemplary BE vector may also include several other exemplary (or nth) bit positions “bn” having a “0”, thereby indicating that the corresponding data bus byte position Bn is not selected. The bit values at bit positions b252 to b(n + 1) and bit positions b(n - 1) to b1 are not shown for clarity, but may similarly have a value of “1” indicating a selected data bus byte position or “0” indicating an unselected data bus byte position.

[0030]

[0039] In the example shown in FIG. 5, the 256-byte input data word includes a data byte value of 252 at byte position B255 (i.e., the most significant byte position), a data byte value of 0 at byte position B254, and a data byte value of 2 at byte position B0 (i.e., the least significant byte position), among other data byte values (not all of which are shown for clarity). The byte within byte position B253 can have any value, as indicated by the "don't care" symbol "X", since, as described above, the input BE vector in this example indicates that data bus byte position B253 is not selected. Similarly, the byte within byte position Bn can have any value, as indicated by the "don't care" symbol "X", since, as described above, the input BE vector in this example indicates that data bus byte position Bn is not selected. The data values at byte positions B252 to B(n + 1) and byte positions B(n - 1) to B1 are not shown for clarity but can have any value. Note that since the data bit groups in the illustrated example are 1 byte (i.e., 8 bits), each byte value can be in the range from 0 to 255.

[0031]

[0040] When forming the bit vector of the data values selected in this example (Figure 5), the binary-unary encoder 406 (Figure 4) can place a bit value of '1' at bit position B255, as indicated by arrow 502, because the data byte in the selected data bus byte position b252 within the input data word has a value of 252, among other bit values (not all of which are shown for clarity). Since the data byte in the selected data bus byte position B0 within the input data word has a value of 0, a bit value of '1' can be placed at bit position B254, as indicated by another arrow 504. Since the data byte in the selected data bus byte position B0 within the input data word has a value of 2, a bit value of '1' can be placed at bit position b2, as indicated by another arrow 506. The data bytes in the input data word having data values of 255 and 1 are not explicitly shown, but the bit values are similarly set to '1' at bit positions b255 and b1 of the bit vector of the selected data values in this example, as indicated by dashed arrows 508 and 510, respectively.

[0032]

[0041] Note that the bit vector of the selected data values indicates, by the presence of a "1" at a bit position, that the data value equal to that bit position (numerical index) is within the set of selected data values, i.e., present in the input data word. For example, a "1" at bit position b255 indicates that the data value of 255 is present in the input data word, a "1" at bit position b252 indicates that the data value of 252 is present in the input data word, and so on. Similarly, the bit vector of the selected data values indicates, by the presence of a "0" at a bit position, that the data value equal to that bit position (numerical index) is not within the set of selected data values. For example, a "0" at bit position b254 indicates that the data value of 254 is not within the set of selected data values, a "0" at bit position b253 indicates that the data value of 253 is not within the set of selected data values, a "0" at bit position b3 indicates that the data value of 3 is not within the set of selected data values, and so on.

[0033]

[0042] In this example (FIG. 5), when forming the output data word, data formatter 410 (FIG. 4) can first determine a code representing an unused or unselected data value. To determine the code, data formatter 410 can determine which bit positions within the bit vector of the selected data value have a bit value of “0”. In the example shown in FIG. 5, data formatter 410 determines that bit positions b254, b253, b3 (and possibly other bits not shown) within the bit vector of the selected data value have a bit value of “0”, and thus, the data values of 254, 253, and 3 (and possibly other bits not shown) are not within the set of selected data values. In this example, data formatter 410 can select any of these unused data values, i.e., data values not within the set of selected data values, to function as a code or to represent a code. In the illustrated example, data formatter 410 selects the unused data value 3. Nevertheless, data formatter 410 could alternatively select the unused data value 253 or 254. Rules for selecting an unused data value in an example where there are multiple unused data values may be implemented, such as selecting the data value corresponding to the bit position closest to the least significant bit position.

[0034]

[0043] When forming the output data word in this example (Figure 5), the data formatter 410 can place a code, which is 3 in this example, at each unselected data bus byte position. Thus, the data formatter 410 can place the byte value 3 at data bus byte positions B253 and Bn, as indicated by arrows 512 and 514 respectively in this example. The data formatter 410 can similarly place the byte value 3 at any other unselected data bus byte position (not shown for clarity). Although arrow indicators are not shown for clarity, the data formatter 410 can also place each selected data value, i.e., each data value present in the input word, at the same data bus byte position in the output data word where that data value is present in the input data word. Thus, the data formatter 410 can place the data value 252 at data bus byte position B255 of the output data word, place the data value 0 at data bus byte position B254 of the output data word, place the data value 2 at data bus byte position B0 of the output data word, and so on. The data formatter 410 can similarly place other data values (not shown for clarity) that may be present in the input data word at the corresponding data bus byte positions in the output data word. The data formatter 410 can use the input BE vector to determine which data bus byte positions are selected and which are not.

[0035]

[0044] As shown in FIG. 6, system 600 may be configured to receive data words via a data bus (not shown). The data word may have the configuration of the output data word described above with respect to FIG. 5. That is, in the data word, the selected data value is placed or included at the selected data bus byte position, and the code is placed or included at the unselected data bus byte position. System 600 may be an example of a part of the receiving device 104 (FIG. 1) described above. System 600 may include processor logic (e.g., programmed by software or firmware), discrete circuitry (e.g., finite state machine, combinatorial logic, etc.), or any combination thereof.

[0036]

[0045] System 600 may include comparison logic 601. The comparison logic 601 may include a number of bit groups (e.g., bytes) comparators 602 equal to the number of data bus bit group (e.g., byte) positions. For example, a system 600 having 256 data bus byte positions may include 256 comparators 602 (not all of which are shown in FIG. 6 for clarity). Each comparator 602 may be configured to compare the data value received at one of the data bus byte positions with the code. System 600 may be configured to reconstruct the BE vector. That is, system 600 can form a reconstructed BE vector similar to the input BE vector described above with respect to FIG. 5. When system 600 forms the reconstructed BE vector, system 600 or another part of the receiving device 104 (FIG. 1) may use the reconstructed BE vector in a conventional manner to reconstruct or determine the data word.

[0037]

[0046] If one of the outputs of comparator 602 indicates that the received data value matches the code, system 600 places a bit value of "0" at the corresponding bit position in the reconstructed BE vector. If one of the outputs of comparator 602 indicates that the received data value does not match the code, system 600 places a bit value of "1" at the corresponding bit position in the reconstructed BE vector. Comparator 602 (or other comparison logic in other embodiments) thus enables system 600 to determine each unselected data bus byte position indicated by a received data value that matches the code. Similarly, comparator 602 enables system 600 to determine each selected data bus byte position indicated by a received data value that does not match the code.

[0038]

[0047] Next, another part of the receiving device 104, such as system 600, or a processor or other processing logic (not shown), may reconstruct or determine the data word. For example, the receiving device 104 may ignore any data value received at one of the data bus byte positions corresponding to the bit value of "0" at the corresponding bit position in the reconstructed BE vector, or treat it as a logical "don't care". In other words, the reconstructed BE vector enables the receiving device 104 to determine which of the data bus byte positions are enabled, and thus which of the received data values are valid.

[0039]

[0048] In an example where the received data value is the received data value of the output data word described above with respect to FIG. 5, the reconstruction of the data word by the receiving device 104 may include the following. Since the reconstructed byte enable vector indicates that the received data value 252 at the data bus byte position B255 does not match the code (which is 3 in this example), the received data value 252 is placed at the corresponding byte position in the reconstructed data word, as indicated by arrow 604. Similarly, since the reconstructed byte enable vector indicates that the received data value 0 at the data bus byte position B254 does not match the code, the received data value 0 is placed at the corresponding byte position in the reconstructed data word, as indicated by arrow 606. However, since the reconstructed byte enable vector indicates that the received data value 3 at the data bus byte position B253 matches the code, byte position B253 in the reconstructed data word is invalid. Similarly, since the reconstructed byte enable vector indicates that the received data value 3 at the data bus byte position Bn matches the code, the corresponding byte position Bn in the reconstructed data word is invalid. Since the received data value 2 at the data bus byte position B0 does not match the code, the received data value 2 is placed at the corresponding byte position in the reconstructed data word, as indicated by arrow 608.

[0040]

[0049] When the receiving device 104 reconstructs or determines a data word, the receiving device 104 can process all valid received data values in a conventional manner (without processing invalid received data values). In an example where the receiving device 104 is a memory device, the memory device may store the valid received data values (and not store any invalid received data values). Alternatively or in addition, in some examples, the receiving device 104 may place zeros at invalid or unselected byte positions prior to such processing.

[0041]

[0050] FIG. 7 shows a method 700 of receiving data via a data bus. A receiving device may be configured to control some or all of method 700. For example, in an embodiment where the receiving device includes a processor, the processor may be configured by software or firmware to control some or all of method 700. Also, the receiving device or a portion thereof (e.g., the processor) may be an example of means for performing the functions described in method 700. Method 700 can include the following features, functions, operations, etc. indicated by blocks 702-712, which can be performed in any order that is not inconsistent with the description herein or in other ways. Blocks 702-712 are described in an order that helps to understand the exemplary method 700, but the method of receiving data via a data bus is not limited to that order.

[0042]

[0051] As shown by block 702, method 700 can include the receiving device receiving a data value selected via a data bus (data bit lane) and receiving a code via a code bit lane. As shown by block 704, method 700 can include the receiving device comparing the code with each data value received at each data bus byte position (or other data bit group). As shown by block 706, method 700 can also include the receiving device determining or identifying (i.e., identifying the selected data bus byte position) each data bus byte position having a data value that matches the code. Similarly, as shown by block 708, method 700 can include the receiving device determining or identifying (i.e., identifying the unselected data bus byte position) each data bus byte position having a data value that does not match the code.

[0043]

[0052] As shown by block 710, method 700 may further include a receiving device reconstructing a byte enable vector. As shown by block 712, method 700 may further include a receiving device reconstructing a data word using the reconstructed byte enable vector and a received data value. In some examples, reconstructing the data word may include placing zeros in byte positions that are invalid or not selected.

[0044]

[0053] As shown in FIG. 8, system 800 may include a transmitting device 802 and a receiving device 804 on SoC 806. System 800 may be similar to system 100 (FIG. 1) described above and may include N data bit lanes 808 and M code bit lanes 810 interconnecting the transmitting device 802 and the receiving device 804. Additionally, system 800 may include a Full_Payload signal path 812 interconnecting the transmitting device 802 and the receiving device 804. The transmitting device may assert a Full_Payload signal on signal path 812 to indicate that all data bit groups are selected. For example, in an embodiment where there are 2048 data bit lanes 808 (i.e., N = 2048) and each selectable data bit group is 1 byte, the transmitting device may assert the Full_Payload signal to indicate that all 256 data bus byte positions are selected. In response to detecting the assertion of the Full_Payload signal, the receiving device 804 may defer a portion of the method described above for reconstructing the data word and instead may consider the data values received at all data bus byte positions as valid. In other words, when the receiving device 804 determines that the Full_Payload signal is asserted, the receiving device 804 may process all of the data values received at all of the data bus byte positions.

[0045]

[0054] In addition, system 800 may include a Has_Payload signal path 814 that interconnects a transmitting device 802 and a receiving device 804. The transmitting device 802 can de-assert the Has_Payload signal on the signal path 814 when none of the data bus byte positions (or other data bit groups) are selected, and can assert the Has_Payload signal when at least one data bus byte position (or other data bit group) is selected. De-assertion of the Has_Payload signal may indicate to the receiving device 804 that it does not expect to receive data.

[0046]

[0055] FIG. 9 shows an example of a PCD 900, such as a mobile phone or smartphone, for which an exemplary embodiment of a system, method, computer-readable medium, and other examples of communicating data via a data bus may be provided. For clarity, some data buses, interconnects, signals, etc. are not shown in FIG. 9. Although PCD 900 is shown as an example, other embodiments of the system, method, computer-readable medium, and other examples of communicating data via a data bus may be provided in other types of computing devices or systems.

[0047]

[0056] PCD 900 may include a SoC 902. The SoC 902 may include a central processing unit (“CPU”) 904, a neural processing unit (“NPU”) 905, a graphics processing unit (“GPU”) 906, a digital signal processor (“DSP”) 907, an analog signal processor 908, a modem or transceiver subsystem 954, or other processors. The CPU 904 may include one or more CPU cores, such as from a first CPU core 904A, a second CPU core 904B, etc., up to an Nth CPU core 904N.

[0048]

[0057] The display controller 910 and the touch screen controller 912 can be coupled to the CPU 904. An external touch screen display 914 of the SoC 902 can be coupled to the display controller 910 and the touch screen controller 912. The PCD 900 can further include a video decoder 916 coupled to the CPU 904. A video amplifier 918 can be coupled to the video decoder 916 and the touch screen display 914. A video port 920 can be coupled to the video amplifier 918. A universal serial bus (USB) controller 922 can also be coupled to the CPU 904, and a USB port 924 can be coupled to the USB controller 922. A subscriber identity module (SIM) card 926 can also be coupled to the CPU 904.

[0049]

[0058] One or more memories can be coupled to the CPU 904. The one or more memories may include both volatile memory and non-volatile memory. Examples of volatile memory include static random access memory (SRAM) 928, and dynamic random access memory (DRAM) 930 and 931. Such memories may be external to the SoC 902, such as DRAM 930, or may be internal to the SoC 902, such as DRAM 931. A DRAM controller 932 coupled to the CPU 904 can control the writing of data to, and the reading of data from, DRAMs 930 and 931.

[0050]

[0059] Although not shown for clarity, a data bus that couples one or more of memories 928, 930, 931, etc. to CPU 904 or other processors (e.g., NPU 905, GPU 906, DSP 907, etc.) can be an example of data bus 108 (FIG. 1) or 808 (FIG. 8) described above. Any such processor or subsystem can be an example of transmitting device 102 (FIG. 1) or 802 (FIG. 8), receiving device 104 (FIG. 1) or 804 (FIG. 8), or a combination of such a transmitting device and a receiving device (i.e., a transceiver device). Any of memories 928, 930, 931, etc. can be an example of receiving device 104 (FIG. 1) or 804 (FIG. 8) having a configurable width of the memory. Thus, such a processor or subsystem can have processing logic configured as described above with respect to FIGS. 3-7. A data bus or other interconnect (e.g., NoC) that couples or interconnects such a transmitting device and a receiving device is not shown in FIG. 9 for clarity. Nevertheless, as will be understood by those skilled in the art, SoC 902 can include any number of such data buses or other interconnects that couple or interconnect various types of transmitting and receiving devices on SoC 902. Other data buses can couple SoC 902 to an external device such as external DRAM 930.

[0051]

[0060] Stereo audio codec 934 can be coupled to analog signal processor 908. Further, audio amplifier 936 can be coupled to stereo audio codec 934. First stereo speaker 938 and second stereo speaker 940 can each be coupled to audio amplifier 936. Additionally, microphone amplifier 942 can be coupled to stereo audio codec 934, and microphone 944 can be coupled to microphone amplifier 942. Frequency modulation (FM) radio tuner 946 can be coupled to stereo audio codec 934. FM antenna 948 can be coupled to FM radio tuner 946. Further, stereo headphones 950 can be coupled to stereo audio codec 934. Other devices that can be coupled to CPU 904 include one or more digital (e.g., CCD or CMOS) cameras 952.

[0052]

[0061] Modem or RF transceiver 954 can be coupled to analog signal processor 908 and CPU 904. RF switch 956 can be coupled to RF transceiver 954 and RF antenna 958. Additionally, keypad 960, microphone-equipped mono headset 962, and vibrator device 964 can be coupled to analog signal processor 908.

[0053]

[0062] SoC 902 may have one or more internal or on-chip thermal sensors 970A and can be coupled to one or more external or off-chip thermal sensors 970B. Analog-to-digital converter controller 972 can convert the voltage drops generated by thermal sensors 970A and 970B into digital signals. Power supply 974 and PMIC 976 can supply power to SoC 902.

[0054]

[0063] The firmware or software may be stored in any of the above-mentioned memories, such as DRAM 930 or 931, SRAM 928, or may be stored in a local memory directly accessible by the processor hardware on which the software or firmware executes. Execution of such firmware or software may control any of the above-described methods or may configure any of the above-described systems. Any such memory or other temporary storage medium storing the firmware or software in computer-readable form for execution by the processor hardware may be an example of a "computer-readable medium" as the term is understood in the patent vocabulary.

[0055]

[0064] The above-described solution can reduce the number of data bit lanes on the data bus. Reducing the number of data bit lanes can affect reducing the required area or footprint of the data bus on the SoC or within other systems, improving the timing of the data bus, reducing power consumption, and so on.

[0056]

[0065] In the following numbered clauses, implementation examples will be described.

[0066] 1. A method for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the method comprising:

[0067] determining, by a transmitting device, a set of selected data values to be transmitted via the data bus;

[0068] determining, by the transmitting device, the selected data bit groups and the non-selected data bit groups;

[0069] determining, by the transmitting device, a code representing non-selected data values not included in the set of selected data values;

[0070] Transmitting, via a data bit lane, a selected data value in a selected data bit group and a code in a non-selected data bit group to a receiving device;

[0071] Transmitting the code to the receiving device separately from the data bit lane; A method comprising the above.

[0072] 2. The method according to clause 1, wherein each data bit group consists of 8 bits.

[0073] 3. The method according to clause 1 or 2, wherein transmitting the code includes transmitting the code via a plurality of code bit lanes separate from the data bit lane.

[0074] 4.

[0075] Determining, by a transmitting device, whether all data bit groups are selected;

[0076] Transmitting, separately from the data bit lane, an indication of all selected data bit groups to the receiving device; The method according to any one of clauses 1 to 3, further comprising the above.

[0077] 5.

[0078] Determining, by the transmitting device, whether a data bit group is not selected;

[0079] Transmitting, separately from the data bit lane, an indication that there is no selected data bit group to the receiving device; The method according to any one of clauses 1 to 4, further comprising the above.

[0080] 6.

[0081] Receiving a data value via the data bit lane;

[0082] Receiving a code separately from the data bit lane;

[0083] Comparing, by the receiving device, the code with each data value in each data bit group received via the data bit lane;

[0084] The receiving device determines that each data bit group has a data value that matches a code in one of the selected data bit groups,

[0085] The receiving device determines that each data bit group has a data value that does not match a code in one of the unselected data bit groups

[0086] The method according to any one of clauses 1 to 5, further comprising processing the data values in the selected data bit groups while not processing the data values in the unselected data bit groups.

[0087] 7. Transmitting the selected data value to the receiving device via a data bit lane, transmitting the code to the receiving device, receiving the selected data value via the data bit lane, and receiving the code, all of which are implemented in a system on chip ("SoC"), the method according to any one of clauses 1 to 6.

[0088] 8. A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising:

[0089] An encoder configured to determine a set of selected data values transmitted via the data bus in a selected data bit group;

[0090] A data word formatter configured to determine the selected data bit groups and the unselected data bit groups, determine a code representing an unselected data value not included in the set of selected data values, and provide a data word having the selected data value in the selected data bit group and the code in the unselected data bit group to the receiving device via a data bit lane and provide the code to the receiving device via a plurality of code bit lanes separate from the data bit lane. A system comprising.

[0091] 9. The system according to clause 8, comprising a binary-unary encoder configured to determine a bit vector having a plurality of bit positions corresponding to a selected data value.

[0092] 10. The system according to clause 8 or 9, wherein each data bit group consists of 8 bits.

[0093] 11. The system according to any one of clauses 8 to 10, wherein the data word formatter is further configured to determine whether all data bit groups are selected and provide a signal indicating that all data bit groups are selected to the receiving device via a signal lane.

[0094] 12. The system according to any one of clauses 8 to 11, wherein the data word formatter is further configured to determine whether a data bit group is not selected and provide a signal indicating that the data bit group is not selected to the receiving device via a signal lane.

[0095] 13. The system according to any one of clauses 8 to 12, further comprising a receiving device coupled to a plurality of data bit lanes and a plurality of code bit lanes.

[0096] 14. The system according to any one of clauses 8 to 13, wherein the receiving device comprises a memory device having a configurable data width.

[0097] 15. The receiving device

[0098] receives data values via the data bit lanes,

[0099] receives codes via the code bit lanes,

[0100] compares the codes with each data value in each data bit group received via the data bus,

[0101] determines that each data bit group has a data value that matches the code in one of the selected data bit groups,

[0102] Determining that each data bit group has a data value that does not match the code in one of the unselected data bit groups The system according to any one of clauses 8 to 14, configured as such.

[0103] 16. The system and data bus for data communication, the system according to any one of clauses 8 to 15, which is included in a system-on-chip (「SoC」).

[0104] 17. A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising:

[0105] Means for determining, by a transmitting device, a set of selected data values transmitted via the data bus;

[0106] Means for determining, by the transmitting device, a selected data bit group and unselected data bit groups;

[0107] Means for determining, by the transmitting device, a code representing an unselected data value not included in the set of selected data values;

[0108] Means for transmitting, via the data bit lanes, to a receiving device, the selected data values in the selected data bit group and the code in the unselected data bit groups;

[0109] Means for transmitting the code to the receiving device separately from the data bit lanes; A system comprising the above.

[0110] 18. The system according to clause 17, wherein each data bit group consists of 8 bits.

[0111] 19. The system according to clause 17 or 18, wherein the means for transmitting the code comprises means for transmitting the code via a plurality of code bit lanes separate from the data bit lanes.

[0112] The receiving device is the system according to any one of clauses 17 to 19, comprising a memory device having a configurable width.

[0113] 21.

[0114] Means for determining by the transmitting device whether all data bit groups are selected, and

[0115] Means for transmitting to the receiving device an indication of all selected data bit groups separately from the data bit lane, and The system according to any one of clauses 17 to 20, further comprising.

[0116] 22.

[0117] Means for determining by the transmitting device whether a data bit group is not selected, and

[0118] Means for transmitting to the receiving device an indication that a data bit group is not selected separately from the data bit lane, and The system according to any one of clauses 17 to 21, further comprising.

[0119] 23.

[0120] Means for receiving a data value via a data bit lane, and

[0121] Means for receiving a code separately from the data bit lane, and

[0122] Means for comparing by the receiving device the code with each data value in each data bit group received via the data bit lane, and

[0123] Means for determining by the receiving device that each data bit group has a data value that matches the code in one of the selected data bit groups, and

[0124] Means for determining by the receiving device that each data bit group has a data value that does not match the code in one of the unselected data bit groups, and

[0125] Means for processing data values in selected data bit groups while not processing data values in unselected data bit groups; The system according to any one of clauses 17 to 22, further comprising

[0126] 24. A computer-readable medium for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the computer-readable medium comprising a non-transitory computer-readable medium storing instructions in a computer-executable form, the instructions, when executed by a processing system of a computing device,

[0127] Determining a set of selected data values transmitted via the data bus;

[0128] Determining selected and unselected data bit groups;

[0129] Determining a code representing unselected data values not included in the set of selected data values;

[0130] Transmitting to a receiving device via the data bit lanes the selected data values in the selected data bit groups and the code in the unselected data bit groups;

[0131] Transmitting the code to the receiving device separately from the data bit lanes; A method comprising

[0132] 25. The computer-readable medium according to clause 24, wherein each data bit group consists of 8 bits.

[0133] 26. The computer-readable medium according to clause 24 or 25, wherein transmitting the code includes transmitting the code via a plurality of code bit lanes separate from the data bit lanes.

[0134] 27.

[0135] Determining whether all data bit groups are selected;

[0136] Separate from the data bit lanes, transmitting to the receiving device an indication of all selected data bit groups, A computer-readable medium according to any one of clauses 24 to 26, further comprising instructions for configuring the processing system to control .

[0137] 28.

[0138] Determining, by the transmitting device, whether a data bit group is selected or not,

[0139] Separate from the data bit lanes, transmitting to the receiving device an indication that a data bit group is not selected, A computer-readable medium according to any one of clauses 24 to 27, further comprising instructions for configuring the processing system to control .

[0140] A method for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the method comprising:

[0141] Receiving, by the receiving device, a code separate from the data bit lanes,

[0142] Receiving, by the receiving device, data values via the data bit lanes of the data bus,

[0143] Comparing, by the receiving device, the code with each data value in each data bit group received via the data bus,

[0144] Determining, by the receiving device, that each data bit group has a data value that matches the code,

[0145] Determining, by the receiving device, that each data bit group has a data value that does not match the code,

[0146] Providing an indication of a selected data bit group based on a determination that the data bit group has a data value matching the code, and an indication of an unselected data bit group based on a determination that the data bit group has a data value not matching the code; A method comprising.

[0147] 30. The method of clause 29, further comprising processing data values in the selected data bit group while not processing data values in the unselected data bit groups.

[0148] 31. A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising:

[0149] Receiving a selected data value via a data bit lane, receiving a code separately from the data bit lane, comparing the code with each data value in each data bit group, determining each data bit group having a data value matching the code in one of the selected data bit groups, and determining that each data bit group has a data value not matching the code in one of the unselected data bit groups; a comparison logic configured as such;

[0150] Processing logic configured to provide an indication of a selected data bit group based on a determination that the data bit group has a data value matching the code, and an indication of an unselected data bit group based on a determination that the data bit group has a data value not matching the code; A system comprising.

[0151] 32. The system of clause 31, wherein the processing logic is configured to process data values in the selected data bit groups and not process data values in the unselected data bit groups.

[0057]

[0152] Alternative embodiments will be apparent to those skilled in the art to which the present invention pertains. Accordingly, while the selected embodiments have been shown and described in detail, it will be understood that various substitutions and modifications may be made thereto. The invention described in the claims of the present application at the time of filing is appended below. [C1] A method for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the method comprising: determining, by a transmitting device, a set of selected data values to be transmitted via the data bus; determining, by the transmitting device, selected data bit groups and non-selected data bit groups; determining, by the transmitting device, a code representing non-selected data values not included in the set of selected data values; transmitting, via the data bit lanes, to a receiving device, the selected data values in the selected data bit groups and the code in the non-selected data bit groups; transmitting the code to the receiving device separately from the data bit lanes; A method comprising. [C2] The method according to C1, wherein each data bit group consists of 8 bits. [C3] The method according to C1, wherein transmitting the code includes transmitting the code via a plurality of code bit lanes separate from the data bit lanes. [C4] determining, by the transmitting device, whether all data bit groups are selected; transmitting, separately from the data bit lanes, an indication of all selected data bit groups to the receiving device; The method according to C1, further comprising. [C5] determining, by the transmitting device, whether a data bit group is not selected; transmitting, separately from the data bit lanes, an indication that a data bit group is not selected to the receiving device; The method according to C1, further comprising. [C6] receiving data values via the data bit lanes; receiving the code separately from the data bit lanes; comparing, by the receiving device, the code with each data value in each data bit group received via the data bit lanes; determining, by the receiving device, that each data bit group has a data value that matches the code in one of the selected data bit groups; The receiving device determines that each data bit group among the unselected data bit groups has a data value that does not match the code in one of the unselected data bit groups. While not processing the data values in the unselected data bit groups, the data values in the selected data bit groups are processed. The method according to C1, further comprising: [C7] Transmitting the selected data value to the receiving device via the data bit lane, transmitting the code to the receiving device, receiving the selected data value via the data bit lane, and receiving the code, all of which are implemented in a system on chip ("SoC"), the method according to C6. [C8] A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising: An encoder configured to determine a set of selected data values transmitted via the data bus in a selected data bit group; A data word formatter configured to determine a selected data bit group and an unselected data bit group, determine a code representing an unselected data value not included in the set of selected data values, and provide a data word having the selected data value in the selected data bit group and the code in the unselected data bit group to a receiving device via the data bit lanes, and provide the code to the receiving device via a plurality of code bit lanes separate from the data bit lanes. A system comprising: [C9] The system according to C8, wherein the encoder comprises a binary-unary encoder configured to determine a bit vector having a plurality of bit positions corresponding to the selected data values. [C10] The system according to C8, wherein each data bit group consists of 8 bits. [C11] The system according to C8, wherein the data word formatter is further configured to determine whether all data bit groups are selected and provide a signal indicating that all data bit groups are selected to the receiving device via a signal lane. [C12] The data word formatter is further configured to determine whether a data bit group is not selected and provide a signal indicating that the data bit group is not selected to the receiving device via a signal lane, the system according to C8. [C13] The system according to C8, further comprising a receiving device coupled to the plurality of data bit lanes and the plurality of code bit lanes. [C14] The system according to C13, wherein the receiving device comprises a memory device having a configurable data width. [C15] The receiving device is configured to receive data values via the data bit lanes, receive the code via the code bit lanes, compare the code with each data value in each data bit group received via the data bus, determine that each data bit group has a data value that matches the code in one of the selected data bit groups, determine that each data bit group has a data value that does not match the code in one of the non-selected data bit groups, the system according to C13, configured as such. [C16] The system for data communication and the data bus are included in a system-on-chip ("SoC"), the system according to C8. [C17] A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising: means for determining, by a transmitting device, a set of selected data values transmitted via the data bus; means for determining, by the transmitting device, selected data bit groups and non-selected data bit groups; means for determining, by the transmitting device, a code representing non-selected data values not included in the set of selected data values; means for transmitting, via the data bit lanes, selected data values in selected data bit groups and the code in non-selected data bit groups to a receiving device; means for transmitting the code to the receiving device separately from the data bit lanes; a system comprising. [C18] The system according to C17, wherein each data bit group consists of 8 bits. [C19] The system according to C17, wherein the means for transmitting the code comprises means for transmitting the code via a plurality of code bit lanes separate from the data bit lane. [C20] The system according to C17, wherein the receiving device comprises a memory device having a configurable width. [C21] Means for determining, by the transmitting device, whether all data bit groups are selected; Means for transmitting, separately from the data bit lane, an indication of all selected data bit groups to the receiving device; The system according to C17, further comprising. [C22] Means for determining, by the transmitting device, whether a data bit group is not selected; The system according to C17, further comprising means for transmitting, separately from the data bit lane, an indication that there is no selected data bit group to the receiving device. [C23] Means for receiving a data value via the data bit lane; Means for receiving the code separately from the data bit lane; Means for comparing, by the receiving device, the code with each data value in each data bit group received via the data bit lane; Means for determining, by the receiving device, that each data bit group has a data value that matches the code in one of the selected data bit groups; Means for determining, by the receiving device, that each data bit group has a data value that does not match the code in one of the non-selected data bit groups; Means for processing the data values in the selected data bit groups while not processing the data values in the non-selected data bit groups; The system according to C17, further comprising. [C24] A computer-readable medium for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the computer-readable medium comprising a non-transitory computer-readable medium storing instructions in a computer-executable form, the instructions, when executed by a processing system of a computing device, Determining a set of selected data values transmitted via the data bus; Determining selected data bit groups and non-selected data bit groups; Determining a code representing non-selected data values not included in the set of selected data values; Transmitting, via the data bit lane, to a receiving device, selected data values in the selected data bit groups and the code in the non-selected data bit groups; Transmitting the code to the receiving device separately from the data bit lane; A computer-readable medium configured to configure the processing system to control the above. [C25] A computer-readable medium according to C24, wherein each data bit group consists of 8 bits. [C26] The computer-readable medium according to C24, wherein transmitting the code includes transmitting the code via a plurality of code bit lanes separate from the data bit lane. [C27] Determining whether all data bit groups are selected; Transmitting, separately from the data bit lane, an indication of all selected data bit groups to the receiving device; The computer-readable medium according to C24, further comprising instructions configured to configure the processing system to control the above. [C28] Determining by the transmitting device whether a data bit group is not selected; Transmitting, separately from the data bit lane, an indication that there are no selected data bit groups to the receiving device; The computer-readable medium according to C24, further comprising instructions configured to configure the processing system to control the above. [C29] A method for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the method comprising: Receiving, by a receiving device, a code separately from the data bit lane; Receiving, by the receiving device, data values via the data bit lanes of the data bus; Comparing, by the receiving device, the code with each data value in each data bit group received via the data bus; Determining, by the receiving device, that each data bit group has a data value that matches the code. The receiving-side device determines that each data bit group has a data value that does not match the code. Providing an instruction for a selected data bit group based on the determination that the data bit group has a data value that matches the code, and an instruction for a non-selected data bit group based on the determination that the data bit group has a data value that does not match the code. A method comprising the above. [C30] The method according to C29, further comprising processing data values in the selected data bit group while not processing data values in the non-selected data bit group. [C31] A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising: Comparison logic configured to receive the selected data value via the data bit lane, receive the code separately from the data bit lane, compare the code with each data value in each data bit group, determine that each data bit group has a data value that matches the code, and determine that each data bit group has a data value that does not match the code. Processing logic configured to provide an instruction for a selected data bit group based on the determination that the data bit group has a data value that matches the code, and an instruction for a non-selected data bit group based on the determination that the data bit group has a data value that does not match the code. A system comprising the above. [C32] The system according to C31, wherein the processing logic is configured to process data values in the selected data bit group and not process data values in the non-selected data bit group.

Claims

1. A method for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the method comprising: determining, by an encoder of a transmitting device, a set of selected data values to be transmitted via the data bus, the encoder receiving a byte enable vector and an input data word, the encoder using the byte enable vector to convert the input data word into a bit vector, the bit vector having a plurality of bit positions corresponding to the set of selected data values to be transmitted via the data bus; determining, by a data word formatter of the transmitting device, selected data bit groups and non-selected data bit groups, the data word formatter receiving the bit vector from the encoder; determining, by the data word formatter of the transmitting device, a code representing non-selected data values not included in the set of selected data values from the bit vector, the data word formatter generating an output data word; transmitting the output data word from the data word formatter to a receiving device via the data bit lanes, the output data word having selected data values in selected data bit groups and the code in non-selected data bit groups; transmitting the code from the data word formatter to the receiving device separately from the data bit lanes using a code bit lane; A method comprising the above steps.

2. The method according to claim 1, wherein each data bit group consists of 8 bits.

3. determining, by the transmitting device, whether all data bit groups are selected; transmitting an indication of all selected data bit groups to the receiving device separately from the data bit lanes; The method according to claim 1, further comprising the above steps.

4. determining, by the transmitting device, whether a data bit group is not selected; Separate from the data bit lane, transmitting an instruction to the receiving device that there is no selected data bit group, and The method according to claim 1, further comprising.

5. Transmitting the selected data value to the receiving device via the data bit lane, transmitting the code to the receiving device, receiving the selected data value via the data bit lane, and receiving the code. All are implemented in a system on chip ("SoC"), the method according to claim 1.

6. A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising An encoder that receives a byte enable vector and an input data word, and determines a set of selected data values transmitted via the data bus in a selected data bit group by using the byte enable vector to convert the input data word into a bit vector. The bit vector has a plurality of bit positions corresponding to the set of selected data values, an encoder; A data word formatter that receives the bit vector from the encoder, determines a selected data bit group and an unselected data bit group, determines a code from the bit vector, and the code represents an unselected data value not included in the set of selected data values. An output data word having the selected data value in the selected data bit group and the code in the unselected data bit group is provided to the receiving device via the data bit lane, and the code is provided to the receiving device via a plurality of code bit lanes separate from the data bit lane. A data word formatter configured as described above. A system comprising.

7. The system according to claim 6, wherein each data bit group consists of 8 bits.

8. The data word formatter is further configured to determine whether all data bit groups are selected and provide a signal indicating that all data bit groups are selected to the receiving device via a signal lane. The system according to claim 6.

9. The data word formatter is further configured to determine whether a data bit group is not selected and provide a signal indicating that the data bit group is not selected to the receiving device via a signal lane. The system according to claim 6.

10. The system according to claim 6, further comprising a receiving device coupled to the plurality of data bit lanes and the plurality of code bit lanes.

11. The receiving device comprises a memory device having a configurable data width. The system according to claim 10.

12. The system for data communication and the data bus are included in a system on chip ("SoC"). The system according to claim 6.

13. A computer-readable medium for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the computer-readable medium comprising a non-transitory computer-readable medium storing instructions in computer-executable form, the instructions, when executed by a processing system of a computing device, determining a set of selected data values transmitted via the data bus using an encoder of a transmitting device, the encoder receiving a byte enable vector and an input data word, the encoder using the byte enable vector to convert the input data word into a bit vector, the bit vector having a plurality of bit positions corresponding to the set of selected data values, determining selected and unselected data bit groups using a data word formatter, the data word formatter receiving the bit vector from the encoder, Determining, using the data word formatter, a code representing unselected data values not included in the set of selected data values from the bit vector, wherein the data word formatter generates an output data word, and transmitting the output data word from the data word formatter to a receiving device via the data bit lane, wherein the output data word has selected data values in selected data bit groups and the code in unselected data bit groups, and transmitting the code from the data word formatter to the receiving device separately from the data bit lane using a code bit lane, and A computer-readable medium for configuring the processing system to control.

14. The computer-readable medium according to claim 13, wherein each data bit group consists of 8 bits.

15. Determining whether all data bit groups are selected, and transmitting an indication of all selected data bit groups to the receiving device separately from the data bit lane, and The computer-readable medium according to claim 13, further comprising instructions for configuring the processing system to control.

16. Determining, by the transmitting device, whether a data bit group is not selected, and transmitting an indication that there are no selected data bit groups to the receiving device separately from the data bit lane, and The computer-readable medium according to claim 13, further comprising instructions for configuring the processing system to control.

17. A method for data communication via a data bus having a plurality of data bit groups, wherein each data bit group has a plurality of data bit lanes, the method comprising: receiving, by a receiving device, a code via a code bit lane separately from the data bit lane, wherein the code includes values not included in data values transmitted from selected data bit groups at a transmitting device, receiving, by the receiving device, a first data word having data values via the data bit lanes of the data bus, Comparing the code by a comparator in the receiving device with the first data word having each data value in each data bit group received via the data bus; Determining by the receiving device that each data bit group has a data value that matches the code; Determining by the receiving device that each data bit group has a data value that does not match the code; Generating a byte enable vector from the first data word and the code using the receiving device, wherein the byte enable vector is based on the determination that each data bit group has a data value that matches the code, an indication of an unselected data bit group, and based on the determination that each data bit group has a data value that does not match the code, an indication of a selected data bit group; Reconstructing a second data word based on the byte enable vector; A method comprising. Claim 18 The method according to claim 17, further comprising processing data values in the selected data bit groups while not processing data values in the unselected data bit groups. Claim 19 A system for data communication via a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising: Comparing logic configured to receive a first data word having selected data values via the data bit lanes, receive a code via a code bit lane separately from the data bit lanes, compare the code with each data value in each data bit group, determine that each data bit group has a data value that matches the code, and determine that each data bit group has a data value that does not match the code, wherein the code includes values not included in the data values transmitted from the selected data bit groups in the transmitting device; Processing logic configured to generate a byte enable vector including an indication of an unselected data bit group based on a determination that a data bit group has a data value matching the code, and an indication of a selected data bit group based on a determination that a data bit group has a data value not matching the code, from the code and the first data word. Processing logic configured to reconstruct a second data word based on the byte enable vector. A system comprising the same. **Claim 20** The system according to claim 19, wherein the processing logic is configured to process data values in the selected data bit group and not process data values in the unselected data bit group.

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