Power converter having a precharge operation mode

Abstract

An electric converter (100) comprising a first converter stage (11), an output filter (15), a second converter stage (12) disposed between the first converter stage and the output filter, and a controller (40) implemented with a first operating mode for converting a three-phase AC signal to a DC signal. The first converter stage includes a three-phase bridge rectifier (24) connecting three phase terminals to an upper intermediate node (x) and a lower intermediate node (y), and a first active switch (S) connecting the three phase terminals to a middle intermediate node (z). aza , S bzb , S czc The second converter stage includes a phase selector (25) having a switch node (t) connected to the intermediate node (z) and a pair of second switches (S) connecting the switch node (t) to a respective one of the DC terminals (P, N). Pz , S zN The electric converter is configured to disconnect the upper intermediate node (x) and / or the lower intermediate node (y) from all the phase terminals (A, B, C). The controller (40) controls the first switch (S aza , S bzb , S czc A second operating mode is implemented in which the inverter 11 is operated to continue disconnecting the upper intermediate node (x) or the lower intermediate node (y) from all phase terminals (A, B, C) while allowing current to flow between the middle intermediate node (z) and the output filter (15), allowing the voltage across the DC terminals (P, N) to increase stepwise during starting.

Description

Technical Field

[0001] The present invention relates to the field of power conversion. In particular, the present invention relates to an electrical converter and a method for controlling the electrical converter.

Background Art

[0002] It is known from US Patent No. 5,784,269 to add a phase selection switching circuit to a three-phase rectifier for selecting an intermediate phase. The phase selection switching circuit is coupled to a buck-boost type current injection switching circuit to reduce harmonics associated with the three-phase AC input power. The three-layer rectifier further comprises a boost circuit for increasing the DC output voltage beyond the voltage provided by the three-phase AC input.

[0003] Three-phase rectifiers of the above type find useful applications in vehicle battery charging systems and gradient amplifiers of magnetic resonance imaging (MRI) devices having a typical output voltage rating of about 800 to 1000 V DC.

[0004] One drawback associated with the above rectifier is that pre-charge, i.e., boosting of the output voltage at startup, is not straightforward. It is known to perform pre-charge using a resistive element connected via a relay. However, this solution requires a large volume and causes power loss in the resistive element.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] Therefore, in the relevant technical field, there is a need to provide an improved three-phase rectifier of the above type. In particular, there is a need to provide a three-phase rectifier that enables a smooth and safe pre-charge (start-up) procedure at a limited additional cost.

Means for Solving the Problems

[0007] Therefore, according to a first aspect of the present invention, as described in the appended claims, an electrical converter is provided for converting an AC signal having three phase voltages into a DC signal, or vice versa.

[0008] The electric converter according to the present invention features a first converter stage. The first converter stage is operable to convert an AC signal at three phase terminals into a first DC signal at a upper intermediate node and a lower intermediate node. The first converter stage can comprise, for example, a three-phase bridge converter / rectifier having or composed of three bridge legs with their midpoints connected to respective ones of the three phase terminals (e.g., a three-bridge leg six-switch converter / rectifier). The first converter stage further comprises a phase selector operable to connect the three phase terminals to a middle intermediate node via a first active (controllable) switch. The first switch is preferably an active semiconductor switch. The electric converter further comprises a second converter stage disposed between the first converter stage and an output filter. The second converter stage comprises a switch node and a pair of second switches connecting the switch node to respective ones of the DC terminals. The middle intermediate node is connected to the switch node. The second switches are preferably configured to form a current injection circuit connecting the middle intermediate node to the DC terminals, and for example, the second switches are operated through pulse width modulation. The current injection circuit is preferably a buck-boost circuit. The electric converter preferably comprises an input filter preferably comprising a first inductor configured to filter the current flowing through the middle intermediate node. The first inductor can connect the middle intermediate node to the switch node. An output filter comprising one or more capacitors is connected between two DC terminals of the electric converter.

[0009] The electric converter comprises a controller configured to operate the electric converter according to a first operating mode called a normal operation for converting a three-phase AC signal into a DC signal. During normal operation, the controller operates the first switch of the phase selector such that the phase terminal having an intermediate voltage between the highest voltage and the lowest voltage of the three phase voltages (i.e., having the minimum instantaneous absolute value of the three phase voltages) is connected to the middle intermediate node. At the same time, the three-phase bridge rectifier connects the phase terminal having the highest voltage to the upper intermediate node and the phase terminal having the lowest voltage to the lower intermediate node.

[0010] According to the present invention, the electrical converter is configured to disconnect the upper intermediate node and / or the lower intermediate node from all the phase terminals. This function can be achieved by a third switch configured to interrupt the electrical connection between the three-phase bridge converter / rectifier and the upper or lower intermediate node. The third switch is controlled by a controller to ensure that the phase input having the highest voltage is applied to the upper intermediate node and / or the phase input having the lowest voltage is applied to the lower intermediate node, and remains closed in the first operating mode (normal operation). Alternatively, the above function can be achieved by providing the three-phase bridge rectifier with an active or controllable switch that enables the upper intermediate node and / or the lower intermediate node to be disconnected (actively or controllably) from all the phase terminals.

[0011] According to one aspect, the controller implements a second operating mode. During the second operating mode, the controller is configured to control the switching of the first switch and optionally the second switch so as to apply a phase current between the middle intermediate node and the output filter while keeping the upper or lower intermediate node disconnected from all the phase terminals. During the second operating mode, the first switch is preferably controlled (by the controller) such that the current is directed to charge the output filter capacitor.

[0012] Thus, in the second operating mode, while the phase selector is controlled to intermittently inject a phase current into the output filter capacitor so as to charge the capacitor stepwise and increase the output voltage at the output terminals, the upper or lower intermediate node remains disconnected from all the phase terminals to (partially) disable the operation of the three-phase bridge rectifier. The controller is preferably configured to operate in the second operating mode at startup and switch to the first operating mode when the desired output voltage is achieved.

[0013] When the third switch is used, the third switch remains open in the second operating mode. The third switch can be provided as an active semiconductor switch such as a MOSFET or as a relay, and both can be operated by a controller.

[0014] During the second operating mode, the first switch is preferably operated (by the controller) to apply a phase input having a rise / fall voltage higher than the voltage at the upper output terminal to the middle intermediate node. This phase input can be applied from the instant when the fall voltage drops below a predetermined threshold voltage that is higher than the instantaneous voltage of the upper output terminal. Alternatively, the first switch is preferably operated (by the controller) to apply a phase input having a rise voltage less than the voltage at the lower output terminal to the middle intermediate node. This phase input can be applied from the instant when the rise voltage reaches a predetermined threshold voltage less than the instantaneous voltage of the lower output terminal.

[0015] The design of the electrical converter according to the present invention enables a controlled precharge of the DC bus voltage using minimal additional hardware, thus enabling improved ease of operation and longer service life at minimal cost.

[0016] Advantageously, the output stage comprises a boost circuit connected in parallel with the output filter to upper and lower intermediate nodes. The boost circuit advantageously comprises an upper boost circuit connected to the upper intermediate node and a lower boost circuit connected to the lower intermediate voltage node. The upper boost circuit and the lower boost circuit are each connected between a common node and upper and lower output terminals. The upper boost circuit and the lower boost circuit each advantageously comprise a bridge leg with an actively switchable semiconductor switch controlled by a pulse width modulation (PWM) control signal to control the current flowing through the circuit, in particular the current flowing through the corresponding inductor of the boost circuit, or may be constituted by a bridge leg. Along therewith, in a first operating mode, the upper boost circuit controls the current at the phase input having the highest voltage of the three-phase AC input voltage, and the lower boost circuit controls the current at the phase input having the lowest voltage of the three-phase AC input voltage. Additionally, the current injection circuit controls the current at the phase input having a voltage between the highest voltage and the lowest voltage.

[0017] Advantageously, a current control loop is provided that generates appropriate pulse width modulation (PWM) control signals to control the semiconductor switches of both (upper and lower) boost circuits and the semiconductor switch of the current injection circuit to control the current in each inductor or phase input. Advantageously, the pulse width modulation control signals that control the semiconductor switches of the boost circuits (upper and lower boost circuits) and the semiconductor switch of the current injection circuit are interleaved to reduce the current stress (and thus potentially also the size) of the output filter capacitor, for example, to minimize the ripple value and / or the RMS value of the output capacitor current.

[0018] Advantageously, this electrical converter comprises an input filter. The input filter can be operatively coupled to, and considered to form part of, the boost circuit. The input filter advantageously comprises inductors operatively connected to one each of a top intermediate node, a bottom intermediate node, and optionally a middle intermediate node. The inductors can be connected in various ways. In one example, they are connected between their respective middle nodes and the boost circuit. In an alternative example, they are connected between the phase input terminals and the three-phase bridge rectifier.

[0019] The input filter can further comprise filter capacitors operatively coupled to the inductors. The filter capacitors are advantageously connected between the phase input terminals and the above-mentioned inductors. When the inductors are connected between their respective intermediate nodes and the boost circuit, the filter capacitors can be arranged either between the intermediate nodes and the above-mentioned inductors or between the phase input terminals and the three-phase bridge rectifier. When the inductors are connected between the phase input terminals and the three-phase bridge rectifier, the filter capacitors are connected between the phase input terminals and the inductors. The filter capacitors advantageously interconnect the top intermediate node, the middle intermediate node, and the bottom intermediate node. In any case, the filter capacitors are advantageously interconnected in a star configuration. When a star configuration is used, the star point is advantageously connected to a common node of the boost circuit, for example, a node between the top boost circuit and the bottom boost circuit.

[0020] The top boost circuit, the bottom boost circuit, and / or the current injection circuit advantageously comprise actively switchable semiconductor switches controlled by pulse width modulation. The pulse width modulation control signals are advantageously generated individually by current controllers for each of the top boost circuit, the bottom boost circuit, and the current injection circuit during normal operation.

[0021] Advantageously, the electric converter comprises means for measuring one or more of the three-phase AC input voltage, the inductor current (of the first and optionally the second and third inductors), the phase current, and the DC output voltage. The measuring means can be coupled to a controller. The controller is advantageously configured to generate a (PWM) control signal for the semiconductor switches of this electric converter (e.g., phase selector and / or boost circuit and / or current injection circuit) based on these measured values and optionally based on provided set values.

[0022] According to a second aspect of the invention, there is provided a battery charging system or a magnetic resonance imaging apparatus comprising the electric converter of the first aspect.

[0023] According to a third aspect, there is provided a method for converting a three-phase AC input to a DC output as described in the appended claims. This method is advantageously implemented in this electric converter as described above.

[0024] One aspect of the invention relates to an electric converter that can be used to convert a three-phase AC voltage from an electrical grid, which can be at a low voltage (e.g., 380 - 400 Vrms at a 50 Hz frequency), to a high DC output voltage (e.g., 800 - 1000 V).

[0025] Aspects of the invention will now be described in more detail with reference to the accompanying drawings, where like reference numerals denote like features.

Brief Description of the Drawings

[0026]

Figure 1

Figure 2A

Figure 2B

Figure 2C

Figure 2D

Figure 2E

Figure 2F

Figure 2G

Figure 3

Figure 4A

Figure 4B

Figure 4C

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10A

Figure 10B

Figure 10C

Figure 10D

Figure 11

Figure 12

Figure 13

Figure 14

DETAILED DESCRIPTION OF THE INVENTION

[0027] FIG. 1 shows an electrical converter 100 called a DUTCH RECTIFIER, which includes an input converter stage 11 and an output converter stage 12. The electrical converter 100 further includes an input filter 13 and an output filter 15.

[0028] The electrical converter 100 is an AC-DC converter having three phase inputs A, B, C connected to the three-phase voltage of a three-phase AC grid 21 and two DC outputs P, N that can be connected, for example, to a DC load 22 such as a high-voltage (e.g., 800V) battery of an electric vehicle.

[0029] The input converter stage 11 includes three phase connections a, b, c connected to the three phase inputs A, B, C and three outputs x, y, z. These outputs can be regarded as an upper intermediate voltage node x, a lower intermediate voltage node y, and a middle intermediate voltage node z.

[0030] The input converter stage 11 includes a three-phase bridge rectifier 24 composed of three bridge legs 16, 17, 18 each having two passive semiconductor devices (diodes D ax and D ya for leg 16, D bx and D yb for leg 17, and D cx and D yc ) connected in the form of a half-bridge configuration, and a phase selector 25 including three selector switches (S aza S bzb and S czc ) each having two actively switchable semiconductor devices connected in inverse series. Each such switchable semiconductor device preferably has an anti-parallel diode. In this example, a Metal Oxide Field Effect Transistor (MOSFET) is used as the actively switchable semiconductor device, each including an internal anti-parallel body diode that can replace an external anti-parallel diode.

[0031] The output converter stage 12 comprises, or consists of, two stacked boost bridge legs 19, 20 and one buck-boost bridge leg 14. Each boost bridge leg (19, 20) is connected in a half-bridge configuration and includes a boost switch (S for the upper boost bridge leg 19 xm , and S for the lower boost bridge leg 20 my ) and a boost diode (D for the upper boost bridge leg 19 xP , and D for the lower boost bridge leg 20 Ny ). The buck-boost bridge leg 14 includes two buck-boost switches (S Pz and S zN ) connected in a half-bridge configuration. The middle node r of the upper boost bridge leg 19 is connected to the intermediate voltage node x via the upper boost inductor L x , the middle node s of the lower boost bridge leg 20 is connected to the intermediate voltage node y via the lower boost inductor L y , and the middle node t of the buck-boost bridge leg 14 is connected to the intermediate voltage node z via the middle buck-boost inductor L z .

[0032] The common node m of the upper boost bridge leg 19 and the lower boost bridge leg 20 is preferably connected to the midpoint q of an output filter 15 that includes two output filter capacitors C Pm , C mN connected in series between the upper output node P and the lower output node N. The midpoint q forms an intermediate node between the capacitor C Pm and the capacitor C mN .

[0033] The upper boost bridge leg 19 is connected between the upper output node P and the common node m (i.e., in parallel with the upper output filter capacitor C Pm ), and when the switch S xm is open (non-conducting, off state), current can flow from the intermediate voltage node x to the upper output node P through the diode D xP , and when the switch S xmWhen it is closed (conducting, on state), current can flow from the intermediate voltage node x to the common node m (or vice versa) through the switch S xm and is arranged such that. The boost switch (S xm ) of the boost bridge leg 19 is an actively switchable semiconductor device, for example, a MOSFET.

[0034] The buck - boost bridge leg 20 is connected between the common node m and the lower output node N (i.e., in parallel with the lower output filter capacitor C mN ) and is arranged such that when the switch S my is open (non - conducting, off state), current can flow from the lower output node N to the intermediate voltage node y through the diode D Ny , and when the switch S my is closed (conducting, on state), current can flow from the common node m to the intermediate voltage node y (or vice versa) through the switch S my . The boost switch (S my ) of the boost bridge leg 20 is an actively switchable semiconductor device, for example, a MOSFET.

[0035] The buck - boost bridge leg 14 is connected between the upper output node P and the lower output node N (i.e., in parallel with the DC load 22) and acts as a current injection circuit arranged such that when the switch S zN is open (non - conducting, off state) and the switch S Pz is closed (conducting, on state), current can flow from the intermediate voltage node z to the upper output node P (or vice versa), and when the switch S Pz is open (non - conducting, off state) and the switch S zN is closed (conducting, on state), current can flow from the intermediate voltage node z to the lower output node N (or vice versa). The buck - boost switches (S Pz , S zNis a semiconductor device that can be actively switched and is controlled in a complementary manner (i.e., one is closed while the other is open, or vice versa), such as a MOSFET.

[0036] Advantageously, three high-frequency (HF) filter capacitors C that are part of the input filter 13 x 、C y 、C z interconnect the intermediate voltage nodes x, y, z in the form of a star connection. Generally, in order to apply a load symmetrically to the AC grid, the three capacitors C x 、C y 、C z advantageously have substantially equal values.

[0037] According to one aspect of the invention, the electrical converter 100 comprises a switching device 23 connected between the upper node of the bridge rectifier 24 and the upper intermediate node x. The switching device 23 can interrupt the electrical connection between the bridge rectifier 24 and the upper intermediate node x. The switching device 23 is represented as a relay switch in FIG. 1, but alternatively can be any suitable switching device such as an active or at least controllable semiconductor switch, for example a MOSFET. The switching device 23 is advantageously operatively connected to the controller 40.

[0038] According to one aspect of the invention, the controller is configured to operate according to a first operating mode called the normal operation and a second operating mode called the start-up operation, as further described herein.

[0039] The central control unit 40 advantageously controls all controllable semiconductor devices (switches) of the electrical converter 100 and transmits control signals to each switch via the communication interface 50. In particular, the semiconductor devices S aza 、S bzb 、S czc 、S xm 、S my 、SPz and S zN is controlled by the controller 40. Further, the control unit ·42: AC grid phase voltage v a v b v c and ·43: Inductor current i Lx i Ly i Lz and ·44: DC bus voltage V PN and ·45: DC bus midpoint voltage V mN =-V Nm measurement value input ports (42, 43, 44, 45) for receiving the measurement values of

[0040]

Number

[0041] and an input port 41 for receiving a set value that can be Lx i Ly i Lz i. The operation of the controller enables, in particular, achieving a segmented sinusoidal shape of the inductor current i

[0042] The electric converter 100 shown in FIG. 1 is unidirectional because the input stage 11 and the output converter stage 12 include diodes and power can only be drawn from the electrical AC grid 21 and provided to the load 22 at the output. On the other hand, FIG. 5 shows a bidirectional electric converter 200 according to the present invention. The electric converter 200 has the diodes (D ax D bx D cx D ya D yb D yc ) of the input stage 11 and the diodes (D xP D Ny ) of the output converter stage 12 replaced by controllable semiconductor switches (S xa Sxb , S xc , S ay , S by , S cy ), and within the output converter stage 212 (S yN , S Px ), which is different from the converter 100 in that it is replaced. The switching device 23 is provided as a semiconductor switch, for example, a MOSFET.

[0043] Normal operation of the electrical converter During normal operation, the switching device 23 is kept closed (conducting state) so as to apply the phase input having the highest voltage by the bridge rectifier 24 to the upper intermediate node x.

[0044] Referring to FIG. 1 again, the bridge leg of the bridge rectifier 24 connected to the phase input A, B, or C having the highest voltage of the three-phase AC input voltage is switched so that the corresponding phase input A, B, or C is connected to the upper intermediate voltage node x. To achieve this, the bridge leg, while the corresponding selector switch (S aza , S bzb , S czc ) of the bridge leg is open (not conducting, off state), connects the corresponding phase connection a, b, or c to the node x via the upper diode (D ax , D bx , D cx ) of the bridge leg. The bridge leg of the rectifier 24 connected to the phase input A, B, or C having the lowest voltage of the three-phase AC input voltage is switched so that the corresponding phase input A, B, or C is connected to the lower intermediate voltage node y. To achieve this, the bridge leg, while the corresponding selector switch (S aza , S bzb , S czc ) of the bridge leg is open (not conducting, off state), connects the corresponding phase connection a, b, or c to the lower diode (D ya , D yb , D ycConnect to node y via . The phase input A, B, or C having a voltage between the highest voltage and the lowest voltage of the three-phase AC input voltage is connected to the middle intermediate voltage node z by the phase selector 25. To achieve this, the phase selector 25 closes the corresponding phase connection a, b, or c (conducting, on state) selector switch (S aza , S bzb , S czc ) and connects it to node z.

[0045] In a three-phase AC grid having a substantially balanced phase voltage, for example, as shown in FIG. 2A, the three-phase AC input voltage (shown in FIG. 2A) is provided between the upper intermediate voltage node x, the lower intermediate voltage node y, and the middle intermediate voltage node z. It is converted into three intermediate DC voltages (v xz , v zy , v xy ; shown in FIG. 2B). Therefore, these DC voltages exhibit a segmented sine wave shape. The conversion of the three-phase AC input voltage into three intermediate DC voltages is the result of the operation of the input stage 11 as described above. The switching states (switch on → S = 1, switch off → S = 0) of the selector switches (S aza , S bzb , S czc ) are shown in FIG. 2F. It can be seen that the switch remains continuously "on" or "off" throughout a specific 60° sector within the period (360°) of the AC main power supply voltage. Also, the diodes of the bridge rectifier 24 are "conducting" or "not conducting" throughout a specific 60° sector, for example, within the period (360°) of the AC main power supply voltage. The combination of the states of the switch and the diode is unique for each 60° sector of the three-phase AC input voltage and depends on the voltage values of the phase inputs (A, B, C). The sequence of the six unique states of the switch and the diode repeats itself every period (360°) of the AC main power supply voltage.

[0046] When viewed from the intermediate voltage nodes x, y, z towards the output terminals P, N, the HF filter capacitor C x and the upper boost inductor L xand a high-side boost bridge leg 19 and a high-side output capacitor C Pm A conventional DC-DC boost circuit (high-side boost circuit) including them is formed. The input voltage of this high-side boost circuit is the voltage v x across the capacitor C Cx (shown in FIG. 2C), and the output voltage of this high-side boost circuit is a voltage value (V Pm ≈V PN / 2) substantially equal to half of the total DC bus voltage, which is the voltage V Pm across the high-side output capacitor C Pm . The formed high-side boost circuit can be operated by PWM modulation of a specified, possibly variable, switching frequency f x at the switch S s to control the current in the high-side boost inductor L xm .

[0047] When viewed from the intermediate voltage nodes x, y, z towards the output terminals P, N, a conventional "inverting" (negative input voltage and negative output voltage) DC-DC boost circuit (low-side boost circuit) including an HF filter capacitor C y , a low-side boost inductor L y , a low-side boost bridge leg 20, and a low-side output capacitor C mN is formed. The input voltage of this low-side boost circuit is the voltage v y across the capacitor C Cy (shown in FIG. 2C), and the output voltage of this low-side boost circuit is a voltage value (V Nm ≈-V PN / 2) substantially equal to minus half of the total DC bus voltage, which is the voltage V mN across the low-side output capacitor C Nm . The formed low-side boost circuit can be operated by PWM modulation of a specified, possibly variable, switching frequency f y at the switch S s to control the current in the low-side boost inductor L my .

[0048] When viewed from the perspective of the intermediate voltage nodes x, y, and z towards the output terminals P and N, the HF filter capacitor C z and the intermediate buck-boost inductor L z and the buck-boost bridge leg 14 and the output capacitor C Pm and C mN are provided to form a conventional DC-DC buck-boost circuit (intermediate buck-boost circuit). This DC-DC buck-boost circuit may be seen as similar to a single-phase half-bridge voltage source converter (VSC: voltage-source converter). The input voltage of this intermediate buck-boost circuit is the voltage v z across the capacitor C Cz (shown in Figure 2C), and the output voltage of this intermediate buck-boost circuit is the output voltage V Pm across the series connection of the output capacitors C mN and C PN . The formed intermediate buck-boost circuit controls the current in the intermediate buck-boost inductor L z by means of the PWM modulation of the switches S s and S Pz and S zN at a specified, possibly variable switching frequency f

[0049] Figure 2G shows the state of the switch S xm of the upper boost bridge leg 19, the state of the switch S my of the lower buck-boost bridge leg 20, and the state of the switch S Pz of the intermediate buck-boost bridge leg 14 (note that the state of the switch S zN is the complement of the state of the switch S Pz ). The switches S xm and S my and S Pz and S zN are all PWM modulated, as can be seen from the black-colored bars indicating the PWM modulation of the corresponding switches.

[0050] The currents i x and i y and i z in the inductors L Lx ​Ly , i Lz An example of this is shown in FIG. 2D. As can be seen, these currents are controlled to have a segmented sine wave shape, i.e., as a result of the operation of the input stage 11, the three sine wave AC phase currents i a , i b , ic shown in FIG. 2E are converted.

[0051] FIG. 3 shows a block diagram of an advantageous implementation of the central control unit 40 of FIG. 1 during a first operating mode called normal operation. The electrical converter 100 is shown in FIG. 3 as a "single line" equivalent circuit, and the element annotations correspond to those given in FIG. 1. The three slashes in the signal line indicate the bundling of the three-phase signals and may represent the transition to vector representation.

[0052] The goal of the control unit 40 is to control the output voltage V PN to the required set value received from an external unit via the input port 41

[0053]

Number

[0054] and, for example, by controlling the voltage across the lower output capacitor C mN to be substantially equal to half of the DC bus voltage, balance the voltages across the two output capacitors C Pm and C mN . In addition, the currents drawn from the phase inputs (a, b, c) need to be made substantially sinusoidal in shape and controlled to be substantially in phase with the corresponding phase voltages. As previously explained, this can also be achieved by controlling the inductor currents i a , i b , i c instead of directly controlling the phase currents i Lx , i Ly , i Lz . Specifically, the high-frequency ripple of the inductor current is the HF filter capacitor (C x, C y , C z While being filtered by (), the low-pass filtered value of the inductor current is controlled.

[0055] Output voltage V PN The control of is advantageously performed using a cascade control structure comprising an external voltage control loop 60 and an internal current control loop 70. The set value of the output voltage is input to a comparator 61 via an input port 41 and compared with the measured output voltage obtained from a measured value processing unit 95 (e.g., comprising a low-pass filter). The output of the comparator 61 is a control error signal for the output voltage, and the control error signal is further input to a control element 62 (e.g., comprising a proportional-integral control block) that outputs an instantaneous set value of the amplitude of the phase current. These amplitudes are input to a multiplier 63 and multiplied by a signal obtained from a calculation element 64 that outputs a normalized instantaneous value of the phase voltage. The input of the calculation element 64 is the measured phase voltage obtained from a measured value processing unit 93 (e.g., comprising a low-pass filter). The output of the multiplier 63 is the instantaneous, e.g., low-pass filtered, phase current i a , i b , i c Set value for

[0056]

Number

[0057] and is substantially in a sine wave shape and arranged in phase with the substantially corresponding phase voltage. The set value

[0058]

Number

[0059] passes through an adding element 67 and a selecting element 81 which are further described in more detail in the following text regarding their functions, and then is input to a current controller 70.

[0060] The current controller 70 is divided into three individual current controllers 71, 74, and 77. · The individual current controller 71 is used to control the current in the intermediate buck-boost inductor L z . This control is performed by PWM modulation of the switches S Pz , S zN of the intermediate buck-boost circuit including the intermediate buck-boost bridge leg 14. As a result of the operation of the input stage 11, accordingly, the controller 71 controls the currents of the phase inputs A, B, C having a voltage between the maximum voltage and the minimum voltage of the three-phase AC voltage. · The individual current controller 74 is used to control the current in the upper boost inductor L x . This control is performed by PWM modulation of the switch S xm of the upper boost circuit including the upper boost bridge leg 19. As a result of the operation of the input stage 11, accordingly, the controller 74 controls the currents of the phase inputs A, B, C having the maximum voltage of the three-phase AC voltage. · The individual current controller 77 is used to control the current in the lower buck-boost inductor L y . This control is performed by PWM modulation of the switch S my of the lower buck-boost circuit including the lower buck-boost bridge leg 20. As a result of the operation of the input stage 11, accordingly, the controller 77 controls the currents of the phase inputs A, B, C having the minimum voltage of the three-phase AC voltage.

[0061] The selector element 81 is used to send the set value

[0062]

Number

[0063] (shown in FIG. 2D) to the correct individual current controller (71, 74, 77), and as a result, the inductor current set value for each inductor current controller

[0064]

Number

[0065] (as shown in FIG. 2E) is obtained, ·The set values of the phase currents of phase inputs A, B, and C having the highest voltage of the three-phase AC voltage are transmitted to the individual current controller 74, and as a result, the set values

[0066]

Number

[0067] are obtained, ·The set values of the phase currents of phase inputs A, B, and C having the lowest voltage of the three-phase AC voltage are transmitted to the individual current controller 77, and as a result, the set values

[0068]

Number

[0069] are obtained, ·The set values of the phase currents of phase inputs A, B, and C having a voltage between the highest voltage and the lowest voltage of the three-phase AC voltage are transmitted to the individual current controller 71, and as a result, the set values

[0070]

Number

[0071] are obtained.

[0072] In each individual current controller, the received set value for the instantaneous inductor current

[0073]

Number

[0074] is input to a comparator, for example, comparator 72 of the individual current controller 71, and compared with the measured inductor current obtained from the measurement value processing unit 94 (for example, provided with a low-pass filter). The output of the comparator is a control error signal of the current, and this control error signal is further input to a control element, for example, control element 73 of the individual current controller 71. The output of the control element is input to a PWM generation element, for example, PWM generation element 54 of the individual current controller 71. The PWM generation element of the individual current controller generates a PWM modulation control signal for the controllable semiconductor switches of the PWM control bridge leg, that is, the upper boost bridge leg 19 of the upper boost circuit, the lower boost bridge leg 20 of the lower boost circuit, and the buck-boost bridge leg 14 of the buck-boost circuit. These PWM modulation control signals are transmitted to the appropriate bridge leg via the communication interface 50.

[0075] The selector switch of the input stage 11 is either "on" or "off" between each 60° selector of the three-phase AC input voltage according to the voltage values of the phase inputs (A, B, C). The control signal for the selector switch is generated by the switch signal generators 51, 52, 53.

[0076] DC bus midpoint balancing can be performed by adding an offset value to the set value for the instantaneous, for example, low-pass filtered phase currents i a , i b , i c . The offset value is obtained by using a comparator 65 to compare the measured DC bus midpoint voltage obtained from the measurement value processing unit 96 (for example, provided with a low-pass filter) with the set value (for example, V

[0077]

Number

[0078] / 2) and supplying the error signal output by the comparator 65 to the control element 66. PN / 2).

[0079] The phase currents i shown in FIG. 2E a , i b , i c are obtained by controlling the electric converter 100 using such a control unit 40 and control method as described in the foregoing text. In FIG. 2E, the instantaneous, e.g., low-pass filtered, phase currents i a , i b , i c as input to the selector element 81 shown in FIG. 3

[0080] [Number]

[0081] are also shown. As described above, the phase currents i a , i b , i c are indirectly controlled, i.e., they are the result of the control of the inductor currents i Lx , i Ly , i Lz (shown in FIG. 2D) and the operation of the input stage 11. The set values for the inductor currents

[0082] [Number]

[0083] are derived by the selector element 81 based on the measured phase voltages from the set values

[0084] [Number]

[0085] .

[0086] Figures 4A to 4C show five consecutive switching cycles of the bridge leg of the electric converter 100 for a time interval near ωt = 45° within the sector where 0 ≦ ωt < 60° (see Fig. 2) of the three-phase AC input voltage. That is, each has a switching period T s equal to 1 / f s and f s is the switching frequency. Within this sector, the selector switch and diode of the input stage 11 are in the following switching states, · Switch S aza = 0 (off), diode D ax = 1 (conducting), diode D ya = 0 (blocking), and the phase connection a is connected to node x, · Switch S bzb = 0 (off), diode D bx = 0 (blocking), diode D yb = 1 (conducting), and the phase connection b is connected to node y, · Switch S czc = 1 (on), diode D cx = 0 (blocking), diode D yc = 1 (conducting), and the phase connection c is connected to node z .

[0087] The figures in Figs. 4A to 4C show the voltage, current, and switching signal on the time axis in milliseconds. Fig. 4A corresponds to the operation of the boost circuit, and shows the corresponding inductor current i Lx (and the set value of this current

[0088] [Number]

[0089] ), the inductor voltage v Lx , and the control signal S xm of the switch of the PWM-modulated boost bridge leg 19. Fig. 4B corresponds to the operation of the buck circuit, and shows the corresponding inductor current i Ly (and the set value of this current

[0090] [Number]

[0091] ) and the inductor voltage v Ly and the control signal S of the switch of the PWM modulation buck-boost bridge leg 20 my are shown. FIG. 4C corresponds to the operation of the buck-boost circuit in the middle position, and the corresponding inductor current i Lz (and the set value of this current

[0092] [Number]

[0093] ) and the inductor voltage v Lz and the control signal S of the upper switch of the PWM modulation bridge leg 14 Pz are shown. It should be noted that the control signal S of the lower switch of the PWM modulation bridge leg 14 zN is the complement of the control signal S Pz .

[0094] In order to minimize the total harmonic distortion (THD) of the AC input current of the electric converter, the high-frequency ripple of the phase currents i a , i b , i c is advantageously minimized.

[0095] The advantage of the electric converter 100 is that the half-switching cycle voltage-time product / area of the boost inductor and the half-switching cycle voltage-time product / area of the buck-boost inductor are smaller than the voltage-time product / area of the boost inductor of the conventional six-switch boost-type PFC rectifier. This is because the voltage applied to these inductors is lower than that in the case of the conventional six-switch boost-type PFC rectifier. For the middle buck-boost inductor, the applied voltage is not necessarily lower, but the value of the current flowing through the inductor is smaller than the value of the current flowing through the inductor of the conventional six-switch boost-type PFC rectifier. As a result, a smaller inductor with less magnetic energy storage can be realized, resulting in a higher power volume ratio of the electrical three-phase AC-DC converter 100 provided by the present invention.

[0096] Starting (pre-charging) operation of the electric converter At startup, it is important to gradually increase the output voltage V for the service life of the electrical components. According to the present invention, a dedicated operating mode is implemented in the controller 40. Referring to FIG. 5, the switching device 23 is opened to block conduction between the upper node of the bridge rectifier 24 and the upper intermediate node x. The current does not flow through the inductor L PN Here, the phase selector 25 is operated to apply a phase input voltage slightly higher than the (instantaneous) output voltage V across the output terminals P and N at the middle intermediate node z. By doing so, the phase current flows through the inductor L x through the conduction of the (internal) antiparallel diode D PN connected to the switch S Pz between the switch node t and the terminal P, and further flows to the upper output terminal P. The current path is indicated by the arrow in FIG. 5, and thus, from the middle intermediate node z, through the switch node t, through the antiparallel diode D zP , through the capacitors C z of the output filter 15, C zP , C Pm , and returns to the lower intermediate node y. mN

[0097] Switch S Pz and S yN do not need to be operated, and it will be convenient to note that these switches may remain in the non-conductive state (open). Alternatively, as will be further described below, switch S Pz and S yN can be actively operated by the controller 40 such that, depending on the switching method utilized, while S yN is left open, S Pz is conductive, or vice versa. By doing so, losses are reduced compared to the case of operating only by the antiparallel diode D zP .

[0098] Referring to FIG. 6, the phase selector 25 is preferably operated to connect the phase inputs A, B, C having a falling voltage to the neutral intermediate node z when the falling (descending) voltage has a level higher than the instantaneous voltage potential at the terminal P. The time t1 when connecting the phase input having a falling voltage to the neutral intermediate node z is preferably selected as the instant when the phase voltages v a , v b , v c fall below a threshold that exceeds the potential (V PN ) at P, for example, when the instantaneous value of the potential at P drops from 5V to less than 10V. In a second alternative, t1 is selected as a predetermined time, for example, 1 μs to 10 μs before t2, where t2 is the time when the falling phase voltage reaches / crosses the value of the potential at P. The second alternative can be implemented by predicting the time t2, for example, based on data from the previous cycle and / or based on measured values of the phase input voltage and the output voltage.

[0099] Each time the switches S aza , S bzb , and S czc of the phase selector 25 are operated to connect the falling phase voltage to the neutral intermediate node, a current pulse flows through the inductor L z and the output filter, whereby the capacitors C Pm , C mNCharge it and further increase V PN By appropriately selecting the time t1, it will be convenient to note that it is possible to control the magnitude of the current pulse and thus the dynamics of the pre-charge of the output stage.

[0100] At time t2, the rising-phase line voltage reaches / crosses the value of the potential at P corresponding to the maximum value of the current pulse. Thereafter, the current magnitude flowing through the inductor L z decreases until it becomes zero at time t3. At t3, the diode D zP switches to the non-conducting state, and when the switch S Pz is actively controlled during the pre-charge operation, the controller 40 controls the switch S Pz to switch to the non-conducting state. This prevents the current from becoming negative and discharging the capacitor of the output filter.

[0101] As described above, the controller 40 is configured to operate the switches S aza , S bzb , and S czc of the phase selector 25 to selectively connect the appropriate phase input to the midpoint intermediate node. That is, the appropriate switches S aza , S bzb , and S czc are switched to the conducting state at time t1 and disconnected at time t3 or later. For example, to obtain bidirectional current, when the phase selector switches S aza , S bzb , and S czc are each formed by two semiconductor switches (FETs) arranged in inverse series having anti-parallel diodes, it is possible to operate only one of the two FET switches while the other of the two FET switches is conducting through the anti-parallel diode. By doing so, each anti-parallel diode automatically becomes non-conducting when the current becomes negative. As a result, S at t3 PzThe switching becomes less important. The electric converter advantageously comprises a voltage measurement sensor for measuring the phase voltages at the input terminals A, B, C, and the voltage measurement sensor is operatively coupled to the controller 40 for using the sensed voltage level when selecting the time t1.

[0102] Here, an alternative embodiment for the starting operation according to the invention will be described in connection with FIG. 7, presenting an electric converter 400 different from the electric converters 100 or 200 at the position of the switch 23. The switch 23 between the upper nodes and the upper intermediate node x of the rectifier bridges 16, 17, 18 is omitted and replaced by a switch 43 between the lower nodes and the lower intermediate node y of the rectifier bridges 16, 17, 18. Such an arrangement enables a stepwise pre-charge of the DC bus voltage V according to the reverse current flow scheme as indicated by the arrows in FIG. 7. PN to obtain.

[0103] During the starting operation mode, the controller 40 operates the switch 43 (or switch 23 in the case of FIG. 1) to be in an open (non-conducting) state. The rectifier bridge 24 ensures that the highest phase voltage at the input terminals A, B, C is applied to the upper intermediate node x, resulting in the output node P being at a high potential. Then, the controller 40 operates the switches of the phase selector 25 to enable a return current path now that the lower rectifier bridge switches D ya , D yb , D yc are disconnected from the lower intermediate node. By doing so, a current for charging the capacitors C Pm and C mN can flow through the output filter 15 as shown in FIG. 8. Thus, the current flow is from the upper intermediate node through nodes r and D xP to the output filter 15, then through the lower switch S zN (parallel diode thereof) to the switch node t, and then back to the middle intermediate node z, from where the current is sent back to the input terminals by appropriate switching of the phase selector 25. During this operation, the switch S of the buck-boost circuit Pzremains in the open state (non-conductive), and switch S zN can be in the open or closed state. If it remains open, the current path flows through the anti-parallel diode coupled to S zN .

[0104] The advantageous switching pattern of the switches of the phase selector 25 of the converter 400 is graphically shown in FIG. 8. The phase selector 25 is advantageously operated to connect the phase inputs A, B, C having this rising voltage to the neutral intermediate node z when the rising (increasing) voltage has a level lower than the instantaneous voltage potential at the terminal N. The time t1 when the phase input having the rising voltage is connected to the neutral intermediate node z is preferably selected as the instant when the phase voltages v a , v b , v c rise above a threshold that is, for example, 5 V to 10 V below the instantaneous potential at N. In a second alternative, t1 is selected, for example, as a predetermined time 1 μs to 10 μs before t2, where t2 is the time when the rising phase voltage reaches / crosses the value of the potential at N. The second alternative can be implemented, for example, by predicting the time t2 based on data from the previous cycle and / or based on measured values of the phase input voltage and the output voltage. At time t3, the current again becomes zero, and the anti-parallel diode coupled to S zN switches to the non-conductive state. When S zN is actively switched, it is turned off at t3. Also, starting from t3, the phase selector switches that are in the conductive state between t1 and t3 can be switched to the non-conductive state. For example, to obtain bidirectionality of the current, the phase selector switches S aza , S bzb , and S czcWhen formed by two semiconductor switches (FETs) arranged in inverse series, each having an antiparallel diode, it is possible to operate only one of the two FET switches while the other of the two FET switches is conducting through the antiparallel diode. By doing so, each antiparallel diode automatically becomes non-conducting when the current becomes negative. As a result, the switching of S at t3 becomes less important. zN becomes less important.

[0105] In FIG. 9, an electric converter 300 different from the converter 100 is shown in that the input filter 13 is arranged in front of (not behind) the input stage 11, that is, the input filter 13 is connected between the three-phase input terminals A, B, C and the input stage 11. The input stage 11 connects the three-phase input terminals A, B, C to the intermediate nodes x, y, z via the corresponding inductors L a , L b , L c . Capacitors C a , C b , C c are arranged between the three-phase input terminals and the inductors. As in the previous example, the capacitors are connected in a star configuration, and advantageously, the star point is connected to the midpoint of the output filter 15. Alternatively, the capacitors C a , C b , C c can be arranged in a delta configuration across the three-phase input lines. In the example of FIG. 9, it is convenient to note that the voltages at the switch nodes r, s, and t are the same as the voltages at the intermediate nodes x, y, z, so the voltage signals at the three intermediate nodes x, y, z are somewhat different compared to the previous examples (FIGS. 1, 5, and 7). As a result, high-frequency current will flow through the input stage 11, whereas in the previous examples (FIGS. 1, 5, and 7), the high-frequency current only occurs in the output converter stage downstream of the input filter 13.

[0106] In any of the electrical converters 100, 300, and 400, the diodes can be replaced by semiconductor devices that can be actively switched to enable bidirectional power flow in the electrical converter.

[0107] In any of the electrical converters 100 to 400, the HF capacitors C x , C y , C z (or in the case of FIG. 9, C a , C b , C c ) are connected in a star configuration. The voltage at the star point connection can be controlled by controlling the voltage at the common node m.

[0108] Referring back to FIG. 1, one advantage of one aspect of the present invention is that an inrush current limiter, for example, a resistor, does not need to be provided in parallel with the switch 23. This reduces losses, prevents bulkiness, and increases the service life.

[0109] FIGS. 10A to 10D show different modifications of the input stage 11 that can be used in the electrical converters 100 to 400 described above.

[0110] Referring to FIGS. 10C and 10D, it will be convenient to note that in the converter stage, the function of the switch 23 can be taken over by active (bidirectional) switches within the bridge legs 16 to 18. The thyristors Thy ax , Thy bx , Thy cx in the upper bridge leg input stage 11 in FIG. 10C and the alternative thyristors Thy ya , Thy yb , Thy yc in the input stage of FIG. 10D keep the upper intermediate node x or the lower intermediate node y disconnected from all three phase terminals A, B, C, thereby obtaining the switch 23 and avoiding the need for an additional hardware switch 23 as in FIG. 1, and can be controlled by the controller 40 during the second operating mode. In a further alternative, the thyristors Thy ax , Thybx 、Thy cx and / or thyristor Thy ya 、Thy yb 、Thy yc Instead, a (current) bidirectional active switch such as a pair of MOSFETs connected in inverse series, each having an antiparallel diode, is used.

[0111] Referring to FIG. 11, a modification of the electric converter 100 of FIG. 1 is shown. The electric converter 500 differs from the converter 100 of FIG. 1 in that a single boost circuit 19 is used instead of two stacked boost circuits 19, 20. Here, the boost circuit 19 includes a switch S xy connected between node r and node s. The output filter 15 can include a single capacitor C PN without a midpoint node. Similarly, other modifications are possible in which the boost circuit 19 is omitted.

[0112] Referring to FIG. 12, the electric converter 100 (alternatively, it can be the electric converter 200, 300, or 400) can include a connection terminal n for connecting the neutral conductor of a three-phase AC grid. For example, in some applications such as charging an electric vehicle, the amplitude of the sinusoidal current drawn from each phase of the three-phase grid can be independently controlled in order to reduce the load on a particular phase so that other consumer devices can still draw power from that particular phase during charging of the vehicle's battery without overloading the phase. In this case, the connection terminal n is preferably connected to the neutral conductor of the three-phase grid, allowing a return current substantially equal to the sum of the three phase currents to return to the neutral conductor of the grid. In an advantageous aspect, the three phase currents can be completely independently controlled by providing a common node connected to the input neutral conductor.

[0113] The neutral connection terminal n preferably includes an AC capacitor C x 、C y 、C zIt is connected to the star point of , and to the common node m of the stacked boost bridges 19, 20 (and thus also to the midpoint of the output filter 15). This results in a completely symmetric converter structure. In this case, the voltages at the star point and at the common node are equal to the voltage of the neutral conductor of the grid. The connection between the common node m and the midpoint q of the output filter 15 may or may not exist.

[0114] It will be convenient to note that an electrical converter according to the present invention can be envisaged that comprises both the switch 23 between the upper node and the upper intermediate node x of the bridge rectifier and the switch 43 between the lower node and the lower intermediate node y of the bridge rectifier. During the pre-charge operation, the controller can alternate between pre-charging the DC bus by opening the switch 23 (closing the switch 43) and pre-charging the DC bus by opening the switch 43 (closing the switch 23).

[0115] Referring to FIG. 13, it may be convenient to add a buffer circuit 26 across the three-phase bridge rectifier 24 if it is not possible to keep the switching device 23 in the conducting state (closed) when the converter is turned off. The buffer circuit 26 may in some cases comprise a capacitor in parallel with a resistor and acts to capture (and dissipate) the energy stored in the inductance of any input filter and the inductance of the power mains. This avoids damage, for example, in the case of an error mode due to overvoltage or overheating or when the converter needs to be shut down. The buffer circuit can comprise a capacitor in series with a zener diode connected between the upper and lower nodes of the bridge rectifier 24. A diode can be additionally arranged in anti-series with the zener diode to reduce the reactive power consumption of the capacitor during normal operation. Alternatively, a surge arrester can be provided instead of the zener diode and capacitor.

[0116] Referring to FIG. 14, the battery charging system 700 includes a power supply unit 704. The power supply unit 704 is coupled to an interface 702 that includes, for example, a switch device that enables the power supply unit 704 to be connected to the battery 703. The power supply unit 704 includes any one of the electric converters 100, 200, 400 as described above, which is coupled to a DC-DC converter 701. The DC-DC converter is coupled between the DC terminals P, N of the electric converter 100 and the DC terminals P', N' of the power supply 704. The DC-DC converter 701 can be an isolated DC-DC converter. The DC-DC converter can include a transformer that provides galvanic isolation, particularly in the case of wired power transmission between the power supply unit 704 and the battery 703. The DC-DC converter can include a pair of inductively coupled coils through air, such as in the case of wireless power transmission. In some cases, the interface 702 can include, for example, a plug and a socket in wired power transmission. Alternatively, the plug and the socket can be provided at the input (e.g., nodes A, B, C).

Description of Reference Numerals

[0117] 11 Input stage, three-phase bridge rectifier, input converter stage 12 Converter stage, output converter stage 13 Input filter 14 Buck-boost bridge leg, center buck-boost bridge leg, current injection circuit 15 Output filter 16 Leg, bridge leg, rectifier bridge, three-phase bridge rectifier 17 Leg, bridge leg, rectifier bridge, three-phase bridge rectifier 18 Leg, bridge leg, rectifier bridge, three-phase bridge rectifier 19 Boost bridge leg, upper boost bridge leg, PWM-modulated upper boost bridge leg, boost bridge, boost circuit, first boost circuit 20 Boost bridge leg, lower boost bridge leg, PWM-modulated lower boost bridge leg, boost bridge, boost circuit, second boost circuit 21 3-phase AC grid, electrical AC grid 22 DC load 23 Switch, switching device, third switch 24 3-phase bridge rectifier, bridge rectifier, rectifier bridge 25 Phase selector 26 Buffer circuit 40 Central control unit, controller, control unit 41 Input port 42 Measured value input port 43 Measured value input port, switch, third switch 44 Measured value input port 45 Measured value input port 50 Communication interface 51 Switch signal generator 52 Switch signal generator 53 Switch signal generator 54 PWM generation element 60 External voltage control loop 61 Comparator 62 Control element 63 Multiplier 64 Calculation element 65 Comparator 66 Control element 67 Addition element 70 Internal current control loop, current controller, current control loop 71 Individual current controller, controller, current controller 72 Comparator 73 Control element 74 Individual current controller, controller 77 Individual current controller, controller 81 Selection element, selector element 93 Measured value processing unit 94 Measured value processing unit 95 Measured value processing unit 96 Measured value processing unit 100 Converter, electrical converter, electrical 3-phase AC-DC converter 200 Electrical converter 211 Three-phase bridge rectifier 212 Output converter stage 300 Electric converter 400 Electric converter, converter 500 Electric converter 700 Battery charging system 701 DC-DC converter 702 Interface 703 Battery 704 Power supply unit, power supply

Claims

1. An electrical converter (100, 200, 300, 400, 500) for converting an AC signal having three-phase voltages into a DC signal, comprising three phase terminals (A, B, C) and a first DC terminal (P) and a second DC terminal (N), A three-phase bridge rectifier (24) that connects the three phase terminals to a upper intermediate node (x) and a lower intermediate node (y), and a first active switch (S ａｚａ , S ｂｚｂ , S ｃｚｃ ) that comprises a phase selector (25) that connects the three phase terminals to a middle intermediate node (z), and a first converter stage (11). At least one capacitor (C Ｐｍ , C ｍＮ ) provided across the first and second DC terminals (P, N), and an output filter (15); A second converter stage (12) disposed between the first converter stage and the output filter, the second converter stage including a switch node (t) and a pair of second switches (S Ｐｚ , S ｚＮ ) that connect the switch node (t) to one of each of the first and second DC terminals (P, N), and a second converter stage (12) in which the middle intermediate node (z) is connected to the switch node (t); a controller (40) implementing a first operating mode for converting the AC signal into the DC signal, wherein in the first operating mode, the three-phase bridge rectifier connects the phase terminal among the three phase terminals having the highest voltage to the upper intermediate node, and the phase terminal among the three phase terminals having the lowest voltage to the lower intermediate node, and The controller (40) implements a second operating mode, in which the electric converter is configured to disconnect the upper intermediate node (x) and / or the lower intermediate node (y) from all of the phase terminals (A, B, C), and the controller enables current to flow between the middle intermediate node (z) and the output filter (15), and to incrementally increase the voltage across the first and second DC terminals (P, N) to pre-charge the electric converter, the upper intermediate node (x) or the lower intermediate node (y), or the upper and lower intermediate nodes are alternately left disconnected from all of the phase terminals (A, B, C), while controlling the switching of the first active switch (S ａｚａ , S ｂｚｂ , S ｃｚｃ ) is configured to be controlled characterized by an electrical converter (100, 200, 300, 400, 500).

2. In the second operating mode, the controller connects one of the three phase terminals having a voltage that is dropping and is higher than the voltage at the first DC terminal (P) to the middle intermediate node (z), or connects one of the three phase terminals having a voltage that is rising and is lower than the voltage at the second DC terminal (N) to the middle intermediate node (z), configured to control said first active switch (S ａｚａ , S ｂｚｂ , S ｃｚｃ ). The electrical converter according to claim 1.

3. Comprising a third switch (23, 43) configured to interrupt the electrical connection between the three-phase bridge rectifier and the upper intermediate node (x), the lower intermediate node (y), or both the upper intermediate node and the lower intermediate node, and the controller is configured to close the third switch in the first operating mode and open the third switch in the second operating mode, the electrical converter according to claim 1.

4. The electrical converter according to claim 3, wherein the third switch (23) is connected between the upper node of the three-phase bridge rectifier and the upper intermediate node (x) or between the lower node of the three-phase bridge rectifier and the lower intermediate node (y).

5. The electrical converter according to claim 3, wherein the third switch (23, 43) is a semiconductor switch or a relay.

6. In the first operation mode, the controller controls the switching of the first active switches (S ａｚａ , S ｂｚｂ , S ｃｚｃ ) according to a switching pattern in which the phase terminal having the minimum instantaneous absolute voltage value among the three phase voltages is connected to the neutral middle node (z). The electric converter according to any one of claims 1 to 5.

7. The electrical converter according to any one of claims 1 to 5, wherein the second converter stage is a current injection circuit (14) and the second switch is an active switch.

8. The electric converter according to any one of claims 1 to 5, further comprising a boost circuit (19, 20) configured to convert between a second DC signal at the fourth intermediate node (r) and the fifth intermediate node (s) and a third DC signal at the first and second DC terminals (P, N), wherein the electric converter comprises a link (13) connecting the upper intermediate node (x) to the fourth intermediate node (r) and connecting the lower intermediate node (y) to the fifth intermediate node (s).

9. The boost circuit includes a first boost circuit (19) and a second boost circuit (20) stacked between the first DC terminal (P) and the second DC terminal (N), the first and second boost circuits include a common node (m), and each of the first and second boost circuits includes at least one fourth switch (S ｘｍ , S ｍｙ ). The electric converter according to claim 8.

10. The electric converter according to claim 9, wherein the output filter (15) comprises a midpoint node (q) between the first and second DC terminals (P, N), and the common node (m) is connected to the midpoint node (q).

11. The electric converter according to claim 8, wherein the link (13) comprises an input filter.

12. An inductor (L) configured to filter a current flowing through the middle intermediate node (z) when in the second operating mode Ｚ The electric converter according to any one of claims 1 to 5, comprising).

13. The electric converter according to claim 12, wherein the inductor is connected between the middle intermediate node (z) and the switch node (t).

14. The electric converter according to any one of claims 1 to 5, further comprising a buffer circuit (26) connected in parallel with the three-phase bridge rectifier (24), wherein the buffer circuit comprises a buffer capacitor.

15. A battery charging system comprising a power supply unit, wherein the power supply unit comprises the electric converter according to any one of claims 1 to 5.

16. A magnetic resonance imaging apparatus comprising a gradient amplifier, wherein the gradient amplifier comprises a power supply unit, and the power supply unit comprises the electric converter according to any one of claims 1 to 5.

17. An electric motor drive system comprising a power supply unit, wherein the power supply unit comprises the electric converter according to any one of claims 1 to 5.

18. A method of converting a three-phase AC input to a DC output, comprising the step of providing an electrical converter (100, 200, 300, 400, 500) according to any one of claims 1 to 5, wherein the method comprises: while gradually increasing the voltage across the first and second DC terminals (P, N) during startup, keeping the upper intermediate node or the lower intermediate node, or both the upper and lower intermediate nodes alternately disconnected from all of the phase terminals, and providing a current flow between the middle intermediate node (z) and the output filter (15) by controlling the first active switch (S ａｚａ , S ｂｚｂ , S ｃｚｃ ) to pre-charge the electrical converter.

19. The method according to claim 18, wherein the step of pre-charging comprises connecting one of the three phase terminals having a falling voltage higher than the voltage at the first DC terminal (P) to the middle intermediate node (z), or connecting one of the three phase terminals having a rising voltage lower than the voltage at the second DC terminal (N) to the middle intermediate node (z), or a combination of both steps.

Images