Electric Circuit Design Inspection System and Method

Abstract

An artificial intelligence (AI)-based system and method for electrical design inspection configured to autonomously extract, transform, and analyze data from electrical documentation associated with an electrical circuit by utilizing AI algorithms in conjunction with deterministic algorithms to generate output results.

Description

Technical Field

[0001] The present disclosure relates to an artificial intelligence (AI)-based system and method for electrical design inspection, and more particularly, but not exclusively, to using an AI algorithm to autonomously extract information from electrical component documentation, such as a data sheet, and utilize the information to perform an automatic and comprehensive inspection of an electrical circuit diagram and layout representation of an electrical circuit.

Background Art

[0002] Electrical circuits containing electrical components are the cornerstone of all modern electrical devices. Over the past few decades, as the size of electrical components has shrunk, the number of electrical components that can be embedded within a given space or mounted on a given surface has increased, and as a result, electrical circuits have become far more complex. The electrical circuits can be simple passive components such as resistors, capacitors, inductors, diodes, transistors, etc., or high-performance active components such as microprocessors, voltage regulators, sensors, etc.

[0003] In view of the above, due to their high complexity, electrical circuit diagrams and layout documentation of electrical circuits, such as printed circuit boards (PCBs), electrical circuits including silicon-based chips, and other types of electrical circuits, often contain errors / defects ranging from simple and straightforward errors to complex logic errors.

[0004] Typical analog or digital circuits, which may include complex analog or digital sub-circuits, consist of various interconnected passive and active electrical components. Complex functionality can be achieved by connecting multiple electrical components together in various ways to create an electrical circuit such as a PCB.

[0005] The specific connections of electrical components forming an electrical circuit can be defined in numerous representations. A very common such representation is a netlist file, which is a description of the electrical circuit's connections including a list of those electrical components and their pins (also called "nodes"), as well as the interconnections between various nodes. In other words, a netlist is a high-level description of circuit connections without reference to the geometric characteristics of these connections (such as the position of components, number of layers, trace length, etc.). These geometric characteristics are generally represented in a layout file that represents the overall geometry and topology of the circuit.

[0006] Typically, the process of developing a new electrical circuit involves using specified software to design the electrical circuit diagram and layout of the circuit according to the desired circuit specifications, and then simulating and reviewing the circuit design (circuit diagram and / or layout).

[0007] Currently, an important part of the design review is based on a manual reading of all the data sheets of the electrical components, understanding the requirements of each component from them, and checking whether these requirements are met and adhered to in the design. Once the circuit is designed, simulated, and reviewed as described above, to ensure that it functions as required, a physical implementation of the design, i.e., a prototype, is fabricated and then inspected (generally known as the "bring-up" phase). If the desired function is not achieved, the circuit is returned to the design phase, the detected errors are corrected, and the design goes through another "bring-up" phase, at which point other errors may be detected. This iterative process is repeated until no errors are detected during the "bring-up" phase. At this point, the electrical circuit can be manufactured for commercial use.

[0008] Each time an error is detected only during the "bring-up" phase, redesigning the electrical circuit and remanufacturing its physical implementation can be costly and time-consuming. Moreover, sometimes some errors are not detected even during the "bring-up" phase, proceed to the final product, compromising its reliability and posing a risk to the manufacturer's reputation. Therefore, it is desirable to detect as many errors as possible at the earliest possible stage of the process and reduce the number of iterations and the risk of defective products.

[0009] There are various techniques for searching for errors and simulating and reviewing the design of a circuit (circuit diagram and / or layout). These can include, among other things, functional analysis, timing simulation, and logical equivalence checking, which compares a model of the designed circuit with a reference model that describes the desired function of the electrical circuit. These techniques are useful, but they may not identify errors or non-optimal designs (from the perspective of best practice guidelines that are violated or not adhered to) related to information from the data sheet, such as missing pull (up / down) resistors, mismatches in communication protocol lines, exceeding operating conditions (voltage, current, temperature, etc.), direct connection instruction violations, incorrect component placement, and trace routing.

[0010] Some of these types of defects can be partially checked by existing verification software tools, but the tools are severely limited due to the lack of comprehensive access to their data sheet information. Therefore, the review processes implemented today rely very heavily on manual and non-automated design review procedures and are thus time-consuming (typically, today, a human inspection of an average circuit design takes several weeks), cumbersome, and error-prone.

[0011] Moreover, among other factors, the ever-increasing complexity of electrical circuits, especially caused by the miniaturization of electrical component sizes (see, for example, "Moore's Law" regarding the continuously increasing number of transistors per silicon chip), makes it unrealistic for human inspection to be completed fully and accurately within a reasonable time.

[0012] The existing verification software tools described above rely on the manual insertion of information from the data sheets of the components of the electrical circuit. Examples of some such current techniques include: 1. Various "DRC" ("Design Rule Check") tools implemented in most PCB design CAD (Computer-Aided Design) software. These tools are capable of detecting a very narrow range of errors. For example, an electrical circuit diagram DRC tool can mainly detect errors related to incompatible pin type connections (e.g., output-output connections) and extremely irregular connections (e.g., nets with less than two connections). 2. The "Valydate Schematic Analysis" tool is implemented within Mentor Graphics' Xpedition package as described in U.S. Patent Publication US8650515B2, and discloses a system and method for verifying circuit designs including determining a subset of checks to apply to a part of the entire circuit based on the pin type configuration of the circuit parts. The disclosed "Valydate Schematic Analysis" tool is limited to inspecting the circuit diagram file of the circuit and does not suggest inspecting the layout design or other verifications. Moreover, the inspection technique of the "Valydate Schematic Analysis" tool is based on and limited to the manual insertion of data from the data sheet into a pre-configured parametric model.

[0013] As is evident from the fact that, even when using these verification tools, the industry still heavily relies on human manual design reviews and is troubled by numerous "respins" (a general term for the iterations in the "bring-up" phase of the design-layout, as described above), the aforementioned verification tools do not solve the problem of design errors / defects / violations of best practice guidelines in electrical circuits.

[0014] Accordingly, there is a need in the art to provide a system and method for inspecting an electrical circuit design tool that is autonomous, extensive, comprehensive, and capable of detecting errors / defects / best practice guideline violations in advance from various levels of abstraction / complexity in electrical circuit design. It is even more necessary in the art to perform such operations in an efficient and timely manner, within about a few minutes.

[0015] The aforementioned limitations and drawbacks of the current technology, as well as other limitations regarding the limited scope of detected errors, scalability, ease of use, and stability, justify the present invention proposed below.

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

[0016] The following embodiments and aspects thereof are described and illustrated in conjunction with systems, apparatuses, and methods that are exemplary and not intended to be limiting. In various embodiments, one or more of the aforementioned problems are reduced or eliminated, while other embodiments are directed to other advantages or improvements.

MEANS FOR SOLVING THE PROBLEMS

[0017] The present invention provides several substantial advantages, some of which are as follows: · A wider range of detected errors - Automatic extraction can obtain more data compared to a reasonable manual process. As a result, the present invention enables the detection of a wide range of defects without precedent from different levels of complexity compared to existing techniques. ·Scalability - The present invention provides an automatic extraction function, which enables scalability in several dimensions, such as providing the ability to add new types of data to be inspected, for example, supporting the ability to automatically extract and convert the electrical documentation of new electrical components, and for example, providing the ability regarding consistent updating of data for existing components. For example, when a manufacturer of a certain component issues an update / modification to the electrical documentation, it can be seamlessly uploaded to provide the latest circuit diagram and layout inspection system for the electrical circuit. In contrast, any of these operations would be extremely difficult and costly when using existing manual inspection-based techniques. ·Ease of use - The present invention provides an electrical circuit design inspection system and method that provide circuit diagram and layout inspection capabilities that enable autonomous extraction of data (apart from some specific exceptions described below). As a result, the user is not required to perform complex insertions of large amounts of data (which is sometimes required in existing solutions), and can easily use a friendly interface such as a drag-and-drop interface to upload electrical design data such as netlists, Gerber files, BOMs, or any other relevant data. ·Stability - By avoiding manual operations, the present invention can avoid the risk of "human error", which can affect existing known techniques.

[0018] According to one aspect, a method for using an artificial intelligence (AI)-based method for electrical design inspection is provided, comprising step (i); extracting data from at least one electrical documentation associated with at least one electrical component, such component being a part of an electrical circuit represented by at least one electrical design representation, step (ii); extracting supplementary data regarding the electrical circuit and additional user-defined rules selected for insertion, step (iii); converting the data extracted in step (i) into a formal language, step (iv); executing a design verification process using the data received in step (ii) and the converted data generated in step (iii), step (v); generating an inspection result output, wherein steps (i), (iii) to (v) are configured to be implemented in an autonomous manner, the data conversion in step (iii) is configured to be implemented in an autonomous manner by utilizing an AI model together with a deterministic algorithm, and the inspection result output is configured to specify various analysis results regarding the electrical circuit represented in at least one electrical design.

[0019] According to some embodiments, the data analysis in step (iv) is further configured to be implemented by an AI model.

[0020] According to some embodiments, the data analysis in step (iv) is further configured to be implemented by a deterministic algorithm based on electrical circuit theory.

[0021] According to some embodiments, the electrical circuit is a printed circuit board (PCB) / silicon-based chip.

[0022] According to some embodiments, the supplementary electrical design data includes a netlist file describing the circuit diagram characteristics of the electrical circuit.

[0023] According to some embodiments, the supplementary electrical design data includes a gerber file describing the layout characteristics of the electrical circuit.

[0024] According to some embodiments, the supplementary electrical design data includes data regarding a bill of materials (BOM).

[0025] According to some embodiments, the selected user-defined rules include data regarding at least one user-defined rule configured to be provided and selected during an electrical design inspection process.

[0026] According to some embodiments, a user can select at least one user-defined rule to enforce during an electrical design inspection process or alternatively not select a user-defined rule.

[0027] According to some embodiments, at least one user-defined rule is supplementary to a predefined global list of rules configured to be enforced during an electrical design inspection process.

[0028] According to some embodiments, the predefined global list of rules is configured to be edited or modified by a user in any way.

[0029] According to some embodiments, violations of user-defined rules are specified within an inspection result output.

[0030] According to some embodiments, the data conversion in step (iii) is configured to be performed by an AI model, which is configured to analyze data written in natural language and translate it into a standard formal language.

[0031] According to some embodiments, the AI model is a text analysis and NLP model trained to extract and analyze relevant data.

[0032] According to some embodiments, the AI model is an image processing and computer vision model trained to extract and analyze relevant data.

[0033] According to some embodiments, the autonomous extraction of electrical documentation enables an autonomous update of the formal language used by the system whenever the electrical documentation is updated by its author.

[0034] According to some embodiments, the electrical design inspection method further enables a user to manually insert non - public documentation and / or supplementary electrical design data.

[0035] According to some embodiments, the inspection result output is configured to specify at least one manufacturer - directed design violation.

[0036] According to some embodiments, at least one directive can be determined from specific text data or graphic representations specified to indicate requirements for proper use of components in an electrical design.

[0037] According to some embodiments, the inspection result output is configured to specify design errors resulting from incorrect connections between components.

[0038] According to some embodiments, the inspection result output is configured to specify logic design errors by combining the characteristics of related components and applying electrical circuit theory laws.

[0039] According to some embodiments, the inspection result output is configured to specify over - current / over - voltage / over - power on any given pin / component within an electrical circuit.

[0040] According to some embodiments, the current / voltage / power values are calculated by automatically extracting and utilizing at least one equation for calculating the current / voltage / power output specified within at least one electrical documentation of at least one electrical component within the electrical circuit, and comparing it with the actual connections in the electrical design representation to determine the actual current / voltage / power output.

[0041] According to some embodiments, the inspection result output is configured to specify a timing constraint violation.

[0042] According to some embodiments, the inspection result output is configured to specify a list of warnings and / or best practice recommendations based on either global rules or selected user-defined rules.

[0043] According to some embodiments, the inspection result output is configured to specify a mismatch in the footprint for any component within the electrical circuit.

[0044] According to some embodiments, the inspection result output is a report that presents various defects as a text representation.

[0045] According to some embodiments, the inspection result output is an illustrative report that presents various defects as a visual representation.

[0046] According to some embodiments, the inspection result output further presents visual guidelines representing possible corrections for the various defects.

[0047] According to some embodiments, the inspection result output is configured to specify any violation of at least one instruction for connecting the pins of a component.

[0048] According to some embodiments, the inspection result output is configured to specify any violation of at least one instruction for connecting the thermal / exposed pads of a component.

[0049] According to some embodiments, the inspection result output is configured to specify any missing necessary pull-up / pull-down resistors, and the specification is derived from the net / line function as part of a known communication protocol or can be derived from an indication that appears within at least one electrical documentation of at least one of the electrical components connected to that net / line.

[0050] According to some embodiments, the electrical design inspection method is configured to specify any disruptions of lines according to a known communication protocol, and the communication protocol and the role of each individual pin are determined by the documentation of the associated components.

[0051] According to some embodiments, the electrical design inspection method is configured to specify any incorrect connections between the IO pins of components with incompatible logic levels, and the logic levels are determined by the documentation of the associated components.

[0052] According to some embodiments, the electrical design inspection method is configured to specify any parameter that exceeds its absolute maximum rating / recommended operating condition limit, and the condition limit is determined by the documentation of the associated components.

[0053] According to some embodiments, the electrical design inspection method is configured to specify a collision between I2C bus addresses, and the bus address of each component is determined by its electrical documentation.

[0054] According to some embodiments, the electrical design inspection method is configured to specify any incorrect input voltage to a voltage regulator that prevents it from supplying the correct output voltage.

[0055] According to some embodiments, the electrical design inspection method is configured to specify any use of components that form parts of an electrical circuit that does not comply with a known standard, and the specific standard to be inspected is selected by the user using user-defined rules within supplementary data.

[0056] According to some embodiments, the electrical design inspection method is configured to present statistical data and analysis regarding the characteristics of at least one component forming a portion of an electrical circuit represented in an electrical design.

[0057] According to some embodiments, the statistical data and analysis are related to thermal / geometric characteristics.

[0058] According to some embodiments, the electrical design inspection method is configured to specify incorrect placement of components on a ground plane that conflicts with the documentation of related components.

[0059] According to a second aspect, a system for electrical design inspection is provided: data extraction means for extracting data from at least one electrical documentation associated with at least one electrical component, such components being portions of an electrical circuit represented in at least one electrical design representation; a supplementary data source from which supplementary data regarding the electrical circuit and additional user-defined rules selected for inspection can be extracted; conversion means by which data extracted from at least one electrical documentation by the data extraction means can be converted into a formal language; a controller coupled to the data extraction and conversion means for autonomously operating a design verification process by using the converted and collected data while employing an AI model together with a deterministic algorithm to output inspection results.

[0060] Some embodiments of the present invention are described herein with reference to the accompanying drawings. The description, together with the drawings, makes clear to those skilled in the art how some embodiments can be implemented. The drawings are for illustrative purposes and are not intended to show the structural details of the embodiments in more detail than is necessary for a basic understanding of the present invention.

[0061] In the drawings:

Brief Description of the Drawings

[0062]

Fig. 1A

Fig. 1B

Fig. 2

Fig. 3

Fig. 4

Fig. 5

DETAILED DESCRIPTION OF THE INVENTION

[0063] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, as well as components, modules, units and / or circuits have not been described in detail so as not to obscure the present invention. Some features or elements described with respect to one embodiment may be combined with features or elements described with respect to other embodiments. For clarity, descriptions of the same or similar features or elements may not be repeated.

[0064] Embodiments of the present invention are not limited in this regard. For example, descriptions using terms such as "processing", "computing", "calculating", "judging", "establishing", "analyzing", "checking", "setting", "receiving", or the like refer to operations and / or instructions for executing operations and / or processes on data represented as physical (e.g., electronic) quantities in a computer's registers and / or memories, and can be stored in a computer's registers and / or memories or other information persistent storage media, and can be similarly represented as other data in the form of physical quantities. It may refer to the operation(s) and / or process(es) of a controller, computer, computing platform, computing system, or other electronic computing device that converts to other data.

[0065] Unless otherwise specified, the method embodiments described herein are not limited to a particular order or sequence. Additionally, some or part of the described method embodiments or their elements may occur or be executable simultaneously, at the same time, or together.

[0066] As used herein, the term "controller" refers to any type of computing platform that may include a memory device, a central processing unit (CPU) or microprocessor, and some input / output (I / O) ports, such as a general-purpose computer such as a personal computer, laptop, tablet, mobile phone, or cloud computing system.

[0067] As used herein, the term "electrical documentation" refers to any data related to electrical circuit representations, such as electrical data sheets, reference designs, application notes, etc., that are not written in a uniform data format such as a formal language.

[0068] As used herein, the term "electrical design data" refers to any kind of electrical circuit representation, including circuit diagrams, electrical diagrams, basic diagrams, netlists, etc., which are written in a uniform data format, electrical layouts such as Gerber files, and BOMs, etc., in any of numerical, text, or graphic form.

[0069] As used herein, the term "data sheet" refers to documentation by any document provided by the company manufacturing the electrical component, which includes information regarding its characteristics and requirements. This may include, but is not limited to, documents with the following general names: "data sheet", "reference design", "application note", "errata sheet", "user manual", "user guidelines", etc. Data sheets can be written in various formats such as PDF, TXT, DIC, etc.

[0070] As used herein, the term "netlist" refers to the final output generated from an electrical circuit diagram, which discloses the connections of the electrical circuit. A netlist can be exported from any circuit diagram design CAD software (e.g., OrCAD, Altium, etc.). A netlist may include multiple nets, each of which indicates electrical components, or more specifically, multiple ports or pins of components that are connected together. Each electrical component specified in the netlist can be identified by a reference, and the specific electrical component associated with the reference can be specified separately, typically by a bill of materials (BOM).

[0071] As used herein, the term "layout" refers to the overall geometry and topology of a circuit. For example, a layout file such as a Gerber file can disclose the geometric bearing of electrical components embedded in or placed on an electrical circuit, and the physical characteristics of the electrical circuit itself.

[0072] As used herein, the term "BOM" (bill of materials) refers to a comprehensive item list of raw materials, assemblies, sub-assemblies, parts and components, and the quantity of each required to manufacture a product.

[0073] As used herein, the term "net" refers to a group of pins that are interconnected (shortened) to each other.

[0074] As used herein, the term "line" refers to a group of nets that are interconnected to each other using series resistors.

[0075] As used herein, the term "logic level" refers to a voltage range that is considered "high" (also known as "1") and "low" (also known as "0") for the purpose of digital communication / control.

[0076] As used herein, the term "user-defined rule" refers to any kind of input from a user that is a desired rule selected to enforce or verify in an electrical design. A user-defined rule can be an optional and / or additional predefined rule that is enforced by a design verification unit (disclosed in the description of FIG. 1) in the design inspection phase. A user-defined rule can also be specified to be added in addition to the global rules and enforced by the design verification unit.

[0077] As used herein, the term "natural language" refers to any form of non-standardized data, whether spoken language, natural graphs / diagrams / circuit diagrams, etc., regardless of whether it is unstructured, semi-structured or fully structured.

[0078] As used herein, the term "formal language" refers to a specific unified language used to standardize information about electrical components.

[0079] The present invention uses the automatic extraction of data from electrical documentation such as data sheets to provide several benefits, such as: · Early detection of errors in electrical design, reduction in the number of required "respins", resulting in a shorter R&D cycle, shorter "time to market" and lower cost (from both the perspective of working hours and materials). · Low risk of errors moving towards the final product. · A "sound" and predictable design process, with a fairly low need for manual operations and inspections during the design process. · Best practice guidelines for improving design quality and / or enforcement of user-defined rules.

[0080] According to some embodiments, an electrical circuit design inspection system can be any controller operated by software configured to provide the designer with an automated inspection tool that enables detection of various defects, from relatively minor to important, from direct to complex and potential design violations, said inspection being configured to be applied following the electrical circuit diagram preparation / design stage of an electrical circuit, and thus providing an early inspection system capable of fully inspecting the electrical circuit diagram and layout of an electrical circuit without having to proceed far into the "bring-up" phase, long before a physical prototype is fabricated.

[0081] According to some embodiments, an electrical circuit design inspection system and method can enable a user to insert electrical design data such as, for example, a netlist, gerber file, BOM, etc., and optional user-defined rules. It can also enable the user to insert non-public electrical documentation such as a disclosed data sheet.

[0082] According to some embodiments, the electrical design data and / or non-public documentation can be inserted using a convenient user interface (UI) such as a drag-and-drop UI.

[0083] According to some embodiments, some of the electrical design data and / or non-public documentation can be extracted autonomously. For example, said data can be extracted by enabling the user to manually insert the path to a data location from one or more folders, servers, data centers, etc., and the rest of the inspection process can proceed autonomously.

[0084] According to some embodiments, a user may be required to manually sign in to an electrical circuit design inspection system. Next, the user may be required to select, from a list, a desired user-defined rule or the like, or to manually edit or adjust the required user-defined rule. Next, the user may use a drag-and-drop UI to input the required electrical design data and supplementary / confidential electrical documentation data into the electrical circuit design inspection system. Next, the user may instruct the electrical circuit design inspection system to analyze the inserted electrical design data and wait for the results. Next, the user may choose to display or download a report generated based on the results.

[0085] Referring now to FIG. 1, which schematically illustrates a flowchart of the operation of the electrical circuit design inspection system and method 10 of the present invention. As shown in the figure, in operation 100, an analysis algorithm, such as a dedicated AI-based text analysis and / or computer vision algorithm, may convert electrical documentation, such as a datasheet, into a formal language as shown in operation 102.

[0086] According to some embodiments, each relevant information item in the electrical documentation presenting component characteristics and requirements may be inferred using the following: · Black box machine learning (ML) algorithms, such as text analysis and NLP algorithms and models for text information items, and computer vision algorithms and models such as NN, CNN, RNN, or other AI models for graphic information items. According to some embodiments, the ML algorithm or AI model may learn and improve by training them on a large number of information items from different electrical documentations. · Deterministic algorithms based on electrical circuit theory and domain knowledge. · Custom algorithms that couple ML and deterministic algorithms by adjusting the ML algorithm or AI model to a specific area of the problem, namely, the electrical circuit theory language (including special terms, symbols, etc.), rules, special characteristics, laws, etc.

[0087] According to some embodiments, the data specified to be extracted and analyzed by the AI analysis algorithm may include some characteristics of the electrical components forming the electrical circuit. In addition to electrical circuit diagram and layout inspection, some of the characteristics to be analyzed may be mechanical, e.g., physical dimensions of the components, mechanical stress range, etc., and some of the characteristics to be analyzed may be thermal, e.g., thermal profile, thermal resistance, etc.

[0088] According to some embodiments, these various characteristics can be used for other types of inspections, such as mechanical inspections, thermal inspections, computer-aided engineering inspections, etc., provided that such supplementary data includes relevant information for that type of inspection, e.g., DXF files for mechanical inspections.

[0089] According to some embodiments, electrical documentation such as a data sheet discloses at least one electrical component that forms a portion of an electrical circuit represented by at least one electrical design representation (electrical circuit diagram).

[0090] According to some embodiments, the data sheet can be written in various forms such as natural language, graphs, diagrams, circuit diagrams, etc., and thus, the automatic inspection system may not be able to process and evaluate a typical data sheet, and therefore, may not be able to generate recommendations / corrections regarding its consistency. The AI analysis algorithm can be configured to convert any data used to write the data sheet being inspected into a formal and standard language to enable unified analysis and inspection.

[0091] According to some embodiments, the analysis algorithm may be configured to extract data from publicly available electrical documentation that is available online. In operations 104 and 108, the electrical circuit design inspection system 10 is configured to analyze an electrical circuit design file, a BOM, and optional user-defined rules.

[0092] According to some embodiments, the electrical circuit design file may include a netlist that can be exported from any circuit diagram design software such as CAD (PADS, OrCAD, Altium, etc.). According to some embodiments, the analysis algorithm may be configured to extract and analyze data from a bill of materials (BOM), which is a list of all components intended to be assembled on an electrical circuit and includes the exact identification of each component and its location within the electrical circuit. According to some embodiments, the analysis algorithm may be configured to extract and analyze data from any other document or data source related to the electrical documentation of the electrical circuit being evaluated or from optional user-defined rules.

[0093] According to some embodiments, the data specified to be extracted and analyzed by the AI analysis algorithm may include some characteristics of the electrical components forming the electrical circuit. Thus, the data may include characteristic data such as "a forward voltage drop of 1V", and characteristics regarding the appropriate method for using it, for example, "connect pin number 3 in parallel with GND having a 0.1uF capacitor", etc. According to some embodiments, the data disclosed above, originally written in a non-standardized language such as natural language, is specified to be translated and converted into its own uniform formal language (operation 102) to enable the standardization of the data.

[0094] According to some embodiments, a user may upload an electrical circuit design file and a BOM (operation 104) to a design verification unit (DVU) (operation 110) configured to perform a design verification process in order to detect and verify any aspect of an electrical circuit design using a user interface IU, such as a drag-and-drop interface, etc.

[0095] According to some embodiments, a user may also define additional rules (operation 108) configured to be enforced by the DVU during a design inspection phase. According to some embodiments, the user-defined additional rules are not included in a predefined global list of rules already enforced and inspected by the DVU.

[0096] According to some embodiments, the DVU is specifically configured to receive data from electrical design data files such as a netlist, BOM, etc., and from optional additional rules (shown on operations 104 and 108) set by the user, which includes electrical components and is configured to receive data regarding the components represented in electrical documentation such as a data sheet, which is translated and converted into a formal language (shown on 100 and 102) along with information regarding how the components are actually used within a circuit diagram (as seen in operation 104). The DVU may then execute an electrical inspection algorithm, such as an electrical inspection algorithm based on electrical circuit theory, etc., and may check for violations of global electrical / physical rules and, optionally, user-defined rules (shown on operation 108).

[0097] According to some embodiments, the DVU may then generate an inspection report (shown on operation 112), which may include a list of errors, warnings, best practice guideline violations, or any other instructions based on the process of design inspection performed by the DVU. According to some embodiments, the inspection report may include visual guidelines for correcting the detected defects or any other inspection items. According to some embodiments, together with user-defined rules, the inspection report generated by the DVU may further present optional best practice guidelines learned from various users over a long period of time.

[0098] According to some embodiments, the DVU (shown in step 110) may detect and verify any aspect of an electrical circuit design. For example, the DVU may identify incorrect, invalid, or out-of-range inputs to components, violations of direct instructions from electrical documentation such as data sheets, any discrepancies in communication lines, overcurrent, overvoltage, or overpower or connection instruction violations for any given pin / component, timing constraint violations, etc.

[0099] According to some embodiments, the current / voltage / power values are calculated by autonomously extracting and utilizing at least one equation for calculating the current / voltage / power output specified in the electrical documentation of the electrical components in the electrical circuit, and comparing it with the actual connections in the electrical design representation to determine the actual current / voltage / power output.

[0100] According to some embodiments, the report shown in step 112 can be provided by the DVU and can show or highlight any aspect of the electrical circuit design disclosed above. For example, the report generated by the DVU can present a visual representation of an electrical circuit (such as a PCB, a circuit including a silicon-based chip, or any other type of electrical circuit) and its components, and can add an indicator (such as a colored arrow) or a video demo pointing to the location where an error or violation or any other defect or recommendation was found (for example, an input port receiving an incorrect voltage, a path violating timing, etc.).

[0101] Refer to FIG. 1B, which schematically shows a flowchart illustrating a circuit diagram of an electrical circuit and a more detailed flow of a layout inspection system according to some embodiments of the present invention. As shown in the figure, in operation 502, the electrical circuit design inspection system and method 10 are configured to receive electrical design data and user-defined rules. In operation 504, the electrical documentation of each component in the electrical design data is extracted. In operation 506, each electrical documentation of each component is converted into a formal language. In operation 508, a component is selected. In operation 510, the pins that make up a part of the selected component are selected. According to some embodiments, since the electrical circuit design inspection system and method 10 can perform inspections at the component level rather than at the pin level, operation 510 may be optional. In operation 512, the relevant segment of the data converted into the formal language is checked for the requirements for that pin. Alternatively, according to some embodiments, the relevant segment of the data converted into the formal language can be checked for the requirements of the entire component. In operation 514, the pin characteristics and connections in the electrical design data are analyzed. Alternatively, according to some embodiments, the characteristics and connections of the components in the electrical design data can be analyzed. In operation 516, the electrical circuit design inspection system and method 10 can determine whether the requirements and user-defined rules are being adhered to. If not, in operation 518, the relevant violations can be written into the inspection report. If adhered to, in operation 520, the electrical circuit design inspection system and method 10 can determine whether any other pins within the component remain to be inspected. If not, operation 510 can be repeated. If there are remaining pins, the electrical circuit design inspection system and method 10 can select the next component to be inspected by repeating operation 508.

[0102] Refer to FIG. 2, which schematically illustrates a general flowchart of possible steps required for the inspection of the circuit diagram 20 of the electrical circuit, as further shown in FIGS. 3-5.

[0103] According to some embodiments, the connection of the small segments of the circuit diagram of the electrical circuit can be translated into text form in a netlist representation. According to some embodiments, the small segments of the circuit diagram of the electrical circuit represent the circuit diagram inspection function of the electrical design inspection system 10 and disclose simple components, one error, and two pieces of information.

[0104] Further, referring to FIG. 3, which schematically illustrates a small segment of a circuit diagram 30 of an electrical circuit that can be inspected by the electrical circuit design inspection system 10 of the present invention, using a component named TPS61165 by Texas Instruments (TI) as appears in typical CAD software.

[0105] Also refer to FIG. 4, which schematically illustrates a "Typical Application" schematic 40 that appears in the TPS61165 datasheet and shows some of its requirements, including the proper way to make connections.

[0106] Also refer to FIG. 5, which schematically illustrates a "Pin Function" table 50 of text that appears in the TPS61165 datasheet and indicates how each of its pins should be properly connected.

[0107] According to some embodiments, the above examples can be repeated and enhanced for other types of components, errors (or warnings / best practice guideline violations), and information regarding both the circuit diagram aspect and the layout aspect of the electrical circuit to be inspected.

[0108] According to some embodiments, in step 202, data is extracted from electrical documentation such as an electrical circuit diagram. For example, the data can be extracted from electrical circuit diagram 30 representing an electrical component named TPS61165. According to some embodiments, in step 204, the data extracted from the electrical circuit diagram in step 202 is converted from any type of language to the formal language detailed in this disclosure with respect to FIG. 1. According to some embodiments, in step 206, a computer vision algorithm is applied to analyze the "representative application" diagram for the TPS61165 component in order to provide a reliable reference to the correct circuit diagram of the component. According to some embodiments, in step 208, a structural data algorithm is applied to analyze the "pin function" table for the TPS61165 component in order to provide a reliable reference to the correct connection instructions for the component. According to some embodiments, in step 210, an inspection result output can be generated.

[0109] According to some embodiments, an electrical component named TPS61165 is shown within electrical circuit diagram 30, and one of the TPS61165 pins (a pin named COMP 302) is directly connected ("shorted") to ground. However, according to the TPS61165 data sheet 40, COMP 302 should be connected to ground via capacitor 402 shown in the representative application diagram shown in FIG. 4. As seen in FIG. 3, the capacitor is not connected to COMP 302 as required, representing a connection error.

[0110] According to some embodiments, the electrical circuit design inspection system 10 can detect such an error by any of the following: a. Analyze the "representative application" diagram 40 shown in FIG. 4 using a computer vision algorithm that can detect known electrical symbols such as capacitors, grounds, wires, etc., and then infer the required connections therefrom. b. Analyze the "Pin Function" table 50 shown in FIG. 5 using a structural data analysis algorithm that can detect related rows for COMP 302 pins and related columns for their characteristics, and then apply text analysis and NLP algorithms to infer the connection requirements for this pin.

[0111] According to some embodiments, the inspection process disclosed above can achieve several purposes. For example, the electrical circuit design inspection system 10 can enable immediate detection of design violations of manufacturer's instructions as they appear in the electrical documentation such as data sheets of the electrical components forming the electrical circuit.

[0112] According to some embodiments, the manufacturer's instructions are specific text data or graphic representations that appear in the documentation and indicate the requirements for the proper use of components in the electrical design.

[0113] According to some embodiments, the electrical circuit design inspection system 10 can provide immediate detection of design errors caused by incorrect / defective connections between components based on the requirements extracted from their electrical documentation such as data sheets.

[0114] According to some embodiments, the electrical circuit design inspection system 10 can provide immediate detection of logic design errors. For example, the electrical circuit design inspection system 10 combines the characteristics of all relevant components forming the electrical circuit as extracted from their electrical documentation such as data sheets, and uses this data to apply circuit theory laws.

[0115] According to some embodiments, the electrical circuit design inspection system 10 can provide means for immediate detection regarding violations of user-defined rules.

[0116] According to some embodiments, the electrical circuit design inspection system 10 may further provide for the immediate generation of warning lists and best practice guideline violations based on either known global rules or rules learned from the user over a long period of time.

[0117] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify electrical layout field errors / defects / best practice guideline violations associated with the PCB being inspected. For example, the electrical circuit design inspection system 10 may have the ability to detect and specify errors / defects / best practice guideline violations associated with the geometrically proposed placement of components and connections (routes) on the actual physical substrate, and the data may be extracted from the data sheet(s) representing the inspected electrical circuit.

[0118] According to some embodiments, the electrical circuit design inspection system 10 may provide the ability to detect and specify various violations regarding direct / indirect connection instructions of pins (if any) forming part of a component. For example, the electrical circuit design inspection system 10 may detect and specify the connections necessary to ground / power other pins (if any) of a component, and the detectable violations may be implemented, for example, either directly by another component operating as a resistor / capacitor / inductor / diode / transistor, etc., or through another component.

[0119] According to some embodiments, the connection instruction may indicate the typical / required connection and may be determined / extracted from either a specific text instruction disclosed within the data sheet of the associated component or any kind of graphic representation (diagram, illustration, graph, etc.).

[0120] According to some embodiments, the connection instruction may provide instructions for two or more pins and / or for two or more target connections and / or for the connections of two or more intermediate components forming the electrical circuit 10.

[0121] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify any violation of an instruction for connecting a component's heat / exposed pad, while the instruction may be determined from a specific text instruction indicating typical / required connections within the data sheet of the relevant component, or any kind of graphic representation (diagrams, illustrations, graphs, etc.).

[0122] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and point out any missing necessary pull-up / pull-down resistors on a net or on a line within an electrical circuit forming part of a PCB. According to some embodiments, the missing necessary pull-up / pull-down resistors may be derived from any of the following: a. The function as part of the communication protocol of that net or line according to the specifications described in the data sheet representing the components connected to the net or line. b. An instruction within one of the electrical documentations such as, for example, a data sheet, describing the components connected to that net / line.

[0123] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify any line confusion according to a known communication protocol (e.g., SCL pin connected to the SDA pin in the I2C protocol). For example, the electrical circuit design inspection system 10 may be configured to specify line confusion according to I2C, RS232, USB, SPI, I2S, RS485, Ethernet, etc. According to some embodiments, the electrical circuit design inspection system 10 may be configured to specify any line confusion according to any connection of pins having incompatible roles according to a certain communication protocol, and according to some embodiments, the communication protocol and the roles of the individual pins used to specify any line confusion are determined by the electrical documentation of the relevant components such as a data sheet.

[0124] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify any incorrect or defective connections between input / output (I / O) pins of components having incompatible logic levels (VOH, VIH, VOL, VIL) as determined by the data sheets of the associated components.

[0125] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify any parameters, such as supply / IO input voltages, incorrect connections between the IO pins of components, etc., that exceed their absolute maximum ratings / recommended operating condition limits according to the relevant text / mathematical / graphical data within the electrical documentation of the components, such as data sheets; for example, incorrect connections between IO pins with incompatible logic levels, free air / junction temperatures, sink / source currents, electrostatic discharges, etc. According to some embodiments, the absolute maximum ratings / recommended operating condition limits may be determined with respect to their dependence on certain analytical formulas, graphs, or any other representations within the electrical documentation of the components, such as data sheets, and further dependence on other parameters or conditions (e.g., ambient temperature, etc.) supplied by the user within supplementary materials regarding the components forming the electrical circuit.

[0126] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify any use of components within the electrical circuit of a PCB that is not compliant according to its data sheet, known standards (ROHS, military / automotive / industrial ratings, etc.). According to some embodiments, the standards may be defined by the user as needed within the supplementary data associated with the components.

[0127] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify collisions between I2C bus addresses. In other words, a circuit including an I2C bus in which two or more components have the same slave address can be specified and detected using the electrical circuit design inspection system 10. According to some embodiments, the address of each slave component forming the electrical circuit may be directly determined by characteristics within the component's data sheet. According to some embodiments, the address of each slave component forming the electrical circuit may be derived and calculated from a related formula within the component's data sheet, and the address derivation and calculation of each slave component forming the electrical circuit are based on the connection of its address-related pins.

[0128] According to some embodiments, the electrical circuit design inspection system 10 may be configured to detect and specify an incorrect or defective input voltage for a voltage regulator, which may be a [fixed / adjustable low dropout (LDO)], and the incorrect or defective input voltage may prevent the voltage regulator from supplying the correct output voltage as disclosed above. For example, for a fixed LDO where the supply voltage (Vin) is less than the sum of the expected output voltage (Vout) and the dropout voltage (Vdropout), it can be detected and specified by the electrical circuit design inspection system 10.

[0129] According to some embodiments, the electrical circuit design inspection system 10 may be configured to present statistical data and analysis regarding geometric characteristics (height, width, etc.) or thermal characteristics of components utilized within the circuit as part of the PCB. According to some embodiments, these characteristics may be determined from textual or graphical descriptions disclosed or shown within the data sheet of the related component related to the associated footprint (such as the package of the component like JEDEC package) used within the circuit.

[0130] According to some embodiments, the electrical circuit design inspection system 10 may be configured to specify incorrect or defective placement of components (such as antennas) on the ground plane of the PBC contrary to the instructions specified in the data sheet of the component.

[0131] The present invention has been described with reference to particular embodiments, but this description is not intended to be construed in a limiting sense. Various modifications of the disclosed embodiments, as well as alternative embodiments of the invention, will be apparent to those skilled in the art upon reference to the description of the invention. Accordingly, the appended claims are intended to embrace such modifications as fall within the scope of the invention.

Claims

**Claim 1** An artificial intelligence (AI)-based method for electrical design inspection, the method being automatically performed by a controller operated by computer software, the method comprising: (i) extracting data from at least one electrical documentation associated with at least one electrical component, wherein the at least one electrical component is part of an electrical circuit represented by at least one electrical design representation; (ii) extracting supplementary data regarding the electrical circuit and additional user-defined rules selected for the electrical design inspection; (iii) converting the data extracted in step (i) into a formal language; (iv) executing an electrical design verification process using the data received in step (ii) and the converted data generated in step (iii); (v) generating an inspection result output; wherein steps (i), (iii) to (v) are configured to be performed in an autonomous manner, the data conversion in step (iii) is configured to be performed in an autonomous manner by utilizing an AI model together with a deterministic algorithm, and the inspection result output is configured to specify various analysis results regarding the electrical circuit represented by the at least one electrical design representation. **Claim 2** The method according to claim 1, wherein the data analysis in step (iv) is further configured to be performed by an AI model. **Claim 3** The method according to claim 1, wherein the data analysis in step (iv) is further configured to be performed by a deterministic algorithm based on electrical circuit theory. **Claim 4** The method according to claim 1, wherein the electrical circuit is a printed circuit board (PCB). **Claim 5** The method according to claim 1, wherein the electrical circuit is a silicon-based chip. **Claim 6** The method according to claim 1, wherein the supplementary electrical design data includes a netlist file describing the circuit diagram characteristics of the electrical circuit. **Claim 7** The method according to claim 1, wherein the supplementary electrical design data includes a Gerber file describing the layout characteristics of the electrical circuit. **Claim 8** The method according to claim 1, wherein the supplementary electrical design data includes data regarding a bill of materials (BOM). **Claim 9**: The method according to claim 1, wherein the selected user-defined rule includes data regarding at least one user-defined rule configured to be provided and selected during the electrical design verification process. **Claim 10**: The method according to claim 9, wherein the user can select at least one user-defined rule to be enforced during the electrical design verification process or alternatively not select a user-defined rule. **Claim 11** **Claim 11**: The method according to claim 9, wherein the at least one user-defined rule is a supplement to a predefined global list of rules configured to be enforced during the electrical design verification process. **Claim 12**: The method according to claim 11, wherein the predefined global list of rules is configured to be edited or modified by the user in any way. **Claim 13** **Claim 13**: The method according to claim 1, wherein a violation of the user-defined rule is specified within the inspection result output. **Claim 14** **Claim 14**: The data conversion in step (iii) is configured to be performed by an AI model, and the AI model is configured to analyze data written in natural language and translate it into a standard formal language, according to the method of claim 1. **Claim 15** **Claim 15**: The method according to claim 14, wherein the AI model is a text analysis and NLP model trained to extract and analyze relevant data. **Claim 16** **Claim 16**: The method according to claim 14, wherein the AI model is an image processing and computer vision model trained to extract and analyze relevant data. **Claim 17** **Claim 17**: The autonomous extraction of electrical documentation enables the autonomous update of the formal language used by the controller whenever the electrical documentation is updated by its creator, according to the method of claim 1. **Claim 18** **Claim 18**: The method according to claim 1, which further enables the user to insert non-public documentation and / or supplementary electrical design data. **Claim 19** **Claim 19**: The inspection result output is configured to specify at least one manufacturer's instruction design violation, according to the method of claim 1. **Claim 20** The method of claim 19, wherein at least one instruction can be determined from specific text data or graphic representations specified to indicate requirements for proper use of components in an electrical design.

21. The method of claim 1, wherein the inspection result output is configured to specify a design error resulting from an incorrect connection between components.

22. The method of claim 1, wherein the inspection result output is configured to specify a logic design error by combining the characteristics of related components and applying the laws of electrical circuit theory.

23. The method of claim 1, wherein the inspection result output is configured to specify overcurrent / overvoltage / overpower on any given pin / component within the electrical circuit.

24. The value of the overcurrent / overvoltage / overpower is calculated by automatically extracting and utilizing at least one equation for calculating the current / voltage / power output specified within at least one electrical documentation of at least one electrical component within the electrical circuit, and comparing it with the actual connections in the electrical design representation to determine the actual current / voltage / power output. The method according to claim 23.

25. The method of claim 1, wherein the inspection result output is configured to specify a timing constraint violation.

26. The method of claim 1, wherein the inspection result output is configured to specify a list of warnings and / or recommended best practices based on either global rules or selected user-defined rules.

27. The method of claim 1, wherein the inspection result output is configured to specify a mismatch in the footprint for any component within the electrical circuit.

28. The method of claim 1, wherein the inspection result output is a report that shows various defects as a text representation.

29. The inspection result output is an illustrated report that shows various defects as a visual representation. The method according to claim 1.

30. The method of claim 1, wherein the inspection result output further shows visual guidelines representing possible corrections for various defects.

31. The method of claim 1, wherein the inspection result output is configured to specify any violation of at least one instruction for connecting pins of a component.

32. The inspection result output is configured to specify any violation of at least one instruction for connecting the thermal / exposed pads of the component, the method according to claim 1.

33. The inspection result output is configured to specify any missing necessary pull-up / pull-down resistors, the method according to claim 1.

34. The specification can be derived from the net / line function as part of a known communication protocol, the method according to claim 33.

35. The specification can be derived from an instruction that appears in at least one electrical documentation of at least one electrical component connected to the net / line, the method according to claim 33.

36. The method is configured to specify any disruption of the line according to a known communication protocol, and the communication protocol and the role of each pin are determined by the at least one electrical documentation, the method according to claim 1.

37. The method is configured to specify any incorrect connection between the IO pins of components with incompatible logic levels, and the logic levels are determined by the at least one electrical documentation, the method according to claim 1.

38. The method is configured to specify any parameter that exceeds its absolute maximum rating / recommended operating condition limit as determined by the at least one electrical documentation, the method according to claim 1.

39. The method is configured to specify a collision between I2C bus addresses, and the I2C bus address of each component is determined by its electrical documentation, the method according to claim 1.

40. The method is configured to specify any incorrect input voltage to a voltage regulator that prevents the supply of the correct output voltage, the method according to claim 1.

41. The method is configured to specify the use of components that form part of the electrical circuit that does not conform to a known standard, and the specific standard to be inspected is selected by the user using user-defined rules in the supplementary data, the method according to claim 1.

42. The method is configured to present statistical data and analysis regarding the characteristics of at least one component that forms part of the electrical circuit represented by the electrical design representation, the method according to claim 1.

43. The statistical data and analysis relate to thermal characteristics and are as claimed in claim 42.

44. The statistical data and analysis relate to geometric characteristics and are as claimed in claim 42.

45. The method as claimed in claim 1, configured to specify incorrect placement of components on a ground plane that conflicts with documentation of related components.

46. An artificial intelligence (AI)-based system for electrical design inspection, the system comprising: data extraction means for extracting data from at least one electrical documentation associated with at least one electrical component, wherein the at least one electrical component is part of an electrical circuit represented in at least one electrical design representation; a supplementary data source from which supplementary data regarding the electrical circuit and additional user-defined rules can be extracted; conversion means for converting data extracted from at least one electrical documentation by the data extraction means into a formal language; a controller coupled to the data extraction means and the conversion means, the controller autonomously operating an electrical design verification process by using the converted and collected data while employing an AI model together with a deterministic algorithm to output inspection results; A system comprising the above.

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