Method for manufacturing a display device

Abstract

Provided is a display device that can display a high quality image. The display device has a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element has a first lower electrode, a first EL layer on the first lower electrode, and an upper electrode on the first EL layer, and the second light-emitting element has a second lower electrode, a second EL layer on the second lower electrode, and an upper electrode on the second EL layer. The first light-emitting element and the second light-emitting element are adjacent, and the gap is provided between the first lower electrode and first EL layer, and the second lower electrode and second EL layer.

Description

Technical Field

[0001] One aspect of the present invention relates to a display device and a method for manufacturing the same. One aspect of the present invention relates to an electronic device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, as the technical field of one aspect of the present invention disclosed in this specification, semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, driving methods thereof, or manufacturing methods thereof can be cited as an example.

Background Art

[0003] In recent years, display devices are expected to be applied to various uses. For example, as uses of large display devices, home television sets (also referred to as TVs or television receivers), digital signage, and PIDs (Public Information Displays) can be cited. In addition, as portable information terminals, the development of smartphones and tablet terminals equipped with touch panels is underway.

[0004] In addition, higher definition of display devices is required. As devices that require high-definition display devices, for example, devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR) are actively being developed.

[0005] As a display device, for example, a light-emitting device having a light-emitting element (also referred to as a light-emitting device) has been developed. In particular, a light-emitting element (also referred to as an EL element or an EL device) utilizing the electroluminescence (hereinafter referred to as EL) phenomenon has characteristics such as being easily thinned and lightened, being capable of responding quickly to an input signal, and being drivable using a DC constant-voltage power supply, and is applied to display devices.

[0006] Patent Document 1 discloses a display device for VR using an organic EL device (also referred to as an organic EL element).

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the present invention is to provide a display device that displays high-quality images as one of the problems. Or, one aspect of the present invention is to provide a display device with high light extraction efficiency as one of the problems. Or, one aspect of the present invention is to provide a display device with a high aperture ratio as one of the problems. Or, one aspect of the present invention is to provide a high-definition display device as one of the problems. Or, one aspect of the present invention is to provide an inexpensive display device as one of the problems. Or, one aspect of the present invention is to provide a highly reliable display device as one of the problems. Or, one aspect of the present invention is to provide a novel display device as one of the problems.

[0009] Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device that displays high-quality images. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with high light extraction efficiency. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with a high aperture ratio. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a high-definition display device. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with a simplified process. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a highly reliable display device. Alternatively, one aspect of the present invention aims to provide a novel method for manufacturing a display device.

[0010] Note that the description of these problems does not preclude the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Note that other problems will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc.

Means for Solving the Problems

[0011] One aspect of the present invention has a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element has a first lower electrode, a first EL layer on the first lower electrode, and an upper electrode on the first EL layer. The second light-emitting element has a second lower electrode, a second EL layer on the second lower electrode, and an upper electrode on the second EL layer. The first light-emitting element and the second light-emitting element are adjacent to each other, and the gap is provided between the first lower electrode and the first EL layer and the second lower electrode and the second EL layer.

[0012] Alternatively, in the above aspect, the upper electrode may have a region overlapping with the gap.

[0013] Alternatively, in the above aspect, a first protective layer may be provided between the gap and the upper electrode.

[0014] Alternatively, in the above aspect, a second protective layer may be provided on the upper electrode.

[0015] Alternatively, in the above aspect, a first coloring layer is provided on the second protective layer so as to have a region overlapping with the first EL layer, and a second coloring layer is provided on the second protective layer so as to have a region overlapping with the second EL layer. The first EL layer and the second EL layer may have a function of emitting light of the same color, and the first coloring layer and the second coloring layer may have a function of transmitting light of the same color.

[0016] Alternatively, in the above aspect, a third protective layer is provided so as to have a region in contact with the side surfaces of the first lower electrode, the first EL layer, and the gap. The third protective layer may have a region where the refractive index is higher than the refractive index of the gap.

[0017] Alternatively, in the above aspect, the first light-emitting element and the second light-emitting element are provided on an insulating layer. The upper surface of the insulating layer has a region in contact with the lower surface of the gap. The thickness of the insulating layer in the region where the upper surface of the insulating layer is in contact with the lower surface of the gap may be thinner than the thickness of the insulating layer in the region overlapping with the first lower electrode and the thickness of the insulating layer in the region overlapping with the second lower electrode.

[0018] Alternatively, in the above aspect, the distance between the side surface of the first EL layer and the side surface of the second EL layer may have a region of 1 μm or less.

[0019] Alternatively, in the above aspect, the distance between the side surface of the first EL layer and the side surface of the second EL layer may have a region of 100 nm or less.

[0020] Alternatively, in the above aspect, the gap may contain any one or more selected from nitrogen, oxygen, carbon dioxide, and Group 18 elements.

[0021] Alternatively, in the above aspect, the Group 18 element may contain any one or more selected from helium, neon, argon, xenon, and krypton.

[0022] Alternatively, in the above aspect, having a first transistor and a second transistor, one of the source or drain of the first transistor is electrically connected to the first lower electrode, and one of the source or drain of the second transistor is electrically connected to the second lower electrode. The first transistor and the second transistor may each have silicon or a metal oxide in the channel formation region.

[0023] An electronic device having a display device and a lens according to an aspect of the present invention is also an aspect of the present invention.

[0024] Alternatively, one aspect of the present invention is to sequentially form a first layer serving as a first lower electrode, a second lower electrode, and a third lower electrode, and a second layer serving as a first EL layer, a second EL layer, and a third EL layer, form a first opening extending in a first direction in the second layer and the first layer, form a third layer serving as a first upper electrode and a second upper electrode on the second layer, and form a second opening extending in a second direction perpendicular to the first direction in the third layer, the second layer, and the first layer, thereby forming a first light-emitting element having a first lower electrode, a first EL layer, and a first upper electrode, a second light-emitting element having a second lower electrode, a second EL layer, and a second upper electrode, and a third light-emitting element having a third lower electrode, a third EL layer, and a first upper electrode. This is a method for manufacturing a display device.

[0025] Alternatively, in the above aspect, after forming the first to third light-emitting elements, a first colored layer having a region overlapping the first EL layer, a second colored layer having a region overlapping the second EL layer, and a third colored layer having a region overlapping the third EL layer are respectively formed. The first colored layer and the second colored layer may have a function of transmitting light of different colors, and the first colored layer and the third colored layer may have a function of transmitting light of the same color.

[0026] Alternatively, in the above aspect, after forming the first opening and before forming the third layer, a fourth layer is formed on the second layer and on the first opening, and the fourth layer on the second layer is removed to form a first protective layer in the first opening.

[0027] Or, in the above aspect, after the formation of the second opening, a second protective layer may be formed on the first upper electrode and on the second upper electrode so as to cover the second opening.

[0028] Or, in the above aspect, it may have a region where the length of the second opening in the first direction is 1 μm or less.

[0029] Or, in the above aspect, it may have a region where the length of the second opening in the first direction is 100 nm or less.

Advantages of the Invention

[0030] According to one aspect of the present invention, a display device capable of displaying a high-quality image can be provided. Or, according to one aspect of the present invention, a display device with high light extraction efficiency can be provided. Or, according to one aspect of the present invention, a display device with a high aperture ratio can be provided. Or, according to one aspect of the present invention, a high-definition display device can be provided. Or, according to one aspect of the present invention, a low-cost display device can be provided. Or, according to one aspect of the present invention, a highly reliable display device can be provided. Or, according to one aspect of the present invention, a novel display device can be provided.

[0031] Or, according to one aspect of the present invention, a method for manufacturing a display device capable of displaying a high-quality image can be provided. Or, according to one aspect of the present invention, a method for manufacturing a display device with high light extraction efficiency can be provided. Or, according to one aspect of the present invention, a method for manufacturing a display device with a high aperture ratio can be provided. Or, according to one aspect of the present invention, a method for manufacturing a high-definition display device can be provided. Or, according to one aspect of the present invention, a method for manufacturing a display device with a simplified process can be provided. Or, according to one aspect of the present invention, a method for manufacturing a highly reliable display device can be provided. Or, according to one aspect of the present invention, a method for manufacturing a novel display device can be provided.

[0032] Note that the description of these effects does not preclude the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0033] FIG. 1A is a perspective view showing a configuration example of a display device. FIGS. 1B and 1C are cross-sectional views showing a configuration example of the display device. FIG. 2A is a perspective view showing an example of a manufacturing method of a display device. FIGS. 2B and 2C are cross-sectional views showing an example of the manufacturing method of the display device. FIG. 3A is a perspective view showing an example of a manufacturing method of a display device. FIGS. 3B and 3C are cross-sectional views showing an example of the manufacturing method of the display device. FIGS. 4A1 to 4D2 are cross-sectional views showing an example of a manufacturing method of a display device. FIG. 5A is a perspective view showing an example of a manufacturing method of a display device. FIGS. 5B and 5C are cross-sectional views showing an example of the manufacturing method of the display device. FIG. 6A is a perspective view showing an example of a manufacturing method of a display device. FIGS. 6B and 6C are cross-sectional views showing an example of the manufacturing method of the display device. FIGS. 7A1 to 7B2 are cross-sectional views showing an example of a manufacturing method of a display device. FIGS. 8A1 to 8B2 are cross-sectional views showing an example of a manufacturing method of a display device. FIG. 9A is a perspective view showing a configuration example of a display device. FIGS. 9B and 9C are cross-sectional views showing a configuration example of the display device. FIG. 10A is a perspective view showing an example of a manufacturing method of a display device. FIGS. 10B and 10C are cross-sectional views showing an example of the manufacturing method of the display device. FIGS. 11A1 to 11D2 are cross-sectional views showing an example of a manufacturing method of a display device. FIG. 12A is a perspective view showing a configuration example of a display device. FIGS. 12B and 12C are cross-sectional views showing a configuration example of the display device. FIGS. 13A1 to 13B2 are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 14A and 14B are cross-sectional views showing an example of the configuration of a display device. FIGS. 15A and 15B are cross-sectional views showing an example of the configuration of a display device. FIG. 16 is a cross-sectional view showing an example of the configuration of a display device. FIGS. 17A to 17C are cross-sectional views showing an example of the configuration of a transistor. FIG. 18 is a cross-sectional view showing an example of the configuration of a display device. FIG. 19 is a cross-sectional view showing an example of the configuration of a display device. FIG. 20 is a cross-sectional view showing an example of the configuration of a display device. FIG. 21A is a block diagram showing an example of the configuration of a display device. FIG. 21B is a circuit diagram showing an example of the configuration of a pixel. FIG. 22A is a top view showing an example of the configuration of a transistor. FIGS. 22B and 22C are cross-sectional views showing an example of the configuration of a transistor. FIGS. 23A to 23D are cross-sectional views showing an example of the configuration of a light-emitting element. FIG. 24A is a diagram for explaining the classification of the crystal structure of IGZO. FIG. 24B is a diagram for explaining the XRD spectrum of a CAAC-IGZO film. FIG. 24C is a diagram for explaining the nanoelectron diffraction pattern of a CAAC-IGZO film. FIGS. 25A to 25D are diagrams showing an example of an electronic device. FIGS. 26A and 26B are diagrams showing an example of an electronic device.

BEST MODE FOR CARRYING OUT THE INVENTION

[0034] In this specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including semiconductor elements (such as transistors, diodes, or photodiodes) and devices having the same circuit. It also refers to all devices that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip provided with an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. In addition, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device, etc., are semiconductor devices themselves and may have a semiconductor device.

[0035] Also, in this specification and the like, when it is described that X and Y are connected, it is assumed that the cases where X and Y are electrically connected, where X and Y are functionally connected, and where X and Y are directly connected are those disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in a figure or text, and those other than the connection relationship shown in the figure or text are also assumed to be disclosed in the figure or text. X and Y are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, or layers, etc.).

[0036] As an example of the case where X and Y are electrically connected, one or more elements (for example, switches, transistors, capacitor elements, inductors, resistor elements, diodes, display elements, light-emitting elements, or loads, etc.) that enable electrical connection between X and Y can be connected between X and Y. Note that a switch has a function of controlling an on state and an off state. That is, a switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not.

[0037] As an example of the case where X and Y are functionally connected, one or more circuits (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion circuits (digital-analog conversion circuits, analog-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources, switching circuits, amplifier circuits (circuits that can increase the signal amplitude or current amount, etc., operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) that enable functional connection between X and Y can be connected between X and Y. Note that, as an example, even if another circuit is interposed between X and Y, when a signal output from X is transmitted to Y, it is assumed that X and Y are functionally connected.

[0038] In addition, when it is explicitly described that X and Y are electrically connected, it shall include the case where X and Y are electrically connected (that is, when they are connected with another element or another circuit interposed therebetween), and the case where X and Y are directly connected (that is, when they are connected without another element or another circuit interposed therebetween).

[0039] In addition, even when components that are independent on a circuit diagram are illustrated as being electrically connected, there may be a case where one component has functions of a plurality of components. For example, when a part of wiring also functions as an electrode, one conductive film has functions of components of both the wiring function and the electrode function. Therefore, the electrically connected in this specification and the like includes such a case where one conductive film has functions of a plurality of components within its scope.

[0040] In addition, in this specification and the like, "node" can be equivalently referred to as a terminal, wiring, electrode, conductive layer, conductor, or impurity region, etc., according to the circuit configuration, device structure, etc. Further, it is possible to equivalently refer to a terminal or wiring, etc. as a "node".

[0041] In addition, in this specification and the like, "voltage" and "electric potential" can be equivalently replaced as appropriate. "Voltage" is the potential difference from a reference potential. For example, when the reference potential is the ground potential (grounding potential), "voltage" can be equivalently replaced with "electric potential". Note that the ground potential does not necessarily mean 0V. Also, the electric potential is relative, and when the reference potential changes, the potential applied to the wiring, for example, the potential applied to the circuit, or the potential output from the circuit, etc. also changes.

[0042] In addition, in this specification and the like, ordinal numbers such as "first", "second", and "third" are attached to avoid confusion of components. Therefore, they do not limit the number of components, nor do they limit the order of components. For example, a component referred to as "first" in one embodiment of this specification and the like may be a component referred to as "second" in other embodiments or in the claims. Also, for example, a component referred to as "first" in one embodiment of this specification and the like may be omitted in other embodiments or in the claims.

[0043] In addition, in this specification and the like, terms indicating arrangements such as "above", "below", "upward", or "downward" may be used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in this specification and the like and can be appropriately rephrased according to the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the shown drawing by 180 degrees.

[0044] In addition, in this specification and the like, terms such as "electrode", "wiring", and "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of "wiring", and vice versa. Furthermore, the term "electrode" or "wiring" also includes cases where a plurality of "electrodes" or "wirings" are integrally formed. Also, for example, a "terminal" may be used as part of "wiring" or "electrode", and vice versa. Furthermore, the term "terminal" also includes cases where, for example, a plurality of "electrodes", "wirings", or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of "wiring" or "terminal", and for example, a "terminal" can be part of "wiring" or "electrode". Also, terms such as "electrode", "wiring", and "terminal" may be replaced with terms such as "region" in some cases.

[0045] In this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Further, "substantially parallel" or "approximately parallel" means a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Further, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Further, "substantially perpendicular" or "approximately perpendicular" means a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0046] In this specification and the like, a metal oxide is an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS), and the like. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide can constitute a channel formation region of a transistor having at least one of an amplification action, a rectification action, and a switching action, the metal oxide can be referred to as a metal oxide semiconductor. Further, when described as an "OS transistor", it can be paraphrased as a transistor having a metal oxide or an oxide semiconductor.

[0047] In this specification and the like, a metal oxide having nitrogen may also be generically referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

[0048] In this specification and the like, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form an aspect of the present invention. Further, when a plurality of configuration examples are shown in one embodiment, the configuration examples can be appropriately combined with each other.

[0049] The embodiments described in this specification will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiments can be implemented in many different ways, and the forms and details can be variously changed without departing from the spirit and scope thereof. Therefore, the present invention is not construed as being limited to the contents described in the embodiments. In the configuration of the invention of the embodiments, the same reference numerals are commonly used for the same parts or parts having the same functions among different drawings, and the repeated description thereof may be omitted. In addition, in order to make the drawings easier to understand, in perspective views or top views, etc., the description of some components may be omitted.

[0050] Also, in the drawings of this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to its size or aspect ratio, etc. The drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings. For example, it is possible to include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing deviations.

[0051] (Embodiment 1) In this embodiment, a display device according to one aspect of the present invention and a method for manufacturing the same will be described with reference to the drawings.

[0052] One aspect of the present invention relates to a display device in which pixels having light-emitting elements such as organic EL elements are arranged in a matrix. In the display device according to one aspect of the present invention, light-emitting elements provided in adjacent pixels are separated by a gap containing a gas such as air. Light emitted by the light-emitting element in an oblique direction can be totally reflected by the gap. Thereby, it is possible to suppress the light emitted by the light-emitting element from entering adjacent pixels.

[0053] <Configuration example of the display device_1> FIG. 1A is a cross-sectional view showing a configuration example of the display device 10. FIG. 1B is a cross-sectional view in the x direction showing a configuration example of the display device 10. FIG. 1C is a cross-sectional view in the y direction showing a configuration example of the display device 10. Note that the scale of the cross-sectional view in the x direction shown in FIG. 1B is different from the scale of the cross-sectional view in the y direction shown in FIG. 1C. In other figures as well, the scale of the cross-sectional view in the x direction and the scale of the cross-sectional view in the y direction may be different.

[0054] In this specification and the like, the height direction of the display device 10 is defined as the z direction, the directions perpendicular to the z direction are defined as the x direction and the y direction. Also, it is assumed that the x direction and the y direction are perpendicular to each other. Furthermore, it is assumed that the xy plane, the yz plane, and the zx plane are perpendicular to each other.

[0055] The display device 10 includes an insulating layer 61, a light-emitting element 20, a protective layer 31, and a protective layer 32 on the insulating layer 61, a protective layer 33 on the protective layer 31, a microlens array 35 on the protective layer 33, an adhesive layer 41 on the microlens array 35, a coloring layer 49R, a coloring layer 49G, a coloring layer 49B, and a light-shielding layer 43 on the adhesive layer 41, an insulating layer 45 on the coloring layer 49R, on the coloring layer 49G, on the coloring layer 49B, and on the light-shielding layer 43, and a substrate 47 on the insulating layer 45. The microlens array 35, the coloring layer 49R, the coloring layer 49G, the coloring layer 49B, and the light-shielding layer 43 are bonded together by the adhesive layer 41. Note that in FIG. 1A, for clarity of the drawing, elements other than the light-emitting element 20 are omitted.

[0056] In this specification and the like, for example, in the case of "B on A" or "B under A", it is not necessarily required that A and B have a contacting area.

[0057] Also, in this specification and the like, the term "element" may sometimes be replaced with "device". For example, the light-emitting element can be referred to as a light-emitting device.

[0058] Also, in this specification and the like, for example, when describing matters common to the coloring layer 49R, the coloring layer 49G, and the coloring layer 49B, or when there is no need to distinguish the three, it may sometimes be simply described as "coloring layer 49". The same applies to other elements.

[0059] The light-emitting element 20 includes a lower electrode 21 on the insulating layer 61, an EL layer 23 on the lower electrode 21, and an upper electrode 25 on the EL layer 23 and on the protective layer 32. The EL layer 23 includes at least a light-emitting layer. Also, the EL layer 23 can be configured to include, for example, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

[0060] The light-emitting element 20 can be a top-emission type light-emitting element. When the light-emitting element 20 is a top-emission type light-emitting element, the lower electrode 21 has a function of reflecting visible light, and the upper electrode 25 has a function of transmitting visible light. Also, the lower electrode 21 has a function as a pixel electrode of the display device 10.

[0061] The display device 10 includes a pixel 50R, a pixel 50G, and a pixel 50B. A coloring layer 49R is provided in the pixel 50R, a coloring layer 49G is provided in the pixel 50G, and a coloring layer 49B is provided in the pixel 50B. The coloring layer 49 is provided so as to have a region overlapping with the EL layer 23.

[0062] The EL layer 23 included in the pixel 50R, the EL layer 23 included in the pixel 50G, and the EL layer 23 included in the pixel 50B can emit light of the same color. For example, these EL layers 23 can all emit white light. In this case, the light-emitting element 20 can be, for example, a single structure or a tandem structure. Details of the single structure and the tandem structure will be described later.

[0063] The coloring layer 49 can change the hue of the transmitted light. For example, the hue of the light transmitted through the coloring layer 49R can be red, the hue of the light transmitted through the coloring layer 49G can be green, and the hue of the light transmitted through the coloring layer 49B can be blue. Note that the coloring layer 49 may have a hue such as cyan, magenta, or yellow for the transmitted light.

[0064] By providing, for example, a coloring layer 49R, a coloring layer 49G, and a coloring layer 49B in the display device 10, full-color display can be performed. Note that the display device 10 may have pixels 50 that do not have the coloring layer 49, for example.

[0065] In FIGS. 1A to 1C, pixels 50R, pixels 50G, and pixels 50B are arranged in order in the x direction, and pixels 50 that emit light of the same color are arranged in the y direction.

[0066] Examples of materials that can be used for the coloring layer 49 include metal materials, resin materials, and resin materials containing pigments or dyes.

[0067] A light-shielding layer 43 is provided at the boundary between adjacent pixels 50. Thereby, mixing of light of different colors can be suppressed, and the display device 10 can display high-quality images. Note that in the present embodiment, a configuration in which the light-shielding layer 43 is provided is illustrated, but the present invention is not limited thereto, and a configuration in which the light-shielding layer 43 is not provided may be employed. For example, a configuration in which the display device 10 does not have the light-shielding layer 43 can be achieved by overlapping a part of the coloring layer 49 provided for adjacent pixels 50.

[0068] In this specification and the like, for example, A provided for adjacent pixels may be simply referred to as adjacent A. For example, the light-emitting element 20 provided for adjacent pixels 50 may be referred to as adjacent light-emitting elements 20.

[0069] Note that the EL layer 23 included in the pixel 50R, the EL layer 23 included in the pixel 50G, and the EL layer 23 included in the pixel 50B may each have a function of emitting light of a different color. For example, the EL layer 23 included in the pixel 50R may have a function of emitting red light, the EL layer 23 included in the pixel 50G may have a function of emitting green light, and the EL layer 23 included in the pixel 50B may have a function of emitting blue light. In this case, the coloring layer 49 can be omitted.

[0070] The light-emitting element 20 has an SBS (Side By Side) structure in which the EL layer 23 included in pixel 50R, the EL layer 23 included in pixel 50G, and the EL layer 23 included in pixel 50B emit light of different colors. By adopting the SBS structure for the light-emitting element 20, the power consumption of the display device 10 can be reduced.

[0071] The upper electrode 25 can be made different electrodes between the light-emitting elements 20 arranged in the x direction. On the other hand, between the light-emitting elements 20 arranged in the y direction, the upper electrode 25 can be made a common electrode. That is, for example, in pixels 50 that emit light of the same color, the upper electrode 25 can be made common.

[0072] The protective layer 31 has regions in contact with the upper surface of the insulating layer 61, the side surfaces of the lower electrode 21, the side surfaces of the EL layer 23, the side surfaces of the upper electrode 25, and the upper surface of the upper electrode 25. Specifically, the protective layer 31 has regions in contact with the xy plane of the insulating layer 61, the yz plane of the lower electrode 21, the yz plane of the EL layer 23, the yz plane of the upper electrode 25, and the xy plane of the upper electrode 25. The protective layer 32 has regions in contact with the side surfaces of the lower electrode 21 and the side surfaces of the EL layer 23. Specifically, the protective layer 32 has regions in contact with the zx plane of the lower electrode 21 and the zx plane of the EL layer 23.

[0073] The protective layer 31 and the protective layer 32 can be insulating layers, and for example, a metal oxide film or a metal nitride film can be used. As the metal oxide film, for example, a layer containing aluminum oxide or hafnium oxide can be used. Also, as the metal nitride film, a layer containing aluminum nitride or hafnium nitride can be used.

[0074] The protective layer 31 and the protective layer 32 are made into layers in which impurities such as water and oxygen hardly diffuse. Or, the protective layer 31 and the protective layer 32 are made into layers capable of capturing (also called gettering) impurities such as water and oxygen. Thereby, it is possible to suppress impurities from entering the light-emitting element 20, specifically, for example, the EL layer 23. Therefore, the reliability of the display device 10 can be enhanced.

[0075] The protective layer 33 is formed on the protective layer 31. The protective layer 33 can be an insulating layer, and for example, oxides, nitrides, or oxynitrides can be used. As the oxide, a layer having silicon oxide, aluminum oxide, or hafnium oxide can be used. Also, as the nitride, a layer having silicon nitride or aluminum nitride can be used. Further, as the oxynitride, a layer having silicon oxynitride, silicon nitride oxide, aluminum oxynitride, or aluminum nitride oxide can be used.

[0076] In this specification, silicon oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and silicon nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition. Also, in this specification, aluminum oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and aluminum nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition.

[0077] Also, the protective layer 33 can be a semiconductor layer, and for example, a layer having a metal oxide (also referred to as IGZO) containing In, Ga, and Zn can be used. Further, the protective layer 33 can be a conductive layer, and for example, it can have a light-transmissive conductive material. Details will be described later, but as the light-transmissive conductive material, for example, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide added with gallium, or graphene can be used. Also, an oxide conductor can be used as the light-transmissive conductive material.

[0078] Furthermore, the protective layer 33 may have a laminated structure of two or more layers. For example, a laminated structure of an insulating layer and a semiconductor layer or a conductive layer may be used, and for example, a laminated structure of a layer having silicon nitride and a layer having a metal oxide may be used. Specifically, the protective layer 33 may have a two-layer laminated structure in which, for example, the lower layer is a layer having silicon nitride and the upper layer is a layer having a metal oxide.

[0079] The protective layer 33 is preferably a layer in which impurities such as water and oxygen hardly diffuse, or a layer capable of capturing (also referred to as gettering) impurities such as water and oxygen. Thereby, the intrusion of impurities into the EL layer 23 can be suppressed. Therefore, the reliability of the display device 10 can be enhanced.

[0080] Here, when looking at the cross section in the x direction shown in FIG. 1B, the adjacent lower electrode 21, EL layer 23, and upper electrode 25 are separated by the void 30. On the other hand, when looking at the cross section in the y direction shown in FIG. 1C, the adjacent lower electrode 21 and EL layer 23 are separated by the void 30. Further, when looking at the cross section in the y direction shown in FIG. 1C, a protective layer 36 is provided on the void 30, and an upper electrode 25 is provided on the EL layer 23 and on the protective layer 36. Note that the side surface of the protective layer 32 can be in contact with the side surface of the protective layer 36.

[0081] The protective layer 36 can have the same material as the protective layer 33. That is, the protective layer 36 can have, for example, an oxide, a nitride, or a oxynitride.

[0082] By providing the protective layer 36 in the display device 10, for example, the entry of the upper electrode 25 into the opening separating adjacent light-emitting elements 20 can be suppressed. Therefore, it can be said that the light-emitting element 20 is protected by the protective layer 36.

[0083] Here, the protective layer 33 and the protective layer 36 are preferably formed by a method with low covering property, for example, a method with lower covering property than the atomic layer deposition (ALD) method. For example, the protective layer 33 and the protective layer 36 are formed by a sputtering method or a chemical vapor deposition (CVD) method. Thereby, the opening separating adjacent light-emitting elements 20 is not covered by the protective layer 33 and the protective layer 36, and the void 30 is formed.

[0084] The shorter the distance between the EL layers 23, the easier it is to form the voids 30. For example, when the distance is 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm, the voids 30 can be preferably formed. In addition, when the distance between the EL layers 23 is sufficiently short, for example, when the upper electrode 25 does not enter the opening separating the adjacent light-emitting elements 20 even without providing the protective layer 36, the protective layer 36 may not be provided.

[0085] The voids 30 contain, for example, any one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements. Further, the voids 30 may contain, for example, a gas used when forming the protective layer 36 or the protective layer 33. For example, when forming the protective layer 36 or the protective layer 33 using a sputtering method, the voids 30 may contain a Group 18 element (typically, helium, neon, argon, xenon, krypton, etc.). In addition, when the voids 30 contain a gas, the gas can be identified, for example, by a gas chromatography method. Alternatively, when forming the protective layer 36 or the protective layer 33 by a sputtering method, the gas used during sputtering may also be contained in the film of the protective layer 36 or the protective layer 33. In this case, when the protective layer 36 or the protective layer 33 is analyzed by energy-dispersive X-ray analysis (EDX analysis) or the like, an element such as argon may be detected.

[0086] When the refractive index of the voids 30 is lower than, for example, the refractive index of the protective layer 31 and the refractive index of the protective layer 32, the light 51 emitted by the EL layer 23 and incident on the interface between the EL layer 23 and the voids 30 is totally reflected. Thereby, it is possible to suppress the light 51 from entering the adjacent pixel 50. Specifically, for example, it is possible to suppress the light 51 emitted by the EL layer 23 provided in the pixel 50G from entering the pixel 50R or the pixel 50B. Thereby, since it is possible to suppress the mixing of light of different colors, the display device 10 can display a high-quality image.

[0087] Here, the gap 30 can be configured to penetrate into the insulating layer 61. In such a configuration, the thickness of the insulating layer 61 in the region overlapping with the gap 30 becomes thinner than the thickness of the insulating layer 61 in the region overlapping with the EL layer 23. Also, the thickness of the insulating layer 61 in the region overlapping with the gap 30 can be made thinner than the thickness of the insulating layer 61 in the region overlapping with the lower electrode 21. When the gap 30 penetrates into the insulating layer 61, the protective layer 31 and the protective layer 32 can have a region in contact with the side surface of the insulating layer 61.

[0088] When the refractive index of the adhesive layer 41 is lower than the refractive index of the microlenses included in the microlens array 35, the microlenses can condense the light emitted from the EL layer 23. Thereby, while suppressing the color mixing of the light emitted from the EL layer 23, it is possible to suppress the light from being incident on the light shielding layer 43. Thus, while the display device 10 displays a high-quality image, the light extraction efficiency of the display device 10 can be increased. Therefore, particularly when the user of the display device 10 views the display surface from the front of the display surface of the display device 10, a bright image can be visually recognized.

[0089] Hereinafter, materials that can be used for the elements shown in FIGS. 1A to 1C, for example, will be described.

[0090] [Insulating layer] Each insulating layer is made of a material selected from aluminum nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, magnesium oxide, silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc., and is used in a single layer or laminated. Also, among oxide materials, nitride materials, oxynitride materials, and nitride oxide materials, a material in which a plurality of materials are mixed may be used.

[0091] In this specification and the like, a nitride oxide refers to a compound having a higher nitrogen content than oxygen. An oxynitride refers to a compound having a higher oxygen content than nitrogen. Note that the content of each element can be measured using, for example, the Rutherford Backscattering Spectrometry (RBS).

[0092] Further, for example, CMP treatment may be performed on the surface of the insulating layer. By performing CMP treatment, the unevenness on the sample surface can be reduced, and the covering properties of the insulating layer and the conductive layer formed thereafter can be enhanced.

[0093] [Conductive layer] As the conductive material that can be used for the conductive layers such as the gates, sources, and drains of transistors, various wirings, plugs, and electrodes constituting the display device, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium (Hf), vanadium (V), niobium (Nb), manganese, magnesium, zirconium, beryllium, etc., metal elements selected therefrom, alloys containing the above-described metal elements as components, or alloys combining the above-described metal elements can be used. Further, a semiconductor typified by polycrystalline silicon containing impurity elements such as phosphorus, or a silicide such as nickel silicide may be used. The method for forming the conductive material is not particularly limited, and various forming methods such as vapor deposition, CVD, sputtering, or spin coating can be used.

[0094] In addition, as the conductive material that can be used for the conductive layer, conductive materials containing oxygen such as indium tin oxide (ITO: Indium Tin Oxide), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can also be used. Further, conductive materials containing nitrogen such as titanium nitride, tantalum nitride, or tungsten nitride can also be used. Moreover, a laminated structure obtained by appropriately combining a conductive material containing oxygen, a conductive material containing nitrogen, and a material containing the aforementioned metal elements can also be adopted.

[0095] The conductive material that can be used for the conductive layer may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is laminated on an aluminum layer, a two-layer structure in which a titanium layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a tantalum nitride layer, and a three-layer structure in which a titanium layer, an aluminum layer is laminated on the titanium layer, and a titanium layer is further formed thereon, etc. are available. Further, as the conductive material, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

[0096] When the light-emitting element 20 is a top-emission type light-emitting element, the lower electrode 21 is preferably formed using a conductive material that efficiently reflects the light emitted by the EL layer 23. Note that the configuration of the lower electrode 21 is not limited to a single layer and may be a laminated structure of a plurality of layers. For example, when the lower electrode 21 is used as an anode, the layer in contact with the EL layer 23 may be a layer having translucency such as indium tin oxide, and a layer having a high reflectance (aluminum, an alloy containing aluminum, or silver, etc.) may be provided in contact with that layer. Further, the upper electrode 25 can be formed using a conductive material having translucency, whereby the light emitted by the EL layer 23 can be efficiently taken out to the outside of the display device 10.

[0097] As the conductive material that reflects visible light, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials can be used. Further, lanthanum, neodymium, germanium, or the like may be added to the above metal materials and / or alloys. Also, alloys containing aluminum (aluminum alloys) such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, or an alloy of aluminum and neodymium, alloys containing silver such as an alloy of silver and copper, an alloy of silver, palladium, and copper, or an alloy of silver and magnesium can be used to form. An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, a metal film or an alloy film and a metal oxide film may be laminated. For example, by laminating a metal film or a metal oxide film so as to be in contact with an aluminum alloy film, oxidation of the aluminum alloy film can be suppressed. Other examples of the metal film and the metal oxide film include titanium, titanium oxide, or the like. Also, as described above, a conductive film having translucency and a film made of a metal material may be laminated. For example, a laminated film of silver and indium tin oxide, or a laminated film of an alloy of silver and magnesium and indium tin oxide can be used.

[0098] In addition, as the conductive material having translucency, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide added with gallium, or graphene can be used. Alternatively, an oxide conductor can also be applied as the conductive material having translucency. Alternatively, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, and alloy materials containing the metal materials can be used. Alternatively, nitrides of the metal materials (for example, titanium nitride) may be used. In the case of using a metal material, an alloy material (or their nitrides), it may be made thin enough to have translucency. Further, a laminated film of the above materials can be used as the conductive layer. For example, using a laminated film of an alloy of silver and magnesium and indium tin oxide is preferable because the conductivity can be enhanced. These can also be used for the conductive layers such as various wirings and electrodes constituting the display device, and the conductive layers (conductive layers functioning as lower electrodes or upper electrodes) of the light-emitting elements.

[0099] Here, an oxide conductor which is a kind of metal oxide will be described. In this specification etc., the oxide conductor may be referred to as OC (Oxide Conductor). As the oxide conductor, for example, when an oxygen deficiency is formed in a metal oxide (typically IGZO) which is an oxide containing at least indium or zinc, and hydrogen is added to the oxygen deficiency, a donor level is formed near the conduction band. As a result, the metal oxide becomes highly conductive and becomes a conductor. The metal oxide that has become a conductor can be referred to as an oxide conductor. Generally, since a metal oxide (oxide semiconductor) having a function as a semiconductor has a large energy gap, it has translucency to visible light. On the other hand, an oxide conductor is a metal oxide having a donor level near the conduction band. Therefore, the influence of absorption by the donor level on the oxide conductor is small, and it has translucency to visible light similar to that of the oxide semiconductor.

[0100] [EL layer] As described above, the EL layer 23 has at least a light-emitting layer. Further, as a layer other than the light-emitting layer, the EL layer 23 may have a layer containing a substance with high hole injection property, a substance with high hole transport property, a hole blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property), etc.

[0101] Either a low molecular compound or a high molecular compound can be used for the EL layer 23, and it may contain an inorganic compound. The layers constituting the EL layer 23 can be formed using methods such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, or a coating method, respectively.

[0102] The EL layer 23 may have an inorganic compound such as quantum dots. For example, by using quantum dots for the light-emitting layer, it can also function as a light-emitting material.

[0103] When the EL layer 23 has an electron transport layer, the electron transport layer has a compound (electron transporting material) that easily receives electrons. Examples of the electron transporting material include oxadiazole derivatives, triazole derivatives, benzimidazole derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, or phenanthroline derivatives.Specifically, 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (abbreviation: PBD), 1,3-bis[5-(p-tert-butylphenyl)-1,3,4-oxadiazol-2-yl]benzene (abbreviation: OXD-7), 9-[4-(5-phenyl-1,3,4-oxadiazol-2-yl)phenyl]-9H-carbazole (abbreviation: CO11), 3-(4-biphenylyl)-4-phenyl-5-(4-tert-butylphenyl)-1,2,4-triazole (abbreviation: TAZ), 2,2’,2’’-(1,3,5-benzenetriyl)tris(1-phenyl-1H-benzimidazole) (abbreviation: TPBI), 2-[3-(dibenzothiophen-4-yl)phenyl]-1-phenyl-1H-benzimidazole (abbreviation: mDBTBIm-II), 4,4’-bis(5-methylbenzoxazol-2-yl)stilbene (abbreviation: BzOs), bathophenanthroline (abbreviation: Bphen), bathocuproine (abbreviation: BCP), 2,9-bis(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviation: NBphen), 2-[3-(dibenzothiophen-4-yl)phenyl]dibenz[f,h]quinoxaline (abbreviation: 2mDBTPDBq-II), 2-[3’-(dibenzothiophen-4-yl)biphenyl-3-yl]dibenz[f,h]quinoxaline (abbreviation: 2mDBTBPDBq-II), 2-[3’-(9H-carbazol-9-yl)biphenyl-3-yl]dibenz[f,h]quinoxaline (abbreviation: 2mCzBPDBq), 2-[4-(3,6-diphenyl-9H-carbazol-9-yl)phenyl]dibenz[f,h]quinoxaline (abbreviation: 2CzPDBq-III), 7-[3-(dibenzothiophen-4-yl)phenyl]dibenz[f,h]quinoxaline (abbreviation: 7mDBTPDBq-II), and 6-[3-(dibenzothiophen-4-yl)phenyl]dibenz[f,h]quinoxaline (abbreviation: 6mDBTPDBq-II), etc. can be mentioned.

[0104] When the EL layer 23 has an electron injection layer, the electron injection layer has a material with high electron injection properties (electron injection material). As the electron injection material, alkali metals, alkaline earth metals, or compounds thereof such as lithium, cesium, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF2), lithium 8-(quinolinolato) (abbreviation: Liq), lithium 2-(2-pyridyl)phenolate (abbreviation: LiPP), lithium 2-(2-pyridyl)-3-pyridinolate (abbreviation: LiPPy), lithium 4-phenyl-2-(2-pyridyl)phenolate (abbreviation: LiPPP), lithium oxide (LiOx), cesium carbonate, etc. can be used.

[0105] [Adhesive layer] As the adhesive layer 41, various curable adhesives such as photocurable adhesives such as ultraviolet curable type, reaction curable adhesives, thermosetting adhesives, or anaerobic adhesives can be used. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, or EVA (ethylene vinyl acetate) resins. In particular, materials with low moisture permeability such as epoxy resins are preferred. Also, a two-component mixed resin may be used. Further, for example, an adhesive sheet may be used.

[0106] [Light-shielding layer] Materials that can be used as the light-shielding layer include carbon black, titanium black, metals, metal oxides, or composite oxides containing a solid solution of a plurality of metal oxides. The light-shielding layer may be a film containing a resin material, or a thin film of an inorganic material such as a metal. Also, a laminated film of a film containing the material of the coloring layer can be used for the light-shielding layer. For example, a laminated structure of a film containing the material used for a coloring layer that transmits light of a certain color and a film containing the material used for a coloring layer that transmits light of another color can be used. It is preferable to share the materials of the coloring layer and the light-shielding layer because the device can be shared and the process can be simplified.

[0107] <An example of a method for manufacturing a display device_1> Hereinafter, an example of a method for manufacturing the display device 10 shown in FIG. 1 will be described with reference to the drawings.

[0108] Note that the insulating layer, semiconductor layer, and conductive layer for forming electrodes and wirings that constitute the display device can be formed using a sputtering method, CVD method, vacuum evaporation method, pulsed laser deposition (PLD) method, ALD method, plasma enhanced ALD (PEALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used.

[0109] In addition, the insulating layer, semiconductor layer, and conductive layer for forming electrodes and wirings that constitute the display device may be formed by methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, and knife coating.

[0110] In the PECVD method, a high-quality film can be obtained at a relatively low temperature. When a film formation method that does not use plasma during film formation, such as the MOCVD method, ALD method, or thermal CVD method, is used, damage to the surface to be formed is less likely to occur. For example, wirings, electrodes, and elements (such as transistors and capacitor elements) included in a semiconductor device may be charged up by receiving charges from plasma. At this time, the wirings, electrodes, or elements included in the semiconductor device may be damaged by the accumulated charges. On the other hand, in the case of a film formation method that does not use plasma, such plasma damage does not occur, so the yield of the semiconductor device can be increased. In addition, since plasma damage does not occur during film formation, a film with fewer defects can be obtained.

[0111] When forming an oxide semiconductor by a sputtering method, the chamber in the sputtering apparatus uses an adsorption type vacuum exhaust pump such as a cryopump to remove water, which is an impurity for the oxide semiconductor, as much as possible, to a high vacuum (5×10-7 from Pa to about 1×10 -4 Pa is preferably evacuated. In particular, during the standby of the sputtering apparatus, the partial pressure of gas molecules corresponding to H2O in the chamber (gas molecules corresponding to m / z = 18) is 1×10 -4 Pa or less, preferably 5×10 -5 Pa or less is more preferable. The film formation temperature is preferably from room temperature to 500°C, more preferably from room temperature to 300°C, and even more preferably from room temperature to 200°C.

[0112] Also, it is necessary to increase the purity of the sputtering gas. For example, by using oxygen gas and argon gas used as sputtering gas with a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, and even more preferably -120°C or lower, it is possible to prevent moisture and the like from being incorporated into the oxide semiconductor film as much as possible.

[0113] Also, when forming an insulating layer, a conductive layer, or a semiconductor layer by sputtering, oxygen can be supplied to the layer to be formed by using a sputtering gas containing oxygen. The more oxygen contained in the sputtering gas, the more likely it is that more oxygen will be supplied to the layer to be formed.

[0114] When processing the layers (thin films) constituting the display device, for example, it can be processed using photolithography. Alternatively, an island-shaped layer may be formed by a film formation method using a shielding mask. Alternatively, the layer may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. As the photolithography method, there are a method of forming a resist mask on the layer (thin film) to be processed, using the resist mask as a mask to selectively remove a part of the layer (thin film), and then removing the resist mask, and a method of forming a photosensitive layer and then performing exposure and development to process the layer into a desired shape.

[0115] When using light in the photolithography method, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can also be used. Further, exposure may be performed by immersion lithography technology. Also, extreme ultraviolet light (EUV) or X-rays may be used as the light for exposure. Instead of the light used for exposure, an electron beam can also be used. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because extremely fine processing becomes possible. Note that when performing exposure by scanning a beam such as an electron beam, a photomask is not required.

[0116] For the removal (etching) of a layer (thin film), a dry etching method, a wet etching method, etc. can be used. Also, these etching methods may be used in combination.

[0117] To fabricate the display device 10 shown in FIGS. 1A to 1C, first, a layer 21A that will become the lower electrode 21 and a layer 23A that will become the EL layer 23 are sequentially formed on the insulating layer 61 (FIGS. 2A to 2C). The layer 21A and the layer 23A can be formed by, for example, a vapor deposition method or a sputtering method. Note that this is not limiting, and the above-described film formation methods can be appropriately used.

[0118] In this specification etc., the terms "layer" and "film" can be used by appropriately substituting each other. For example, the "layer" of the layer 21A and the layer 23A can be referred to as a "film".

[0119] Next, the layer 21A and the layer 23A are processed using, for example, an etching method. Specifically, for example, after forming a resist mask on the layer 23A, the layer 23A and the layer 21A are processed using, for example, an etching method to form an opening 150A extending in the x-direction. By processing the layer 23A, a strip-shaped layer 23B extending in the x-direction is formed, and by processing the layer 21A, a strip-shaped layer 21B extending in the x-direction is formed (FIGS. 3A to 3C).

[0120] The shorter the width of the opening 150A (the length of the opening 150A in the y-direction), the easier it is to form the gap 30 in a later process. For example, the width of the opening 150A can be 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm.

[0121] Note that, as shown in FIG. 3C, when performing the above etching, the insulating layer 61 may also be etched. As a result, the thickness of the insulating layer 61 in the region overlapping the opening 150A may be thinner than the thickness of the insulating layer 61 in the region overlapping the layer 21B.

[0122] Thereafter, a layer 32A that becomes the protective layer 32 is formed (FIGS. 4A1 and 4A2). The layer 32A is preferably formed using a film-forming method with high coating properties, such as the ALD method. Thereby, the layer 32A is formed so as to cover the opening 150A. That is, the layer 32A is formed to have a region in contact with the side surfaces of the layer 23B, the side surfaces of the layer 21B, and the upper surface of the insulating layer 61 at the opening 150A.

[0123] Next, the layer 32A is processed. Specifically, the layer 32A on the layer 23B is removed. For example, the layer 32A is etched using the layer 23B as an etching stopper. Thereby, the protective layer 32 is formed in the opening 150A (FIGS. 4B1 and 4B2).

[0124] Thereafter, a layer 36A that will become the protective layer 36 is formed. The layer 36A is preferably formed by a method with low coating property. For example, it is preferably formed by a method with lower coating property than the method for forming the layer 32A. For example, the layer 36A is formed by a sputtering method or a CVD method. As a result, the opening 150A is not covered by the layer 36A, and voids 30 are formed (FIGS. 4C1 and 4C2).

[0125] Next, the layer 36A is processed. Specifically, the layer 36A on the layer 23B is removed. For example, the layer 36A is etched using the layer 23B as an etching stopper. As a result, the protective layer 36 is formed (FIGS. 4D1 and 4D2).

[0126] Thereafter, a layer 25A that will become the upper electrode 25 is formed (FIGS. 5A to 5C). The layer 25A can be formed, for example, by an evaporation method, a sputtering method, or the like. Note that the present invention is not limited thereto, and the above-described film formation methods can be appropriately used.

[0127] Next, the layer 25A, the layer 23B, and the layer 21B are processed using, for example, an etching method. Specifically, for example, after forming a resist mask on the layer 25A, the layer 25A, the layer 23B, and the layer 21B are processed using, for example, an etching method to form an opening 150B extending in the y direction. By processing the layer 25A, a strip-shaped upper electrode 25 extending in the y direction is formed. Also, by processing the layer 23B, an island-shaped EL layer 23 is formed, and by processing the layer 21B, an island-shaped lower electrode 21 is formed. Thus, the light-emitting element 20 is formed (FIGS. 6A to 6C).

[0128] The shorter the width of the opening 150B (the length of the opening 150B in the x direction) is, the easier it is to form voids 30 in a later process. For example, the width of the opening 150B can be 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm.

[0129] Note that, as shown in FIG. 6B, when performing the above etching, the insulating layer 61 may also be etched. As a result, the thickness of the insulating layer 61 in the region overlapping the opening 150B may be thinner than the thickness of the insulating layer 61 in the region overlapping the lower electrode 21.

[0130] As described above, in one aspect of the present invention, when forming a separate EL layer, a metal mask, specifically a fine metal mask, is not used. Therefore, one aspect of the present invention can be a method for manufacturing a display device with high productivity.

[0131] When forming the light-emitting element 20 using a fine metal mask, it is difficult to make the distance between the light-emitting elements 20 20 μm or less due to restrictions on dimensional accuracy. On the other hand, in the method for manufacturing a display device according to one aspect of the present invention, since the light-emitting element 20 is formed without using a fine metal mask, the distance between adjacent light-emitting elements 20 can be made 20 μm or less. Specifically, for example, the distance between adjacent EL layers 23 can be made 20 μm or less. For example, the distance between adjacent light-emitting elements 20 can be made 0.5 μm or more and 15 μm or less, preferably 0.5 μm or more and 10 μm or less, more preferably 0.5 μm or more and 5 μm or less. Therefore, improvement of the pixel aperture ratio, high definition, and miniaturization can be achieved.

[0132] In this specification and the like, a device using a metal mask or an FMM (fine metal mask, high-definition metal mask) may be referred to as an MM (metal mask) structure. Also, in this specification and the like, a device not using a metal mask or an FMM may be referred to as an MML (metal maskless) structure.

[0133] In addition, when the distance between the light-emitting elements 20 is 100 nm or less, typically 90 nm or less, it is necessary to use an optimal exposure apparatus. As such an exposure apparatus, for example, a stepper, a scanner, etc. can be used. Further, examples of the wavelength of the light source that can be used in the exposure apparatus include 13 nm (EUV), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (i-line), and 436 nm (g-line). By making the wavelength of the light source short, a display device with high fineness or miniaturization can be obtained.

[0134] Thereafter, a protective layer 31 is formed (FIGS. 7A1 and 7A2). The protective layer 31 is preferably formed using a film-forming method with high coating properties such as the ALD method. Thereby, the protective layer 31 is formed so as to cover the opening 150B. That is, the protective layer 31 is formed to have a region in contact with the side surfaces of the upper electrode 25, the side surfaces of the EL layer 23, the side surfaces of the lower electrode 21, and the upper surface of the insulating layer 61 at the opening 150B.

[0135] Next, a protective layer 33 is formed. The protective layer 33 is preferably formed by a method with low coating properties, for example, a method with lower coating properties than the film-forming method of the protective layer 31. For example, the protective layer 33 is formed by a sputtering method or a CVD method. Thereby, the opening 150B is not covered by the protective layer 33, and a gap 30 is formed (FIGS. 7B1 and 7B2).

[0136] Thereafter, a microlens array 35 is formed on the protective layer 33 (FIGS. 8A1 and 8A2). The microlens array 35 can be formed, for example, by forming a resist pattern by photolithography and then performing a heat treatment to reflow the resist.

[0137] Next, a substrate 47 is prepared, an insulating layer 45 is formed on the substrate 47, and after a light-shielding layer 43 is formed on the insulating layer 45, a coloring layer 49R, a coloring layer 49G, and a coloring layer 49B are formed on the insulating layer 45 and on the light-shielding layer 43 (FIGS. 8B1 and 8B2). Then, an adhesive layer 41 is formed on the coloring layer 49R, the coloring layer 49G, the coloring layer 49B, and the light-shielding layer 43, and the microlens array 35, the coloring layer 49, and the light-shielding layer 43 are bonded together by the adhesive layer 41. The adhesive layer 41 can be formed by a screen printing method, a dispensing method, or the like. Thus, the display device 10 shown in FIGS. 1A to 1C can be manufactured.

[0138] <Example of the configuration of the display device_2> FIG. 9A is a perspective view showing a configuration example of the display device 10. FIG. 9B is a cross-sectional view in the x direction showing a configuration example of the display device 10. FIG. 9C is a cross-sectional view in the y direction showing a configuration example of the display device 10. The display device 10 shown in FIGS. 9A to 9C is a modified example of the display device 10 shown in FIGS. 1A to 1C. The display device 10 shown in FIGS. 9A to 9C is different from the display device 10 shown in FIGS. 1A to 1C in that a common upper electrode 25 is used not only between the light-emitting elements 20 arranged in the y direction but also between the light-emitting elements 20 arranged in the x direction. That is, in the display device 10 shown in FIGS. 9A to 9C, it can be said that the upper electrode 25 is a common electrode.

[0139] The display device 10 shown in FIGS. 9A to 9C does not have the protective layer 31 and the protective layer 33, but has a protective layer 34. The protective layer 34 is provided on the upper electrode 25. Also, a microlens array 35 is provided on the protective layer 34. The protective layer 34 can have the same material as the protective layer 33 and can be formed using the same film-forming method as the protective layer 33.

[0140] In the display device 10 shown in FIGS. 9A to 9C, when looking at the cross-section in the x direction, similar to when looking at the cross-section in the y direction, a protective layer 36 is provided on the gap 30, and the upper electrode 25 is provided on the EL layer 23, the protective layer 32, and the protective layer 36.

[0141] <An example of the manufacturing method of the display device_2> Hereinafter, an example of the manufacturing method of the display device 10 shown in FIGS. 9A to 9C will be described with reference to the drawings. Note that descriptions of the same processes as those shown in FIGS. 2 to 8 will be omitted as appropriate.

[0142] In order to manufacture the display device 10 shown in FIGS. 9A to 9C, first, a layer that becomes the lower electrode 21 and a layer that becomes the EL layer 23 are sequentially formed on the insulating layer 61. Next, these layers are processed using, for example, an etching method to form openings 150 that extend in the x direction and the y direction. Thus, island-shaped EL layers 23 and island-shaped lower electrodes 21 are formed (FIGS. 10A to 10C).

[0143] The shorter the width of the opening 150, the easier it is to form the gap 30 in a later process. For example, the width of the opening 150 can be 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm.

[0144] Note that as shown in FIGS. 10B and 10C, when the above etching is performed, the insulating layer 61 may also be etched. As a result, the thickness of the insulating layer 61 in the region overlapping with the opening 150 may be thinner than the thickness of the insulating layer 61 in the region overlapping with the lower electrode 21.

[0145] Thereafter, a layer 32A that becomes the protective layer 32 is formed (FIGS. 11A1 and 11A2). The layer 32A is preferably formed using a film formation method with high coverage such as the ALD method. Thereby, the layer 32A is formed so as to cover the opening 150. That is, the layer 32A is formed to have a region in contact with the side surface of the EL layer 23, the side surface of the lower electrode 21, and the upper surface of the insulating layer 61 in the opening 150.

[0146] Next, the layer 32A is processed. Specifically, the layer 32A on the EL layer 23 is removed. For example, the layer 32A is etched using the EL layer 23 as an etching stopper. Thereby, the protective layer 32 is formed in the opening 150 (FIGS. 11B1 and 11B2).

[0147] Thereafter, a layer 36A that will become the protective layer 36 is formed. The layer 36A is preferably formed by a method with low covering property. For example, it is preferably formed by a method with lower covering property than the method for forming the layer 32A. For example, the layer 36A is formed by a sputtering method or a CVD method. Thereby, the opening 150 is not covered by the layer 36A, and voids 30 are formed (FIGS. 11C1 and 11C2).

[0148] Next, the layer 36A is processed. Specifically, the layer 36A on the EL layer 23 is removed. For example, the layer 36A is etched using the EL layer 23 as an etching stopper. Thereby, the protective layer 36 is formed (FIGS. 11D1 and 11D2).

[0149] Thereafter, the upper electrode 25 is formed (FIGS. 12A to 12C). Next, the protective layer 34 is formed (FIGS. 13A1 and 13A2). The protective layer 34 can be formed by, for example, a CVD method, a sputtering method, or an ALD method. Thereafter, a microlens array 35 is formed on the protective layer 34 (FIGS. 13B1 and 13B2).

[0150] Next, a substrate 47 is prepared, an insulating layer 45 is formed on the substrate 47, a light-shielding layer 43 is formed on the insulating layer 45, and then a colored layer 49R, a colored layer 49G, and a colored layer 49B are formed on the insulating layer 45 and the light-shielding layer 43. Thereafter, an adhesive layer 41 is formed on the colored layer 49R, the colored layer 49G, the colored layer 49B, and the light-shielding layer 43, and the microlens array 35 and the colored layer 49 and the light-shielding layer 43 are bonded together by the adhesive layer 41. Thus, the display device 10 shown in FIGS. 9A to 9C can be manufactured.

[0151] <Configuration Example of Display Device_3> FIG. 14A and FIG. 14B are cross-sectional views showing a configuration example of the display device 10, and are modified examples of the display device 10 shown in FIGS. 1B and 1C. The display device 10 shown in FIGS. 14A and 14B is different from the display device 10 shown in FIGS. 1B and 1C in that it does not have a microlens array 35. Note that a configuration example of the display device 10 shown in FIGS. 14A and 14B as viewed obliquely can be referred to the perspective view of FIG. 1A.

[0152] Since the display device 10 does not have the microlens array 35, the manufacturing process of the display device 10 can be simplified. Therefore, the manufacturing cost of the display device 10 can be reduced and the yield can be increased. From the above, the display device 10 can be made less expensive.

[0153] FIG. 15A and FIG. 15B are cross-sectional views showing a configuration example of the display device 10, and are modified examples of the display device 10 shown in FIGS. 1B and 1C. The display device 10 shown in FIGS. 15A and 15B is different from the display device 10 shown in FIGS. 1B and 1C in that a partition wall 37 is provided on the insulating layer 61. The partition wall 37 can be, for example, an insulating layer. Note that a configuration example of the display device 10 shown in FIGS. 15A and 15B as viewed obliquely can be referred to the perspective view of FIG. 1A.

[0154] The partition wall 37 is provided between adjacent pixels 50 and is provided so as to cover the end portion of the lower electrode 21. In the display device 10 shown in FIGS. 15A and 15B, the EL layer 23 is provided on the lower electrode 21 and on the partition wall 37, and the protective layer 31 is provided on the upper electrode 25 and on the partition wall 37. Note that the EL layer 23 may not have a region overlapping with the partition wall 37.

[0155] By providing the partition wall 37, for example, an electrical short circuit that may occur between adjacent lower electrodes 21 can be suppressed. On the other hand, by adopting a configuration without the partition wall 37, the aperture ratio of the pixel can be increased, and can be, for example, 70% or more, preferably 80% or more, more preferably 90% or more.

[0156] When manufacturing the display device 10 shown in FIGS. 15A and 15B, when etching the layer that becomes the EL layer 23, a part of the partition wall 37 may be etched. Therefore, the void 30 can be configured to enter the partition wall 37.

[0157] FIG. 16 is a cross-sectional view showing a configuration example of the display device 10. FIG. 16 is a cross-sectional view showing a configuration example of the layer below the insulating layer 61 of the display device 10 shown in FIG. 1B.

[0158] As shown in FIG. 16, the display device 10 has a transistor 80 and an element isolation layer 86 on a substrate 81. Further, an insulating layer 131, an insulating layer 133, an insulating layer 135, and an insulating layer 137 are provided on the substrate 81.

[0159] The display device 10 also has an insulating layer 71 on the insulating layer 137 and an insulating layer 61 on the insulating layer 71. In FIG. 16, a configuration in which the insulating layer 71 is provided is illustrated, but it is not limited thereto. For example, the insulating layer 61 may be provided so as to have a region in contact with the upper surface of the insulating layer 137 without providing the insulating layer 71.

[0160] Furthermore, the display device 10 has a conductive layer 67, a conductive layer 69, a conductive layer 63, and a conductive layer 65. The conductive layer 67 is embedded in the insulating layers 131, 133, 135, and 137, and the conductive layer 69 is embedded in the insulating layer 71. The conductive layers 63 and 65 are embedded in the insulating layer 61. Further, the height of the conductive layer 67 and the height of the insulating layer 137 can be made approximately the same, and the height of the conductive layer 69 and the height of the insulating layer 71 can be made approximately the same.

[0161] As shown in FIG. 16, the light-emitting element 20 and the transistor 80 are provided in a stacked manner. Here, the layer in which the light-emitting element 20 is provided is defined as layer 121, and the layer in which the transistor 80 is provided is defined as layer 125.

[0162] The transistor 80 is provided in each of the pixel 50R, the pixel 50G, and the pixel 50B. One of the source or drain of the transistor 80 is electrically connected to the lower electrode 21 via the conductive layer 67, the conductive layer 69, the conductive layer 63, and the conductive layer 65.

[0163] Here, the conductive layer 69 has a function as a plug for electrically connecting the conductive layer 67 and the conductive layer 63, for example. Also, the conductive layer 65 has a function as a plug for electrically connecting the conductive layer 63 and the lower electrode 21, for example.

[0164] In the layer 125, in addition to the transistors of the pixel 50, transistors of drive circuits such as a scanning line drive circuit can be provided.

[0165] The transistor 80 can be a transistor (Si transistor) having silicon in the channel formation region. The silicon of the Si transistor can be single crystal silicon, polycrystalline silicon (polysilicon), amorphous silicon (amorphous silicon), or the like. In particular, the channel formation region of the transistor 80 is preferably formed of single crystal silicon.

[0166] The transistor 80 has a conductive layer 82 having a function as a gate electrode, an insulating layer 83 having a function as a gate insulating layer, and a part of the substrate 81. Also, the transistor 80 has a semiconductor region including a channel formation region, a low resistance region 85a having a function as one of a source region or a drain region, and a low resistance region 85b having a function as the other of the source region or the drain region. The transistor 80 can be either a p-channel type or an n-channel type. Alternatively, the transistor 80 can be a so-called CMOS (Complementary Metal Oxide Semiconductor) transistor in which an n-channel type transistor and a p-channel type transistor are combined.

[0167] The transistor 80 is electrically isolated from other transistors by the element isolation layer 86. FIG. 16 shows a case where the transistors 80 are electrically isolated from each other by the element isolation layer 86. The element isolation layer 86 can be formed using a method such as the LOCOS (LOCal Oxidation of Silicon) method or the STI (Shallow Trench Isolation) method.

[0168] FIG. 17A is a cross-sectional view showing a configuration example in the channel width direction (A1 - A2 direction) of the transistor 80 shown in FIG. 16.

[0169] As shown in FIGS. 16 and 17A, the transistor 80 has a convex semiconductor region. Also, the side surface and the upper surface of the semiconductor region are provided so as to be covered by the conductive layer 82 via the insulating layer 83. A material for adjusting the work function can be used for the conductive layer 82.

[0170] A transistor such as the transistor 80 shown in FIGS. 16 and 17A, in which the semiconductor region has a convex shape, is called a fin-type transistor because it utilizes the convex portion of the semiconductor substrate. Note that an insulator having a function as a mask for forming the convex portion may be in contact with the upper portion of the convex portion. Also, FIG. 16 shows a configuration in which a part of the substrate 81 is processed to form a convex portion, but an SOI (Silicon On Insulator) substrate may be processed to form a semiconductor having a convex shape.

[0171] FIGS. 17B and 17C are cross-sectional views showing configuration examples in the channel length direction of the transistor 80, and are modified examples of the transistor 80 shown in FIG. 16. The transistor 80 shown in FIG. 17B is different from the transistor 80 shown in FIG. 16 in that it is a planar-type transistor. Also, the configuration shown in FIG. 17C is different from the configuration shown in FIG. 16 in that an insulating layer 88 is provided on the substrate 81 and the transistor 80 is provided on the insulating layer 88.

[0172] The transistor 80 shown in FIG. 17C has a semiconductor layer 87. The semiconductor layer 87 can be a thin film, for example, a thin film containing silicon. Specifically, the semiconductor layer 87 can be a thin film containing amorphous silicon or low-temperature polysilicon. Also, the semiconductor layer 87 can be single-crystalline silicon (SOI) formed on an insulating layer 88.

[0173] The insulating layers 131, 133, 135, 137, and insulating layer 71 function as interlayer films. Also, the insulating layers 131, 133, 135, 137, and insulating layer 71 may each function as a planarization layer covering the uneven shape below.

[0174] Hereinafter, materials that can be used for the substrate 81 and the substrate 47 will be described.

[0175] There are no major restrictions on the materials used for the substrate 81 and the substrate 47. It may be determined according to the purpose, taking into account the presence or absence of translucency and heat resistance to withstand heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. Also, semiconductor substrates, flexible substrates (flexible substrates), bonded films, or base films, etc. may be used.

[0176] Examples of semiconductor substrates include semiconductor substrates made of materials such as silicon or germanium, or compound semiconductor substrates made of materials such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Also, the semiconductor substrate may be a single-crystalline semiconductor or a polycrystalline semiconductor.

[0177] Note that in order to enhance the flexibility of the display device 10, flexible substrates (flexible substrates), bonded films, base films, etc. may be used for the substrate 81 and the substrate 47.

[0178] As materials such as flexible substrates, bonding films, and base films, for example, polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyethersulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamideimide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, cellulose nanofibers, etc. can be used.

[0179] By using the above materials as the substrate, a lightweight display device can be provided. Also, by using the above materials as the substrate, a display device resistant to impact can be provided. Further, by using the above materials as the substrate, a display device that is difficult to break can be provided.

[0180] The flexible substrate used for substrate 81 and substrate 47 is preferably one with a lower linear expansion coefficient as deformation due to the environment is more suppressed. The flexible substrate used for substrate 81 and substrate 47, for example, may be made of a material with a linear expansion coefficient of 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less. In particular, aramid is preferable as a flexible substrate because of its low linear expansion coefficient.

[0181] FIG. 18 is a cross-sectional view showing a configuration example of the display device 10 and is a modified example of the display device 10 shown in FIG. 16. The display device 10 shown in FIG. 18 is different from the display device 10 shown in FIG. 16 in that a layer 123 is provided between layer 121 and layer 125.

[0182] A transistor 70 is provided in layer 123. The transistor 70 is provided in each of pixel 50R, pixel 50G, and pixel 50B. In the display device 10 shown in FIG. 18, one of the source or drain of the transistor 70 is electrically connected to the lower electrode 21 via the conductive layer 63 and the conductive layer 65.

[0183] The transistor 70 can be a transistor having a metal oxide in the channel formation region (OS transistor). The metal oxide included in the OS transistor preferably contains at least indium or zinc. In particular, it is preferably contains indium and zinc. In addition to these, it is preferably contains aluminum, gallium, yttrium, tin, or the like. Further, one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. may be included.

[0184] <Configuration Example of Display Device_4> FIG. 19 is a cross-sectional view showing a configuration example of the display device 10. In addition to the configuration shown in FIG. 16, it shows a sealing material 91, a connection electrode 93, an anisotropic conductive layer 95, an FPC (Flexible Printed Circuit) 97, etc.

[0185] As shown in FIG. 19, the substrate 47 and the insulating layer 61 are bonded together by the sealing material 91. Further, a connection electrode 93 is provided on the insulating layer 61 and the conductive layer 65 so as to be electrically connected to one of the source or drain of the transistor 80, for example. Further, an anisotropic conductive layer 95 is provided on the connection electrode 93, and an FPC 97 is provided on the anisotropic conductive layer 95. Various signals are supplied to the display device 10 from the outside of the display device 10 by the FPC 97. Note that the sealing material 91 may be omitted, and the FPC 97 may be wire bonding.

[0186] FIG. 20 is a cross-sectional view showing a configuration example of the display device 10, which is a modified example of the display device 10 shown in FIG. 19. The display device 10 shown in FIG. 20 is different from the display device 10 shown in FIG. 19 in that it has a transistor 70 that can be, for example, an OS transistor.

[0187] FIG. 21A is a block diagram showing a configuration example of the display device 10. The display device 10 includes a display unit 100, a scanning line driving circuit 101, and a data line driving circuit 103. In the display unit 100, pixels 50 are arranged in a matrix. The scanning line driving circuit 101 and the data line driving circuit 103 can be configured to have transistors 80.

[0188] The scanning line driving circuit 101 is electrically connected to the pixel 50 via a wiring 105. The data line driving circuit 103 is electrically connected to the pixel 50 via a wiring 107. The wiring 105 and the wiring107 can be configured to extend in orthogonal directions.

[0189] The scanning line driving circuit 101 has a function of generating a selection signal for selecting a pixel 50 for writing image data. The data line driving circuit 103 has a function of generating a signal (data signal) representing image data. The selection signal is supplied to the pixel 50 via the wiring 105, and the data signal is supplied to the pixel 50 via the wiring 107.

[0190] FIG. 21B is a circuit diagram showing a configuration example of the pixel 50. The pixel 50 includes a light-emitting element 20 and a pixel circuit 110.

[0191] The pixel circuit 110 includes a transistor 111, a transistor 140, a transistor 113, and a capacitor 115. Also, the pixel circuit 110 is electrically connected to one electrode of the light-emitting element 20. Here, the transistor 140 can be, for example, the transistor 80 shown in FIGS. 16 and 17A to 17C, or the transistor 70 shown in FIG. 18.

[0192] One of the source or drain of transistor 111 is electrically connected to the gate of transistor 140. The gate of transistor 140 is electrically connected to one electrode of capacitor 115. One of the source or drain of transistor 140 is electrically connected to one of the source or drain of transistor 113. One of the source or drain of transistor 113 is electrically connected to the other electrode of capacitor 115. The other electrode of capacitor 115 is electrically connected to one electrode of light-emitting element 20. Here, the node where one of the source or drain of transistor 111, the gate of transistor 140, and one electrode of capacitor 115 are electrically connected is defined as node 117. Also, the node where one of the source or drain of transistor 140, one of the source or drain of transistor 113, the other electrode of capacitor 115, and one electrode of light-emitting element 20 are electrically connected is defined as node 119.

[0193] The other of the source or drain of transistor 111 is electrically connected to wiring 107. The gate of transistor 111 and the gate of transistor 113 are electrically connected to wiring 105. The other of the source or drain of transistor 140 is electrically connected to potential supply line VL_a. The other of the source or drain of transistor 113 is electrically connected to potential supply line VL0. The other electrode of light-emitting element 20 is electrically connected to potential supply line VL_b.

[0194] Transistor 111 has a function of controlling the writing of image data to node 117. Capacitor 115 has a function as a holding capacitor for holding the data written to node 117.

[0195] In a display device having pixel circuit 110, the scanning line driving circuit 101 sequentially selects the pixel circuits 110 of each row, turns on transistor 111 and transistor 113, and writes the image data to node 117.

[0196] The pixel circuit 110 in which image data is written to the node 117 enters a holding state when the transistors 111 and 113 are turned off. Also, the amount of current flowing between the drain and source of the transistor 140 is controlled corresponding to the potential of the node 119, and the light-emitting element 20 emits light with a luminance corresponding to the amount of current. By sequentially performing this for each row, an image can be displayed on the display unit 100.

[0197] <Configuration Example of Transistor> FIGS. 22A, 22B, and 22C are top views and cross-sectional views of the transistor 70 and the periphery of the transistor 70.

[0198] FIG. 22A is a top view of the transistor 70. Also, FIGS. 22B and 22C are cross-sectional views of the transistor 70. Here, FIG. 22B is a cross-sectional view of the part indicated by the dashed line X1-X2 in FIG. 22A, and is also a cross-sectional view in the channel length direction of the transistor 70. Also, FIG. 22C is a cross-sectional view of the part indicated by the dashed line Y1-Y2 in FIG. 22A, and is also a cross-sectional view in the channel width direction of the transistor 70. Note that in the top view of FIG. 22A, some elements are omitted for clarity of the drawing.

[0199] As shown in FIG. 22, the transistor 70 includes a metal oxide 230a disposed on a substrate (not shown), a metal oxide 230b disposed on the metal oxide 230a, conductors 242a and 242b disposed spaced apart from each other on the metal oxide 230b, an insulator 280 disposed on the conductors 242a and 242b with an opening formed between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed between the metal oxide 230b, the conductors 242a, 242b, and the insulator 280 and the conductor 260, and a metal oxide 230c disposed between the metal oxide 230b, the conductors 242a, 242b, and the insulator 280 and the insulator 250. Here, as shown in FIGS. 22B and 22C, it is preferable that the upper surface of the conductor 260 substantially coincides with the upper surfaces of the insulator 250, the insulator 254, the metal oxide 230c, and the insulator 280. In the following, the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may be collectively referred to as the metal oxide 230. Also, the conductors 242a and 242b may be collectively referred to as the conductor 242.

[0200] In the transistor 70 shown in FIG. 22, the side surfaces of the conductors 242a and 242b on the side of the conductor 260 have a substantially vertical shape. Note that the transistor 70 shown in FIG. 22 is not limited thereto, and the angle formed by the side surfaces and the bottom surface of the conductors 242a and 242b may be 10° or more and 80° or less, preferably 30° or more and 60° or less. Also, the opposing side surfaces of the conductors 242a and 242b may have a plurality of surfaces.

[0201] As shown in FIG. 22, it is preferable that an insulator 254 is disposed between the insulator 224, the metal oxide 230a, the metal oxide 230b, the conductors 242a, 242b, and the metal oxide 230c and the insulator 280. Here, as shown in FIGS. 22B and 22C, the insulator 254 preferably contacts the side surface of the metal oxide 230c, the upper surface and the side surface of the conductor 242a, the upper surface and the side surface of the conductor 242b, the side surfaces of the metal oxide 230a and the metal oxide 230b, and the upper surface of the insulator 224.

[0202] Note that in the transistor 70, a structure in which three layers of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c are laminated in a region where a channel is formed (hereinafter also referred to as a channel formation region) and in its vicinity is shown, but the present invention is not limited to this. For example, a two-layer structure of the metal oxide 230b and the metal oxide 230c, or a structure provided with a laminated structure of four or more layers may be adopted. Further, in the transistor 70, the conductor 260 is shown as a two-layer laminated structure, but the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a laminated structure of three or more layers. Further, each of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may have a laminated structure of two or more layers.

[0203] For example, when the metal oxide 230c has a laminated structure composed of a first metal oxide and a second metal oxide on the first metal oxide, the first metal oxide preferably has the same composition as the metal oxide 230b, and the second metal oxide preferably has the same composition as the metal oxide 230a.

[0204] Here, the conductor 260 functions as a gate electrode of the transistor, and the conductors 242a and 242b function as a source electrode and a drain electrode, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductor 260, the conductor 242a, and the conductor 242b is self-alignedly selected with respect to the opening of the insulator 280. That is, in the transistor 70, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, since the conductor 260 can be formed without providing an alignment margin, the occupied area of the transistor 70 can be reduced. As a result, the display device can be made high-definition. In addition, the display device can have a narrow bezel.

[0205] As shown in FIG. 22, the conductor 260 preferably has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0206] The transistor 70 preferably has an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on the insulator 216 and the conductor 205, and an insulator 224 disposed on the insulator 222. It is preferable that a metal oxide 230a is disposed on the insulator 224.

[0207] It is preferable that an insulator 274 and an insulator 281 that function as an interlayer film are disposed on the transistor 70. Here, the insulator 274 is preferably disposed in contact with the upper surfaces of the conductor 260, the insulator 250, the insulator 254, the metal oxide 230c, and the insulator 280.

[0208] The insulator 222, the insulator 254, and the insulator 274 preferably have a function of suppressing the diffusion of at least one of hydrogen (for example, hydrogen atoms, hydrogen molecules, etc.). For example, the insulator 222, the insulator 254, and the insulator 274 preferably have lower hydrogen permeability than the insulator 224, the insulator 250, and the insulator 280. Further, the insulator 222 and the insulator 254 preferably have a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules). For example, the insulator 222 and the insulator 254 preferably have lower oxygen permeability than the insulator 224, the insulator 250, and the insulator 280.

[0209] Here, the insulator 224, the metal oxide 230, and the insulator 250 are separated by the insulator 280, the insulator 281, the insulator 254, and the insulator 274. Therefore, impurities such as hydrogen contained in the insulator 280 and the insulator 281, or excessive oxygen can be prevented from mixing into the insulator 224, the metal oxide 230, and the insulator 250.

[0210] It is preferable to provide a conductor 240 (conductor 240a and conductor 240b) that is electrically connected to the transistor 70 and functions as a plug. An insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 that functions as a plug. That is, the insulator 241 is provided in contact with the inner walls of the openings of the insulator 254, the insulator 280, the insulator 274, and the insulator 281. Further, a first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 240 may be provided further inside. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 can be made approximately the same. Note that in the transistor 70, a configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are laminated is shown, but the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, ordinal numbers may be assigned in the order of formation for distinction.

[0211] For the transistor 70, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 230 (metal oxide 230a, metal oxide 230b, and metal oxide 230c) including the channel formation region. For example, as the metal oxide that becomes the channel formation region of the metal oxide 230, it is preferable to use one having a band gap of 2 eV or more, preferably 2.5 eV or more.

[0212] As the metal oxide, it is preferable to contain at least indium (In) or zinc (Zn). In particular, it is preferable to contain indium (In) and zinc (Zn). In addition to these, it is preferable that element M is contained. As element M, one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co) can be used. In particular, element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Further, it is more preferable that element M has either or both of Ga and Sn.

[0213] Also, as shown in FIG. 22B, the film thickness of the region where the metal oxide 230b does not overlap with the conductor 242 may be thinner than the film thickness of the region where the metal oxide 230b overlaps with the conductor 242. This is formed by removing a part of the upper surface of the metal oxide 230b when forming the conductor 242a and the conductor 242b. When a conductive film that becomes the conductor 242 is formed on the upper surface of the metal oxide 230b, a region with low resistance may be formed in the vicinity of the interface with the conductive film. In this way, by removing the region with low resistance located between the conductor 242a and the conductor 242b on the upper surface of the metal oxide 230b, it is possible to prevent a channel from being formed in the region.

[0214] According to one aspect of the present invention, a display device having a small-sized transistor and high fineness can be provided. Or, a display device having a transistor with a large on-current and high luminance can be provided. Or, a display device having a fast-operating transistor and a fast-operating display device can be provided. Or, a display device having a transistor with stable electrical characteristics and high reliability can be provided. Or, a display device having a transistor with a small off-current and low power consumption can be provided.

[0215] A detailed configuration of the transistor 70 that can be used in a display device according to an aspect of the present invention will be described.

[0216] The conductor 205 is arranged so as to have an overlapping region with the metal oxide 230 and the conductor 260. Further, the conductor 205 is preferably provided by being embedded in the insulator 216.

[0217] The conductor 205 includes a conductor 205a, a conductor 205b, and a conductor 205c. The conductor 205a is provided in contact with the bottom surface and the side wall of an opening provided in the insulator 216. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c substantially coincides with the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. That is, the conductor 205b is configured to be surrounded by the conductor 205a and the conductor 205c.

[0218] It is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms for the conductor 205a and the conductor 205c. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0219] By using a conductive material having a function of reducing the diffusion of hydrogen for the conductors 205a and 205c, it is possible to suppress impurities such as hydrogen contained in the conductor 205b from diffusing into the metal oxide 230 via the insulator 224 or the like. Further, by using a conductive material having a function of suppressing the diffusion of oxygen for the conductors 205a and 205c, it is possible to suppress the conductor 205b from being oxidized and the conductivity from decreasing. As the conductive material having a function of suppressing the diffusion of oxygen, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. Therefore, as the conductor 205a, the above conductive material may be used as a single layer or a laminate. For example, titanium nitride may be used for the conductor 205a.

[0220] In addition, for the conductor 205b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. For example, tungsten may be used for the conductor 205b.

[0221] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Further, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the V th of the transistor 70 can be controlled. In particular, by applying a negative potential to the conductor 205, the V th of the transistor 70 can be made larger than 0V, and the off-current can be made smaller. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0V than when no negative potential is applied.

[0222] The conductor 205 may be provided to be larger than the channel formation region in the metal oxide 230. In particular, as shown in FIG. 22C, the conductor 205 preferably extends also in a region outside the end portion intersecting the channel width direction of the metal oxide 230. That is, it is preferable that the conductor 205 and the conductor 260 overlap with each other via an insulator outside the side surface in the channel width direction of the metal oxide 230.

[0223] By having the above configuration, the channel formation region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260 having the function as the first gate electrode and the electric field of the conductor 205 having the function as the second gate electrode.

[0224] As shown in FIG. 22C, the conductor 205 is extended to also function as a wiring. However, the present invention is not limited to this, and a configuration may be adopted in which a conductor functioning as a wiring is provided under the conductor 205.

[0225] The insulator 214 preferably functions as a barrier insulating film that suppresses impurities such as water or hydrogen from entering the transistor 70 from the substrate side. Therefore, it is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, and NO2), or copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (the above oxygen is difficult to permeate).

[0226] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 214. Thereby, it is possible to suppress impurities such as water or hydrogen from diffusing from the substrate side to the transistor 70 side through the insulator 214. Alternatively, it is possible to suppress oxygen contained in the insulator 224 or the like from diffusing to the substrate side through the insulator 214.

[0227] The insulators 216, 280, and 281 that function as interlayer films preferably have a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. For example, as the insulators 216, 280, and 281, silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, or silicon oxide having pores may be appropriately used.

[0228] The insulators 222 and 224 have a function as a gate insulator.

[0229] Here, the insulator 224 in contact with the metal oxide 230 preferably desorbs oxygen by heating. In this specification, oxygen desorbed by heating may be referred to as excess oxygen. For example, the insulator 224 may be appropriately silicon oxide or silicon oxynitride. By providing an oxygen-containing insulator in contact with the metal oxide 230, oxygen deficiency in the metal oxide 230 can be reduced, and the reliability of the transistor 70 can be improved.

[0230] Specifically, as the insulator 224, it is preferable to use an oxide material in which some oxygen desorbs by heating. An oxide that desorbs oxygen by heating means that in TDS (Thermal Desorption Spectroscopy) analysis, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more, and it is an oxide film. Note that the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0231] As shown in FIG. 22C, the thickness of the insulator 224 in the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b may be smaller than the thickness of the other regions. In the insulator 224, the thickness of the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b is preferably a thickness that allows sufficient diffusion of the above oxygen.

[0232] Similar to the insulator 214 and the like, the insulator 222 preferably functions as a barrier insulating film that suppresses the mixing of impurities such as water or hydrogen into the transistor 70 from the substrate side. For example, the insulator 222 preferably has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 230, the insulator 250, etc. with the insulator 222, the insulator 254, and the insulator 274, it is possible to suppress the intrusion of impurities such as water or hydrogen from the outside into the transistor 70.

[0233] Furthermore, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.) (the above oxygen is less likely to permeate). For example, the insulator 222 preferably has lower oxygen permeability than the insulator 224. By the insulator 222 having a function of suppressing the diffusion of oxygen or impurities, it is possible to reduce the diffusion of the oxygen possessed by the metal oxide 230 to the substrate side, which is preferable. Also, it is possible to suppress the reaction of the conductor 205 with the oxygen possessed by the insulator 224 or the oxygen possessed by the metal oxide 230.

[0234] As the insulator 222, an insulator containing one or both of oxides of aluminum and hafnium, which are insulating materials, may be used. As the insulator containing one or both of oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the metal oxide 230 and the mixing of impurities such as hydrogen from the peripheral portion of the transistor 70 into the metal oxide 230.

[0235] Alternatively, for these insulators, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide may be added. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the above insulators and used.

[0236] The insulator 222 may be a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba,Sr)TiO3 (BST). As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator functioning as the gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0237] Note that the insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used. For example, a structure may be adopted in which an insulator similar to the insulator 224 is provided under the insulator 222.

[0238] The metal oxide 230 has a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. By having the metal oxide 230a under the metal oxide 230b, diffusion of impurities from a structure formed below the metal oxide 230a to the metal oxide 230b can be suppressed. Also, by having the metal oxide 230c on the metal oxide 230b, diffusion of impurities from a structure formed above the metal oxide 230c to the metal oxide 230b can be suppressed.

[0239] The metal oxide 230 preferably has a laminated structure of a plurality of oxide layers with different atomic number ratios of each metal atom. For example, when the metal oxide 230 contains at least indium (In) and an element M, the ratio of the number of atoms of the element M contained in the metal oxide 230a to the total number of atoms of all elements constituting the metal oxide 230a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the total number of atoms of all elements constituting the metal oxide 230b. Also, the atomic number ratio of the element M contained in the metal oxide 230a to In is preferably larger than the atomic number ratio of the element M contained in the metal oxide 230b to In. Here, as the metal oxide 230c, a metal oxide that can be used for the metal oxide 230a or the metal oxide 230b can be used.

[0240] Preferably, the energy of the lower end of the conduction band of the metal oxides 230a and 230c is higher than the energy of the lower end of the conduction band of the metal oxide 230b. In other words, preferably, the electron affinity of the metal oxides 230a and 230c is smaller than the electron affinity of the metal oxide 230b. In this case, as the metal oxide 230c, it is preferable to use a metal oxide that can be used for the metal oxide 230a. Specifically, the ratio of the number of atoms of the element M contained in the metal oxide 230c to the total number of atoms of all elements constituting the metal oxide 230c is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the total number of atoms of all elements constituting the metal oxide 230b. Also, the atomic number ratio of the element M contained in the metal oxide 230c to In is preferably larger than the atomic number ratio of the element M contained in the metal oxide 230b to In.

[0241] Here, at the junction of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c, the energy level of the conduction band minimum changes gradually. In other words, it can be said that the energy level of the conduction band minimum at the junction of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c changes continuously or is continuously junctioned. To achieve this, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the metal oxide 230a and the metal oxide 230b and the interface between the metal oxide 230b and the metal oxide 230c.

[0242] Specifically, the metal oxide 230a and the metal oxide 230b, and the metal oxide 230b and the metal oxide 230c have a common element other than oxygen (as a main component), so that a mixed layer with a low defect level density can be formed. For example, when the metal oxide 230b is an In-Ga-Zn oxide, the metal oxide 230a and the metal oxide 230c may be made of In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, or the like. The metal oxide 230c may also have a laminated structure. For example, a laminated structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a laminated structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a laminated structure of In-Ga-Zn oxide and an oxide not containing In may be used as the metal oxide 230c.

[0243] Specifically, as the metal oxide 230a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. Further, as the metal oxide 230b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2 may be used. Further, as the metal oxide 230c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, In:Ga:Zn = 4:2:3, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Further, as a specific example of the case where the metal oxide 230c has a stacked structure, a stacked structure of In:Ga:Zn = 4:2:3 and Ga:Zn = 2:1, a stacked structure of In:Ga:Zn = 4:2:3 and Ga:Zn = 2:5, or a stacked structure of In:Ga:Zn = 4:2:3 and gallium oxide, etc. may be mentioned.

[0244] At this time, the main path of carriers becomes the metal oxide 230b. By configuring the metal oxide 230a and the metal oxide 230c as described above, the density of defect levels at the interface between the metal oxide 230a and the metal oxide 230b and at the interface between the metal oxide 230b and the metal oxide 230c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 70 can obtain a high on-current and high frequency characteristics. When the metal oxide 230c has a stacked structure, in addition to the effect of reducing the density of defect levels at the interface between the metal oxide 230b and the metal oxide 230c described above, it is expected to suppress the diffusion of the constituent elements of the metal oxide 230c to the insulator 250 side. More specifically, since the metal oxide 230c has a stacked structure and an oxide not containing In is positioned above the stacked structure, In that can diffuse to the insulator 250 side can be suppressed. Since the insulator 250 functions as a gate insulator, if In diffuses, the characteristics of the transistor deteriorate. Therefore, by forming the metal oxide 230c into a stacked structure, it becomes possible to provide a highly reliable display device.

[0245] On the metal oxide 230b, conductors 242 (conductor 242a and conductor 242b) that function as a source electrode and a drain electrode are provided. As the conductor 242, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when they absorb oxygen.

[0246] By providing the conductor 242 so as to be in contact with the metal oxide 230, the oxygen concentration may be reduced in the vicinity of the conductor 242 of the metal oxide 230. Further, in the vicinity of the conductor 242 of the metal oxide 230, a metal compound layer containing the metal contained in the conductor 242 and the components of the metal oxide 230 may be formed. In such a case, the carrier density increases in the region near the conductor 242 of the metal oxide 230, and the region becomes a low-resistance region.

[0247] Here, the region between the conductor 242a and the conductor 242b is formed to overlap the opening of the insulator 280. Thereby, the conductor 260 can be self-alignedly arranged between the conductor 242a and the conductor 242b.

[0248] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 230c. The insulator 250 can be silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or silicon oxide having pores. In particular, silicon oxide and silicon oxynitride are preferred because they are stable against heat.

[0249] Similar to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 250 is reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0250] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. Thereby, oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0251] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity as the metal oxide. By forming the gate insulator into a laminated structure of the insulator 250 and the metal oxide, a laminated structure which is stable against heat and has a high relative permittivity can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. Also, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator.

[0252] Specifically, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. can be used. In particular, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc., which are insulators containing one or both of aluminum and hafnium oxides.

[0253] Although the conductor 260 is shown as a two-layer structure in FIG. 22, it may have a single-layer structure or a laminated structure of three or more layers.

[0254] For the conductor 260a, it is preferable to use a conductor having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, and NO2, etc.), or copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0255] Since the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 260b by oxygen contained in the insulator 250 and the decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use tantalum, tantalum nitride, ruthenium, or ruthenium oxide.

[0256] For the conductor 260b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Also, since the conductor 260 also functions as a wiring, it is preferable to use a conductor having high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 260b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0257] As shown in FIGS. 22A and 22C, in a region that does not overlap with the conductor 242 of the metal oxide 230b, in other words, in the channel formation region of the metal oxide 230, the side surface of the metal oxide 230 is arranged to be covered with the conductor 260. Thereby, it becomes easier for the electric field of the conductor 260 that functions as the first gate electrode to act on the side surface of the metal oxide 230. Therefore, the on-current of the transistor 70 can be increased and the frequency characteristics can be improved.

[0258] Similar to the insulator 214 and the like, the insulator 254 preferably functions as a barrier insulating film that suppresses impurities such as water or hydrogen from entering the transistor 70 from the insulator 280 side. For example, the insulator 254 preferably has lower hydrogen permeability than the insulator 224. Further, as shown in FIGS. 22B and 22C, the insulator 254 preferably contacts the side surface of the metal oxide 230c, the upper surface and the side surface of the conductor 242a, the upper surface and the side surface of the conductor 242b, the side surfaces of the metal oxides 230a and 230b, and the upper surface of the insulator 224. With such a configuration, it is possible to suppress hydrogen contained in the insulator 280 from entering the metal oxide 230 from the upper surface or the side surface of the conductor 242a, the conductor 242b, the metal oxides 230a, 230b, and the insulator 224.

[0259] Furthermore, the insulator 254 preferably has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.) (the above oxygen is difficult to permeate). For example, the insulator 254 preferably has lower oxygen permeability than the insulator 280 or the insulator 224.

[0260] The insulator 254 is preferably formed by a sputtering method. By forming the insulator 254 by a sputtering method in an atmosphere containing oxygen, oxygen can be added in the vicinity of the region where the insulator 254 of the insulator 224 is in contact. Thereby, oxygen can be supplied from the said area|region into the metal oxide 230 through the insulator 224. Here, since the insulator 254 has a function of suppressing the upward diffusion of oxygen, it is possible to prevent oxygen from diffusing from the metal oxide 230 to the insulator 280. Further, since the insulator 222 has a function of suppressing the downward diffusion of oxygen, it is possible to prevent oxygen from diffusing from the metal oxide 230 to the substrate side. In this way, oxygen is supplied to the channel formation region of the metal oxide 230. Thereby, the oxygen deficiency of the metal oxide 230 can be reduced, and the normal ionization of the transistor can be suppressed.

[0261] As the insulator 254, for example, an insulator containing one or both oxides of aluminum and hafnium may be formed. Note that, as the insulator containing one or both oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc.

[0262] By covering the insulator 224, the insulator 250, and the metal oxide 230 with the insulator 254 having a barrier property against hydrogen, the insulator 280 is separated from the insulator 224, the metal oxide 230, and the insulator 250 by the insulator 254. Thereby, since it is possible to suppress the intrusion of impurities such as hydrogen from the outside of the transistor 70, good electrical characteristics and reliability can be given to the transistor 70.

[0263] The insulator 280 is provided on the insulator 224, the metal oxide 230, and the conductor 242 via the insulator 254. For example, as the insulator 280, it is preferable to have silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, or silicon oxide having pores. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having pores are preferable because they can easily form regions containing oxygen that desorbs by heating.

[0264] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. Also, the upper surface of the insulator 280 may be planarized.

[0265] Similar to the insulator 214, etc., the insulator 274 preferably functions as a barrier insulating film that suppresses impurities such as water or hydrogen from mixing into the insulator 280 from above. As the insulator 274, for example, an insulator that can be used for the insulator 214 or the insulator 254, etc. may be used.

[0266] It is preferable to provide an insulator 281 that functions as an interlayer film on the insulator 274. Similar to the insulator 224, etc., it is preferable that the concentration of impurities such as water or hydrogen in the film of the insulator 281 is reduced.

[0267] The conductors 240a and 240b are arranged in the openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductors 240a and 240b are provided to face each other with the conductor 260 interposed therebetween. Note that the height of the upper surfaces of the conductors 240a and 240b may be on the same plane as the upper surface of the insulator 281.

[0268] In addition, an insulator 241a is provided in contact with the inner walls of the openings of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and a first conductor of the conductor 240a is formed in contact with the side surface thereof. At least a part of the bottom of the opening has a conductor 242a located therein, and the conductor 240a is in contact with the conductor 242a. Similarly, an insulator 241b is provided in contact with the inner walls of the openings of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and a first conductor of the conductor 240b is formed in contact with the side surface thereof. At least a part of the bottom of the opening has a conductor 242b located therein, and the conductor 240b is in contact with the conductor 242b.

[0269] It is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum for the conductor 240a and the conductor 240b. Also, the conductor 240a and the conductor 240b may have a laminated structure.

[0270] When the conductor 240 has a laminated structure, for the conductors in contact with the metal oxide 230a, the metal oxide 230b, the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281, it is preferable to use a conductor having the function of suppressing the diffusion of impurities such as water or hydrogen as described above. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like. Also, the conductive material having the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or in a laminated form. By using the conductive material, it is possible to suppress the absorption of oxygen added to the insulator 280 by the conductor 240a and the conductor 240b. Also, it is possible to suppress the mixing of impurities such as water or hydrogen from the upper layer of the insulator 281 into the metal oxide 230 through the conductor 240a and the conductor 240b.

[0271] As the insulators 241a and 241b, for example, insulators that can be used for the insulator 254 or the like may be used. Since the insulators 241a and 241b are provided in contact with the insulator 254, it is possible to suppress impurities such as water or hydrogen from the insulator 280 or the like from mixing into the metal oxide 230 through the conductors 240a and 240b. Further, it is possible to suppress oxygen contained in the insulator 280 from being absorbed by the conductors 240a and 240b.

[0272] Although not shown, conductors that function as wiring may be arranged in contact with the upper surfaces of the conductor 240a and the conductor 240b. As the conductor that functions as wiring, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Further, the conductor may have a laminated structure, for example, a laminate of titanium or titanium nitride and the above conductive material. The conductor may be formed so as to be embedded in an opening provided in the insulator.

[0273] <Configuration example of light-emitting element> As shown in FIG. 23A, the EL layer 23 included in the light-emitting element 20 can be composed of a plurality of layers such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can have, for example, a layer containing a substance with high electron injection property (electron injection layer) and a layer containing a substance with high electron transport property (electron transport layer). The light-emitting layer 4411 has, for example, a light-emitting compound. The layer 4430 can have, for example, a layer containing a substance with high hole injection property (hole injection layer) and a layer containing a substance with high hole transport property (hole transport layer).

[0274] A configuration having a layer 4420, a light-emitting layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single light-emitting unit, and in this specification, the configuration of FIG. 23A is referred to as a single structure.

[0275] Further, FIG. 23B shows a modified example of the EL layer 23 included in the light-emitting element 20 shown in FIG. 23A. Specifically, the light-emitting element 20 shown in FIG. 23B includes a layer 4430-1 on the lower electrode 21, a layer 4430-2 on the layer 4430-1, a light-emitting layer 4411 on the layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on the layer 4420-1, and an upper electrode 25 on the layer 4420-2. For example, when the lower electrode 21 is an anode and the upper electrode 25 is a cathode, the layer 4430-1 functions as a hole injection layer, the layer 4430-2 functions as a hole transport layer, the layer 4420-1 functions as an electron transport layer, and the layer 4420-2 functions as an electron injection layer. Alternatively, when the lower electrode 21 is a cathode and the upper electrode 25 is an anode, the layer 4430-1 functions as an electron injection layer, the layer 4430-2 functions as an electron transport layer, the layer 4420-1 functions as a hole transport layer, and the layer 4420-2 functions as a hole injection layer. By adopting such a layer structure, carriers can be efficiently injected into the light-emitting layer 4411, and the efficiency of carrier recombination in the light-emitting layer 4411 can be enhanced.

[0276] Note that, as shown in FIG. 23C, a configuration in which a plurality of light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, light-emitting layer 4413) are provided between the layer 4420 and the layer 4430 is also a variation of the single structure.

[0277] Further, as shown in FIG. 23D, a configuration in which a plurality of light-emitting units (EL layer 23a, EL layer 23b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure in this specification. Note that, in this specification and the like, a configuration as shown in FIG. 23D is referred to as a tandem structure, but the present invention is not limited thereto. For example, the tandem structure may be referred to as a stack structure. By adopting the tandem structure, a light-emitting element capable of high-luminance emission can be obtained.

[0278] Note that, also in FIGS. 23C and 23D, as shown in FIG. 23B, the layer 4420 and the layer 4430 may have a stacked structure composed of two or more layers.

[0279] In addition, when comparing the above-described single structure and tandem structure with the SBS structure described above, the single structure and the tandem structure have a simpler manufacturing process than the SBS structure. Therefore, the manufacturing cost of the display device according to one aspect of the present invention can be reduced, and the yield can be increased. From the above, the display device according to one aspect of the present invention can be made less expensive. On the other hand, the power consumption can be reduced in the order of the SBS structure, the tandem structure, and the single structure. Therefore, when it is desired to suppress the power consumption of the display device according to one aspect of the present invention, it is preferable to use the SBS structure.

[0280] The emission color of the light-emitting element 20 can be red, green, blue, cyan, magenta, yellow, white, or the like depending on the material constituting the EL layer 23. In addition, the color purity can be further enhanced by providing the light-emitting element 20 with a microcavity structure.

[0281] The light-emitting element that emits white light preferably has a configuration in which the light-emitting layer contains two or more types of light-emitting substances. To obtain white light, light-emitting substances may be selected such that the emission of each of the two or more light-emitting substances is in a complementary color relationship.

[0282] The light-emitting layer preferably contains two or more types of light-emitting substances that exhibit light emission such as R (red), G (green), B (blue), Y (yellow), or O (orange).

[0283] This embodiment can be implemented in appropriate combination with at least a part of other embodiments or examples described in this specification.

[0284] (Embodiment 2) In this embodiment, a metal oxide that can be used for the OS transistor described in the above embodiment will be described.

[0285] <Classification of Crystal Structure> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 24A. FIG. 24A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0286] As shown in FIG. 24A, oxide semiconductors are roughly classified into "Amorphous", "Crystalline", and "Crystal". In addition, "Amorphous" includes completely amorphous. In addition, "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite). Note that single crystal and poly crystal are excluded from the classification of "Crystalline" (excluding single crystal and poly crystal). In addition, "Crystal" includes single crystal and poly crystal.

[0287] Note that the structure within the thick frame shown in FIG. 24A is an intermediate state between "Amorphous" and "Crystal", and belongs to a new boundary region (New crystalline phase). That is, the structure can be rephrased as a structure that is completely different from the energetically unstable "Amorphous" and "Crystal".

[0288] Note that the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Here, the XRD spectrum obtained from the grazing-incidence XRD (GIXD) measurement of the CAAC-IGZO film classified as "Crystalline" is shown in Fig. 24B. In Fig. 24B, the horizontal axis is 2θ [deg.], and the vertical axis is Intensity [a.u.]. Note that the GIXD method is also called the thin-film method or the Seemann-Bohlin method. Hereafter, the XRD spectrum obtained from the GIXD measurement shown in Fig. 24B will be simply referred to as the XRD spectrum. Note that the composition of the CAAC-IGZO film shown in Fig. 24B is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the thickness of the CAAC-IGZO film shown in Fig. 24B is 500 nm.

[0289] In Fig. 24B, the horizontal axis is 2θ [deg.], and the vertical axis is intensity (Intensity) [a.u.]. As shown in Fig. 24B, peaks indicating clear crystallinity are detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected in the vicinity of 2θ = 31°. Note that, as shown in Fig. 24B, the peak in the vicinity of 2θ = 31° is asymmetric about the angle at which the peak intensity was detected.

[0290] The crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano-beam electron diffraction pattern) observed by the nano-beam electron diffraction method (NBED). The diffraction pattern of the CAAC-IGZO film is shown in Fig. 24C. Fig. 24C is the diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in Fig. 24C is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, in the nano-beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0291] As shown in Fig. 24C, a plurality of spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0292] [Structure of Oxide Semiconductor] Note that when focusing on the crystal structure, the oxide semiconductor may be classified differently from that in FIG. 24A. For example, the oxide semiconductor can be divided into a single-crystalline oxide semiconductor and other non-single-crystalline oxide semiconductors. Examples of the non-single-crystalline oxide semiconductor include the above-mentioned CAAC-OS and nc-OS. In addition, the non-single-crystalline oxide semiconductor includes polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), and amorphous oxide semiconductors, etc.

[0293] Here, the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0294] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axis of the plurality of crystal regions is oriented in a specific direction. Note that the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. In addition, the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region where the lattice arrangements are aligned. Furthermore, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. Note that the strain refers to a portion where the direction of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in the region where a plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor with c-axis orientation and no obvious orientation in the a-b plane direction.

[0295] Each of the above-mentioned plurality of crystal regions is composed of one or more minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. Further, when a crystal region is composed of a number of minute crystals, the size of the crystal region may be on the order of several tens of nm.

[0296] In an In-M-Zn oxide (where the element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer having indium (In) and oxygen (hereinafter referred to as an In layer) and a layer having the element M, zinc (Zn), and oxygen (hereinafter referred to as an (M,Zn) layer) are laminated. Note that indium and the element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain the element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0297] When a structural analysis is performed on a CAAC-OS film using, for example, an XRD apparatus, in an Out-of-plane XRD measurement using a θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in the vicinity thereof. Note that the position (the value of 2θ) of the peak indicating c-axis orientation may vary depending on the type or composition of the metal elements constituting CAAC-OS.

[0298] For example, in the electron diffraction pattern of a CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as a direct spot) as the center of symmetry.

[0299] When observing the crystal region from the specific direction, the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be an irregular hexagon. Further, in the above strain, there may be a lattice arrangement such as a pentagon or a heptagon. In CAAC-OS, even in the vicinity of the strain, a distinct grain boundary cannot be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed due to the strain of the lattice arrangement. This is presumably because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal atoms.

[0300] Note that a crystal structure in which distinct grain boundaries are confirmed is called a so-called polycrystal. Grain boundaries serve as recombination centers, and carriers are likely to be trapped, causing a decrease in the on-current of the transistor or a decrease in the field-effect mobility. Therefore, CAAC-OS in which distinct grain boundaries are not confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor. In addition, to form CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more than In oxide.

[0301] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct grain boundaries confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is unlikely to occur. In addition, since the crystallinity of the oxide semiconductor may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Therefore, the physical properties of the oxide semiconductor having CAAC-OS are stable. Therefore, the oxide semiconductor having CAAC-OS is heat-resistant and highly reliable. In addition, CAAC-OS is also stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for the OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0302] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Since the size of the minute crystals is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystals are also referred to as nano crystals. Further, nc-OS has no regularity in the crystal orientation among different nano crystals. Therefore, no orientation is observed in the entire film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor. For example, when a structure analysis is performed on an nc-OS film using an XRD apparatus, no peak indicating crystallinity is detected in an Out-of-plane XRD measurement using θ / 2θ scan. Further, when electron beam diffraction (also referred to as limited field of view electron beam diffraction) using an electron beam having a probe diameter larger than that of the nano crystal (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when electron beam diffraction (also referred to as nano beam electron beam diffraction) using an electron beam having a probe diameter close to or smaller than that of the nano crystal (for example, 1 nm or more and 30 nm or less) is performed on the nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be obtained.

[0303] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor. a-like OS has a loose or low density region. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS. Further, a-like OS has a higher hydrogen concentration in the film than nc-OS and CAAC-OS.

[0304] [Constitution of Oxide Semiconductor] Next, the details of the above-described CAC-OS will be described. Note that CAC-OS relates to the material constitution.

[0305] [CAC-OS] CAC-OS is, for example, a component of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, a state in which one or more metal elements are unevenly distributed and the regions having the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof is also referred to as a mosaic state or a patch state.

[0306] Furthermore, CAC-OS is a composite metal oxide having a structure in which the material is separated into a first region and a second region to form a mosaic state, and the first region is a structure distributed in the film (hereinafter also referred to as a cloud state). That is, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0307] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0308] Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the first region can be rephrased as a region mainly composed of In. The second region can be rephrased as a region mainly composed of Ga.

[0309] Note that there may be cases where a clear boundary cannot be observed between the above first region and the above second region.

[0310] For example, in CAC-OS in In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the region mainly composed of In (the first region) and the region mainly composed of Ga (the second region) are unevenly distributed and have a mixed structure.

[0311] When CAC-OS is used for a transistor, the conductivity resulting from the first region and the insulating property resulting from the second region act complementarily, thereby enabling the function of switching (on / off function) to be imparted to CAC-OS. That is, CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be enhanced to the maximum extent. Therefore, by using CAC-OS for a transistor, a high on-current (I on ), a high field-effect mobility (μ), and a good switching operation can be realized.

[0312] Oxide semiconductors have various structures and each has different characteristics. The oxide semiconductor according to one aspect of the present invention may have two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0313] <Transistor having an oxide semiconductor> Subsequently, the case where the above oxide semiconductor is used for a transistor will be described.

[0314] By using the above oxide semiconductor for a transistor, a transistor with a high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0315] For the transistor, it is preferable to use an oxide semiconductor with a low carrier concentration. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, even more preferably 1×10 11 cm -3 or less, and even more preferably less than 1×10 10 cm -3 and 1×10 -9 cm -3 or more. When reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that an oxide semiconductor with a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

[0316] An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic may have a low trap level density because the density of defect levels is low.

[0317] The charge trapped in the trap level of the oxide semiconductor takes a long time to disappear and may behave like a fixed charge. Therefore, the electrical characteristics of a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap level density may become unstable.

[0318] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Further, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of the impurity include hydrogen, nitrogen, an alkali metal, an alkaline earth metal, iron, nickel, or silicon.

[0319] <Impurity> Here, the effects of various impurities in the oxide semiconductor will be described.

[0320] In an oxide semiconductor, when silicon or carbon, which is one of the Group 14 elements, is contained, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration obtained by SIMS) are set to 2×10 18 atoms / cm 3 or less, preferably 2×10 17 atoms / cm 3 or less.

[0321] When an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0322] When nitrogen is contained in the oxide semiconductor, carriers, i.e., electrons, are generated, the carrier concentration increases, and the semiconductor tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as the semiconductor tends to have normally-on characteristics. Or, when nitrogen is contained in the oxide semiconductor, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to less than 5×10 19 atoms / cm 3 , preferably less than 5×10 18 atoms / cm 3 , more preferably 1×10 18 atoms / cm 3 , still more preferably 5×10 17 atoms / cm3 Make it as follows.

[0323] Hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, thereby forming oxygen vacancies. When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. In addition, part of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons, which are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 20 atoms / cm 3 less than, preferably less than 1×10 19 atoms / cm 3 less than, more preferably less than 5×10 18 atoms / cm 3 less than, even more preferably less than 1×10 18 atoms / cm 3 Make it less than.

[0324] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of the transistor, stable electrical characteristics can be imparted.

[0325] This embodiment can be implemented in appropriate combination with at least a part of other embodiments or examples described in this specification.

[0326] (Embodiment 3) In this embodiment, an electronic device including a display device, which is one aspect of the present invention, will be described.

[0327] FIG. 25A is a diagram showing the appearance of the head-mounted display 8200.

[0328] The head-mounted display 8200 has a mounting part 8201, lenses 8202, a main body 8203, a display part 8204, a cable 8205, etc. Also, a battery 8206 is built into the mounting part 8201.

[0329] The cable 8205 supplies power from the battery 8206 to the main body 8203. The main body 8203 includes, for example, a wireless receiver and can display, for example, an image corresponding to the received image data on the display part 8204. Also, by capturing the movement of the user's eyeball or eyelid with a camera provided in the main body 8203 and calculating the coordinates of the user's line of sight based on that information, the user's line of sight can be used as an input means.

[0330] A plurality of electrodes may be provided at positions where the mounting part 8201 touches the user. The main body 8203 may have a function of recognizing the user's line of sight by detecting the current flowing through the electrodes as the user's eyeball moves. Also, by detecting the current flowing through the electrodes, it may have a function of monitoring the user's pulse. Further, the mounting part 8201 may have various sensors such as a temperature sensor, a pressure sensor, or an acceleration sensor, and may have a function of displaying the user's biological information on the display part 8204. Also, for example, the movement of the user's head may be detected, and the image displayed on the display part 8204 may be changed according to the movement.

[0331] The display device according to one aspect of the present invention can be applied to the display part 8204. Thereby, a high-quality image can be displayed on the display part 8204.

[0332] Figures 25B, 25C, and 25D are diagrams showing the appearance of the head-mounted display 8300. The head-mounted display 8300 has a housing 8301, a display part 8302, a band-shaped fixture 8304, and a pair of lenses 8305. Also, a battery 8306 is built into the housing 8301, and power can be supplied from the battery 8306 to, for example, the display part 8302.

[0333] The user can visually recognize the display of the display unit 8302 through the lens 8305. It is preferable to arrange the display unit 8302 in a curved manner. By arranging the display unit 8302 in a curved manner, the user can feel a high sense of immersion. In the present embodiment, a configuration in which one display unit 8302 is provided is illustrated, but the present invention is not limited thereto. For example, a configuration in which two display units 8302 are provided may be adopted. In this case, if a configuration is adopted in which one display unit is arranged in front of one eye of the user, for example, three-dimensional display using parallax can also be performed.

[0334] Note that the display device according to an aspect of the present invention can be applied to the display unit 8302. As a result, high-quality images can be displayed on the display unit 8302.

[0335] Next, examples of an electronic device shown in FIGS. 25A to 25D and a different electronic device are shown in FIGS. 26A and 26B.

[0336] The electronic devices shown in FIGS. 26A and 26B include a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, a sensor 9007 (including a function of measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), and a battery 9009, etc.

[0337] The electronic devices shown in FIGS. 26A and 26B have various functions. For example, it can have functions such as displaying various information (still images, moving images, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, or time, etc., a function of controlling processing by various software (programs), a wireless communication function, a function of connecting to various computer networks using the wireless communication function, a function of transmitting or receiving various data using the wireless communication function, a function of reading a program or data recorded on a recording medium and displaying it on the display unit, etc. Note that the functions that the electronic devices shown in FIGS. 26A and 26B can have are not limited to these, and they can have various functions. Also, although not shown in FIGS. 26A and 26B, the electronic device may have a configuration with a plurality of display units. Further, a camera or the like may be provided in the electronic device, and it may have functions such as a function of taking a still image, a function of taking a moving image, a function of saving the captured image in a recording medium (external or built into the camera), a function of displaying the captured image on the display unit, etc.

[0338] Details of the electronic devices shown in FIGS. 26A and 26B will be described below.

[0339] FIG. 26A is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, or an information browsing device, etc. Specifically, it can be used as a smartphone. Also, the portable information terminal 9101 can display characters or images on its multiple surfaces. For example, three operation buttons 9050 (also referred to as operation icons or simply icons) can be displayed on one surface of the display unit 9001. Also, information 9051 indicated by a dashed rectangle can be displayed on another surface of the display unit 9001. Note that as an example of the information 9051, there are displays for notifying incoming calls such as e-mail, SNS (Social Networking Service), or a telephone, the subject of an e-mail or SNS, etc., the sender name of an e-mail or SNS, etc., date and time, time, remaining battery level, radio wave intensity, etc. Or, instead of the information 9051, operation buttons 9050 or the like may be displayed at the position where the information 9051 is displayed.

[0340] The display device according to one aspect of the present invention can be applied to the mobile information terminal 9101. Thereby, a high-quality image can be displayed on the display unit 9001.

[0341] FIG. 26B is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can execute various applications such as a mobile phone, e-mail, text browsing and creation, music playback, Internet communication, and computer games. Further, the display surface of the display unit 9001 is provided in a curved shape, and display can be performed along the curved display surface. In FIG. 26B, an example is shown in which the time 9251, operation buttons 9252 (also referred to as operation icons or simply icons), and content 9253 are displayed on the display unit 9001. The content 9253 can be, for example, a video.

[0342] In addition, the mobile information terminal 9200 can execute short-range wireless communication conforming to a communication standard. For example, it can communicate hands-free by mutually communicating with a wireless communication-capable headset. Further, the mobile information terminal 9200 has a connection terminal 9006 and can directly exchange data with other information terminals via a connector. Charging can also be performed via the connection terminal 9006. Note that the charging operation may be performed by wireless power supply without using the connection terminal 9006.

[0343] The display device according to one aspect of the present invention can be applied to the mobile information terminal 9200. Thereby, a high-quality image can be displayed on the display unit 9001.

[0344] This embodiment can be implemented in appropriate combination with at least a part of other embodiments or examples described in this specification.

Explanation of Reference Numerals

[0345] 10: Display device, 20: Light-emitting element, 21: Lower electrode, 21A: Layer, 21B: Layer, 23: EL layer, 23a: EL layer, 23A: Layer, 23b: EL layer, 23B: Layer, 25: Upper electrode, 25A: Layer, 30: Gap, 31: Protective layer, 32: Protective layer, 32A: Layer, 33: Protective layer, 34: Protective layer, 35: Microlens array, 36: Protective layer, 36A: Layer, 37: Partition wall, 41: Adhesive layer, 43: Light-shielding layer, 45: Insulating layer, 47: Substrate, 49: Coloring layer, 49B: Coloring layer, 49G: Coloring layer, 49R: Coloring layer, 50: Pixel, 50B: Pixel, 50G: Pixel, 50R: Pixel, 51: Light, 61: Insulating layer, 63: Conductive layer, 65: Conductive layer, 67: Conductive layer, 69: Conductive layer, 70: Transistor, 71: Insulating layer, 80: Transistor, 81: Substrate, 82: Conductive layer, 83: Insulating layer, 85a: Low-resistance region, 85b: Low-resistance region, 86: Element isolation layer, 87: Semiconductor layer, 88: Insulating layer, 91: Sealing material, 93: Connection electrode, 95: Anisotropic conductive layer, 97: FPC, 100: Display section, 101: Scanning line drive circuit, 103: Data line drive circuit, 105: Wiring, 107: Wiring, 110: Pixel circuit, 111: Transistor, 113: Transistor, 115: Capacitance, 117: Node, 119: Node, 121: Layer, 123: Layer, 125: Layer, 131: Insulating layer, 133: Insulating layer, 135: Insulating layer, 137: Insulating layer, 140: Transistor, 150: Opening, 150A: Opening, 150B: Opening, 205: Conductor, 205a: Conductor, 205b: Conductor, 205c: Conductor, 214: Insulator, 216: Insulator, 222: Insulator, 224: Insulator, 230: Metal oxide, 230a: Metal oxide, 230b: Metal oxide, 230c: Metal oxide, 240: Conductor, 240a: Conductor, 240b: Conductor, 241: Insulator, 241a: Insulator, 241b: Insulator, 242: Conductor, 242a: Conductor, 242b: Conductor, 250: Insulator, 254: Insulator, 260: Conductor, 260a: Conductor, 260b: Conductor, 274: Insulator, 280: Insulator, 281: Insulator, 4411: Light-emitting layer, 4412: Light-emitting layer, 4413: Light-emitting layer, 4420: Layer, 4420-1: Layer, 4420-2: Layer, 4430: Layer, 4430-1: Layer, 4430-2: Layer, 8200: Head-mounted display, 8201: Mounting section, 8202: Lens, 8203: Main body, 8204: Display section, 8205: Cable, 8206: Battery8300: Head-mounted display, 8301: Housing, 8302: Display unit, 8304: Fixture, 8305: Lens, 8306: Battery, 9000: Housing, 9001: Display unit, 9003: Speaker, 9005: Operation key, 9006: Connection terminal, 9007: Sensor, 9009: Battery, 9050: Operation button, 9051: Information, 9101: Portable information terminal, 9200: Portable information terminal, 9251: Time, 9252: Operation button, 9253: Content

Claims

1. A first layer serving as a first lower electrode, a second lower electrode, and a third lower electrode, and a second layer serving as a first EL layer, a second EL layer, and a third EL layer are sequentially formed, a first opening extending in a first direction is formed in the second layer and the first layer, a third layer serving as a first upper electrode and a second upper electrode is formed on the second layer, a second opening extending in a second direction perpendicular to the first direction is formed in the third layer, the second layer, and the first layer, thereby forming a first light-emitting element having the first lower electrode, the first EL layer, and the first upper electrode, a second light-emitting element having the second lower electrode, the second EL layer, and the second upper electrode, and a third light-emitting element having the third lower electrode, the third EL layer, and the first upper electrode. A method for manufacturing a display device.

2. In Claim 1, after forming the first to third light-emitting elements, a first colored layer having a region overlapping with the first EL layer, a second colored layer having a region overlapping with the second EL layer, and a third colored layer having a region overlapping with the third EL layer are respectively formed, the first colored layer and the second colored layer have a function of transmitting light of different colors, A method for manufacturing a display device in which the first colored layer and the third colored layer have a function of transmitting light of the same color.

3. In Claim 1 or 2, after forming the first opening and before forming the third layer, a fourth layer is formed on the second layer and on the first opening, and the fourth layer on the second layer is removed to form a first protective layer in the first opening. A method for manufacturing a display device.

4. In Claim 3, after forming the second opening, a second protective layer is formed on the first upper electrode and on the second upper electrode so as to cover the second opening. A method for manufacturing a display device.

5. In any one of Claims 1 to 4, A method for manufacturing a display device having a region where the length of the second opening in the first direction is 1 μm or less.

6. In Claim 5, A method for manufacturing a display device having a region where the length of the second opening in the first direction is 100 nm or less.

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