Amplifying device
The amplification device addresses the complexity and noise issues of chopper-stabilized amplifiers by using a switch configuration that alternates between reverse and non-reverse paths, eliminating the need for high-speed control clocks and switches, thereby enhancing precision and reducing residual offset.
Patent Information
- Application Number
- JP2020217427
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-12-25
- Publication Date
- 2025-07-30
- Estimated Expiration
- 2040-12-25
AI Technical Summary
Conventional chopper-stabilized amplifiers require complex circuits and high-speed switches to generate control clocks, leading to increased circuit area and difficulty in design, and suffer from residual offset due to spike noise.
The amplification device employs a novel switch configuration that alternates between reverse and non-reverse paths using first and second chopper modulators, along with a twin-switch circuit, to modulate and demodulate signals without needing high-speed control clocks or switches, and includes a common-mode feedback circuit to maintain signal precision.
This approach results in a highly accurate amplifier that reduces residual offset and spike noise without the need for complex circuits, simplifying design and improving precision.
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Abstract
Description
Technical Field
[0001] The present invention relates to an amplification device.
Background Art
[0002] As an amplification device for amplifying small signals such as sensor signals, a chopper-stabilized amplifier shown in FIG. 16 is known. The above-described chopper-stabilized amplifier 100 includes a chopper modulator 101, an amplifier 102, and a chopper modulator 103. In the configuration shown in FIG. 16, an offset component (Voffset) and a low-frequency noise component (1 / fnoise) are generated in the amplifier 102. Therefore, the chopper modulator 101 modulates the signal component in the low-frequency band into a high-frequency band with less offset component and low-frequency noise component of the amplifier 102. The output of the chopper modulator 101 is amplified by the amplifier 102 and then input to the chopper modulator 103. The chopper modulator 103 demodulates the signal component in the output of the amplifier 102 into the low-frequency band, and modulates the offset component and the low-frequency component into the high-frequency band. Thereby, the overall offset component and low-frequency noise component of the chopper-stabilized amplifier 100 can be reduced.
[0003] In addition, as methods for reducing the offset component and the low-frequency noise component of the above-described chopper-stabilized amplifier 100, the methods described in Patent Documents 1 to 4 and Non-Patent Document 1 have been proposed.
[0004] The chopper modulators 101 and 103 constituting the above-described chopper-stabilized amplifier 100 are composed of two pairs of switches, and modulation is performed by alternately turning on these two pairs of switches. For this reason, sawtooth-shaped spike noise is generated when the switches are turned on and off. Since there is a DC component in the sawtooth-shaped spike noise, if the spike noise is large, it becomes the residual offset voltage of the chopper-stabilized amplifier 100, which may cause deterioration of the characteristics.
[0005] As a method for reducing this spike noise, the method described in Non-Patent Document 2 has been proposed. Non-Patent Document 2 describes a method in which, in the output-side chopper modulator 103, when switching the switches, all the switches are put into a non-overlap state, that is, a cut-off state, so that spike noise is not output.
[0006] However, during the non-overlap state, error charges accumulate in the parasitic capacitance connected to the input of the chopper modulator 103 due to spike noise. Therefore, when the switch of the chopper modulator 103 is turned on, there is a problem that the error charges are output as spike noise.
[0007] Therefore, as in Patent Document 5, there are methods such as discharging the error charges accumulated in the parasitic capacitance while the chopper modulator 103 is in the non-overlap state by turning on a discharge switch.
Prior Art Documents
Patent Documents
[0008]
Patent Document 1
Patent Document 2
Patent Document 3
Patent Document 4
Patent Document 5
Non-Patent Documents
[0009]
Non-Patent Document 1
[0010] In the above-described conventional method, in order to control the discharge switch, the chopper modulator 103 needs to generate a clock that is turned on only for a short period in a non-overlapping state. However, since the non-overlapping state is relatively short, a complex circuit for generating a high-speed control clock and a switch that responds to the high-speed control clock are required, which increases the circuit area and makes the circuit design difficult.
[0011] The present invention has been made in view of the above circumstances, and an object thereof is to provide a high-precision amplification device that does not require a complex circuit for generating a high-speed control clock or a high-speed switch and reduces the residual offset due to spike noise with higher precision. [Means for Solving the Problems]
[0012] In order to achieve the above object, the amplification device according to the present invention is characterized by the following [1] to [8].[[]END]] [1] A first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, and turning off the first switch and the second switch, and turning on the third switch and the fourth switch to form a reverse path where the input and output are reversely connected, and turning off the third switch and the fourth switch, and turning on the first switch and the second switch to form a non-reverse path where the input and output are non-reversely connected, and alternately switching between the reverse path and the non-reverse path to modulate an input signal into a high-frequency band, a first chopper modulator; An amplifier for amplifying the output of the first chopper modulator; A fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, and turning off the fifth switch and the sixth switch, and turning on the seventh switch and the eighth switch to form a reverse path where the input and output are reversely connected, and turning off the seventh switch and the eighth switch, and turning on the fifth switch and the sixth switch to form a non-reverse path where the input and output are non-reversely connected, and alternately switching between the reverse path and the non-reverse path to demodulate The input signal modulated by the first chopper modulator and amplified by the amplifier part of the output of the amplifier, of the amplifier and a second chopper modulator for modulating an offset component and a low-frequency noise component into a high-frequency band, are provided. When switching between the reverse path and the non-reverse path, the first chopper modulator controls all of the first switch to the fourth switch to be turned off , disconnect the connection between the first positive input and the first positive output and the first negative output, and disconnect the connection between the first negative input and the first positive output and the first negative output and be in a non-overlap state where they are in an open state. When switching between the reverse path and the non-reverse path, the second chopper modulator controls all of the fifth switch to the eighth switch to be turned on , short-circuit the second positive input and the second positive output and the second negative output, and short-circuit the second negative input and the second positive output and the second negative output and be in an overlap state where they are in a short-circuit state. When the first chopper modulator is in the non-overlap state, the second chopper modulator is in the overlap state, which is an amplification device. [2] The amplification device according to [1], further comprising a A third positive input is connected to the second positive output, and a third negative input is connected to the second negative output twin-switch circuit of the second chopper modulator, wherein the twin-switch circuit the comprises a ninth switch and a tenth switch connected in parallel between a third positive-side input and a third positive-side output, and an eleventh switch and a twelfth switch connected in parallel between a third negative-side input and a third negative-side output, and when turning on the ninth switch and the eleventh switch and turning off the tenth switch and the twelfth switch to form a first path with non-inverting connection of input and output, and turning on the tenth switch and the twelfth switch and turning off the ninth switch and the eleventh switch to form a second path with non-inverting connection of input and output, all of the ninth to twelfth switches are turned off to the be controlled to a non-overlap state in which it is in an open state, Disconnect the connection between the third positive input and the third positive output, and disconnect the connection between the third negative input and the third negative output and when the second chopper modulator is in the overlap state, the twin-switch circuit is in the non-overlap state, which is an amplification device. [3] [3] The amplification device according to [1] or [2], further comprising a clock supply unit that supplies an overlap clock for periodically transitioning the second chopper modulator in the order of an inversion state in which the inversion path is connected and the non-inversion path is disconnected, the overlap state, a non-inversion state in which the non-inversion path is connected and the inversion path is disconnected, and the overlap state, to the fifth to eighth switches, which is an amplification device. [4] The amplification device according to [2], A clock supply unit that supplies a non-overlap clock for periodically transitioning the twin switch circuit in the order of a first path state in which the first path is connected and the second path is disconnected, the non-overlap state, a second path state in which the second path is connected and the first path is disconnected, and the non-overlap state. It is an amplification device. [5] A first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, turning off the first switch and the second switch, turning on the third switch and the fourth switch to form a reverse path with the input and output reversely connected, and turning off the third switch and the fourth switch, turning on the first switch and the second switch to form a non-reverse path with the input and output non-reversely connected, and alternately switching between them to modulate an input signal in a high-frequency band. An amplifier that amplifies the output of the first chopper modulator. A fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, turning off the fifth switch and the sixth switch, turning on the seventh switch and the eighth switch to form a reverse path with the input and output reversely connected, and turning off the seventh switch and the eighth switch, turning on the fifth switch and the sixth switch to form a non-reverse path with the input and output non-reversely connected, and alternately switching between them to demodulate The input signal modulated by the first chopper modulator and amplified by the amplifier and of the amplifier a second chopper modulator that modulates an offset component and a low-frequency noise component into a high-frequency band. When switching between the inversion path and the non-inversion path, the first chopper modulator controls all of the first to fourth switches to be turned off and , disconnect the connection between the first positive input and the first positive output and the first negative output, and disconnect the connection between the first negative input and the first positive output and the first negative output to be in a non-overlap state where they are in an open state, When switching between the inversion path and the non-inversion path, the second chopper modulator controls all of the fifth to eighth switches to be turned on and , short-circuit the second positive input and the second positive output and the second negative output, and short-circuit the second negative input and the second positive output and the second negative output to be in an overlap state where they are in a short-circuit state, After the second chopper modulator enters the overlap state, the first chopper modulator enters the non-overlap state, which is an amplification device. [6] An amplification device according to [2], wherein a clock supply unit supplies an overlap clock for periodically transitioning the second chopper modulator in the order of an inversion state in which the inversion path is connected and the non-inversion path is disconnected, the overlap state, a non-inversion state in which the non-inversion path is connected and the inversion path is disconnected, and the overlap state, to the fifth to eighth switches, and a NOT circuit to which the overlap clock supplied from the clock supply unit is input, wherein the NOT circuit outputs a non-overlap clock obtained by inverting the input overlap clock, and supplies the non-overlap clock output from the NOT circuit to the ninth to twelfth switches, which is an amplification device. [7] An amplification device according to [4], comprising a NOT circuit to which the non-overlap clock supplied from the clock supply unit is input, wherein the NOT circuit outputs an overlap clock obtained by inverting the input non-overlap clock, and supplies the overlap clock output from the NOT circuit to the fifth to eighth switches, which is an amplification device. [8] An amplifier device according to any one of [1] to [7], comprising a common-mode feedback circuit that detects an in-phase signal from the output of the second chopper modulator and supplies a feedback signal that maintains the in-phase signal at a reference value to the output of the amplifier. It is an amplifier device.
Effect of the Invention
[0013] According to the present invention, it is possible to provide a highly accurate amplifier device that does not require a complex circuit for generating a high-speed control clock or a high-speed switch and reduces the residual offset due to spike noise with higher accuracy.
[0014] The present invention has been briefly described above. Further, the details of the present invention will be further clarified by reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments") with reference to the accompanying drawings.
Brief Description of the Drawings
[0015]
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DETAILED DESCRIPTION OF THE INVENTION
[0016] Specific embodiments of the present invention will be described below with reference to the respective figures.
[0017] (First Embodiment) Figs. 1 to 3 are diagrams showing the configuration of the amplification device according to the first embodiment. The amplification device 1A according to the first embodiment includes a chopper modulator (first chopper modulator) 2 that modulates an input signal Vin input through an input terminal to a high frequency band, and a mutual conductance amplifier 3 (amplifier) that amplifies the output of the chopper modulator 2. Further, the amplification device 1A includes a chopper modulator (second chopper modulator) 4 that demodulates the signal component of the output of the mutual conductance amplifier 3 to a low frequency band and modulates an offset component and a low frequency noise component to a high frequency band. Further, the amplification device 1A includes a twin switch circuit 5 for preventing a short circuit at the output terminal. The output of the twin switch circuit 5 serves as the output terminal of the amplification device 1A, and an output signal Vout is output.
[0018] The chopper modulator 2 is provided between the input terminal of the amplification device 1A and the input of the mutual conductance amplifier 3. The chopper modulator 4 is provided between the output of the mutual conductance amplifier 3 and the input of the twin switch circuit 5. The twin switch circuit 5 is provided between the output of the chopper modulator 4 and the output terminal of the amplification device 1A. The chopper modulator 2 has switches S11 to S14 (first switches ~Fourth switch ). The chopper modulator 4 has switches S21 to S24 (second 5 switches ~Eighth switch ).
[0019] The switches S11 and S21 are connected between the positive input and the positive output of the chopper modulators 2 and 4. The switches S12 and S22 are connected between the negative input and the negative output of the chopper modulators 2 and 4. The switches S13 and S23 are connected between the negative input and the positive output of the chopper modulators 2 and 4. The switches S14 and S24 are connected between the positive input and the negative output of the chopper modulators 2 and 4.
[0020] According to the above configuration, when the chopper modulator 2 turns off switches S11 and S12 and turns on switches S13 and S14, it is switched to an inversion path where the input and output are inversely connected. Also, when switches S11 and S12 are turned on and switches S13 and S14 are turned off, it is switched to a non-inversion path where the input and output are non-inversely connected. That is, the chopper modulator 2 can switch between the inversion path and the non-inversion path by turning on and off switches S11 to S14.
[0021] Further, when the chopper modulator 4 turns off switches S21 and S22 and turns on switches S23 and S24, it is switched to an inversion path where the input and output are inversely connected. Also, when switches S21 and S22 are turned on and switches S23 and S24 are turned off, it becomes a non-inversion path where the input and output are non-inversely connected. That is, the chopper modulator 4 can switch between the inversion path and the non-inversion path by turning on and off switches S21 to S24.
[0022] The twin-switch circuit 5 includes switches S31 to S34 (Ninth switch to twelfth switch) Switches S31 and S33 are connected in parallel between the positive input and the positive output of the twin-switch circuit 5. Switches S32 and S34 are connected in parallel between the negative input and the negative output of the twin-switch circuit 5. When the twin-switch circuit 5 turns on switches S31 and S32 and turns off switches S33 and S34, it is switched to a first path where the input and output are non-inversely connected. Also, when switches S31 and S32 are turned off and switches S33 and S34 are turned on, it is switched to a second path different from the first path where the input and output are non-inversely connected. That is, the twin-switch circuit 5 can switch between the first path and the second path by turning on and off switches S31 to S34.
[0023] Next, the operation of the amplifier device 1A with the above-described configuration will be described with reference to FIG. 4. The chopping signals φ1 are supplied to the switches S11 and S12 of the chopper modulator 2, and the chopping signals φ2 are supplied to the switches S13 and S14. The chopping signals φ1 and φ2 alternately turn on the switches S11 and S12 and the switches S13 and S14, alternately switching between the inverting path and the non-inverting path. Thereby, the chopper modulator 2 modulates the input signal Vin to a high frequency at the chopping frequency fc, which is the frequency of the chopping signals φ1 and φ2.
[0024] The chopping signals φ3 are supplied to the switches S21 and S22 of the chopper modulator 4, and the chopping signals φ4 are supplied to the switches S23 and S24. The chopping signals φ3 and φ4 alternately turn on the switches S21 and S22 and the switches S23 and S24, alternately switching between the inverting path and the non-inverting path. Thereby, the chopper modulator 4 demodulates the amplified input signal Vin, which is the output of the mutual conductance amplifier 3, to the original frequency with the chopping signals φ3 and φ4, and modulates the offset component and the low-frequency noise component of the mutual conductance amplifier 3 to the high-frequency band.
[0025] The chopping signal φ5 is supplied to the switches S31 and S32 of the twin-switch circuit 5, and the chopping signal φ6 is supplied to the switches S33 and S34. The chopping signals φ5 and φ6 alternately turn on the switches S31 and S32 and the switches S33 and S34.
[0026] The above-mentioned chopping signals φ1 and φ2 are composed of non-overlapping clocks. The non-overlapping clocks that make up the chopping signals φ1 and φ2 are clocks that control the non-overlapping state St1 in which all switches S11 to S14 are once turned off to release the input and output when switching the switches S11 to S14. More specifically, the non-overlapping clocks supplied to the chopper modulator 2 are, as shown in FIG. 4, the inverted state St3 in which the inverted path is connected and the non-inverted path is disconnected, the non-overlapping state St1, the non-inverted state St2 in which the non-inverted path is connected and the inverted path is disconnected, and the non-overlapping state St1, and are composed of a pair of clocks that periodically transition in this order.
[0027] The chopping signals φ5 and φ6 are also composed of non-overlapping clocks similar to the chopping signals φ1 and φ2. The non-overlapping clocks that make up the chopping signals φ5 and φ6 are clocks that control the non-overlapping state St1 in which all switches S31 to S34 are once turned off to release the input and output when switching the switches S31 to S34. More specifically, the non-overlapping clocks supplied to the twin-switch circuit 5 are the first path state St5 in which the first path is connected and the second path is disconnected, the non-overlapping state St1, the second path state St4 in which the second path is connected and the first path is disconnected, and the non-overlapping state St1, and are composed of a pair of clocks that periodically transition in this order.
[0028] The above-mentioned chopping signals φ3 and φ4 are composed of overlapping clocks. The overlapping clocks are once all switches S 2 1 to S 2It is a clock that controls to the overlapping state St6 where 4 is turned on and the positive and negative electrodes of the input / output are in a short-circuited state. More specifically, as shown in FIG. 4, the overlapping clock is a pair of clocks that periodically transition in the order of the inverted state St3 in which the inverted path is connected and the non-inverted path is disconnected, the overlapping state St6, the non-inverted state St2 in which the non-inverted path is connected and the inverted path is disconnected, and the overlapping state St6. Further, when the chopping signals φ1 and φ2 are in the non-overlapping state St1, the chopping signals φ3 and φ4 are in the overlapping state St6.
[0029] Next, the operations when the above-described chopping signals φ1 to φ6 are supplied to the switches S11 to S14, S21 to S24, and S31 to S34 of the chopper modulators 2 and 4 and the twin-switch circuit 5 will be described with reference to FIGS. 1 to 3. When the chopper modulators 2 and the twin-switch circuit 5 are in the non-overlapping state St1, as shown in FIG. 1, the amplifier device 1A is in a non-path state separated from the input terminal and the output terminal. At this time, the signal components before the non-overlapping state St1 are accumulated in the parasitic capacitance Cp. Further, spike noises accompanying the on / off of the switches S11 to S14 are accumulated in the parasitic capacitance Cp through the mutual conductance amplifier 3. However, since the chopper modulator 4 is in the overlapping state St6, the charges causing the spike noises accumulated in the parasitic capacitance Cp are discharged.
[0030] When the non-overlapping state St1 ends, the amplifier device 1A enters the in-phase operation state shown in FIG. 2. That is, the chopper modulators 2 and 4 are switched to the non-inverted path, and the twin-switch circuit 5 is switched to the first path. Next, the amplifier device 1A again enters the non-path state shown in FIG. 1, and then enters the anti-phase operation state shown in FIG. 3. That is, the chopper modulators 2 and 4 are switched to the inverted path, and the twin-switch circuit 5 is switched to the second path. The state of the amplifier device 1A repeats in the order of the non-path state, the in-phase state, the non-path state, and the anti-phase state.
[0031] According to the above-described embodiment, since the chopper modulator 4 discharges the parasitic capacitance Cp in the non-path state, even if it is subsequently switched to the first path state or the second path state, the charge accumulated in the parasitic capacitance Cp has already been discharged. As a result, it is possible to suppress the appearance of spike noise in the output signal Vout. Further, in order to discharge the parasitic capacitance Cp, it is not necessary to provide a switch that is turned on only during a very short non-overlap state St1, and a high-speed operating switch is not required, making the circuit design easy.
[0032] Also, according to the above-described embodiment, a twin-switch circuit 5 that becomes the non-overlap state St1 when the chopper modulator 4 is in the overlap state St6 is provided. Thereby, even when the chopper modulator 4 is in the overlap state St6, the output terminal is disconnected by the twin-switch circuit 5, so that it is possible to prevent the positive and negative electrodes of the output terminal from short-circuiting.
[0033] The chopping signals φ1, φ2, φ5, φ6 composed of the above-described non-overlap clock are generated by a clock generation circuit 6 (clock supply unit) shown in FIG. 5. The chopping signals φ3, φ4 that are overlap clocks are generated by inverting the non-overlap clock generated by this clock generation circuit 6 with a NOT circuit 7.
[0034] Also, as shown in FIG. 6, the chopping signals φ3, φ4 that are overlap clocks may be generated by a clock generation circuit 8 (clock supply unit). In this case, the chopping signals φ1, φ2, φ5, φ6 that are overlap clocks are generated by inverting the overlap clock generated by the clock generation circuit 8 with a NOT circuit 9.
[0035] As shown in FIGS. 5 and 6, in order to generate a chopping signal supplied to switches S11 to S14 and S31 to S34 of the chopper modulator 2 and the twin-switch circuit 5 from one NOT circuit 7 for the chopping signal supplied to S21 to S24 of the chopper modulator 4, or in order to generate a chopping signal supplied to switches S11 to S14 and S31 to S34 of the chopper modulator 2 and the twin-switch circuit 5 from one NOT circuit 9 for the chopping signal supplied to S21 to S24 of the chopper modulator 4, the on / off switching of switches S11 to S14, S21 to S24, and S31 to S34 occurs at substantially the same timing.
[0036] (Modification of the First Embodiment) Next, a modification of the first embodiment will be described. In the first embodiment, the period during which the chopper modulator 2 and the twin-switch circuit 5 are in the non-overlap state St1 and the period during which the chopper modulator 4 is in the overlap state St6 are the same, but this is not the only case. By supplying chopping signals φ1 to φ6 as shown in FIG. 7, after first setting the chopper modulator 4 to the overlap state St6 and the twin-switch circuit 5 to the non-overlap state St1, the chopper modulator 2 may be set to the non-overlap state St1. As a result, when turning on and off switches S11 to S14 of the chopper modulator 2, the chopper modulator 4 is already in the overlap state St6 and the twin-switch circuit 5 is in the non-overlap state St6. Therefore, it is possible to further suppress the appearance of spike noise associated with the on / off of switches S11 to S14 at the output terminal.
[0037] (Second Embodiment) Next, the second embodiment will be described. FIG. 8 is a diagram showing the configuration of the amplifier device according to the second embodiment. In FIG. 8, parts equivalent to those of the amplifier device 1A shown in FIG. 1 already described in the above-described first embodiment are denoted by the same reference numerals, and detailed descriptions thereof are omitted.
[0038] The amplification device 1B may include a common-mode feedback circuit 10. The common-mode feedback circuit 10 detects an in-phase signal from the output of the chopper modulator 4, generates a feedback signal that maintains the detected in-phase signal at a reference value Vcm, and supplies it to the output of the mutual conductance amplifier 3. By providing the common-mode feedback circuit 10, the parasitic capacitance Cp of the input of the chopper modulator 4 can be reduced. Also, since the chopper modulator 4 operates with an overlap clock, it is possible to eliminate the timing at which the connection of the in-phase feedback loop of the common-mode feedback circuit 10 is interrupted.
[0039] Furthermore, the amplification device 1B may include an amplifier 11A. The amplifier 11A amplifies the signal component output from the twin-switch circuit 5. In the second embodiment, the output of the amplifier 11A becomes the output terminal of the amplification device 1B, and the output signal Vout is output. The amplifier 11A includes a mutual conductance amplifier 111, an amplifier 112, and a phase compensation circuit 113 that performs phase compensation for the amplifiers 111 and 112. The input of the amplifier 112 is connected to the output of the mutual conductance amplifier 111, and the output of the amplifier 112 becomes the output of the amplifier 11A, that is, the output terminal of the amplification device 1B.
[0040] The phase compensation circuit 113 is composed of resistors R3, R4, and capacitors Cc1 to Cc3. The resistors R3 and R4 are connected between the output of the twin-switch circuit 5 and the input of the mutual conductance amplifier 111. The capacitor Cc1 is connected between the input and output of the amplifier 112. The capacitor Cc2 is connected between the inverting input of the mutual conductance amplifier 111 and the output of the amplifier 112. The capacitor Cc3 is connected between the non-inverting input of the mutual conductance amplifier 111 and the ground.
[0041] As described above, when the offset component and the low-frequency noise component shown by the dotted line in FIG. 9(B) are modulated to the high-frequency band by the chopper modulator 4, ripple noise shown by the dotted line in FIG. 9(C) is generated. According to the phase compensation circuit 113, since a low-pass filter is constituted by the resistors R3 and R4 and the capacitors Cc1 and Cc2, the ripple noise of the output signal Vin can be reduced as shown by the solid line in FIG. 9(C).
[0042] Further, a mutual conductance amplifier 13 functioning as a feed-forward amplifier may be connected between the output of the mutual conductance amplifier 111 and the input of the amplifier 112.
[0043] Further, the amplification device 1B may include a noise reduction loop circuit 12. The input and output of the noise reduction loop circuit 12 are connected between the mutual conductance amplifier 3 and the chopper modulator 4. The noise reduction loop circuit 12 extracts the offset component of the mutual conductance amplifier 3 and negatively feeds back the extracted offset component to the output of the mutual conductance amplifier 3, as described in, for example, Japanese Patent Application Laid-Open No. 2020-145545. By this noise reduction loop circuit 12, the offset component and the low-frequency noise component generated in the mutual conductance amplifier 3 can be reduced, and the ripple noise included in the output of the chopper modulator 4 can be reduced (see FIGS. 9(B) and 9(C)).
[0044] In the present embodiment, the noise reduction loop circuit 12 has a configuration including an auto-zero amplifier 121 that amplifies the input of the noise reduction loop circuit 12, a filter circuit 122 that reduces the high-frequency signal component of the output of the auto-zero amplifier 121, and a mutual conductance amplifier 123 that amplifies the output of the filter circuit 122, as described in the above publication, for example.
[0045] The auto-zero amplifier 121 is configured using, for example, a ping-pong auto-zero amplifier. The auto-zero amplifier 121 is configured to include two auto-zero amplifier circuits 121A and 121B connected in parallel. Each of the auto-zero amplifier circuits 121A and 121B has a calibration mode and an amplification mode as operation modes. In the calibration mode, a calibration voltage for reducing the offset component and the low-frequency noise component of the built-in amplifier is sampled by a sampling capacitor (not shown). In the amplification mode, the input signal is amplified by an amplifier whose offset component and low-frequency noise component have been reduced by the calibration voltage. The two auto-zero amplifier circuits 121A and 121B can always perform amplification by setting one of them to the calibration mode and the other to the amplification mode and alternately switching between them.
[0046] The filter circuit 122 has a function of amplifying the low-frequency signal component of the output of the auto-zero amplifier 121 and reducing the high-frequency signal component. By the filter circuit 122, the high-frequency signal component can be reduced and the offset component of the amplifier can be fed back.
[0047] Next, the inventors measured the input offset voltage for a conventional amplification device that supplies non-overlapping clocks to the chopper modulators 2 and 4, excluding the twin-switch circuit 5, from the second embodiment shown in FIG. 8, and the amplification device 1B of the second embodiment shown in FIG. 8. The results are shown in FIGS. 10 and 11. FIG. 10 is a histogram when the input offset voltage of the conventional amplification device was measured 200 times. FIG. 11 is a histogram when the input offset voltage of the amplification device 1B of the second embodiment shown in FIG. 8 was measured 200 times. As is clear from a comparison between FIG. 10 and FIG. 11, the amplification device 1B of the second embodiment can reduce the offset component more than the conventional amplification device.
[0048] (Third Embodiment) Next, the third embodiment will be described. FIG. 12 is a diagram showing the configuration of the amplifier device according to the third embodiment. In FIG. 12, the same reference numerals are given to the parts equivalent to the amplifier device shown in FIG. 8 already described in the above-described second embodiment, and the detailed description thereof will be omitted.
[0049] The amplifier device 1C may include a ripple correction circuit 14 instead of the noise reduction loop circuit 12. The ripple correction circuit 14 has an input connected to the output of the chopper modulator 4 and an output connected to the input of the chopper modulator 4. The ripple correction circuit 14 is a circuit that extracts a high-frequency noise component (ripple noise) from the output of the chopper modulator 4, modulates the extracted ripple noise into an offset component, and negatively feeds back the modulated offset component to the output of the chopper modulator 3. By the ripple correction circuit 14, the offset component included in the output of the chopper modulator 3 can be reduced, and the ripple noise included in the output of the chopper modulator 4 can be reduced (see FIGS. 9(B) and (C)).
[0050] In the present embodiment, the ripple correction circuit 14 includes a high-pass filter 141 that reduces the low-frequency noise component input to the ripple correction circuit 14 and detects ripple noise, a phase-inverting auto-zero amplifier 142 that demodulates the ripple noise output from the high-pass filter 141 into a low-frequency component and modulates it into an offset component, a filter circuit 143 that reduces the high-frequency component of the output of the phase-inverting auto-zero amplifier 142, and a mutual conductance amplifier 144 that amplifies the output of the filter circuit 143.
[0051] The inverting auto-zero amplifier 142 is configured using, for example, a Ping-Pong auto-zero amplifier. The inverting auto-zero amplifier 142 is configured to have two auto-zero amplifier circuits 142A and 142B connected in parallel. The auto-zero amplifier circuit 142A amplifies the input in an inverting manner. The auto-zero amplifier circuit 142B amplifies the input in a non-inverting manner. Each of the auto-zero amplifier circuits 142A and 142B has a calibration mode and an amplification mode as operating modes. In the calibration mode, a calibration voltage for reducing the offset component and low-frequency noise component of the built-in amplifier is sampled by a sampling capacitor (not shown). In the amplification mode, the signal input by the amplifier with the offset component and low-frequency noise component reduced by the calibration voltage is amplified. The two auto-zero amplifier circuits 142A and 142B can always perform amplification by setting one in the calibration mode and the other in the amplification mode and switching between them alternately. Also, when the calibration mode and the amplification mode are switched alternately, the inverting auto-zero amplifier 142 alternately switches between inverting amplification and non-inverting amplification. Thereby, the inverting auto-zero amplifier 142 can modulate the input ripple noise into a low-frequency offset component.
[0052] The filter circuit 143 has a function of amplifying the low-frequency signal component of the output of the inverting auto-zero amplifier 142 and reducing the high-frequency signal component.
[0053] (Fourth Embodiment) Next, the fourth embodiment will be described. FIG. 13 is a diagram showing the configuration of the amplification device according to the fourth embodiment. In FIG. 13, parts equivalent to those of the amplification device shown in FIG. 12 already described in the above-described third embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
[0054] In the third embodiment, the input of the ripple correction circuit 14 was connected to the output of the chopper modulator 4, but as shown in FIG. 13, the input may be connected to the output of the twin-switch circuit 5. Thereby, the ripple correction circuit 14 performs negative feedback on the output of the twin-switch circuit 5 to reduce the high-frequency noise component included in the output of the twin-switch circuit 5.
[0055] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. In addition, the material, shape, dimensions, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.
[0056] For example, the amplifier 11A in the output stage shown in the second to fourth embodiments described above was composed of the transconductance amplifier 111 and the amplifier 112, but it is not limited to this. For example, as shown in FIG. 14, an amplifier 11B composed of two transconductance amplifiers 114 and 115 may be provided. In the example shown in FIG. 14, the phase compensation circuit 116 is composed of two capacitors Cc4 and Cc5. The capacitor Cc4 is connected between the inverting input and the positive output of the transconductance amplifier 114. The capacitor Cc5 is connected between the non-inverting input and the negative output of the transconductance amplifier 114.
[0057] Also, as shown in FIG. 15, a Ping-Pong auto-zero amplifier 11C composed of two auto-zero amplifiers 117A and 117B may be provided instead of the amplifier 11A.
[0058] Further, according to the above-described embodiment, the twin switch circuit 5 was provided, but it is not limited to this. If there is no problem with the short circuit at the output terminal, the twin switch circuit 5 does not need to be provided.
Explanation of Reference Numerals
[0059] 1A to 1C Amplifying device 2 Chopper modulator (first chopper modulator) 3 Transconductance amplifier (amplifier) 4 Chopper modulator (second chopper modulator) 5 Twin switch circuit 6, 8 Clock generation circuit (clock supply unit) 7, 9 NOT circuit 10 Common mode feedback circuit S11 switch (first switch) S12 switch (second switch) S13 switch (third switch) S14 switch (fourth switch) S21 switch (fifth switch) S22 switch (sixth switch) S23 switch (seventh switch) S24 switch (eighth switch) S31 switch (ninth switch) S32 switch (eleventh switch) S33 switch (tenth switch) S34 switch (twelfth switch)
Claims
1. A first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output. The first switch and the second switch are turned off, the third switch and the fourth switch are turned on to form a reverse path where the input and output are reversely connected, and the third switch and the fourth switch are turned off, the first switch and the second switch are turned on to form a non-reverse path where the input and output are non-reversely connected. A first chopper modulator that alternately switches between these paths to modulate an input signal in a high-frequency band. An amplifier that amplifies the output of the first chopper modulator. A fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output. The fifth switch and the sixth switch are turned off, the seventh switch and the eighth switch are turned on to form a reverse path where the input and output are reversely connected, and the seventh switch and the eighth switch are turned off, the fifth switch and the sixth switch are turned on to form a non-reverse path where the input and output are non-reversely connected. A second chopper modulator that alternately switches between these paths to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier among the outputs of the amplifier, and modulate the offset component and low-frequency noise component of the amplifier in the high-frequency band. When switching between the reverse path and the non-reverse path, the first chopper modulator controls to a non-overlap state where all of the first switch to the fourth switch are turned off, disconnecting the connection between the first positive input and the first positive output and the first negative output, and disconnecting the connection between the first negative input and the first positive output and the first negative output to be in an open state. When switching between the inverting path and the non-inverting path, the second chopper modulator controls to an overlap state in which all of the fifth to eighth switches are turned on to short-circuit the second positive input, the second positive output, and the second negative output, and to short-circuit the second negative input, the second positive output, and the second negative output, The second chopper modulator is in the overlap state when the first chopper modulator is in the non-overlap state, Amplifier.
2. The amplifier according to claim 1, further comprising a twin-switch circuit in which a third positive input is connected to the second positive output of the second chopper modulator and a third negative input is connected to the second negative output of the second chopper modulator, The twin-switch circuit has a ninth switch and a tenth switch connected in parallel between the third positive input and the third positive output, and an eleventh switch and a twelfth switch connected in parallel between the third negative input and the third negative output. When switching between a first path with the ninth switch and the eleventh switch turned on, the tenth switch and the twelfth switch turned off, and non-inverting connection of input and output, and a second path with the tenth switch and the twelfth switch turned on, the ninth switch and the eleventh switch turned off, and non-inverting connection of input and output, all of the ninth to twelfth switches are turned off to disconnect the third positive input from the third positive output and to disconnect the third negative input from the third negative output, and the twin-switch circuit is controlled to a non-overlap state in an open state, The twin-switch circuit is in the non-overlap state when the second chopper modulator is in the overlap state, Amplifier.
3. The amplifier according to claim 1 or 2, further comprising a clock supply unit that supplies an overlap clock for periodically transitioning the second chopper modulator in the order of an inverting state in which the inverting path is connected and the non-inverting path is disconnected, the overlap state, a non-inverting state in which the non-inverting path is connected and the inverting path is disconnected, and the overlap state to the fifth to eighth switches, Amplifier.
4. The amplification device according to claim 2, wherein the twin switch circuit is supplied with a non-overlap clock that periodically transitions in the order of a first path state in which the first path is connected and the second path is disconnected, the non-overlap state, a second path state in which the second path is connected and the first path is disconnected, and the non-overlap state, to the ninth switch to the twelfth switch, an amplification device.
5. a first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, and turning off the first switch and the second switch and turning on the third switch and the fourth switch to form a reverse path in which the input and output are reversely connected, and turning off the third switch and the fourth switch and turning on the first switch and the second switch to form a non-reverse path in which the input and output are non-reversely connected, and alternately switching between them to modulate an input signal in a high-frequency band, a first chopper modulator; an amplifier that amplifies the output of the first chopper modulator; a fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, and turning off the fifth switch and the sixth switch and turning on the seventh switch and the eighth switch to form a reverse path in which the input and output are reversely connected, and turning off the seventh switch and the eighth switch and turning on the fifth switch and the sixth switch to form a non-reverse path in which the input and output are non-reversely connected, and alternately switching between them to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier among the outputs of the amplifier, and modulate the offset component and the low-frequency noise component of the amplifier in a high-frequency band, a second chopper modulator, When switching between the inversion path and the non-inversion path, the first chopper modulator controls to turn off all of the first to fourth switches, disconnect the connection between the first positive-side input and the first positive-side output and the first negative-side output, and disconnect the connection between the first negative-side input and the first positive-side output and the first negative-side output to be in a non-overlap state where they are open. When switching between the inversion path and the non-inversion path, the second chopper modulator controls to turn on all of the fifth to eighth switches, short-circuit the second positive-side input and the second positive-side output and the second negative-side output, and short-circuit the second negative-side input and the second positive-side output and the second negative-side output to be in an overlap state where they are short-circuited. After the second chopper modulator enters the overlap state, the first chopper modulator enters the non-overlap state. Amplifying device.
6. The amplifying device according to claim 2, a clock supply unit that supplies an overlap clock that periodically transitions the second chopper modulator in the order of an inversion state in which the inversion path is connected and the non-inversion path is disconnected, the overlap state, a non-inversion state in which the non-inversion path is connected and the inversion path is disconnected, and the overlap state, to the fifth to eighth switches; a NOT circuit to which the overlap clock supplied from the clock supply unit is input; The NOT circuit outputs a non-overlap clock obtained by inverting the input overlap clock. The non-overlap clock output from the NOT circuit is supplied to the ninth to twelfth switches. Amplifying device.
7. The amplifying device according to claim 4, comprising a NOT circuit to which the non-overlap clock supplied from the clock supply unit is input; The NOT circuit outputs an overlap clock obtained by inverting the input non-overlap clock. The overlap clock output from the NOT circuit is supplied to the fifth to eighth switches. Amplifying device.
8. The amplifying device according to any one of claims 1 to 7, A common mode feedback circuit that detects an in-phase signal from the output of the second chopper modulator and supplies a feedback signal that maintains the in-phase signal at a reference value to the output of the amplifier. Amplifying device.
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