Power supply device

The power supply device addresses high power consumption in low power modes by using a bipolar transistor in the startup circuit, reducing base current and enhancing operational stability, achieving up to 50% power savings and compact design.

JP7715741B2Active Publication Date: 2025-07-30PANASONIC ENERGY CO LTD
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Patent Information

Application Number
JP2022578292
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-01-27
Filing Date
2022-01-20
Publication Date
2025-07-30
Estimated Expiration
2042-01-20

AI Technical Summary

Technical Problem

Existing power supply devices with battery connection circuits face high power consumption in low power consumption modes due to inefficiencies in startup circuits, particularly when using FETs, which lead to increased contact currents and voltage drops, affecting operational stability and efficiency.

Method used

The power supply device employs a bipolar transistor in the startup circuit, reducing power consumption by minimizing base current through current amplification, and using a normally-off manual switch to manage the transistor's state, thereby reducing power wastage in low power modes.

Benefits of technology

The solution significantly reduces power consumption by up to 50% in low power modes by minimizing base current and maintaining operational stability, while also allowing for compact design with lower breakdown voltage components.

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Abstract

The present invention reduces the power consumption of an activation circuit in a low power consumption mode, to thereby further reduce the power consumption in this state. This power supply device comprises: a battery module (10) having a plurality of battery cells (1) that can be charged; a battery connection circuit (2) which is formed by being connected to the battery module (10) and which has a switching function for a low power consumption mode; an activation circuit (3) that activates the battery connection circuit (2); and an activation switch (4) which is connected to the activation circuit (3) and which outputs an activation signal. The activation circuit (3) is provided with: an input transistor (5) which is connected to the activation switch (4) between a base and an emitter and which is switched to an off state by an on signal from the activation switch (4); and an FET output circuit (6) which is connected to the output side of the input transistor (5) and which outputs an activation signal to the battery connection circuit (2) in a low power consumption state by the input transistor (5) switched from on to off.
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Description

Technical Field

[0001] The present invention relates to a power supply device including a battery module composed of a plurality of battery cells, and particularly to a power supply device in which a battery connection circuit capable of switching to a low power consumption mode is connected to the battery module.

Background Art

[0002] A power supply device in which a plurality of battery cells are connected in series or in parallel detects the state of each battery cell and controls the charging current and the discharging current to protect the battery cells. This power supply device includes a battery connection circuit that detects the voltage, temperature, and current of the battery cells constituting the battery module, and controls the charging and discharging of the battery module by performing arithmetic processing on the detected signals. In order to prevent over-discharge of the battery, this power supply device switches to a low power consumption mode, for example, a shutdown state, in which the power consumption of the battery connection circuit is minimized when the device is not in use. This power supply device requires a startup circuit that restarts the battery connection circuit in the low power consumption mode and switches it to the operating mode.

[0003] The startup circuit can have a circuit configuration that outputs a startup signal by pressing a push button of a manual operation switch, as disclosed in Patent Document 1, for example. This startup circuit connects a switch between the power supply circuit and the ground line via a current limiting resistor, and outputs a startup signal with an on signal from the switch. However, since this startup circuit of this circuit configuration outputs a startup signal from the connection point between the load resistor and the switch by switching the switch from off to on, a contact current flows through the switch via the load resistor in the on state, and a voltage between the contacts rises to the power supply voltage in the off state, which causes an adverse effect. This adverse effect can be eliminated by a circuit configuration in which the switch is connected to the gate of the FET, the gate voltage of the FET is controlled by turning the switch on and off, and the FET is turned on and off by the switch.

[0004] Specifically, as shown in FIG. 2, the start switch 94 can be connected between the gate of the input FET 95 and the ground line 99 to realize a circuit configuration for switching the input FET 95 on and off with the start switch 94. A normally-off manual switch that is mainly on when the push button is pressed and off when not pressed is used for the start switch 94. The start switch 94 is turned on when the user presses the push button at the timing of starting the battery connection circuit 92 in the low power consumption mode. When the normally-off switch is turned on by pressing the push button, it switches the input FET 95 from on to off, and the input FET 95 is held in the on state when the push button is not pressed. The on-state input FET 95 is connected to the power line 98 via the load resistor 96, and a drain current flows between the drain and source as indicated by arrow A. Further, in order to hold the input FET 95 in the on state, a bias current indicated by arrow B also flows through the bias resistor 97 connected to the gate to hold the gate voltage at a predetermined voltage. The drain current and the bias current can be reduced by increasing the electrical resistance of the load resistor 96 and the bias resistor 97, but increasing the electrical resistance becomes a factor that inhibits the operation stability.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] The present invention has been developed for the purpose of further solving the above problems, and an important object of the present invention is to provide a power supply device that can reduce the power consumption of the startup circuit in the low power consumption mode and further reduce the power consumption in this state.

Means for Solving the Problems

[0007] A power supply device according to an aspect of the present invention includes a battery module having a plurality of rechargeable battery cells, a battery connection circuit connected to the battery module and having a switching function for a low power consumption mode, a startup circuit for starting the battery connection circuit, and a startup switch connected to the startup circuit and outputting a startup signal. The startup circuit includes an input transistor that is connected between the base and the emitter of the startup switch and is switched to an off state by an on signal of the startup switch, and an FET output circuit that is connected to the output side of the input transistor and outputs a startup signal to the battery connection circuit in a low power consumption state when the input transistor is switched from on to off.

Effect of the Invention

[0008] The power supply device of the present invention has a feature that it can reduce power consumption of the startup circuit and save power.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Mode for Carrying Out the Invention

[0010] A power supply device according to an embodiment of the present invention includes a battery module having a plurality of rechargeable battery cells, a battery connection circuit connected to the battery module and having a switching function for a low power consumption mode, a startup circuit for starting the battery connection circuit in the low power consumption mode, and a startup switch connected to the startup circuit and outputting a startup signal. The startup circuit includes an input transistor that is connected between the base and the emitter of the startup switch and is switched to an off state by an on signal of the startup switch, and an FET output circuit that is connected to the output side of the input transistor and outputs a startup signal to the battery connection circuit in a low power consumption state when the input transistor is switched from on to off.

[0011] The startup circuit of the above power supply device uses an input transistor, which is a bipolar transistor, as a semiconductor switching element that is switched on and off by a startup switch. Since the transistor is switched to the on state by flowing a current to the base, the power consumption on the input side is larger than that of the FET, which can be switched to the on state without flowing a current to the gate. Due to this characteristic, for the purpose of power saving, an FET that becomes an on state without flowing a current to the gate is used rather than a transistor that consumes power by flowing a base current in the on state.

[0012] FIG. 2 shows a startup circuit 93 in which a semiconductor switching element switched on and off by a startup switch 94 is an FET. In this startup circuit 93, the startup switch 94 is connected between the gate of the input FET 95 and the ground line 99. By pressing the push button of the startup switch 94 to turn it on, the input FET 95 is switched from on to off to output a startup signal. Since this startup circuit 93 switches the input FET 95 to the off state when the startup switch 94 is on, the input FET 95 holds the on state in the normal state where the startup switch 94 is not pressed. In the on-state input FET 95, as shown by arrow A, a drain current flows from the drain to the source. Further, as shown by arrow B, a bias current flows through the bias resistor 97 from the power line 98 to the ground line 99. The drain current can be decreased by increasing the electrical resistance of the load resistor 96, and the bias current of the bias resistor 97 can be decreased by increasing the electrical resistance of the bias resistor 97. However, if the electrical resistances of the load resistor 96 and the bias resistor 97 are too large, they are easily affected by noise and stable operation cannot be guaranteed.

[0013] The startup circuit 3 shown in FIG. 1 of the power supply device according to the first embodiment of the present invention uses an input transistor 5 that is turned on by flowing a current to the base as a semiconductor switching element to which the startup switch 4 is connected. The startup circuit 3 having this circuit configuration can reduce wasteful power consumption by reducing the bias current by using the input transistor 5 instead of the FET.

[0014] The input transistor is an element that amplifies current, and the product of the base current and the current amplification factor is the collector current. Therefore, by setting the collector current of the input transistor in the on state to be the same as the drain current of the input FET, the base current can be made extremely small as drain current / current amplification factor. For example, the startup circuit 93 in FIG. 2 can output a startup signal with the drain current of the input FET 95 in the on state being about 30 μA. However, for the startup circuit 3 in FIG. 1 with the input FET as the input transistor 5, while outputting a startup signal with the collector current of the input transistor 5 being the same 30 μA as the drain current of the input FET 95 in the startup circuit 93 of FIG. 2, in this state, the base current of the input transistor 5 can be decreased to collector current / current amplification factor. Thus, by using a bipolar transistor with a current amplification factor of 100 times for the input transistor 5, the base current can be significantly decreased to 30 / 100 μA, that is, 0.3 μA. Since the current amplification factor of a bipolar transistor is generally about 100 to 500, the startup circuit 3 in FIG. 1 can decrease the base current to almost negligible by using a transistor instead of an FET. Therefore, the startup circuit 3 in FIG. 1 can reduce the power consumption by about 50% by setting the collector current of the input transistor 5 to the same current value as the drain current of the input FET 95 in the startup circuit 93 of FIG. 2.

[0015] Furthermore, since the above power supply device connects a startup switch between the base and emitter of the input transistor, it also has the feature that the breakdown voltage of the startup switch can be lowered. This is because the transistor can keep the base voltage low and flow an extremely small base current specified by collector current / current amplification factor to maintain the on state. For this reason, a small switch with a low breakdown voltage can be used for the startup switch, and the feature that a small startup switch can be arranged in a narrow space is also realized.

[0016] The power supply device according to the second embodiment of the present invention includes a detection circuit that detects at least one of the voltage, temperature, and current of the battery cell of the battery module and converts the detected analog signal into a digital signal and outputs it, and a microcomputer that performs arithmetic processing on the digital signal input from the detection circuit.

[0017] This power supply device has the feature that the battery connection circuit detects the voltage, current, and further temperature of the battery cells constituting the battery module, prevents overcharging and overdischarging of the battery cells, and further detects the battery temperature so that charging and discharging can be performed in a safe state.

[0018] The power supply device according to the third embodiment of the present invention has a circuit configuration of the FET output circuit that connects a gate to an input transistor, and the input transistor is switched from on to off and from off to on. The first FET and the second FET are connected to the gate of the first FET, and the first FET is switched from off to on and from off to on. The second FET can be switched from off to on to output an activation signal to the battery connection circuit.

[0019] The power supply device according to the fourth embodiment of the present invention uses a normally-off manual switch as the activation switch. Further, the power supply device according to the fifth embodiment of the present invention uses a push-button switch that outputs an on-state activation signal in a pressed state as the activation switch.

[0020] The power supply device according to the sixth embodiment of the present invention has an activation circuit including a base resistor connected between the base of the input transistor and the power supply line to flow a base current that turns on the input transistor, and the activation switch is connected between the base of the input transistor and the ground line. The circuit configuration is such that the input transistor is switched from on to off by the on signal of the activation switch.

[0021] The power supply device according to the seventh embodiment of the present invention has an activation circuit including a first load resistor connected to the output side of the input transistor, and the connection point between the first load resistor and the input transistor is connected to the gate of the first FET. The circuit configuration is such that the input transistor is switched from on to off and the first FET is switched from off to on.

[0022] The power supply device according to the eighth embodiment of the present invention can have a circuit configuration in which a first load resistor is connected to the collector of the input transistor.

[0023] The power supply device according to the ninth embodiment of the present invention can have a circuit configuration in which, as a startup circuit including a second load resistor connected to the output side of the first FET, the gate of the second FET is connected to the second load resistor, and when the first FET is switched from off to on, the second FET is switched from off to on.

[0024] The power supply device according to the tenth embodiment of the present invention can have a circuit configuration in which a second load resistor is connected to the drain of the first FET.

[0025] The power supply device according to the eleventh embodiment of the present invention can have a circuit configuration in which a third load resistor connected to the output side of the second FET is provided in the startup circuit, and when the second FET is switched from off to on, the third load resistor outputs a startup signal to the battery connection circuit.

[0026] The power supply device according to the twelfth embodiment of the present invention can connect the third load resistor to the source of the second FET.

[0027] Hereinafter, the present invention will be described in detail with reference to the drawings. In the following description, terms indicating a specific direction or position (for example, "up", "down", and other terms including those terms) are used as necessary, but the use of those terms is for facilitating the understanding of the invention with reference to the drawings, and the technical scope of the present invention is not limited by the meanings of those terms. Also, parts denoted by the same reference numerals in a plurality of drawings indicate the same or equivalent parts or members. Furthermore, the embodiments shown below are specific examples of the technical idea of the present invention and do not limit the present invention thereto. Also, the dimensions, materials, shapes, relative arrangements, etc. of the components described below are not intended to limit the scope of the present invention only thereto but are intended to be illustrative unless otherwise specifically described. Also, the content described in one embodiment or example is applicable to other embodiments or examples. Also, the sizes and positional relationships of the members shown in the drawings may be exaggerated for clarity of explanation.

[0028] (Power supply device 100) The power supply device 100 in FIG. 1 includes a battery module 10 in which a plurality of rechargeable battery cells 1 are connected in series or in parallel, a battery connection circuit 2 connected to the battery module 10, a startup circuit 3 of the battery connection circuit 2, and a startup switch 4 connected to the startup circuit 3.

[0029] (Battery module 10) The battery module 10 connects a plurality of battery cells 1 in series or in parallel to increase the charge and discharge capacity. The battery module 10 is set to an optimal voltage and charge and discharge capacity for the use of the power supply device 100 according to the number of battery cells 1 and the number of series or parallel connections. The power supply device 100 is used for various applications, for example, as a power storage device or a power supply device for vehicle running. The power supply device used for the power storage device sets the output voltage of the battery module 10 to, for example, 40V to 100V, and the power supply device for vehicle running sets the output voltage of the battery module 10 to 200V to 400V. The battery cell 1 is preferably a non-aqueous electrolyte secondary battery such as a lithium ion secondary battery or a lithium polymer secondary battery, and can increase the charge and discharge capacity with respect to weight and capacity. However, the battery cell 1 is not limited to a lithium ion secondary battery or a lithium polymer secondary battery, and any other rechargeable secondary battery currently used or to be developed, such as a nickel metal hydride battery or a solid-state battery, can also be used.

[0030] (Battery connection circuit 2) The battery connection circuit 2 includes a detection circuit 21 that detects the state of the battery module 10, that is, battery information, and a microcomputer 22 that performs arithmetic processing on the digital signal output from the detection circuit 21. The battery information detected by the detection circuit 21 is, for example, the voltage and temperature of the battery cell 1 that constitutes the battery module 10, the current of the battery module 10, etc., and the detection circuit 21 detects these battery information as analog signals. The detection circuit 21 converts the detected analog signal into a digital signal and outputs it to an external control circuit (not shown). The power supply device 100, in which the battery connection circuit 2 detects the voltage and temperature of the battery cell 1 and further detects the current of the battery module 10, outputs battery information to an external control circuit, and the external control circuit controls the charge and discharge of the battery module 10. This power supply device 100 can charge and discharge the battery module 10 while preventing overcharging and overdischarging of the battery cell 1. In addition, the power supply device 100 including the detection circuit 21 that detects the temperature of the battery cell 1 has the feature that it can safely charge and discharge while maintaining the temperature of the battery cell 1 at a set temperature. However, the above power supply device 100 does not specify the battery information detected by the battery connection circuit 2 as voltage, temperature, and current. For example, it can also detect the remaining capacity of each battery cell 1 as battery information and output it externally.

[0031] The detection circuit 21 that detects voltage and current, although not shown, includes a voltage detection circuit that detects the voltage of the battery cell 1 that constitutes the battery module 10, a temperature detection circuit that detects the temperature of a specific battery cell 1, a current detection circuit that detects the charge and discharge current of the battery module 10, and an A / D converter that converts the analog signal detected by these detection circuits into a digital signal. However, the power supply device 100 of the present invention does not specify the circuit configuration of the detection circuit 21 of the battery connection circuit 2, and for example, it can also be a detection circuit that detects other parameters of the battery module 10.

[0032] The microcomputer 22 performs arithmetic processing on the digital signal input from the detection circuit 21. The arithmetic processing of the microcomputer 22 compares the detected voltage of the input battery cell 1 with the minimum voltage and the maximum voltage, and outputs a signal for specifying the maximum charge / discharge current of the battery module 10 to the main control circuit (not shown), or calculates the remaining capacity of the battery module 10 or the battery cell 1 from the voltage and current of the battery module 10 or the battery cell 1, and outputs the remaining capacity to an external control circuit, or alternatively, can also display the remaining capacity of the battery by lighting an LED.

[0033] The battery connection circuit 2 detects a state where charging and discharging are not used for a set time, or detects a signal from the outside, enters the low power consumption mode, and suppresses wasteful power consumption. When a start signal is input from the start circuit 3 in the low power consumption mode state, the battery connection circuit 2 restarts and returns to the operating state. The battery connection circuit 2 is started from the shutdown state, for example, by a trigger signal input from the start circuit 3. The battery connection circuit 2 reduces wasteful power consumption by setting both the detection circuit 21 and the microcomputer 22 to the low power consumption mode. However, the battery connection circuit 2 can also reduce power consumption by setting either the detection circuit 21 or the microcomputer 22 to the low power consumption mode.

[0034] In the low power consumption mode, the detection circuit 21 stops the power supply from the battery module 10, and the microcomputer 22 is switched to the shutdown state, the standby state, or the sleep state in the low power consumption mode. However, in this specification, the "low power consumption mode" means all states that reduce power consumption compared to the normal operating state, and is not necessarily limited to the shutdown state, the standby state, the sleep state, etc. The battery connection circuit 2 that sets both the detection circuit 21 and the microcomputer 22 to the low power consumption mode outputs a start signal from the start circuit 3 to the detection circuit 21 to start the detection circuit 21, and outputs a start signal from the started detection circuit 21 to the microcomputer 22 to start the microcomputer 22. However, the battery connection circuit 2 can also input a start signal from the start circuit 3 to both the detection circuit 21 and the microcomputer 22 to restart both the detection circuit 21 and the microcomputer 22.

[0035] (Startup Circuit 3) The startup circuit 3 uses the on / off signal input from the startup switch 4 to restart the battery connection circuit 2 from the low power consumption mode and switch it to the operating mode. The startup circuit 3 includes an input transistor 5 with its base connected to the ground line 19 via the startup switch 4, and a FET output circuit 6 that inputs a [High] or [Low] signal from the input transistor 5 and outputs a startup signal. The FET output circuit 6 outputs a startup signal at the timing when the input transistor 5 is switched from on to off.

[0036] (Startup Switch 4) The startup switch 4 is a normally-off manual switch, and a push-button switch that becomes on when the push button is pressed can be used. However, instead of the push-button switch, the startup switch 4 can also use any other switch that can be operated by the user to switch on and off, such as a proximity switch.

[0037] (Input Transistor 5) The input transistor 5 is a bipolar transistor and outputs a "Low" signal when the startup switch 4 is pressed. The input transistor 5 connects the startup switch 4 between its base and emitter. This input transistor 5 is switched to an off state where the base current does not flow when the on startup switch 4 connects the base to the emitter. In the startup circuit 3 of Figure 1, a base resistor 14 is connected between the base and collector of the input transistor 5. The base resistor 14 supplies current from the collector to the base to keep the input transistor 5 in the on state when the startup switch 4 is off. The startup switch 4 is a normally-off switch and is off when the push button is not pressed, keeping the input transistor 5 in the on state. The base resistor 14 acts as an electrical resistor that passes a base current to turn on the input transistor 5 when the startup switch 4 is off.

[0038] The input transistor 5 controls the collector current with the base current. The product of the base current and the current amplification factor is the collector current. The current amplification factor of a general transistor is about 100 to 500. Therefore, the input transistor 5 sets the base current to 1 / 100 to 1 / 500 of the collector current. For example, for an input transistor 5 with a collector current of 50 μA to 100 μA and a current amplification factor of 100, the base current is set to 0.5 μA to 1 μA. This input transistor 5 sets the collector current of the input transistor 5 to 50 μA as an electric resistance with a base current of 0.5 μA to 1 μA.

[0039] The fact that the input transistor 5 can reduce the base current to 1 / 100 to 1 / 500 of the collector current is effective in significantly reducing the power consumption of the startup circuit 3. Since the startup circuit 3 holds the input transistor 5 in the on state in the low power consumption mode of the battery connection circuit 2, it is required to reduce the power consumption of the startup circuit 3 in the low power consumption mode of the battery connection circuit 2 by reducing the power consumption of the on-state input transistor 5. This is because the startup circuit 3 consumes the power of the battery module 10 as the operating power is supplied from the battery module 10 to the startup circuit 3 in the low power consumption mode of the battery connection circuit 2. In the low power consumption mode of the battery connection circuit 2, the startup circuit 3 is held in an operation mode where it can output a startup signal to the battery connection circuit 2 with a signal from the startup switch 4 and discharges the battery module 10. However, the low power consumption mode is a mode set in a state where it is not used for a long time, and the time of the low power consumption mode is often considerably long. The power consumption of the startup circuit 3 at this timing, even if it is at least integrated, increases the total power for discharging the battery module 10.

[0040] In the conventional startup circuit 93 shown in FIG. 2, an input FET 95 that is held in an on state in the low power consumption mode has a bias current flowing through a bias resistor 97 that inputs an on voltage to the gate of the FET in addition to the drain current flowing between the drain and source. The bias resistor 97 consists of a series resistance of a first bias resistor 97A and a second bias resistor 97B that divides the voltage of the battery module 90 and inputs an on voltage to the gate. Although the gate voltage can be specified by the resistance ratio of the first bias resistor 97A and the second bias resistor 97B, increasing the electrical resistance of the second bias resistor 97B connected between the gate and the ground line 99 increases the probability that the input FET 95 malfunctions under external conditions such as external noise. In particular, since the FET has a considerably high input impedance at the gate, it becomes difficult to reliably prevent malfunctions due to external noise or the like with a high-resistance bias resistor 97. Since the bias resistor 97 is always connected to the plus side and the minus side of the battery module 90 to flow a bias current and discharge the battery module 90, it is extremely important to reduce the bias current as much as possible in order to reduce the wasted power consumption in the low power consumption mode.

[0041] In the startup circuit 3 of FIG. 1, collector current and base current flow through the input transistor 5 that is in an on state in the low power consumption mode. The collector current of the input transistor 5 corresponds to the drain current of the startup circuit 93 in FIG. 2, and the base current corresponds to the bias current of the startup circuit 93 in FIG. 2. Since the startup circuit 93 in FIG. A can achieve stable operation with the drain current and the bias current being substantially the same current, in the low power consumption mode, a current twice the drain current continuously discharges the battery module 90. The startup circuit 3 in FIG. 1 can reduce the base current to a current value that is almost negligible, from 1 / 100 to 1 / 500 of the collector current. Therefore, in the low power consumption mode, only the collector current flows through the battery module 10, and the wasted discharge of the battery module 10 can be reduced by 50% compared to the startup circuit 93 in FIG. A. As described above, while the startup circuit 3 in FIG. 1 uses a bipolar transistor that turns on by flowing a base current instead of an FET, an energy-saving element that can be switched to the on state without substantially flowing current through the gate, it realizes an extremely excellent feature of reducing the power consumption of the battery module 10 in the low power consumption mode by 50%. This feature is realized by reducing the wasted bias current of the bias resistance of the FET, which is difficult to lower the electrical resistance in order to stably operate the FET with a high input impedance, by utilizing the specific characteristics of the bipolar transistor that amplifies current.

[0042] In order for the above input transistor 5 to output a "Low" signal in the on state and a "High" signal in the off state to the FET output circuit 6, a first load resistor 11 is connected to the collector, and the connection point 15 between the collector and the first load resistor 11 is connected to the gate of the first FET 7. However, in this specification, "Low" and "High" are based on the ground line 19. The first load resistor 11 is set to an electrical resistor that sets the collector current of the on-state input transistor 5 to, for example, 20 μA to 50 μA. When the start switch 4 is switched from off to on, the input transistor 5 is switched from on to off and outputs a "High" signal to the FET output circuit 6 via the first load resistor 11. The first load resistor 11 divides the total voltage of the battery module 10 with the base resistor 14 of the off-state input transistor 5 and outputs it to the FET output circuit 6.

[0043] (FET output circuit 6) The "High" signal output from the collector of the input transistor 5 is output as a stable "High" start signal to the battery connection circuit 2 via the FET output circuit 6. The FET output circuit 6 outputs the "High" signal to the battery connection circuit 2 with a low output impedance without inverting the "High" and "Low" of the "High" signal input from the input transistor 5. The FET output circuit 6 includes a first FET 7 connected to the output side of the input transistor 5 and a second FET 8 connected to the output side of the first FET 7. The FET output circuit 6 reduces power consumption by turning off both the first FET 7 and the second FET 8 in the normal state where the start switch 4 is not pressed, and turns on both in the state where the start switch 4 is pressed, and outputs the "High" signal input from the input transistor 5 to the battery connection circuit 2. The first FET 7 is an n-channel FET with its source connected to the ground line 19 and is turned on by a "High" signal with respect to the ground line 19. Since the second FET 8 is a p-channel FET with its source connected to the power line 18 which is the plus side of the battery module 10, an on voltage is input to the gate by a "Low" signal with respect to the ground line 19 and it is turned on.

[0044] (The first FET7) For the first FET7, a "Low" signal input to its gate from the input transistor 5 turns it off, and a "High" signal input turns it on. The first FET7 outputs "High" in the off state and "Low" in the on state. Since the input transistor 5 outputs "Low" when the start switch 4 is not pressed and "High" when the start switch 4 is pressed, the first FET7 outputs "High" when the start switch 4 is not pressed and "Low" when the start switch 4 is pressed. The first FET7 has its gate connected to the collector of the input transistor 5, its drain connected to the power line 18 of the battery module 10 via the second load resistor 12, and its source connected to the ground line 19. The second load resistor 12 divides the voltage of the battery module 10 and inputs an on voltage to the gate of the second FET8 when the first FET7 is in the on state. The second load resistor 12 connects the gate of the second FET8 to the plus side of the battery module 10, i.e., the source of the second FET8, and inputs an off voltage to the gate when the first FET7 is in the off state.

[0045] (The second FET8) The second FET 8 is a p-channel FET. Its source is connected to the power line 18 which is the positive side of the battery module 10, its gate is connected to the intermediate connection point 16 of the second load resistor 12, and its drain is connected to the ground line 19 via the third load resistor 13. The second FET 8 turns on when the first FET 7 is on. This is because in this state, the second load resistor 12 divides the voltage of the power line 18 and inputs an on-voltage to the gate of the second FET 8. The on-state second FET 8 divides the voltage of the power line 18 with the third load resistor 13 connected between it and the ground line 19, and outputs a startup signal of "High" signal to the battery connection circuit 2. The second FET 8 turns off when the first FET 7 is off. This is because the first FET 7 disconnects the second load resistor 12 from the ground line 19 and connects the gate of the second FET 8 to the source. The off-state second FET 8 disconnects the third load resistor 13 from the positive side of the battery module 10 and sets the voltage at the intermediate connection point 17 of the third load resistor 13 to "Low".

[0046] The drain current of the first FET 7 in the on-state is specified by the electrical resistance of the second load resistor 12, and the drain current of the second FET 8 in the on-state is specified by the resistance value of the third load resistor 13. Therefore, the resistance values of the second load resistor 12 and the third load resistor 13 are set to values that take the collector current in the on-state of each FET as the set value. If the electrical resistance of the second load resistor 12 is too high, the "High" or "Low" signal cannot be stably output to the second FET 8. If it is too low, the collector current of the first FET 7 increases and the power consumption increases. Therefore, the second load resistor 12 is set to an electrical resistance that minimizes the consumption current while stably outputting an on / off signal to the second FET 8. The electrical resistance of the third load resistor 13 affects the output impedance of the FET output circuit 6. The third load resistor 13 is set to an electrical resistance that reduces the output impedance of the FET output circuit 6 and stably outputs a startup signal to the battery connection circuit 2.

[0047] The above power supply device 100 restarts the battery connection circuit 2 in the low power consumption mode through the following operations. In the low power consumption mode, when the device is not used for a long time, the battery connection circuit 2 is switched to the low power consumption mode to reduce power consumption. In this state, the start switch 4 is off, the input transistor 5 of the start circuit 3 is on, the first FET 7 is off, and the second FET 8 is off. Although the collector current flows through the on-state input transistor 5, the base current is almost negligible, significantly reducing power consumption. The first FET 7 and the second FET 8 are in the off state, blocking the drain current.

[0048] At the timing of restarting the battery connection circuit 2, the user presses the start switch 4 to output an on signal to the start circuit 3. The on signal of the start switch 4 connects the base of the input transistor 5 to the ground line 19, that is, the emitter, to switch the input transistor 5 to the off state. The off-state input transistor 5 inputs an on voltage to the gate of the first FET 7 through the first load resistor 11 to switch the first FET 7 to the on state. The first FET 7 switched to the on state connects the second load resistor 12 to the ground line 19, and inputs an on voltage from the intermediate connection point 16 of the second load resistor 12 to the gate of the second FET 8 to switch it to the on state. The second FET 8 switched to the on state outputs a "High" start signal from the intermediate connection point of the third load resistor 13 to the battery connection circuit 2. The battery connection circuit 2 with the input of the "High" start signal is switched from the low power consumption mode to the operation mode and enters the normal operation state. The battery connection circuit 2 in FIG. 1 includes a detection circuit 21 and a microcomputer 22. The start circuit 3 outputs a start signal to the detection circuit 21, and the detection circuit 21 outputs a start signal to the microcomputer 22 to restart the microcomputer 22 from the low power consumption mode.

Industrial Applicability

[0049] The power supply device of the present invention can effectively reduce power consumption in the low power consumption mode when not in use, and can be effectively used in a device that presses the start switch to restart in the use state.

Description of Symbols

[0050] 100…Power supply device 1…Battery cell 2…Battery connection circuit 3…Startup circuit 4…Startup switch 5…Input transistor 6…FET output circuit 7…First FET 8…Second FET 10…Battery module 11…First load resistor 12…Second load resistor 13…Third load resistor 14…Base resistor 15…Connection point 16…Intermediate connection point 17…Intermediate connection point 18…Power line 19…Ground line 21…Detection circuit 22…Microcontroller 90…Battery module 92…Battery connection circuit 93…Startup circuit 94…Startup switch 95…Input FET 96…Load resistor 97…Bias resistor 97A…First bias resistor 97B…Second bias resistor 98…Power line 99…Ground line

Claims

1. A battery module having a plurality of rechargeable battery cells, A battery connection circuit having a switching function for a low power consumption mode connected to the battery module, An activation circuit for activating the battery connection circuit, An activation switch connected to the activation circuit for outputting an activation signal, comprising: The activation circuit is configured to: Connect the activation switch between the base and the emitter, and an input transistor that is switched to an off state by an on signal of the activation switch; A power supply device comprising an FET output circuit connected to an output side of the input transistor, the FET output circuit outputting an activation signal to the battery connection circuit in a low power consumption state when the input transistor is switched from on to off.

2. The power supply device according to claim 1, wherein The battery connection circuit is configured to: A detection circuit that detects at least one of the voltage, temperature, and current of the battery cells of the battery module, converts the detected analog signal into a digital signal, and outputs the digital signal; A power supply device comprising a microcomputer that performs arithmetic processing on the digital signal input from the detection circuit.

3. The power supply device according to claim 1 or 2, wherein The FET output circuit is configured to: A first FET having a gate connected to the input transistor, the first FET being switched from on to off and from off to on when the input transistor is switched from on to off; A second FET having a gate connected to the first FET, the second FET being switched from off to on and from off to on when the first FET is switched from off to on; A power supply device in which the second FET is switched from off to on, outputs an activation signal to the battery connection circuit, and activates the battery connection circuit.

4. The power supply device according to any one of claims 1 to 3, wherein The activation switch is a normally-off manual switch.

5. The power supply device according to claim 4, wherein The activation switch is a push-button switch that outputs an on-state activation signal in a pressed state.

6. The power supply device according to any one of claims 1 to 5, wherein The activation circuit is connected to the base of the input transistor and a power supply line, and includes a base resistor that allows a base current to flow to turn on the input transistor; The activation switch is connected between the base of the input transistor and a ground line, and the input transistor is switched from off to on by an on signal of the activation switch.

7. The power supply device according to claim 3, wherein the startup circuit includes a first load resistor connected to the output side of the input transistor, and a connection point between the first load resistor and the input transistor is connected to the gate of the first FET, so that the input transistor is switched from off to on and the first FET is switched from off to on.

8. The power supply device according to claim 7, wherein the first load resistor is connected to the collector of the input transistor.

9. The power supply device according to claim 3, wherein the startup circuit includes a second load resistor connected to the output side of the first FET, and the gate of the second FET is connected to the second load resistor, so that the first FET is switched from off to on and the second FET is switched from off to on.

10. The power supply device according to claim 9, wherein the second load resistor is connected to the drain of the first FET.

11. The power supply device according to claim 3, wherein the startup circuit includes a third load resistor connected to the output side of the second FET, and when the second FET is switched from off to on, the third load resistor outputs a startup signal to the battery connection circuit.

12. The power supply device according to claim 11, wherein the third load resistor is connected to the source of the second FET.

13. The power supply device according to any one of claims 1 to 12, wherein the battery connection circuit is started from a shutdown state by a trigger signal input from the startup circuit.

Citation Information

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