Storage Systems

Abstract

To provide a storage system that improves performance by classifying and temporarily storing cached data based on an attribute of the cached data.SOLUTION: A storage system 1 includes: a storage tier 30 including a plurality of storage devices 31_1, 31_2; a cache tier 20 allocated for each of the storage devices 31_1, 31_2 and including a plurality of zone groups each including a hot data zone 20_1, a warm data zone 20_2, and a cold data zone 20_3; and a system controller 10 that moves data stored in a source storage device to a target storage device through the cache tier 20.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to electronic devices, and more particularly, the present invention relates to storage systems. [Background technology]

[0002] The storage device may include a memory controller and a memory device, and the memory controller can control the storage of data in the memory device based on a signal from a host.

[0003] Volatile memory devices retain data only while power is supplied from a power source. If the power supply is interrupted, the data stored in the volatile memory device is lost. Examples of volatile memory devices include static random access memory (SRAM) and dynamic random access memory (DRAM).

[0004] Non-volatile memory devices retain data even when power is cut off. Examples of non-volatile memory devices include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable and programmable ROM (EEPROM), and flash memory. Summary of the Invention [Problem to be solved by the invention]

[0005] SUMMARY OF THE INVENTION An embodiment of the present invention provides a storage system that improves performance by classifying and temporarily storing cached data based on attributes of the cached data. [Means for solving the problem]

[0006] A storage system according to one embodiment of the present invention includes a first storage device, a cache tier including a first zone group and a second zone group for temporarily storing data, and a system controller for moving data stored in the first storage device to the cache tier, wherein the first zone group and the second zone group each include a plurality of data zones configured to store data based on the number of times the data is accessed, and the system controller loads data stored in the first storage device into a source data zone included in the first zone group, and moves the data loaded into the source data zone to a target data zone included in the second zone group based on a first access count and a second access count, which are the number of times the source data zone is accessed, wherein the first access count corresponds to the number of times the source data zone is accessed, and the second access count corresponds to the number of times a reference data zone included in the second zone group is accessed.

[0007] According to yet another embodiment of the present invention, a storage system includes a storage tier including a plurality of storage devices; a cache tier including a plurality of zone groups that temporarily store data to be stored in the plurality of storage devices or temporarily store data read from the plurality of storage devices; and a system controller that moves data stored in a source storage device among the plurality of storage devices to a target storage device among the plurality of storage devices via the cache tier, wherein the plurality of zone groups are assigned to each of the plurality of storage devices and each include N (N is a natural number greater than 1) data zones that are divided according to an average access count of the stored data. The system controller loads data stored in the source storage device into a first data zone among the N data zones in a source zone group that is the zone group assigned to the source storage device, compares a first average access count of the data stored in the first data zone with a second average access count of data stored in a second data zone among the N data zones in a target zone group that is the zone group assigned to the target storage device, and if the first average access count is smaller than or equal to the second average access count, controls the cache tier to move the data loaded in the first data zone to the second data zone, and controls the storage tier to store the data moved to the second data zone in the target storage device.

[0008] According to yet another embodiment of the present invention, a storage system includes a first storage device, a second storage device, a first cache area for temporarily storing data to be stored in the first storage device or temporarily storing data read from the first storage device, a second cache area for temporarily storing data to be stored in the second storage device or temporarily storing data read from the second storage device, and a system controller for controlling data movement between the first storage device and the second storage device via the first cache area and the second cache area, wherein the first cache area and the second cache area respectively include a hot data zone, a warm data zone, and a cold data zone configured to store data in an order re-determined based on an average access count, and an average access count of the data stored in the first cache area is greater than an average access count of the data stored in the second cache area, and the system controller temporarily stores data stored in the first storage device in the hot data zone of the second cache area, and stores the data temporarily stored in the hot data zone of the second cache area in the second storage device.

[0009] An apparatus according to yet another embodiment of the present invention may include a storage area for storing instructions, and a controller configured to execute instructions to control a cache tier including a first storage device and a first zone group and a second zone group, each including a plurality of data zones. The controller may perform a load operation to load data stored in the first storage device in a source data zone corresponding to one of the plurality of data zones in the first zone group, and a move operation to move the data loaded in the source data zone to a target data zone corresponding to one of the plurality of data zones in the second zone group, based on a first access count and a second access count. The first access count may correspond to the access count of the source data zone, and the second access count may correspond to the number of accesses of a reference data zone corresponding to one of the plurality of data zones in the second zone group. [Effects of the Invention]

[0010] According to the present technology, a storage system is provided that improves performance by classifying and temporarily storing cached data based on the attributes of the cached data. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram illustrating a storage system according to an embodiment of the present invention. [Figure 2] FIG. 1 is a diagram specifically illustrating a storage system according to an embodiment of the present invention. [Figure 3] FIG. 10 is a diagram illustrating an example of moving data within a cache tier. [Figure 4] 10 is a diagram illustrating an access count storage unit according to an embodiment of the present invention; [Figure 5] FIG. 10 is a diagram illustrating first to third tables including access count information. [Figure 6] FIG. 10 is a diagram illustrating another embodiment of moving data within a cache tier. [Figure 7] 1 is a flowchart illustrating a method for operating a storage system according to an embodiment of the present invention. [Figure 8] 1 is a diagram illustrating a storage device according to an embodiment of the present invention; [Figure 9] 1 is a diagram illustrating a memory device according to an embodiment of the present invention; [Figure 10] FIG. 2 is a diagram illustrating a memory block according to an embodiment of the present invention. [Figure 11] FIG. 2 is a diagram illustrating a memory controller according to an embodiment of the present invention. [Figure 12] 1 is a block diagram showing a memory card system to which a storage device according to an embodiment of the present invention is applied; [Figure 13] 1 is a block diagram showing an SSD (Solid State Drive) system to which a storage device according to an embodiment of the present invention is applied; [Figure 14] 1 is a block diagram showing a user system to which a storage device according to an embodiment of the present invention is applied; DETAILED DESCRIPTION OF THE INVENTION

[0012] Specific structural or functional descriptions of embodiments according to the inventive concepts disclosed in this specification or application are provided solely for purposes of illustrating embodiments according to the inventive concepts, and embodiments according to the inventive concepts may be embodied in various forms and should not be construed as being limited to the embodiments described in this specification or application.

[0013] FIG. 1 is a diagram illustrating a storage system according to an embodiment of the present invention.

[0014] Referring to FIG. 1, a storage system 1 may be a system that stores data that a user wants to store or provides data that a user wants.

[0015] The storage system 1 may be embodied as a PC (personal computer), a data center, an enterprise data storage system, a data processing system including a DAS (direct attached storage), a data processing system including a SAN (storage area network), a data processing system including a NAS (network attached storage), or the like.

[0016] The storage system 1 may include a system controller 10, a cache tier 20, and a storage tier 30.

[0017] The system controller 10 can store data in the storage tier 30 via the cache tier 20 , and can retrieve data stored in the storage tier 30 via the cache tier 20 .

[0018] In one embodiment, the system controller 10 can temporarily store data provided from an external source in the cache tier 20. The system controller 10 can control the cache tier 20 to output the data temporarily stored in the cache tier 20 to the storage tier 30. The system controller 10 can also control the storage tier 30 to store the data temporarily stored in the cache tier 20 in the storage tier 30.

[0019] Specifically, for example, the system controller 10 can provide the cache tier 20 with a flush command that instructs the cache tier 20 to output (or flush) data temporarily stored in the cache tier 20 to the storage tier 30. The system controller 10 can provide the storage tier 30 with a write request requesting that data be stored in the storage tier 30 and a logical address for identifying the data.

[0020] In one embodiment, the system controller 10 can control the storage tier 30 so that data stored in the storage tier 30 is output. For example, the system controller 10 can temporarily store data output from the storage tier 30 in the cache tier 20. The system controller 10 can provide the data temporarily stored in the cache tier 20 to the outside.

[0021] For example, the system controller 10 can provide the storage tier 30 with a read request requesting to read data stored in the storage tier 30 and a logical address for identifying the data stored in the storage tier 30. The system controller 10 can temporarily store the read data in the cache tier 20. In one embodiment, the system controller 10 can control the cache tier 20 to provide the data temporarily stored in the cache tier 20 to an external requester or destination.

[0022] The system controller 10 can communicate with the cache tier 20 to store data in the storage tier 30 and retrieve data stored in the storage tier 30, and can also communicate with the storage tier 30.

[0023] The system controller 10 may communicate with the cache tier 20 via an interface, and may communicate with the storage tier 30 via an interface. The cache tier 20 may communicate with the storage tier 30 via an interface. The same interface or different interfaces may be used for such communication. Examples of interfaces may include, but are not limited to, a serial advanced technology attachment (SATA) interface, a SATA express (SATAe) interface, a serial attached small computer system interface (SAS) interface, a peripheral component interconnect express (PCIe) interface, a non-volatile memory express (NVMe) interface, an advanced host controller interface (AHCI) interface, or a multimedia card interface.

[0024] In one embodiment, the system controller 10 may be or be included in a host HOST or a different type of device.

[0025] The cache tier 20 can temporarily store data provided by the system controller 10, or temporarily store data output from the storage tier 30. For example, the cache tier 20 can temporarily store data to be stored in the storage tier 30, or temporarily store data stored in the storage tier 30. For this reason, the cache tier 20 may include one or more volatile memory devices. The cache tier 20 may be a collection of at least one volatile memory device.

[0026] For example, the one or more volatile memory devices may include Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), Low Power Double Data Rate 4 (LPDDR4) SDRAM, Graphics Double Data Rate (GDDR) SDRAM, Low Power DDR (LPDDR), Rambus Dynamic random access memory (RDRAM), resistive random access memory (RRAM), phase-change memory (PRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory, spin transfer torque magnetoresistive random access memory, etc.

[0027] In one embodiment, cache tier 20 may include multiple volatile memory devices 21, 22, 23, and 24. For example, cache tier 20 may include DRAM 21, SRAM 22, RDRAM 23, and STT-MRAM (Spin-Transfer Torque Magnetoresistive RAM) 24, although cache tier 20 may include one or more different types of memory devices in other embodiments.

[0028] In one embodiment, the cache tier 20 can be accessed at a faster rate than the storage tier 30. That is, the system controller 10 may access the cache tier at a faster rate than the system controller 10 accesses the storage tier 30.

[0029] The storage tier 30 may be a collection of one or more storage devices. The storage tier 30 can store data or output already stored data.

[0030] In one embodiment, the storage tier 30 can store data provided by the system controller 10 in response to a write request provided by the system controller 10 and provide a response to the system controller 10 that the storage is complete.

[0031] In one embodiment, the storage tier 30 can read data corresponding to a logical address provided by the system controller 10 in response to a read request provided by the system controller 10, and output the read data as a response to the read request.

[0032] In one embodiment, the storage tier 30 may include multiple storage devices 31_1, 31_2, and 31_n. The number of storage devices 31_1, 31_2, and 31_n stored in the storage tier 30 may be n (n is a natural number greater than 1).

[0033] Each of the plurality of storage devices 31_1, 31_2, 31_n can store data and output the stored data to the cache tier 20. An exemplary embodiment of this operation will be described later with reference to FIGS.

[0034] In one embodiment, the rate at which the storage tier 30 is accessed may be slower than the rate at which the cache tier 20 is accessed.

[0035] The frequency with which the system controller 10 accesses the storage devices may differ for each of the multiple storage devices 31_1, 31_2, 31_n. The frequency with which the first storage device 31_1 of the multiple storage devices 31_1, 31_2, 31_n is accessed may be higher than the frequency with which the storage devices 31_2, 31_n excluding the first storage device 31_1 are accessed from the multiple storage devices 31_1, 31_2, 31_n. The system controller 10 may access the storage devices when the system controller 10 stores data in the storage devices or reads data stored in the storage devices.

[0036] If the frequency with which the storage devices are accessed differs for each of the multiple storage devices 31_1, 31_2, 31_n, the lifespans of the multiple storage devices 31_1, 31_2, 31_n may differ. For example, if the first storage device 31_1 is accessed most frequently among the multiple storage devices 31_1, 31_2, 31_n, the first storage device 31_1 may have the shortest lifespan among the multiple storage devices 31_1, 31_2, 31_n. In this case, the performance of the storage system 1 may be reduced due to the variation in the lifespans of the storage devices in the storage system.

[0037] To prevent a decrease in performance of the storage system 1, data stored in one storage device that is accessed relatively frequently may be moved to another storage device that is accessed relatively less frequently.

[0038] In one embodiment, by moving data among the multiple storage devices 31_1, 31_2, 31_n, the frequency with which the storage devices are accessed can be kept uniform. Also, by keeping the lifespans of the multiple storage devices 31_1, 31_2, 31_n uniform, excessive degradation of the performance of the storage system 1 can be prevented.

[0039] On the other hand, the storage device capacity and the frequency with which the storage device is accessed may differ for each of the multiple storage devices 31_1, 31_2, 31_n. For example, the first storage device 31_1 may be accessed the fastest among the multiple storage devices 31_1, 31_2, 31_n. For example, the second storage device 31_2 may have the largest storage capacity among the multiple storage devices 31_1, 31_2, 31_n.

[0040] To provide faster access to the desired data, data stored on storage devices with slower access speeds may be moved to storage devices with faster access speeds.

[0041] By moving data between multiple storage devices 31_1, 31_2, 31_n, the performance of the storage system 1 can be improved by providing data to users faster.

[0042] FIG. 2 is a diagram specifically illustrating a storage system according to an embodiment of the present invention.

[0043] 1 and 2, in one embodiment, the system controller 10 can migrate data stored in a source storage device among the plurality of storage devices 31_1, 31_2, and 31_n to a target storage device among the plurality of storage devices 31_1, 31_2, and 31_n via the cache tier 20. For example, such a migration operation may be performed when data stored in the source storage device is copied to the target storage device and the data stored in the source storage device is invalidated.

[0044] The source storage device may be a storage device that stores data to be moved to the target storage device. For example, if the first storage device 31_1 is the source storage device, the target storage device may be any one of the storage devices 31_2 and 31_n among the plurality of storage devices 31_1, 31_2, and 31_n.

[0045] The cache tier 20 may include multiple data areas. A data area may be an area in which data with the same data attributes are temporarily stored. The number of multiple data areas may be N (N is a natural number greater than 1). With reference to FIG. 2, for example, the number of multiple data areas may be three. In the following, for convenience of explanation, it is assumed that the multiple data areas are first to third data areas 20_1, 20_2, and 20_3.

[0046] In one embodiment, the first to third data regions 20_1, 20_2, and 20_3 may be classified according to data attributes. The data attributes may be classified into, for example, hot data, warm data, and cold data. The hot data, warm data, and cold data may be classified according to the number of times the data is accessed.

[0047] When data attributes are classified into hot data, warm data, and cold data, the first to third data areas 20_1, 20_2, and 20_3 can be classified into a hot data area, a warm data area, and a cold data area.

[0048] The hot data area may be an area where data with a data attribute of hot data is stored. The warm data area may be an area where data with a data attribute of warm data is stored. The cold data area may be an area where data with a data attribute of cold data is stored. For example, the first data area 20_1 may be a hot data area, the second data area 20_2 may be a warm data area, and the third data area 20_3 may be a cold data area. In other embodiments, the hot, warm, and cold data areas may correspond to different combinations of the first to third data areas 20_1, 20_2, and 20_3.

[0049] In one embodiment, at least one data area may correspond to any one of the plurality of volatile memory devices 21, 22, 23, and 24 shown in Figure 1. In this case, each data area may correspond to each of the plurality of volatile memory devices 21, 22, 23, and 24 according to their access speeds (e.g., write speeds).

[0050] For example, among a plurality of volatile memory devices 21, 22, 23, and 24, the access speed of the RDRAM 23 is generally faster than the access speed of the DRAM 21, and the access speed of the SRAM 22 is faster than the access speed of the RDRAM 23. In this case, the first data area 20_1 may correspond to the SRAM 22, the second data area 20_2 may correspond to the RDRAM 23, and the third data area 20_3 may correspond to the DRAM 21. However, without being limited thereto, the first data area 20_1 among the first to third data areas 20_1, 20_2, and 20_3 may correspond to the volatile memory device with the fastest access speed, and the third data area 20_3 among the first to third data areas 20_1, 20_2, and 20_3 may correspond to the volatile memory device with the slowest access speed.

[0051] As another example, the first data area 20_1 may correspond to the SRAM 22, and the second data area 20_2 and the third data area 20_3 may correspond to the RDRAM 23. However, the present invention is not limited to this.

[0052] One data area may include multiple data zones. For example, the first data area 20_1 may include data zones 1_1 to 1_n, Zone1_1, Zone1_2, Zone1_n, the second data area 20_2 may include data zones 2_1 to 2_n, Zone2_1, Zone2_2, Zone2_n, and the third data area 20_3 may include data zones 3_1 to 3_n, Zone3_1, Zone3_2, Zone3_n.

[0053] The number of data zones included in one data area may correspond to the number of storage devices 31_1, 31_2, 31_n included in the storage tier 30. For example, if the number of storage devices 31_1, 31_2, 31_n is n, the number of data zones 1_1 to 1_n included in the first data area 20_1 may be n. The number of data zones 2_1 to 2_n included in the second data area 20_2 may also be n, and the number of data zones 3_1 to 3_n included in the third data area 20_3 may also be n.

[0054] A data zone may be a storage space having a predetermined storage capacity. The storage capacities of the multiple data zones included in a data zone may be the same or different. For example, first data may be stored in one of the multiple data zones included in a data zone, and the first data and second data may be stored in another of the multiple data zones included in a data zone. However, this is not limited to this. In this specification, "data zone" and "zone" may have the same meaning.

[0055] In one embodiment, cache tier 20 may include multiple zone groups: Zone Group 1, Zone Group 2, and Zone Group n.

[0056] The multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n can temporarily store data to be stored in the multiple storage devices 31_1, 31_2, and 31_n, or temporarily store data read from the multiple storage devices 31_1, 31_2, and 31_n.

[0057] The multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n may be groups assigned to each of the multiple storage devices 31_1, 31_2, and 31_n. For example, the first zone group Zone Group 1 may be a group assigned to the first storage device 31_1. The second zone group Zone Group 2 may be a group assigned to the second storage device 31_2. The nth zone group Zone Group n may be a group assigned to the nth storage device 31_n.

[0058] In one embodiment, data stored in the first storage device 31_1 may be temporarily stored in the first zone group Zone Group 1. Alternatively, data temporarily stored in the first zone group Zone Group 1 may be stored in the first storage device 31_1.

[0059] In one embodiment, the data stored in the second storage device 31_2 may be temporarily stored in the second zone group Zone Group 2. Alternatively, the data temporarily stored in the second zone group Zone Group 2 may be stored in the second storage device 31_2.

[0060] In one embodiment, the data stored in the third storage device 31_3 may be temporarily stored in the third zone group Zone Group 3. Alternatively, the data temporarily stored in the third zone group Zone Group 3 may be stored in the third storage device 31_3.

[0061] Each of the multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n may include N data zones (N is a natural number greater than 1). For example, one zone group may include one data zone included in the first data area 20_1, one data zone included in the second data area 20_2, and one data zone included in the third data area 20_3. Thus, one zone group may include three data zones, although other embodiments may include a different number of zones.

[0062] Here, the N data zones may be classified according to the average access count of data stored in each data zone. The average access count may be an average value of the access counts of data stored in one data zone. The access count may be a value indicating the number of times data is accessed. Alternatively, the access count may be a value indicating the number of times each data zone is accessed. For example, when data temporarily stored in the cache tier 20 is loaded into the 1_1 data zone, Zone1_1, the access count indicating the number of times the 1_1 data zone, Zone1_1, is accessed may be incremented.

[0063] In one embodiment, data zones 1_1 to 1_n (Zone 1_1, Zone 1_2, Zone 1_n) included in first data area 20_1, which is a hot data area, may be hot data zones. Data zones 2_1 to 2_n (Zone 2_1, Zone 2_2, Zone 2_n) included in second data area 20_2, which is a warm data area, may be warm data zones. Data zones 3_1 to 3_n (Zone 3_1, Zone 3_2, Zone 3_n) included in third data area 20_3, which is a cold data area, may be cold data zones.

[0064] In one embodiment, if the attribute of data stored in one storage device is hot data, the data stored in one storage device may be temporarily stored in a hot data zone. If the attribute of data stored in one storage device is warm data, the data stored in one storage device may be temporarily stored in a warm data zone. If the attribute of data stored in one storage device is cold data, the data stored in one storage device may be temporarily stored in a cold data zone.

[0065] In one embodiment, the hot data zone, warm data zone, and cold data zone may be zones in which data stored in a storage device is temporarily stored according to the number of times the data is accessed. For example, data may be stored in each of the hot data zone, warm data zone, and cold data zone in a predetermined order, such as descending order of average access count. For example, according to this order, the data stored in the hot data zone may have the highest average access count, and the data stored in the cold data zone may have the lowest average access count. In other embodiments, a different predetermined order may be used.

[0066] In one embodiment, the hot data zone, the warm data zone, and the cold data zone may be zones that are classified according to the number of times the data zones are accessed.

[0067] The zone group may be a cache area because data stored in the storage device is temporarily stored in the zone group or data read from the storage device is temporarily stored in the zone group. For example, the first zone group, Zone Group 1, may be a first cache area, and the second zone group, Zone Group 2, may be a second cache area.

[0068] In one embodiment, the system controller 10 can manage one storage device and one zone group assigned to the one storage device in one namespace. For example, the system controller 10 can manage the first storage device 31_1 and the first zone group Zone Group 1 in the first namespace Name Space 1, the second storage device 31_2 and the second zone group Zone Group 2 in the second namespace Name Space 2, and the nth storage device 31_n and the nth zone group Zone Group n in the nth namespace Name Space n.

[0069] The system controller 10 may load data stored in a source storage device into a source data zone among N data zones included in a source zone group. Here, the source zone group may be a zone group assigned to the source storage device. For example, if the source storage device is the first storage device 31_1, the source zone group may be the first zone group, Zone Group 1. The source data zone may be any one of the N data zones included in the source zone group. For example, if the source zone group is the first zone group, Zone Group 1, the source data zone may be any one of the first_1, second_1, and third_1 data zones, Zone1_1, Zone2_1, and Zone3_1, included in the first zone group, Zone Group 1.

[0070] In one embodiment, system controller 10 may load data stored in the source storage device into the warm data zone of the source zone group. For example, if the source storage device is first storage device 31_1, the source zone group may be first zone group Zone Group 1, and the warm data zone of first zone group Zone Group 1 may be second_1 data zone Zone2_1 included in second data area 20_2 among first_1, second_1, and third_1 data zones Zone1_1, Zone2_1, and Zone3_1 included in first zone group Zone Group 1. In this case, the warm data zone of first zone group Zone Group 1 may be the source data zone.

[0071] In one embodiment, system controller 10 may load data stored in a source storage device into a hot data zone of a source zone group. For example, if the source storage device is first storage device 31_1, the source zone group may be first zone group Zone Group 1, and the hot data zone of first zone group Zone Group 1 may be data zone 1_1, Zone 1_1, Zone 2_1, and Zone 3_1, which is included in first data area 20_1. In this case, the hot data zone of first zone group Zone Group 1 may be the source data zone.

[0072] In one embodiment, system controller 10 may load data stored in the source storage device into the cold data zone of the source zone group. For example, if the source storage device is first storage device 31_1, the source zone group may be first zone group Zone Group 1, and the cold data zone of first zone group Zone Group 1 may be the third_1 data zone Zone3_1 included in third data area 20_3 among the first_1, second_1, and third_1 data zones Zone1_1, Zone2_1, and Zone3_1. In this case, the cold data zone of first zone group Zone Group 1 may be the source data zone.

[0073] For convenience of explanation, the following description of an embodiment of the present invention will be given assuming that the source data zone is a warm data zone.

[0074] When data stored in the source storage device is loaded into the warm data zone of the source zone group, the system controller 10 can obtain a first access count, which is the number of times the warm data zone of the source zone group has been accessed, and a second count, which is the number of times the reference data zone of the target zone group has been accessed. The method of obtaining the first access count and the second access count will be described later with reference to FIGS. 4 and 5.

[0075] The target zone group may be a zone group assigned to the target storage device. For example, if the target storage device is the second storage device 31_2, the target zone group may be the second zone group, Zone Group 2. The reference data zone of the target zone group may be any one of the first_2, second_2, and third_2 data zones, Zone1_2, Zone2_2, and Zone3_2, included in the second zone group, Zone Group 2. Specifically, for example, the reference data zone of the target zone group may be the second_2 data zone, Zone2_2, i.e., the warm data zone, included in the second data area 20_2.

[0076] For convenience of explanation, the following description of the embodiment of the present invention will be based on the assumption that the reference data zone of the target zone group is a warm data zone.

[0077] Upon obtaining the first access count and the second access count, the system controller 10 can control the cache tier 20 to move the data loaded in the warm data zone of the source zone group to the target data zone based on the first access count and the second access count. Here, the target data zone may be any one of the hot data zone, warm data zone, and cold data zone included in the target zone group.

[0078] The system controller 10 can control the storage tier 30 to store the data moved to the target data zone in the target storage device.

[0079] In one embodiment, the system controller 10 may include a storage tier controller 11, a cache tier controller 12, and an access count memory 13.

[0080] The storage tier control unit 11 can control the source storage device to perform a read operation to read data stored in the source storage device.

[0081] The storage tier control unit 11 can control the target storage device to perform a write operation to store the data moved to the target data zone in the target storage device.

[0082] The cache tier control unit 12 can acquire the first access count and the second access count based on the access count information provided by the access count storage unit 13.

[0083] The cache tier control unit 12 can compare the first access count and the second access count. For example, the cache tier control unit 12 can compare whether the first access count is greater than the second access count. Alternatively, the cache tier control unit 12 can compare whether the first access count is less than or equal to the second access count.

[0084] The cache tier control unit 12 can control the cache tier 20 to move the data loaded into the warm data zone of the source zone group to the target data zone according to the result of the comparison.

[0085] The access count storage unit 13 can store access count information. The access count information may be information indicating the number of times data stored in each of a plurality of data zones, Zone1_1, Zone2_1, Zone3_1, Zone1_2, Zone2_2, Zone3_2, Zone1_n, Zone2_n, and Zone3_n, has been accessed, i.e., the access count. This will be described in detail later with reference to FIGS. 4 and 5.

[0086] The plurality of storage devices 31_1, 31_2, 31_n may have one or more different characteristics or attributes, such as an operating policy, a useful life, a use, and / or one or more different characteristics. In this case, the cache tier control unit 12 may preset a weight corresponding to each of the plurality of storage devices 31_1, 31_2, 31_n. When the cache tier control unit 12 compares the first access count with the second access count, the cache tier control unit 12 may reflect a weight corresponding to the characteristics of a target storage device selected from the plurality of storage devices 31_1, 31_2, 31_n in the second access count.

[0087] Specifically, for example, the cache tier control unit 12 can reflect the weighting corresponding to the target storage device among the weightings corresponding to each of the multiple storage devices 31_1, 31_2, 31_n in the second access count. Then, the cache tier control unit 12 can control the cache tier 20 to move the data loaded in the warm data zone of the source zone group to the target data zone according to the result of comparing the second access count, in which the weighting corresponding to the target storage device is reflected, with the first access count.

[0088] In another embodiment, the system controller 10 may load data stored in a source storage device into a first data zone among N data zones included in a source zone group. When the data stored in the source storage device is loaded into the first data zone, the system controller 10 may compare a first average access count of the data stored in the first data zone with a second average access count of the data stored in a second data zone among N data zones included in a target zone group. The system controller 10 may control the cache tier 20 to move the data loaded into the first data zone to the second data zone depending on whether the first average access count is smaller than or equal to the second average access count. The system controller 10 may control the storage tier 30 to store the data moved to the second data zone in the target storage device.

[0089] In yet another embodiment, the average access count of data stored in a first cache area (e.g., first zone group Zone Group 1) may be greater than the average access count of data stored in a second cache area (e.g., second zone group Zone Group 2). In this case, the system controller 10 may control the movement of data between one storage device (e.g., first storage device 31_1) and another storage device (e.g., second storage device 31_2) via the first cache area and the second cache area. Specifically, the system controller 10 may temporarily store data stored in the first storage device 31_1 in a hot data zone (e.g., first_2 data zone Zone 1_2) of the second cache area, and then store the data temporarily stored in the hot data zone of the second cache area in the second storage device 31_2.

[0090] FIG. 3 is a diagram illustrating an embodiment of moving data within a cache tier.

[0091] In describing the embodiment shown in FIG. 3, it is assumed that the source storage device is the first storage device 31_1, the source zone group is the first zone group Zone Group 1, the target storage device is the second storage device 31_2, and the target zone group is the second zone group Zone Group 2.

[0092] It is also assumed that the first data area 20_1 is a hot data area, the second data area 20_2 is a warm data area, and the third data area 20_3 is a cold data area.

[0093] It is also assumed that the 1_1 and 1_2 data zones Zone1_1 and Zone1_2 included in the first data area 20_1 are hot data zones, the 2_1 and 2_2 data zones Zone2_1 and Zone2_2 included in the second data area 20_2 are warm data zones, and the 3_1 and 3_2 data zones Zone3_1 and Zone3_2 included in the third data area 20_3 are cold data zones.

[0094] In one embodiment, the system controller 10 can control the cache tier 20 and the storage tier 30 to move data stored in the first storage device 31_1 to the second storage device 31_2 in response to a user request.

[0095] Referring to Figures 2 and 3, for example, the system controller 10 can temporarily store data stored in the first storage device 31_1 in a hot data zone of the second cache area, and then store the data temporarily stored in the hot data zone of the second cache area in the second storage device 31_2.

[0096] Specifically, for example, the storage tier control unit 11 may control the first storage device 31_1 to perform a read operation to read x-th data DATAx (x is a natural number) stored in the first storage device 31_1. The first storage device 31_1 may perform the read operation and output the x-th data DATAx. The storage tier control unit 11 may load the x-th data DATAx into the 2_1 data zone Zone2_1 included in the first zone group Zone Group 1. In this case, since the x-th data DATAx is recently accessed data, the attribute of the x-th data DATAx may be treated as hot data. The cache tier control unit 12 may control the cache tier 20 to store the x-th data DATAx stored in the 2_1 data zone Zone2_1 in the 1_2 data zone Zone1_2 included in the second zone group Zone Group 2. The storage tier control unit 11 may control the second storage device 31_2 to perform a write operation to store the x-th data DATAx stored in the 1_2 data zone Zone1_2 in the second storage device 31_2.

[0097] After the xth data DATAx is moved from the first storage device 31_1 to the second storage device 31_2, the system controller 10 may control the storage tier 30 to move the yth data DATAy (y is a natural number) stored in the first storage device 31_1 to the second storage device 31_2. Specifically, the yth data DATAy stored in the first storage device 31_1 may be loaded into the 2_1 data zone Zone2_1 included in the first zone group Zone Group 1. Since the yth data DATAy is recently accessed data, the attribute of the yth data DATAy may be hot data. The yth data DATAy stored in the 2_1 data zone Zone2_1 may be moved to the 1_2 data zone Zone1_2 included in the second zone group Zone Group 2.

[0098] In this case, the sizes of the xth data DATAx and the yth data DATAy stored in the first_2 data zone Zone1_2 may fill the storage capacity of the first_2 data zone Zone1_2 included in the second zone group Zone Group 2. In this case, the cache tier control unit 12 may control the cache tier 20 to move the xth data DATAx corresponding to the LRU (least recently used) of the xth data DATAx and the yth data DATAy stored in the first_2 data zone Zone1_2 to the second_2 data zone Zone2_2 included in the second zone group Zone Group 2.

[0099] Meanwhile, the y-th data DATAy stored in the first_2 data zone Zone1_2 can be stored in the second storage device 31_2.

[0100] After the y-th data DATAy is moved from the first storage device 31_1 to the second storage device 31_2, the z-th data DATAz (z is a natural number) stored in the first storage device 31_1 can also be moved to the second storage device 31_2.

[0101] In this case, the z-th data DATAz stored in the 2_1 data zone Zone2_1 is moved to the 1_2 data zone Zone1_2 included in the second zone group Zone Group 2, and the sizes of the y-th data DATAy and the z-th data DATAz stored in the 1_2 data zone Zone1_2 can fill the storage capacity of the 1_2 data zone Zone1_2. In this case, the y-th data DATAy corresponding to the LRU among the y-th data DATAy and the z-th data DATAz can be moved to the 2_2 data zone Zone2_2.

[0102] As the y-th data DATAy is moved to the 2_2 data zone Zone2_2, the sizes of the x-th data DATAx and the y-th data DATAy stored in the 2_2 data zone Zone2_2 can fill the storage capacity of the 2_2 data zone Zone2_2. In this case, the cache tier control unit 12 can control the cache tier 20 to move the x-th data DATAx corresponding to the LRU among the x-th data DATAx and the y-th data DATAy stored in the 2_2 data zone Zone2_2 to the 3_2 data zone Zone3_2 included in the second zone group Zone Group 2.

[0103] Meanwhile, the z-th data DATAz stored in the 1_2 data zone Zone1_2 can be stored in the second storage device 31_2.

[0104] Although not shown, after the zth data DATAz is moved from the first storage device 31_1 to the second storage device 31_2, other data stored in the first storage device 31_1 may be moved to the second storage device 31_2. When the size of the zth data DATAz and other data stored in the 1_2 data zone Zone1_2 fills the storage capacity of the 1_2 data zone Zone1_2, the zth data DATAz may be moved to the 2_2 data zone Zone2_2. When the size of the yth data DATAy and the zth data DATAz stored in the 2_2 data zone Zone2_2 fills the storage capacity of the 2_2 data zone Zone2_2, the yth data DATAy may be moved to the 3_2 data zone Zone3_2.

[0105] As the y-th data DATAy is moved to the 3_2 data zone Zone3_2, the sizes of the x-th data DATAx and the y-th data DATAy stored in the 3_2 data zone Zone3_2 can fill the storage capacity of the 3_2 data zone Zone3_2. In this case, the cache tier control unit 12 can control the cache tier 20 to delete the x-th data DATAx corresponding to the LRU among the x-th data DATAx and the y-th data DATAy stored in the 3_2 data zone Zone3_2.

[0106] 3, it has been described that the xth data DATAx is stored in the second storage device 31_2, and then the yth data DATAy is stored in the second storage device 31_2, and then the zth data DATAz is stored in the second storage device 31_2. However, this is not limited thereto, and the above-described embodiment can also be applied when the xth data DATAx, the yth data DATAy, and the zth data DATAz are output from the first storage device 31_1 at the same time.

[0107] In another embodiment, in the case of an operation in which data stored in the cache tier 20 is stored in a target storage device, the data stored in the first storage device 31_1 may be finally moved to the 3_2 data zone Zone3_2 via the 2_1 data zone Zone2_1, the 1_2 data zone Zone1_2, and the 2_2 data zone Zone2_2 in the cache tier 20, and then only the data temporarily stored in the 3_2 data zone Zone3_2 may be stored in the target storage device. Referring to FIG. 3, for example, of the xth data DATAx, the yth data DATAy, and the zth data DATAz, only the xth data DATAx temporarily stored in the 3_2 data zone Zone3_2 may be stored in the second storage device 31_2.

[0108] Meanwhile, different operation policies may be applied to each of the plurality of storage devices 31_1, 31_2, and 31_n. In this case, the attributes of data may be treated differently depending on which of the plurality of storage devices 31_1, 31_2, and 31_n the data is stored in. For example, even if the attribute of data stored in the first storage device 31_1 is treated as hot data, the data stored in the first storage device 31_1 may be treated as warm data or cold data in the second storage device 31_2. In this case, if the data stored in the first storage device 31_1 is constantly moved to the first data zone Zone1_2, which corresponds to the hot data zone, the data may be treated as hot data in the second storage device 31_2, even though it should be treated as warm data or cold data. This does not conform to the operation policy of the second storage device 31_2, and may result in a decrease in performance of the storage system 1. Therefore, the data stored in the source storage device must be appropriately classified and stored in the cache tier 20 based on the access count of the data stored in the source storage device and the access count of the data stored in the target storage device.

[0109] FIG. 4 is a diagram illustrating an access count storage unit according to an embodiment of the present invention, and FIG. 5 is a diagram illustrating first to third tables including access count information.

[0110] 2 and 4, the access count storage unit 13 may include access count information indicating the number of times each of a plurality of data zones, Zone1_1, Zone2_1, Zone3_1, Zone1_2, Zone2_2, Zone3_2, Zone1_n, Zone2_n, and Zone3_n, has been accessed. Specifically, the access count storage unit 13 may include access count information indicating the number of times each of a plurality of data zones, Zone1_1, Zone2_1, Zone3_1, Zone1_2, Zone2_2, Zone3_2, Zone1_n, Zone2_n, and Zone3_n, has been accessed. The access count information may be organized in a table format and stored in the access count storage unit 13, for example.

[0111] 2 and 4, for example, the access count storage unit 13 may store 1_1 to 1_n tables Table1_1, Table1_2, and Table1_n containing access count information of data stored in the 1_1 to 1_n data zones Zone1_1, Zone1_2, and Zone1_n included in the first data region 20_1, respectively. Here, the 1_1 table Table1_1 may include access count information of data stored in the 1_1 data zone Zone1_1 included in the first data region 20_1. The 1_2 table Table1_2 may include access count information of data stored in the 1_2 data zone Zone1_2 included in the first data region 20_1. The 1_n table Table1_n may include access count information of data stored in the 1_n data zone Zone1_n included in the first data region 20_1.

[0112] 2 and 4, for example, the access count storage unit 13 may store 2_1 to 2_n tables Table2_1, Table2_2, and Table2_n containing access count information of data stored in 2_1 to 2_n data zones Zone2_1, Zone2_2, and Zone2_n included in the second data region 20_2. Here, the 2_1 table Table2_1 may include access count information of data stored in the 2_1 data zone Zone2_1 included in the second data region 20_2. The 2_2 table Table2_2 may include access count information of data stored in the 2_2 data zone Zone2_2 included in the second data region 20_2. The 2_n table Table2_n may include access count information of data stored in the 2_n data zone Zone2_n included in the second data region 20_2.

[0113] 2 and 4, for example, the access count storage unit 13 may store 3_1 to 3_n tables Table3_1, Table3_2, and Table3_n containing access count information of data stored in 3_1 to 3_n data zones Zone3_1, Zone3_2, and Zone3_n, respectively, included in the third data region 20_3. Here, the 3_1 table Table3_1 may contain access count information of data stored in the 3_1 data zone Zone3_1 included in the third data region 20_3. The 3_2 table Table3_2 may contain access count information of data stored in the 3_2 data zone Zone3_2 included in the third data region 20_3. The 3_n table Table3_n may contain access count information of data stored in the 3_n data zone Zone3_n included in the third data region 20_3.

[0114] In one embodiment, the access count information may include information indicating the access count of data stored in a hot data zone (e.g., any one of Zone1_1, Zone1_2, and Zone1_n) included in each of multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n.

[0115] In one embodiment, the access count information may include information indicating the access count of data stored in a warm data zone (e.g., any one of Zone2_1, Zone2_2, and Zone2_n) included in each of multiple zone groups, Zone Group 1, Zone Group 2, and Zone Group n.

[0116] In one embodiment, the access count information may include information indicating the access count of data stored in a cold data zone (e.g., any one of Zone3_1, Zone3_2, and Zone3_n) included in each of multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n.

[0117] 5, the first table Table1 shown in Fig. 5 may be any one of the 1_1 to 1_n tables Table1_1, Table1_2, and Table1_n shown in Fig. 4. The second table Table2 shown in Fig. 5 may be any one of the 2_1 to 2_n tables Table2_1, Table2_2, and Table2_n shown in Fig. 4. The third table Table3 shown in Fig. 5 may be any one of the 3_1 to 3_n tables Table3_1, Table3_2, and Table3_n shown in Fig. 4.

[0118] The first table Table1 may include information indicating the first to fifth access counts (Access Count1 to Access Count5) of the first to fifth data items DATA1 to DATA5. The second table Table2 may include information indicating the sixth to tenth access counts (Access Count6 to Access Count10) of the sixth to tenth data items DATA6 to DATA10. The third table Table3 may include information indicating the eleventh to fifteenth access counts (Access Count11 to Access Count15) of the eleventh to fifteenth data items DATA11 to DATA15.

[0119] Also, referring to Figure 4, in one embodiment, the cache tier control unit 12 can calculate the average access count of data by referring to multiple tables Table1_1, Table2_1, Table3_1, Table1_2, Table2_2, Table3_2, Table1_n, Table2_n, and Table3_n.

[0120] Referring to FIG. 5, for example, the cache tier control unit 12 can calculate the xth average access count Average Access Count x, which is the average value of the first to fifth access counts Access Count1 to Access Count5 included in the first table Table1.

[0121] Referring to FIG. 5, for example, the cache tier control unit 12 can calculate the y-th average access count Average Access Count y, which is the average value of the sixth to tenth access counts Access Count6 to Access Count10 included in the second table Table2.

[0122] Referring to FIG. 5, for example, the cache tier control unit 12 can calculate the zth average access count Average Access Count z, which is the average value of the eleventh to fifteenth access counts Access Count11 to Access Count15 included in the third table Table3.

[0123] In one embodiment, the cache tier control unit 12 can calculate the average value of the access counts of the data stored in the warm data zone of the source zone group using the first access count, and can calculate the average value of the access counts of the data stored in the warm data zone of the target zone group using the second access count.

[0124] 2, 4, and 5, for example, assuming that the source zone group is the first zone group (Zone Group 1) and the target zone group is the second zone group (Zone Group 2), the cache tier control unit 12 can calculate the average value of the access counts included in the second_1 table (Table 2_1) using the first access count. The cache tier control unit 12 can calculate the average value of the access counts included in the second_2 table (Table 2_2) using the second access count. Here, the average value of the access counts can be calculated as described above with reference to FIG. 5.

[0125] In another embodiment, the average access count may be included in each of multiple tables Table1_1, Table2_1, Table3_1, Table1_2, Table2_2, Table3_2, Table1_n, Table2_n, and Table3_n stored in the access count storage unit 13. In this case, the cache tier control unit 12 can obtain the average access count from the access count storage unit 13 without a separate calculation operation.

[0126] In one embodiment, in any one of the multiple zone groups, Zone Group 1, Zone Group 2, and Zone Group n, the average access count of data stored in the hot data zone may be greater than the average access count of data stored in the warm data zone, and the average access count of data stored in the warm data zone may be greater than the average access count of data stored in the cold data zone.

[0127] 4 and 5, for example, assume that one of the multiple zone groups Zone Group 1, Zone Group 2, and Zone Group n is Zone Group 1, the first table Table1 is Table 1_1, the second table Table2 is Table 2_1, and the third table Table3 is Table 3_1. The xth average access count (Average Access Count x) may be greater than the yth average access count (Average Access Count y). The yth average access count (Average Access Count y) may be greater than the zth average access count (Average Access Count z).

[0128] In another embodiment, the average access count of data stored in the first cache area may be greater than the average access count of data stored in the second cache area. For example, the average access count, which is the average value of the access counts of tables 1_1, 2_1, and 3_1, Table1_1, Table2_1, and Table3_1, stored in the first zone group, Zone Group 1, may be greater than the average access count, which is the average value of the access counts of tables 1_2, 2_2, and 3_2, Table1_2, Table2_2, and Table3_2, stored in the second zone group, Zone Group 2.

[0129] In one embodiment, the cache tier control unit 12 can reset or initialize the access count information stored in the access count storage unit 13 based on the access count information stored in the access count storage unit 13 and preset reference access count information.

[0130] FIG. 6 is a diagram illustrating another embodiment of moving data within a cache tier.

[0131] In describing the embodiment shown in FIG. 6, it is assumed that the source storage device is the first storage device 31_1, the source zone group is the first zone group Zone Group 1, the target storage device is the second storage device 31_2, and the target zone group is the second zone group Zone Group 2.

[0132] It is also assumed that the first data area 20_1 is a hot data area, the second data area 20_2 is a warm data area, and the third data area 20_3 is a cold data area.

[0133] It is also assumed that the 1_1 and 1_2 data zones Zone1_1 and Zone1_2 included in the first data area 20_1 are hot data zones, the 2_1 and 2_2 data zones Zone2_1 and Zone2_2 included in the second data area 20_2 are warm data zones, and the 3_1 and 3_2 data zones Zone3_1 and Zone3_2 included in the third data area 20_3 are cold data zones.

[0134] 2 and 6, in one embodiment, the storage tier controller 11 may control the first storage device 31_1 to perform a read operation to read the xth data DATAx, the yth data DATAy, and the zth data DATAz stored in the first storage device 31_1. The first storage device 31_1 may output the xth data DATAx, the yth data DATAy, and the zth data DATAz. The storage tier controller 11 may load the xth data DATAx, the yth data DATAy, and the zth data DATAz into the first data zone. Here, the first data zone may be the 2_1 data zone Zone2_1. In this case, the number of times the first data zone is accessed may increase. For example, when the xth data DATAx, the yth data DATAy, and the zth data DATAz are loaded into the 2_1 data zone Zone2_1, the number of times the 2_1 data zone Zone2_1 is accessed may increase by three.

[0135] The cache tier control unit 12 can compare the first access count of the data stored in the first data zone with the second access count of the data stored in the second data zone included in the second zone group Zone Group 2.

[0136] Here, the first access count may be an average value of the access counts of data stored in the 2_1 data zone, Zone2_1, i.e., a first average access count, and the second access count may be an average value of the access counts of data stored in the 2_2 data zone, Zone2_2, i.e., a second average access count.

[0137] In one embodiment, the second data zone included in the second zone group Zone Group 2 may be a second_2 data zone Zone2_2, which is a warm data area.

[0138] In one embodiment, the cache tier control unit 12 may control the cache tier 20 to move data loaded in the 2_1 data zone Zone2_1 of the first zone group Zone Group 1 to a target data zone included in the second zone group Zone Group 2 based on the result of comparing the first access count and the second access count. In this case, the number of times the target data zone is accessed may not increase.

[0139] Specifically, for example, if the first access count is greater than the second access count, the cache tier control unit 12 can control the cache tier 20 to move data loaded into the 2_1 data zone Zone2_1 of the first zone group Zone Group 1 to the 1_2 data zone Zone1_2 included in the second zone group Zone Group 2.

[0140] In addition, if the first access count is the same as the second access count, the cache tier control unit 12 can control the cache tier 20 to move the data loaded into the 2_1 data zone Zone2_1 of the first zone group Zone Group 1 to the 2_2 data zone Zone2_2 included in the second zone group Zone Group 2.

[0141] In addition, if the first access count is smaller than the second access count, the cache tier control unit 12 can control the cache tier 20 to move the data loaded in the 2_1 data zone Zone2_1 of the first zone group Zone Group 1 to the 3_2 data zone Zone3_2 included in the second zone group Zone Group 2.

[0142] In another embodiment, the second data zone included in the second zone group, Zone Group 2, may be the zone storing data with the lowest average access count among the three data zones included in the second zone group, Zone Group 2. Specifically, for example, among the first_2, second_2, and third_2 data zones, Zone1_2, Zone2_2, and Zone3_2, included in the second zone group, Zone Group 2, the third_2 data zone, Zone3_2, which is a cold data zone, may have the lowest average access count. Therefore, the second data zone may be the third_2 data zone, Zone3_2. However, the second data zone is not limited to this.

[0143] In another embodiment, the cache tier control unit 12 can control the cache tier 20 to move data loaded into the first data zone (e.g., the second_1 data zone Zone2_1) to the second data zone (e.g., the third_2 data zone Zone3_2) depending on whether the first average access count is less than or equal to the second average access count.

[0144] In another embodiment, the cache tier control unit 12 can reflect the weighting corresponding to the second storage device 31_2 in the second average access count.

[0145] In another embodiment, if the first average access count is greater than the second average access count, the cache tier control unit 12 may compare the first average access count with a third average access count of data stored in a third data zone (e.g., 2_2 data zone Zone2_2), which is the zone storing data with the next lowest average access count after the second data zone (e.g., 3_2 data zone Zone3_2).The cache tier control unit 12 may then control the cache tier 20 to move the data loaded in the first data zone (e.g., 2_1 data zone Zone2_1) to (e.g., 2_2 data zone Zone2_2) depending on whether the first average access count is less than or equal to the third average access count.

[0146] The storage tier control unit 11 can control the storage tier 30 to store the data moved from the first data zone to the second data zone in the second storage device 31_2. In this case, the number of times the target data zone is accessed can increase.

[0147] Although not shown, in yet another embodiment, if the average access count of data stored in the first cache area is greater than the average access count of data stored in the second cache area, the cache tier control unit 12 can load the data stored in the first storage device 31_1 into a warm data zone (e.g., 2_1 data zone Zone2_1) of the first cache area, and temporarily store the data loaded into the warm data zone (e.g., 2_1 data zone Zone2_1) of the first cache area in a hot data zone (e.g., 1_2 data zone Zone1_2) of the second cache area.

[0148] Although not shown, in yet another embodiment, the average access count of data stored in the first cache area may be greater than the average access count of data stored in the second cache area. The cache tier control unit 12 can temporarily store the data stored in the second storage device 31_2 in a cold data zone (e.g., Zone3_1) of the first cache area, and then store the data temporarily stored in the cold data zone (e.g., Zone3_1) of the first cache area in the first storage device 31_1.

[0149] In the embodiment described above with reference to Fig. 6, the xth data DATAx, the yth data DATAy, and the zth data DATAz are output from the first storage device 31_1 at once and stored in the second storage device 31_2, but this is not limiting. As described above with reference to Fig. 3, the embodiment shown in Fig. 6 can be applied as is even when the xth data DATAx, the yth data DATAy, and the zth data DATAz are not output from the first storage device 31_1 at once.

[0150] In another embodiment, as described above with reference to FIG. 3, data moved from the 2_1 data zone (Zone2_1) to the 3_2 data zone (Zone3_2) may be immediately stored in the second storage device 31_2. Data moved from the 2_1 data zone (Zone2_1) to the 2_2 data zone (Zone2_2) may be moved from the 2_2 data zone (Zone2_2) to the 3_2 data zone (Zone3_2) before being stored in the second storage device 31_2. Data moved from the 2_1 data zone (Zone2_1) to the 1_2 data zone (Zone1_2) may be moved via the 2_2 data zone (Zone2_2) to the 3_2 data zone (Zone3_2) before being stored in the second storage device 31_2.

[0151] As described above, by operating the cache tier 20 efficiently, the performance of the storage system is improved.

[0152] Furthermore, when the storage capacity of the first zone is insufficient, the overhead of moving data from the first zone to the second zone can be reduced, allowing the movement operation between storage devices to be performed quickly.

[0153] FIG. 7 is a flowchart illustrating a method for operating a storage system according to an embodiment of the present invention.

[0154] Referring to FIG. 7, the system controller 10 loads data stored in the source storage device into the warm data zone of the source zone group (S110).

[0155] In other embodiments, not shown, the system controller 10 may load data stored in a source storage device into a hot data zone or a cold data zone of a source zone group.

[0156] The system controller 10 acquires the first access count and the second access count (S120).

[0157] The system controller 10 determines whether the first access count is greater than the second access count (S130).

[0158] If the first access count is greater than the second access count (S130, Yes), the system controller 10 moves the data stored in the warm data zone of the source zone group to the hot data zone included in the target zone group (S140).

[0159] If the first access count is not greater than the second access count (S130, NO), the system controller 10 determines whether the first access count is the same as the second access count (S150).

[0160] If the first access count is equal to the second access count (S150, Yes), the system controller 10 moves the data stored in the warm data zone of the source zone group to the warm data zone included in the target zone group (S160).

[0161] If the first access count is smaller than the second access count (S150, NO), the system controller 10 moves the data stored in the warm data zone of the source zone group to the cold data zone included in the target zone group (S170).

[0162] After the data is moved to the target data zone included in the target zone group, the system controller 10 stores the data stored in the target data zone in the target storage device (S180).

[0163] FIG. 8 is a diagram illustrating a storage device according to an embodiment of the present invention.

[0164] 1 and 8, a storage device 1000 shown in FIG. 8 may be any one of the storage devices 31_1, 31_2, and 31_n shown in FIG.

[0165] The storage device 1000 may be a device that stores data at the request of the system controller 10, such as a mobile phone, smartphone, MP3 player, laptop computer, desktop computer, game console, TV, tablet PC, or in-vehicle infotainment system, or if the system controller 10 is a host, the storage device 1000 may be a device that stores data at the request of the host.

[0166] The storage device 1000 may be manufactured as any one of various types of storage devices depending on the host interface, which is a communication method with the system controller 10. For example, the storage device 1000 may be configured as any one of various types of storage devices, such as an SSD, an MMC, an eMMC, an RS-MMC, or a micro-MMC shaped multimedia card, an SD, a mini-SD, or a micro-SD shaped secure digital card, a USB (universal serial bus) storage device, a UFS (universal flash storage) device, a PCMCIA (personal computer memory card international association) card type storage device, a PCI (peripheral component interconnection) card type storage device, a PCI-E (PCI express) card type storage device, a CF (compact flash) card, a smart media card, or a memory stick.

[0167] The storage device 1000 may be manufactured in any one of various types of packages, such as a package on package (POP), a system in package (SIP), a system on chip (SOC), a multi-chip package (MCP), a chip on board (COB), a wafer-level fabricated package (WFP), or a wafer-level stack package (WSP).

[0168] The storage device 1000 may include a memory device 100 and a memory controller 200 .

[0169] The memory device 100 can operate in response to control by the memory controller 200. Specifically, the memory device 100 can receive a command and an address from the memory controller 200 and access a memory cell (not shown) selected by the address. The memory device 100 can perform an operation instructed by the command on the memory cell selected by the address.

[0170] The command may be, for example, a program command, a read command, or an erase command, and the operation indicated by the command may be, for example, a program operation (or a write operation), a read operation, or an erase operation.

[0171] The program operation may be an operation in which the memory device 100 stores write data provided by the system controller 10 in response to control by the memory controller 200 .

[0172] For example, the memory device 100 may receive a program command, an address, and data, and program the data into a memory cell selected by the address. Here, the data to be programmed into the selected memory cell may be defined as write data.

[0173] The read operation may be an operation in which the memory device 100 reads read data stored in the memory device 100 in response to control by the memory controller 200 .

[0174] For example, the memory device 100 may receive a read command and an address and read data from a region selected by the address in a memory cell array (not shown). Data stored in the memory device 100 and read from a selected region may be defined as read data.

[0175] The erase operation may be an operation in which the memory device 100 erases data stored in the memory device in response to control by the memory controller 200.

[0176] For example, the memory device 100 may receive an erase command and an address and erase data stored in an area selected by the address.

[0177] The memory device 100 may be implemented as a volatile memory device or a non-volatile memory device.

[0178] For example, volatile memory devices may include double data rate synchronous dynamic random access memory (DDR SDRAM), low power double data rate 4 (LPDDR4) SDRAM, graphics double data rate (GDDR) SDRAM, low power DDR (LPDDR), Rambus dynamic random access memory (RDRAM), resistive random access memory (RRAM), phase-change memory (PRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory, spin transfer torque magnetoresistive random access memory, and the like.

[0179] For example, the nonvolatile memory device may include a flash memory, which may include, for example, a NAND flash memory, a vertical NAND flash memory, a NOR flash memory, etc.

[0180] For purposes of explanation, it is assumed herein that memory device 100 is a NAND flash memory.

[0181] The memory device 100 can store write data under the control of the memory controller 200, or can read stored read data and provide the read data to the memory controller 200.

[0182] Memory device 100 may include multiple dies (not shown). Each die may include at least one plane. Each plane may include a memory cell array (not shown) containing memory cells that store write data.

[0183] The memory cell array may include a plurality of memory blocks (not shown). A memory block may be a unit for performing an erase operation to erase data.

[0184] A memory block may include multiple pages (not shown), and a page may be a unit for performing a program operation to store write data or a read operation to read stored read data.

[0185] The memory controller 200 can control the overall operation of the storage device 1000 .

[0186] When power is applied to the memory device 1000, the memory controller 200 can execute commands such as firmware. If the memory device 100 is a flash memory device, the firmware may include a host interface layer, a flash translation layer, and a flash interface layer.

[0187] The host interface layer can control the operations between the system controller 10 and the memory controller 200 .

[0188] The flash translation layer can translate logical addresses provided by the system controller 10 into physical addresses.

[0189] The flash interface layer may control communication between the memory controller 200 and the memory device 100 .

[0190] The memory controller 200 can control the memory device 100 to perform program, read, and erase operations in response to write, read, and erase requests from the system controller 10, respectively.

[0191] During a program operation, the memory controller 200 may provide a program command, a physical address, and write data to the memory device 100 .

[0192] During a read operation, the memory controller 200 may provide a read command and a physical address to the memory device 100 .

[0193] During an erase operation, the memory controller 200 may provide an erase command and a physical address to the memory device 100 .

[0194] The memory controller 200 can independently generate commands, addresses, and data regardless of requests provided by the system controller 10. The memory controller 200 can transmit the independently generated commands, addresses, and data to the memory device 100.

[0195] For example, memory controller 200 may generate commands, addresses, and data for performing background operations, and may provide the commands, addresses, and data to memory device 100.

[0196] The background operation may be at least one of wear leveling, read reclaim, or garbage collection.

[0197] Wear leveling can refer to, for example, static wear leveling, dynamic wear leveling, etc. Static wear leveling can refer to the operation of storing the erase count of a memory block and moving cold data that rarely undergoes erase or write operations to a memory block with the most erase count. Dynamic wear leveling can refer to the operation of storing the erase count of a memory block and programming data to a memory block with the least erase count.

[0198] A read reclaim may refer to an operation of moving data stored in a memory block to another memory block before an uncorrectable error occurs in the data stored in the memory block.

[0199] Garbage collection may refer to an operation of copying valid data included in bad blocks among memory blocks to free blocks and erasing invalid data included in the bad blocks. Here, copying valid data included in bad blocks to free blocks may refer to moving valid data included in bad blocks to free blocks.

[0200] Although not shown, the storage device 1000 may further include a buffer memory (not shown). In one embodiment, the buffer memory may be included in the memory controller 200.

[0201] For example, the buffer memory may include double data rate synchronous dynamic random access memory (DDR SDRAM), low power double data rate 4 (LPDDR4) SDRAM, graphics double data rate (GDDR) SDRAM, low power DDR (LPDDR), Rambus dynamic random access memory (RDRAM), resistive random access memory (RRAM), phase-change memory (PRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory, spin transfer torque magnetoresistive random access memory, and the like.

[0202] The memory controller 200 may control two or more memory devices 100. In this case, the memory controller 200 may control the memory devices 100 in an interleaving manner to improve operational performance.

[0203] The interleaving method may be a method of controlling operations on two or more memory devices 100 so that they overlap.

[0204] FIG. 9 is a diagram illustrating a memory device according to an embodiment of the present invention.

[0205] Referring to FIG. 9, a memory device 100 may include a memory cell array 110, peripheral circuits 120, and control logic .

[0206] The memory cell array 110 may include a plurality of memory blocks MB1 to MBk (k is a positive integer). Here, the number of the plurality of memory blocks MB1 to MBk is merely an example for explaining the embodiment of the present invention, and is not limited to this.

[0207] Each of the memory blocks MB1 to MBk may be connected to a local line LL and bit lines BL1 to BLn (n is a positive integer).

[0208] The local line LL may be connected to a row decoder 122 .

[0209] The local line LL may be connected to each of the memory blocks MB1 to MBk.

[0210] Although not shown, the local line LL may include a first select line, a second select line, and a plurality of word lines arranged between the first select line and the second select line.

[0211] Although not shown, the local lines LL may further include dummy lines arranged between the first select lines and the word lines, dummy lines arranged between the second select lines and the word lines, and pipe lines.

[0212] The bit lines BL1 to BLn may be commonly connected to the memory blocks MB1 to MBk.

[0213] The memory blocks MB1 to MBk may be implemented in a two-dimensional or three-dimensional structure.

[0214] For example, when the memory blocks MB1 to MBk have a two-dimensional structure, the memory cells can be arranged in a direction parallel to the substrate.

[0215] For example, when the memory blocks MB1 to MBk have a three-dimensional structure, the memory cells can be stacked in a direction perpendicular to the substrate.

[0216] The peripheral circuit 120 may include a voltage generator 121 , a row decoder 122 , a page buffer group 123 , a column decoder 124 , an input / output circuit 125 , and a sensing circuit 126 .

[0217] The voltage generator 121 may generate various operating voltages Vop used in program, read, and erase operations in response to an operation command OP_CMD. The voltage generator 121 may also selectively discharge the local line LL in response to the operation command OP_CMD. For example, the voltage generator 121 may generate a program voltage, a verify voltage, a pass voltage, a turn-on voltage, a read voltage, an erase voltage, and a source line voltage under the control of the control logic 130.

[0218] In one embodiment, the voltage generator 121 may generate an internal power supply voltage by regulating an external power supply voltage. The internal power supply voltage generated by the voltage generator 121 is used as an operating voltage for the memory device 100.

[0219] As an example, the voltage generator 121 may generate a plurality of voltages using an external power supply voltage or an internal power supply voltage. For example, the voltage generator 121 may include a plurality of pumping capacitors that receive the internal power supply voltage and generate a plurality of voltages by selectively activating the plurality of pumping capacitors in response to control by the control logic 130. The generated voltages may be supplied to the memory cell array 110 by the row decoder 122.

[0220] The row decoder 122 can transmit an operating voltage Vop to a local line LL in response to a row address RADD. The operating voltage Vop can be transmitted to the selected memory blocks MB1 to MBk via the local line LL.

[0221] For example, during a program operation, the row decoder 122 applies a program voltage to a selected word line and a program pass voltage, which is lower than the program voltage, to unselected word lines.

[0222] For example, during a program verify operation, row decoder 122 applies a verify voltage to selected word lines and a verify pass voltage, which is higher than the verify voltage, to unselected word lines.

[0223] For example, during a read operation, row decoder 122 applies a read voltage to selected word lines and a read pass voltage, which is higher than the read voltage, to unselected word lines.

[0224] For example, during an erase operation, the row decoder 122 can select one memory block according to a decoded address, and can apply a ground voltage to a word line connected to the selected memory block.

[0225] The page buffer group 123 may include first to n-th page buffers PB1 to PBn. The first to n-th page buffers PB1 to PBn may be connected to the memory cell array 110 via first to n-th bit lines BL1 to BLn, respectively. The first to n-th page buffers PB1 to PBn can operate in response to control by the control logic 130.

[0226] Specifically, the first to n-th page buffers PB1 to PBn may operate in response to a page buffer control signal PBSIGNALS. For example, the first to n-th page buffers PB1 to PBn may temporarily store data received via the first to n-th bit lines BL1 to BLn, or may sense the voltage or current of the bit lines BL1 to BLn during a read operation or a verify operation.

[0227] During a program operation, when a program voltage is applied to a selected word line, the first to nth page buffers PB1 to PBn transmit data DATA received via the column decoder 124 and the input / output circuit 125 to selected memory cells via the first to nth bit lines BL1 to BLn. Memory cells of the selected page are programmed according to the transmitted data DATA. Memory cells connected to bit lines to which a program-permitted voltage (e.g., ground voltage) is applied have an increased threshold voltage. The threshold voltage of memory cells connected to bit lines to which a program-inhibited voltage (e.g., power supply voltage) is applied is maintained.

[0228] During the verify operation, the first to nth page buffers PB1 to PBn can sense data stored in the selected memory cell via the first to nth bit lines BL1 to BLn from the selected memory cell.

[0229] During a read operation, the first to nth page buffers PB1 to PBn sense data DATA from the memory cells of the selected page via the first to nth bit lines BL1 to BLn, and can output the sensed data DATA to the input / output circuit 125 according to the control of the column decoder 124.

[0230] During an erase operation, the first to n-th page buffers PB1 to PBn can float the first to n-th bit lines BL1 to BLn.

[0231] The column decoder 124 can transmit data between the input / output circuit 125 and the page buffer group 123 in response to a column address CADD. For example, the column decoder 124 can exchange data with the page buffers PB1 to PBn via the data lines DL, or exchange data with the input / output circuit 125 via the column lines CL.

[0232] The input / output circuit 125 can transfer commands CMD and addresses ADD transferred from the memory controller 200 to the control logic 130 or exchange data DATA with the column decoder 124 .

[0233] During a read operation or a verify operation, the sensing circuit 126 generates a reference current in response to the permission bit VRY_BIT<#>, compares the sensing voltage VPB received from the page buffer group 123 with a reference voltage generated by the reference current, and outputs a pass signal PASS or a fail signal FAIL.

[0234] The control logic 130 can control the peripheral circuit 120 by outputting an operation command OP_CMD, a row address RADD, a page buffer control signal PBSIGNALS, and a permission bit VRY_BIT<#> in response to the command CMD and the address ADD.

[0235] FIG. 10 is a diagram for explaining a memory block according to an embodiment of the present invention.

[0236] Referring to FIG. 10, the memory block MBi shown in FIG. 10 may be any one of the memory blocks MB1 to MBk shown in FIG.

[0237] The memory block MBi may include a first select line, a second select line, a plurality of word lines WL1 to WL16, a source line SL, a plurality of bit lines BL1 to BLn, and a plurality of strings ST.

[0238] For example, the first select line may be the source select line SSL. In the following, it is assumed that the first select line is the source select line SSL.

[0239] For example, the second select line may be the drain select line DSL. In the following, it is assumed that the second select line is the drain select line DSL.

[0240] The word lines WL1 to WL16 may be arranged parallel to one another between the source select line SSL and the drain select line DSL.

[0241] The number of word lines WL1 to WL16 shown in FIG. 10 is merely an example and is not limited to the number shown in the drawing.

[0242] The source line SL may be commonly connected to a plurality of strings ST.

[0243] The plurality of bit lines BL1 to BLn may be connected to the plurality of strings ST, respectively.

[0244] The plurality of strings ST may be connected to the bit lines BL1 to BLn and the source line SL.

[0245] Since the multiple strings ST may be configured identically to one another, a specific description will be given taking the string ST connected to the first bit line BL1 as an example.

[0246] The string ST may include a plurality of memory cells MC1 to MC16, at least one first select transistor, and at least one second select transistor.

[0247] The memory cells MC1 to MC16 may be connected in series between the source select transistor SST and the drain select transistor DST.

[0248] The gates of the memory cells MC1 to MC16 may be connected to the word lines WL1 to WL16, respectively. Therefore, the number of memory cells MC1 to MC16 included in one string ST may be the same as the number of word lines WL1 to WL16.

[0249] Any one of the plurality of memory cells MC1 to MC16 may be configured with any one of SLC, MLC, TLC, and QLC, for example.

[0250] A group of memory cells connected to the same word line among memory cells included in different strings ST can be referred to as a physical page PG. Therefore, a memory block MBi may include as many physical pages PG as the number of word lines WL1 to WL16. Hereinafter, it is assumed that a memory cell included in a physical page PG (e.g., MC3) is the selected memory cell.

[0251] The first select transistor may be, for example, a source select transistor SST. In the following, it is assumed that the first select transistor is the source select transistor SST.

[0252] A first electrode of the source select transistor SST may be connected to a source line SL. A second electrode of the source select transistor SST may be connected to a first memory cell MC1 of the plurality of memory cells MC1 to MC16. A gate electrode of the source select transistor SST may be connected to a source select line SSL.

[0253] The second select transistor may be, for example, a drain select transistor DST. In the following, it is assumed that the second select transistor is a drain select transistor DST.

[0254] A first electrode of the drain select transistor DST may be connected to a 16th memory cell MC16 among the plurality of memory cells MC1 to MC16. A second electrode of the drain select transistor DST may be connected to a first bit line BL1. A gate electrode of the drain select transistor DST may be connected to a drain select line DSL.

[0255] FIG. 11 is a diagram for explaining a memory controller according to an embodiment of the present invention.

[0256] Referring to FIG. 11, the memory controller 200 may include a processor 201, a RAM 202, an error correction circuit 203, a host interface 204, a ROM 205, and a flash interface 206.

[0257] The processor 201 can control the operations of the memory controller 200 .

[0258] The RAM 202 may be used as a buffer memory, cache memory, operating memory, etc. for the memory controller 200 .

[0259] The error correction circuit 203 can generate an error correction code (ECC) for correcting a fail bit or an error bit in the data received from the memory device 100 .

[0260] The error correction circuit 203 may perform error correction encoding on data provided to the memory device 100 and generate data with a parity bit added. The parity bit (not shown) may be stored in the memory device 100.

[0261] The error correction circuit 203 can perform error correction decoding on the data output from the memory device 100, and at this time, the error correction circuit 203 can correct errors using parity.

[0262] For example, the error correction circuit 203 may correct errors using various coded modulations such as an LDPC code, a BCH code, a turbo code, a Reed-Solomon code, a convolution code, an RSC, a TCM, or a BCM.

[0263] The error correction circuitry 203 can calculate error correction code values for data to be programmed into the memory device 100 during a program operation.

[0264] The error correction circuit 203 can perform an error correction operation on the data read from the memory device 100 in a read operation based on the error correction code value.

[0265] The error correction circuit 203 can perform an error correction operation on the data recovered from the memory device 100 in the recovery operation of the failed data.

[0266] The memory controller 200 can communicate with external devices (eg, a host 400, an application processor, etc.) via a host interface 204.

[0267] The ROM 205 can store various pieces of information required for the operation of the memory controller 200 in firmware form.

[0268] The memory controller 200 can communicate with the memory device 100 via a flash interface 206. The memory controller 200 can transmit commands CMD, addresses ADDR, control signals CTRL, etc. to the memory device 100 and can also receive data via the flash interface 206.

[0269] For example, the flash interface 206 may include a NAND interface.

[0270] FIG. 12 is a block diagram showing a memory card system to which a storage device according to an embodiment of the present invention is applied.

[0271] Referring to FIG. 12, a memory card system 2000 includes a memory device 2100, a memory controller 2200, and a connector 2300.

[0272] For example, the memory device 2100 may be composed of various non-volatile memory elements such as EEPROM (Electrically Erasable and Programmable ROM), NAND flash memory, NOR flash memory, PRAM (Phase-change RAM), ReRAM (Resistive RAM), FRAM (Ferroelectric RAM), and STT-MRAM (Spin-Transfer Torque Magnetoresistive RAM).

[0273] The memory controller 2200 is coupled to the memory device 2100. The memory controller 2200 is configured to access the memory device 2100. For example, the memory controller 2200 may be configured to control read, write, erase, and background operations of the memory device 2100. The memory controller 2200 is configured to provide an interface between the memory device 2100 and the host 400. The memory controller 2200 is configured to run firmware for controlling the memory device 2100. The memory controller 2200 may operate similarly to the memory controller 200 described with reference to FIG. 8, but may operate in other manners in other embodiments.

[0274] For example, the memory controller 2200 may include components such as a random access memory (RAM), a processing unit, a host interface, a memory interface, and an error correction unit.

[0275] The memory controller 2200 can communicate with an external device via the connector 2300. The memory controller 2200 can communicate with an external device (e.g., the host 400) according to a particular communication standard. For example, the memory controller 2200 can be configured to communicate with an external device via at least one of various communication standards, such as Universal Serial Bus (USB), multimedia card (MMC), embedded MMC (eMMC), peripheral component interconnection (PCI), PCI-express (PCI-E), Advanced Technology Attachment (ATA), Serial-ATA, Parallel-ATA, small computer system interface (SCSI), enhanced small disk interface (ESDI), Integrated Drive Electronics (IDE), Firewire, Universal Flash Storage (UFS), WIFI, Bluetooth, and NVMe. For example, the connector 2300 can be defined by at least one of the various communication standards mentioned above.

[0276] The memory device 2100 and the memory controller 2200 may be integrated into a single semiconductor device to form a memory card. For example, the memory controller 2200 and the memory device 2100 may be integrated into a single semiconductor device to form a memory card such as a PC card (PCMCIA, personal computer memory card international association), a CompactFlash card, a SmartMedia card (SM, SMC), a Memory Stick, a MultiMediaCard (MMC, RS-MMC, MMCmicro, eMMC), an SD card (SD, miniSD, microSD, SDHC), or a Universal Flash Storage (UFS).

[0277] FIG. 13 is a block diagram showing an SSD (Solid State Drive) system to which a storage device according to an embodiment of the present invention is applied.

[0278] Referring to FIG. 13, the SSD system includes a host 400 and an SSD 3000 .

[0279] The SSD 3000 exchanges signals SIG with the host 400 via a signal connector 3001, and receives a power supply PWR via a power supply connector 3002. The SSD 3000 includes an SSD controller 3200, a plurality of flash memories 3100_1, 3100_2, 3100_n, an auxiliary power supply 3300, and a buffer memory 3400.

[0280] According to an embodiment of the present invention, the SSD controller 3200 can perform the functions of the memory controller 200 described with reference to FIG.

[0281] The SSD controller 3200 can control the multiple flash memories 3100_1, 3100_2, and 3100_n in response to a signal SIG received from the host 400. For example, the signal SIG may be a signal based on the interface of the host 400 and the SSD 3000. For example, the signal SIG may be a signal defined by at least one of interfaces such as Universal Serial Bus (USB), multimedia card (MMC), embedded MMC (eMMC), peripheral component interconnection (PCI), PCI-express (PCI-E), Advanced Technology Attachment (ATA), Serial-ATA, Parallel-ATA, small computer system interface (SCSI), enhanced small disk interface (ESDI), Integrated Drive Electronics (IDE), Firewire, Universal Flash Storage (UFS), WIFI, Bluetooth, and NVMe.

[0282] The auxiliary power supply 3300 is connected to the host 400 via a power connector 3002. The auxiliary power supply 3300 can be charged by receiving a power supply PWR from the host 400. The auxiliary power supply 3300 can provide power to the SSD 3000 when the power supply from the host 400 is not smooth or does not meet a certain level or pattern. For example, the auxiliary power supply 3300 can be located within the SSD 3000 or can be located externally and electrically connected to the SSD 3000. For example, the auxiliary power supply 3300 can be located on a motherboard and provide auxiliary power to the SSD 3000.

[0283] The buffer memory 3400 can temporarily store data. For example, the buffer memory 3400 can temporarily store data received from the host 400 or data received from multiple flash memories 3100_1, 3100_2, and 3100_n, or can temporarily store metadata (e.g., a mapping table) of the flash memories 3221 to 322n. The buffer memory 3400 can include volatile memory such as DRAM, SDRAM, DDR SDRAM, LPDDR SDRAM, or GRAM, or non-volatile memory such as FRAM, ReRAM, STT-MRAM, or PRAM.

[0284] FIG. 14 is a block diagram showing a user system to which a storage device according to an embodiment of the present invention is applied.

[0285] Referring to FIG. 14, a user system 4000 includes an application processor 4100, a memory module 4200, a network module 4300, a storage module 4400, and a user interface 4500.

[0286] The application processor 4100 can run components, an operating system (OS), or user programs included in the user system 4000. For example, the application processor 4100 may include a controller, an interface, a graphics engine, etc. that control the components included in the user system 4000. The application processor 4100 may be provided as a system-on-chip (SoC).

[0287] The memory module 4200 can operate as a main memory, operating memory, buffer memory, or cache memory of the user system 4000. The memory module 4200 may include volatile random access memory such as DRAM, SDRAM, DDR SDRAM, DDR2 SDRAM, DDR3 SDRAM, LPDDR SDRAM, LPDDR2 SDRAM, or LPDDR3 SDRAM, or non-volatile random access memory such as PRAM, ReRAM, MRAM, or FRAM. For example, the application processor 4100 and the memory module 4200 may be packaged based on POP (Package on Package) and provided in a single semiconductor package.

[0288] The network module 4300 can communicate with external devices. For example, the network module 4300 can support wireless communication such as Code Division Multiple Access (CDMA), Global System for Mobile communication (GSM), wideband CDMA (WCDMA), CDMA-2000, Time Division Multiple Access (TDMA), Long Term Evolution (LTE), Wimax, WLAN, UWB, Bluetooth, Wi-Fi, etc. For example, the network module 4300 can be included in the application processor 4100.

[0289] The storage module 4400 can store data. For example, the storage module 4400 can store data received from the application processor 4100. Alternatively, the storage module 4400 can transmit data stored in the storage module 4400 to the application processor 4100. For example, the storage module 4400 can be implemented with a non-volatile semiconductor memory device such as a phase-change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a NAND flash, a NOR flash, or a three-dimensional NAND flash. For example, the storage module 4400 can be provided as a removable storage medium such as a memory card or an external drive of the user system 4000.

[0290] For example, storage module 4400 may operate similarly to storage device 1000 described with reference to Figure 8. Storage module 4400 may include multiple non-volatile memory devices, which may operate similarly to memory device 100 described with reference to Figure 8.

[0291] The user interface 4500 may include an interface for inputting data or commands to the application processor 4100 or outputting data to an external device. For example, the user interface 4500 may include a user input interface such as a keyboard, keypad, button, touch panel, touch screen, touchpad, touch ball, camera, microphone, gyroscope sensor, vibration sensor, piezoelectric element, etc. The user interface 4500 may include a user output interface such as an LCD (Liquid Crystal Display), an OLED (Organic Light Emitting Diode) display device, an AMOLED (Active Matrix OLED) display device, LED, speaker, monitor, etc.

[0292] In one embodiment, the apparatus includes a memory area for storing instructions and a controller configured to execute the instructions for controlling the first storage device and the cache hierarchy. The memory area may be a non-transitory computer-readable medium that stores instructions that, when executed by the controller, may correspond to firmware or another type of instructions that perform operations as described herein.

[0293] The cache tier may correspond to any of the embodiments of the cache tier described above, and may, for example, include a first zone group and a second zone group, each including multiple data zones.

[0294] The instructions can cause the controller to perform a load operation to load data stored in the first storage device in a source data zone corresponding to one of the plurality of data zones in the first zone group, and a move operation to move the data loaded in the source data zone to a target data zone corresponding to one of the plurality of data zones in the second zone group.

[0295] The moving operation may be performed based on a first access count and a second access count, where the first access count corresponds to an access count of a source data zone and the second access count corresponds to an access count of a reference data zone corresponding to one of a plurality of data zones of a second zone group.

[0296] The methods, processes, and / or operations described herein may be performed by code or instructions executed by a computer, processor, controller, or other signal processing device. The computer, processor, controller, or other signal processing device may be described herein or in addition to the elements described herein. Because algorithms underlying the methods (or the operation of the computer, processor, controller, or other signal processing device) are recited, the code or instructions for implementing the operations of the method embodiments may be converted into a computer, processor, controller, or other signal processing device for performing the methods herein.

[0297] When embodied at least partially in software, controllers, processors, devices, modules, units, multiplexers, generators, logic, interfaces, decoders, drivers, generators and other signal generating and signal processing devices may include memory or other storage devices for storing code or instructions that can be executed by, for example, a computer, processor, microprocessor, controller or other signal processing device.

[0298] While various embodiments have been described for purposes of illustration, it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the disclosure as defined in the appended claims. The embodiments may be combined to form further embodiments. [Explanation of symbols]

[0299] 1. Storage System 10 System Controller 20 Cash Tiers 30 storage tiers

Claims

1. a first storage device; a cache tier including a first zone group and a second zone group for temporarily storing data; a system controller that moves data stored in the first storage device to the cache tier; The first zone group and the second zone group each include: a plurality of data zones configured to store data based on the number of times the data is accessed; The system controller loading data stored in the first storage device into a source data zone included in the first zone group; moving the data loaded in the source data zone to a target data zone included in the second zone group based on a first access count and a second access count, which are the number of times the source data zone is accessed; The storage system, wherein the first access count corresponds to the number of accesses of the source data zone, and the second access count corresponds to the number of accesses of a reference data zone included in the second zone group.

2. further comprising a second storage device; the first zone group is assigned to the first storage device; the second zone group is assigned to the second storage device; The system controller 2. The storage system according to claim 1, wherein the data moved to the target data zone is stored in the second storage device.

3. The system controller a storage tier control unit that controls the first storage device to perform a read operation to read data stored in the first storage device, and controls the second storage device to perform a write operation to store data moved to the target data zone in the second storage device; an access count storage unit that stores access count information indicating the number of times that data stored in each of the first and second zone groups has been accessed; 3. The storage system of claim 2, further comprising: a cache tier control unit that acquires the first access count and the second access count based on the access count information, compares the first access count and the second access count, and controls the cache tier to move data loaded in the source data zone to the target data zone according to the comparison result.

4. The cache tier control unit, Calculating an average value of access counts of data stored in the source data zone using the first access count; 4. The storage system according to claim 3, wherein an average value of the access counts of the data stored in the reference data zone is calculated using the second access count.

5. The first zone group and the second zone group each include: including a hot data zone, a warm data zone, and a cold data zone; an average value of access counts of data stored in the hot data zone within the first zone group is greater than an average value of access counts of data stored in the warm data zone within the first zone group; 4. The storage system of claim 3, wherein an average access count of data stored in a warm data zone within the first zone group is greater than an average access count of data stored in a cold data zone within the first zone group.

6. The source data zone: a warm data zone in the first zone group, The reference data zone is a warm data zone in the second zone group, The target data zone is a hot data zone in the second zone group, The cache tier control unit, 6. The storage system of claim 5, wherein if the first access count is greater than the second access count, the cache tier is controlled to move the data loaded in the source data zone to the hot data zone corresponding to the target data zone within the second zone group.

7. The source data zone: a warm data zone in the first zone group, The reference data zone and the target data zone are a warm data zone in the second zone group, The cache tier control unit, 6. The storage system of claim 5, wherein if the first access count is equal to the second access count, the cache tier is controlled to move the data loaded in the source data zone to the warm data zone corresponding to the target data zone within the second zone group.

8. The source data zone: a warm data zone in the first zone group, The reference data zone is a warm data zone in the second zone group, The target data zone is a cold data zone in the second zone group; The cache tier control unit, 6. The storage system of claim 5, wherein if the first access count is less than the second access count, the cache tier is controlled to move the data loaded in the source data zone to the cold data zone corresponding to the target data zone within the second zone group.

9. The cache tier control unit, assigning a weighting corresponding to the selected second storage device from among preset weightings to the second access count; 4. The storage system according to claim 3, wherein the cache tier is controlled to move data loaded into the source data zone to the target data zone depending on a result of comparing the first access count with a second access count assigned a weight corresponding to the second storage device.

10. The cache tier control unit, 4. The storage system of claim 3, wherein when a size of data stored in the hot data zone in the second zone group fills the storage capacity of the hot data zone in the second zone group, the cache tier is controlled to move data corresponding to a least recently used (LRU) of data stored in the hot data zone in the second zone group to the warm data zone in the second zone group.

11. The cache tier control unit, 11. The storage system of claim 10, wherein the cache tier is controlled to move data corresponding to the least recently used data stored in the warm data zone in the second zone group to the cold data zone in the second zone group when the size of the data stored in the warm data zone in the second zone group fills the storage capacity of the warm data zone in the second zone group.

12. The cache tier control unit, 12. The storage system of claim 11, wherein the cache tier is controlled to delete data corresponding to the least recently used data stored in the cold data zone in the second zone group when the size of the data stored in the cold data zone in the second zone group fills the storage capacity of the cold data zone in the second zone group.

13. the first storage device is accessed at a first speed; 2. The storage system of claim 1, wherein the cache tier is accessed at a second speed that is faster than the first speed.

14. a storage tier including a plurality of storage devices; a cache tier including a plurality of zone groups that temporarily stores data to be stored in the plurality of storage devices and temporarily stores data read from the plurality of storage devices; a system controller that moves data stored in a source storage device among the plurality of storage devices via the cache tier to a target storage device among the plurality of storage devices; The plurality of zone groups are assigned to each of the plurality of storage devices, Each of the data zones includes N data zones (N is a natural number greater than 1) that are divided according to the average access count of the stored data, The system controller Loading data stored in the source storage device into a first data zone among N data zones in a source zone group, which is a zone group assigned to the source storage device; comparing a first average access count of data stored in the first data zone with a second average access count of data stored in a second data zone among the N data zones in a target zone group assigned to the target storage device; controlling the cache tier to move data loaded into the first data zone to the second data zone if the first average access count is less than or equal to the second average access count; A storage system, comprising: a storage tier; a storage tier configured to store data moved to the second data zone in the target storage device;

15. The second data zone comprises: The storage system of claim 14, wherein the data with the smallest average access count among the N data zones in the target zone group is stored.

16. The system controller If the first average access count is greater than the second average access count, comparing the first average access count with a third average access count of data stored in a third data zone configured to store data with the second lowest average access count; controlling the cache tier to move data loaded into the first data zone to the third data zone if the first average access count is less than or equal to the third average access count; 16. The storage system according to claim 15, wherein the storage tier is controlled so as to store the data moved to the third data zone in the target storage device.

17. The system controller 15. The storage system according to claim 14, wherein a weight corresponding to the selected target storage device is assigned to the second average access count from among the weights corresponding to the respective storage devices.

18. a first storage device; a second storage device; a first cache area for temporarily storing data to be stored in the first storage device or temporarily storing data read from the first storage device; a second cache area for temporarily storing data to be stored in the second storage device or temporarily storing data read from the second storage device; a system controller that controls data transfer between the first storage device and the second storage device via the first cache area and the second cache area; The first cache area and the second cache area are a hot data zone, a warm data zone, and a cold data zone each configured to store data in a redetermined order based on an average access count; The average access count of the data stored in the first cache area is is greater than the average access count of the data stored in the second cache area, The system controller A storage system characterized in that data stored in the first storage device is temporarily stored in a hot data zone of the second cache area, and data temporarily stored in the hot data zone of the second cache area is stored in the second storage device.

19. The system controller loading data stored in the first storage device into a warm data zone of the first cache area; 20. The storage system according to claim 18, wherein the data loaded into the warm data zone of the first cache area is temporarily stored in the hot data zone of the second cache area.

20. The system controller 20. The storage system of claim 18, wherein the data stored in the second storage device is temporarily stored in the cold data zone of the first cache area, and then the data temporarily stored in the cold data zone of the first cache area is stored in the first storage device.

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