Converter mechanism

Abstract

The invention relates to a converter arrangement for converting a DC voltage, e.g. from a battery, a fuel cell, a DC voltage intermediate circuit, etc., into an N-phase AC voltage, e.g. for supplying an N-phase electric machine, comprising a switched inverter unit (1) including, for each of the N phases, a number M of electronically controllable half-bridges (2, 2', 2a, 2a', 2b, 2b'), where M is greater than 1, and a control unit (3) for controlling the half-bridges (2, 2', 2a, 2a', 2b, 2b') made to operate the half-bridges (2, 2', 2a, 2a', 2b, 2b') with a phase offset at a switching frequency fT, each phase having a common frequency fT to attenuate electrical common-mode disturbances. The outputs of the half bridges (2, 2', 2a, 2a', 2b, 2b') supplying the same phase are connected together via interleaving chokes (4, 4', 4a, 4a', 4b, 4b'), and a first resistive-decrement capacitor circuit (6) is provided at the output of the interleaving chokes (4, 4', 4a, 4a', 4b, 4b') forming a first LC filter stage (8), and a second resistive-decrement capacitor circuit (7) is provided at the output of the common mode chokes (5, 5', 5'') forming a second LC filter stage (9).

Description

[Technical Field]

[0001] The present invention relates to a converter arrangement for converting a DC voltage from a DC voltage source, such as a battery, a fuel cell or a DC voltage intermediate circuit, into an N-phase AC voltage or vice versa. [Background technology]

[0002] Converter mechanisms are basically known from the prior art. They typically use a switching inverter with a semiconductor bridge circuit that imitates a sinusoidal AC voltage consisting of short pulses at high frequencies (from a few kHz to over 20 kHz) by modulation methods such as pulse-width modulation (PWM). Inverters of this type are also called sine-wave inverters. The semiconductor switches switch the DC voltage on and off at a high frequency; the average value of the high-frequency pulse-width modulated switching frequency is the output AC voltage. The output AC voltage is therefore made up of a series of small pulses with different widths, thus approximating the sinusoidal voltage profile typically found in power supplies.

[0003] Converter arrangements of this kind are suitable for a variety of industrial applications, for example to provide an independent power system with polyphase AC voltage from a DC voltage source, which is usually a battery, for example in the form of an uninterruptible power supply (USV).

[0004] Industrial applications are also conceivable, for example for the independent operation of production lines. Furthermore, converter mechanisms of this kind also find application in test stands for electrically and / or conventionally driven vehicles.

[0005] In such types of test stands, the electrical output is provided via a DC voltage intermediate circuit, and a mechanical converter converts the DC voltage into the AC voltage required for the respective electric machine, for example an electric motor.

[0006] Especially on test benches, but also in other industrial applications, such converter arrangements are often designed for bidirectional operation, i.e., allowing electrical power to flow not only from the DC voltage side to the AC voltage side, but also in the opposite direction. This is made possible in particular by bidirectional switching inverters, so-called active front-end converters.

[0007] However, due to the high power outputs, often exceeding 100 kW, required in test stands, and the high AC voltages, often exceeding 500 V, the converter mechanisms are usually too large to be placed directly on the electric load-applying machine (e.g., dynamometer) to be driven in the test stand. Long electrical leads are therefore required. Furthermore, the high-frequency switching processes of pulse-width modulation can cause high-frequency disturbances in the DC voltage intermediate circuit of the test stand, possibly resulting in ripple currents in the power supply lines and in the electric machines connected to them.

[0008] Such disturbances can lead to violations of EMV (electromagnetic compatibility) regulations and can also cause ripple torques in the driven electric machines, which must be prevented.

[0009] To avoid such high-frequency interference, EMV line filters are known, which in the prior art are arranged on each phase of the AC voltage power supply. However, these types of line filters are relatively large due to the LC components used, which in turn makes it difficult to achieve a compact design of the converter arrangement. Summary of the Invention [Problem to be solved by the invention]

[0010] The object of the present invention is to solve at least one of these problems and to provide a compact converter arrangement that can be used as a local power converter, for example in test stands for vehicles, or in other applications such as local independent power systems or USVs, while preferably avoiding or minimizing the generation of high frequency interference. [Means for solving the problem]

[0011] This and other problems are solved by the converter arrangement according to claim 1.

[0012] The converter arrangement according to the invention is constructed for converting a DC voltage into an N-phase AC voltage, or vice versa. It can include an actively switched rectifier or inverter (so-called active front-end converter), which is particularly suitable for energy recovery, i.e., for bidirectional operation. It should be noted that the direction of the flow of electrical power transmitted between the DC voltage side and the AC voltage side is not important for the invention.

[0013] When used as an inverter, the DC voltage can be provided by a DC voltage source, such as a battery, a fuel cell, a DC voltage intermediate circuit, etc., and the AC voltage can be designed to supply an N-phase electric machine. Alternatively, other application cases of switching converters can also be envisaged according to the invention.

[0014] According to the invention, the converter arrangement comprises a switched inverter unit having, for at least one, but preferably for each of the N phases, a number M of electronically controllable half-bridges, M being greater than 1. Furthermore, the half-bridges are switched at substantially the same switching frequency f T A control unit is provided for controlling the half bridges, which are fabricated for actuation with a phase or time offset.

[0015] This results in an increase in the switching frequency of the PWM method by a factor M, so that a smoother and more interference-free imitation of a sinusoidal signal can be achieved even at high voltages and frequencies.

[0016] Each phase is connected to one winding of a common-mode choke with a common magnetic core to attenuate electrical common-mode interference. To reduce interference, the outputs of the half-bridges supplying the same phase are connected together via interleaving chokes. In other words, M half-bridges intended to supply one of the N phases are connected together on a common core via M interleaving chokes. This has the advantage of allowing smooth transitions between the individual switched half-bridges and reducing interference. The interleaving chokes are preferably current-compensated chokes, i.e., their windings are arranged in opposite directions on a common core.

[0017] The control unit can be designed to activate each of the half bridges of one phase for the same switch-on time T, and activate each of the M half bridges assigned to one phase with a time delay of T / M, for example, if M=2, then both half bridges assigned to one phase are activated with a delay of T / 2 in this example.

[0018] According to the present invention, a first LC filter stage and a second LC filter stage are provided for guiding high frequency interference. The first LC filter stage is formed by an interleaving choke and a resistive attenuating capacitor circuit. The second LC filter stage is formed by a common mode choke and a resistive attenuating capacitor circuit.

[0019] According to the invention, it may be provided that a first LC filter stage is formed by an interleaving choke and a first resistively attenuating capacitor circuit, and a second LC filter stage is formed by a common mode choke and a separate second resistively attenuating capacitor circuit, whereby the first capacitor circuit is arranged at the output of the interleaving choke, i.e. between the interleaving choke and the common mode choke, and the second capacitor circuit is arranged at the output of the common mode choke.

[0020] Alternatively, the present invention may provide for a first LC filter stage to be formed by an interleaving choke and a composite resistive-attenuating capacitor circuit, and a second LC filter stage to be formed by a common mode choke and this composite resistive-attenuating capacitor circuit. In such a case, only one resistive-attenuating capacitor circuit is provided for both LC filter stages; in such a case, the composite capacitor circuit is arranged between the interleaving choke and the common mode choke.

[0021] The creation of a second LC filter stage eliminates the need for a separate line filter; the interleaving choke and common mode choke that would otherwise be required are designed in accordance with the invention in such a way that they guide away the interference caused by the switched inverter.

[0022] According to the present invention, in particular the longitudinal inductances that are not necessary per se, i.e. the longitudinal reactance of the interleaving choke or the leakage reactance of the common-mode choke, are designed to produce the desired filtering effect, which makes it possible to eliminate the need for additional EMV filters in order to comply with EMV standards such as DIN EN 55011 or DIN EN 61000. In particular, it may be intended that the first and second LC filter stages be designed so that the total harmonic content (distortion factor) in each phase does not exceed 3%.

[0023] According to the invention, it may be provided that the limit frequency of the first LC filter stage and the limit frequency of the second LC filter stage are different. In particular, the limit frequency of the first LC filter stage may be lower than the limit frequency of the second LC filter stage. In particular, it is preferred that the limit frequency of the first LC filter stage is M times the switching frequency f T It may be intended that the filter stage be in the range of about 0.8×M×fT to 1.2×M×fT, whereby this filter stage serves for efficient extraction of the interference generated by the M-fold switching frequency.

[0024] According to the invention, the limit frequency of the second LC filter stage is preferably M times the switching frequency f T Within a range of several times, for example, 1×M×f T preferably within the range of 4×M×f T From 10 × M × f T Alternatively, it may be intended to be in a range higher than this, whereby this filter stage serves for efficient extraction of harmonics of the switching frequency.

[0025] The number of phases N may in particular be equal to 3. Alternatively, embodiments with a single phase, i.e. N=1, are also contemplated according to the invention; in such cases, L switched phases and L switched zero conductors are provided. The number M of half bridges per phase may be 2, 3, 4 or more.

[0026] The capacitor circuits used for the filter stages may be configured in the form of star circuits of at least N capacitors between the N phases, i.e., for each of the N phases, one capacitor and a parallel-connected resistor are provided, which are mutually arranged in a star circuit.

[0027] The first capacitor circuit may have a capacitance of approximately 30 μF per phase, and the second capacitor circuit may have a capacitance of approximately 11 μF per phase, although these values may vary depending on the desired application.

[0028] According to the present invention, the control unit controls each of the half bridges at a switching frequency f of at least about 24 kHz to about 33 kHz. T This means that the half-bridges may be controlled with a phase offset of M×f T effectively yielding a cycle frequency of about 48 kHz to about 66 kHz for a value of M=2, for example.

[0029] According to the invention, the DC voltage may be intended to be approximately 850 V, and the inverter unit is made to generate a three-phase supply voltage with an amplitude of 400 V and a phase current of 630 A at a frequency of 50 Hz, or with an amplitude of 480 V and a phase current of 525 A at a frequency of 60 Hz.

[0030] The windings of the common mode choke may have about four turns each. The ratio of inductance (longitudinal inductance) to leakage inductance of the common mode choke may be about 200 or greater.

[0031] The windings of the common mode choke may have an inductance of about 1.8 mH and a leakage inductance of about 3.5 μH, respectively, at a frequency of about 48 kHz, although other values are also contemplated in accordance with the present invention.

[0032] The interleaving choke may be made as a current-compensated choke, i.e. its windings run in opposite directions on one common core.

[0033] The interleaving choke may be specifically fabricated with bifilar windings, allowing the longitudinal and transverse reactances to be adjusted independently of one another. The ratio of the longitudinal to transverse inductance of the interleaving choke may be in the range of about 100 to about 10,000. The interleaving choke may specifically have a longitudinal inductance of about 7.5 μH and a transverse inductance of about 1.94 mH.

[0034] The present invention further relates to an active power converter including a converter arrangement according to the present invention having an AC side (power supply side) and a DC side (direct current voltage side). The power converter may in particular be configured bidirectional, i.e., allowing power flow in both directions.

[0035] The present invention is further directed to industrial applications, such as test stands, stand-alone power systems, production lines, etc., using active power converters of this type, which are specifically designed for bidirectional operation to provide and receive electrical outputs.

[0036] Other features of the present invention will become apparent from the claims, the drawings, and the following description of the drawings.

[0037] The invention will now be described in more detail with reference to non-exclusive examples. [Brief explanation of the drawings]

[0038] [Figure 1a] 1 shows an embodiment of a converter mechanism according to the present invention; [Figure 1b] 1 shows an embodiment of a converter mechanism according to the present invention; [Figure 1c] 1 shows an embodiment of a converter mechanism according to the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0039] Figure 1a shows the DC voltage V from a DC voltage source, for example a battery, fuel cell or DC voltage intermediate circuit. dc1 shows an embodiment of a converter arrangement according to the invention for converting a voltage Vcc into a three-phase AC voltage (N=3) having phases L1, L2, L3 for connection to an AC voltage network.

[0040] For this purpose, a switching inverter unit 1 is provided. It comprises an active bridge inverter with six half-bridges 2, 2', 2a, 2a', 2b, 2b', where one phase L1, L2, L3 is supplied via two half-bridges (M=2). Each half-bridge comprises two electronically switchable semiconductor switches connected to an electronic control unit 3. In this example, the semiconductor switches are made of SiC and have high voltage strength. The control unit 3 switches the semiconductor switches in a pulse-width modulated manner at a frequency of approximately 33 kHz in order to generate as ideal a sinusoidal waveform as possible for each phase. Furthermore, the control unit 3 is designed to operate half-bridges of a pair supplying the same phase with a phase offset so that the current of that phase is divided substantially equally between both half-bridges.

[0041] For example, the control unit 3 first switches the first half-bridge 2 to a predetermined time t on , and then half bridge 2' is activated for the same time t on This halves the power delivered per half-bridge and doubles the frequency of the PWM method per phase, thus reducing the ripple in the output current and reducing the disruptive reactions in the DC voltage intermediate circuit.

[0042] In this embodiment, the outputs of each of the two half-bridges supplying the same phase are connected together via interleaving chokes 4, 4', 4a, 4a', 4b, 4b'. The interleaving chokes are current-compensated and wound on a common core for each phase. This allows for particularly ripple-free operation of the converter arrangement.

[0043] To attenuate electrical common-mode disturbances, the phases L1, L2, L3 are each connected to one winding 5, 5', 5'' of a common-mode choke 10 with a common magnetic core. This compensates for the common-mode disturbances of each phase. At the output of the interleaving chokes 4, 4', 4a, 4a', 4b, 4b', a first resistive-degenerating capacitor circuit 6 is provided which, in cooperation with the leakage reactance (transverse reactance) of the interleaving choke, forms a first LC filter stage 8.

[0044] At the output of the common mode choke 5, 5', 5'' a second resistively attenuating capacitor circuit 7 is provided which forms a second LC filter stage 9 in cooperation with the leakage reactance (transverse reactance) of the windings 5, 5', 5'' of the common mode choke 10.

[0045] The first and second capacitor circuits each include a capacitor arranged in a star circuit with a parallel resistor; the neutral point of the second capacitor circuit 7 can be grounded via the PEN terminal or the PE terminal.

[0046] In a non-illustrated embodiment, a damping resistor is arranged between the center point of the DC voltage intermediate circuit and the neutral point of the second capacitor circuit 7. This results in the intermediate circuit being stabilized with respect to common-mode disturbances (capacitively coupled to PEN), with common-mode disturbances then only appearing in the form of alternating signals at the neutral point of the first capacitor circuit.

[0047] The converter arrangement is designed in this example for a DC voltage of approximately 850 V, and the inverter unit 1 is constructed to generate a three-phase supply voltage with a frequency of 50 Hz, an amplitude of 400 V and a phase current of 630 A. The DC voltage V in the DC voltage intermediate circuit dc are stabilized symmetrically with respect to earth potential (not shown), for example +420 V / -420 V. This reduces the earth currents and the insulation loads in the downstream units.

[0048] In this embodiment, the interleaving chokes 4, 4', 4a, 4a', 4b, 4b' have a high relative permeability (about 40,000 μr) and a 2 The coil is fabricated by non-bifilar flat winding with approximately nine windings per leg on a nanocrystalline wound core with a core cross-sectional area of 1.0 mm and a very small air gap of approximately 150 μm.

[0049] The inductance of each individual winding is approximately 500 μH, the degree of coupling is 0.97, the longitudinal inductance is approximately 7.5 μH, and the transverse inductance is approximately 1.94 mH. The associated first capacitor circuit 6 has a capacitance of approximately 30 μF per phase, so that the limit frequency of the low pass formed by the first filter structure 8 is approximately 67 kHz:

number

[0050] This corresponds to approximately twice the switching frequency of 33 kHz, which allows for efficient filtering of disturbances due to the switching process.

[0051] The common mode chokes 5, 5', 5'' have, in this embodiment, a high relative permeability (about 40,000 μr) and a length of about 14 cm 2 Each of the two windings comprises approximately four turns on a nanocrystal wound core having a core cross-sectional area of 1.2 mH. The inductance of each individual winding is approximately 1.8 mH; the leakage reactance is approximately 3.5 μH at a frequency of approximately 48 kHz. The associated second capacitor circuit 7 has a capacitance of approximately 11 μF per phase, so that the limit frequency of the low-pass filter formed by the second filter structure 9 is approximately 161 kHz:

number

[0052] Such a cascaded arrangement of two low-pass filters allows efficient filtering of high-frequency interference without the need for additional EMV filter components.

[0053] Figure 1b shows the DC voltage V dc 1 shows another embodiment of a converter arrangement according to the invention for converting a three-phase AC voltage (N=3) having phases L1, L2, L3 for connection to an AC voltage network.

[0054] In this embodiment, rather than two separate capacitor circuits, a composite capacitor circuit 11 is provided which cooperates with the windings 5, 5', 5'' of the common mode choke 10 as well as with the interleaving chokes 4, 4', 4a, 4a', 4b, 4b' to form the two filter stages 8, 9 shown schematically.

[0055] When designing both filter stages, it must be noted that the capacitor circuit 11 is effective not only for the limit frequency of the first LC filter stage 8 but also for the limit frequency of the second LC filter stage 9; therefore, the elements cannot be designed independently of each other as in the embodiment shown in Figure 1a. In other respects, this embodiment corresponds to the embodiment of Figure 1a.

[0056] Figure 1c shows the DC voltage V dc 1b shows another embodiment of a converter arrangement according to the invention for converting a single-phase AC voltage (N=1) having a phase L and a switched zero conductor N. Both phase L and zero conductor N are provided via switched inverter units 1 each having two half-bridges (M=2). Similarly, instead of two separate capacitor circuits, a combined capacitor circuit 11 is provided. In other respects, this embodiment corresponds to the embodiment of FIG. 1b.

[0057] The invention is not limited to the above-described embodiments, but includes any converter arrangement that falls within the scope of the following claims, and in particular for use in test stands for vehicles. [Explanation of symbols]

[0058] 1 Inverter unit 2,2',2a,2a',2b,2b' Half Bridge 3. Control Unit 4,4',4a,4a',4b,4b' Interleaving Choke 5,5',5'' winding 6 First capacitor circuit 7 Second Capacitor Circuit 8 First filter stage 9 Second filter stage 10 Common Mode Choke 11 Composite capacitor circuits

Claims

1. 1. A converter arrangement for converting a DC voltage into an N-phase AC voltage, or vice versa, comprising: A switching inverter unit (1) including, for at least one of N phases, M number of electronically controllable half bridges (2, 2', 2a, 2a', 2b, 2b'), where M is greater than 1; The half bridges (2, 2', 2a, 2a', 2b, 2b') are switched at substantially the same switching frequency f Ｔ a control unit (3) for controlling the half bridges (2, 2', 2a, 2a', 2b, 2b'), which is fabricated to activate them with a time offset, Each phase is connected to a respective one of the windings (5, 5', 5'') of a common mode choke (10) having a common magnetic core for attenuating electrical common mode interference; a converter arrangement in which the outputs of said half-bridges (2, 2', 2a, 2a', 2b, 2b') supplying the same phase are connected together via respective interleaving chokes (4, 4', 4a, 4a', 4b, 4b'), 1. A converter arrangement comprising a first LC filter stage (8) and a second LC filter stage (9), the first LC filter stage (8) being formed by the interleaving chokes (4, 4', 4a, 4a', 4b, 4b') and a resistively attenuating capacitor circuit, and the second LC filter stage (9) being formed by the common mode choke (10) and a resistively attenuating capacitor circuit.

2. 2. A converter arrangement according to claim 1, characterized in that the first LC filter stage (8) is formed by the interleaving choke (4, 4', 4a, 4a', 4b, 4b') and a first resistively degenerate capacitor circuit (6), and the second LC filter stage (9) is formed by the common mode choke (10) and a second resistively degenerate capacitor circuit (7).

3. 2. A converter arrangement according to claim 1, characterized in that the first LC filter stage (8) is formed by the interleaving chokes (4, 4', 4a, 4a', 4b, 4b') and a combined resistive-decrementing capacitor circuit (11), and the second LC filter stage (9) is formed by the common mode choke (10) and the combined resistive-decrementing capacitor circuit (11).

4. The limit frequency of the first LC filter stage (8) is M times the switching frequency f Ｔ 4. A transducer arrangement according to claim 1, wherein the axial length of the transducer is in the range of .gtoreq..times ...

5. The limit frequency of the second LC filter stage (9) is M times the switching frequency f Ｔ and preferably in the range of 1×M×f Ｔ 5. A transducer arrangement according to any one of claims 1 to 4, characterized in that the range of

6. A transducer arrangement according to any one of claims 1 to 5, characterized in that N is equal to 1 or 3.

7. A transducer arrangement according to any one of claims 1 to 6, characterized in that M is 2, 3, 4 or more.

8. 8. A converter arrangement according to any one of claims 1 to 7, characterized in that the capacitor circuits (6, 7, 11) are formed by star circuits of at least N capacitors each having a resistor connected in parallel.

9. 9. A converter arrangement according to any one of claims 1 to 8, characterized in that the first (8) and second (9) LC filter stages are designed to have a total harmonic content (distortion factor) of not more than 3% in each phase.

10. The control unit (3) controls the half bridges (2, 2', 2a, 2a', 2b, 2b') at a frequency f of at least about 24 kHz to at least about 33 kHz. Ｔ 10. A transducer arrangement according to any one of claims 1 to 9, characterized in that it is made to be controlled by

11. The DC voltage is about 850V, and the inverter unit (1) having an amplitude of 400 V and a phase current of 630 A at a frequency of 50 Hz, or having an amplitude of 480 V and a phase current of 525 A at a frequency of 60 Hz; A converter arrangement according to any one of claims 1 to 10, characterized in that it is made for generating a three-phase supply voltage.

12. 12. A converter arrangement according to any one of claims 1 to 11, characterized in that the windings (5, 5', 5'') of the common mode choke (10) each have about four turns.

13. 13. A converter arrangement according to any one of claims 1 to 12, characterized in that the ratio of the inductance of the windings (5, 5', 5'') to the leakage inductance of the common mode choke (10) is greater than 200.

14. 14. A converter arrangement according to any one of claims 1 to 13, characterized in that the windings (5, 5', 5'') of the common mode choke (10) each have an inductance of about 1.8 mH and a leakage inductance of about 3.5 μH.

15. Converter arrangement according to any one of claims 1 to 14, characterized in that the interleaving chokes (4, 4', 4a, 4a', 4b, 4b') are made as current-compensated chokes.

16. 16. A converter arrangement according to any one of claims 1 to 15, characterized in that the ratio of longitudinal inductance to transverse inductance of said interleaving chokes (4, 4', 4a, 4a', 4b, 4b') is in the range of about 100 to about 10,000.

17. 17. A converter arrangement according to any one of claims 1 to 16, characterized in that the interleaving choke (4, 4', 4a, 4a', 4b, 4b') has a longitudinal inductance of about 7.5 μH and a transverse inductance of about 1.94 mH.

18. 3. A converter arrangement according to claim 2, characterized in that the first resistively decaying capacitor circuit (6) has a capacitance of about 30 μF per phase and / or the second resistively decaying capacitor circuit (7) has a capacitance of about 11 μF per phase.

19. A power converter including a converter arrangement according to any one of claims 1 to 18, in particular said power converter being configured for bidirectional operation.

20. 20. An industrial application comprising the power converter of claim 19.

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