Power supply switching device, vehicle control device and power supply switching method

Abstract

To suppress damage to a semiconductor switch even in a case where there is a difference between output voltages of a first electric power source and a second electric power source.SOLUTION: An electric power source switching device 1 comprises: a first semiconductor switch 3a connected with a first electric power supply source 2a; a second semiconductor switch 3b connected with a second electric power supply source 2b; and a switch control device 5 which controls drive voltages of the first semiconductor switch 3a and the second semiconductor switch 3b. When switching from one electric power supply source to the other electric power supply source in the first electric power supply source 2a and the second electric power supply source 2b, the switch control device 5 provides an intermediate state where a semiconductor switch connected to the electric power supply source at a side which supplies electric power after switching is retained in a non-saturated state, and changes a retention time of the intermediate state in accordance with a voltage difference Vd between voltages outputted by the first electric power supply source 2a and the second electric power supply source 2b.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a power supply switching device, a vehicle control device, and a power supply switching method, and more particularly to a technology for protecting a power supply switching circuit in a power supply. [Background technology]

[0002] In recent years, advances in electric vehicles and autonomous driving have led to the electrification of components such as conventional hydraulic and mechanical systems. This has led to demands for on-board power supply systems to reduce the number of wire harnesses used for power supply, as well as for higher reliability (redundancy) and efficiency. Traditionally, on-board power supply systems controlled power supply using mechanical switches such as relays and fuses, but in recent years the use of power control systems using semiconductor switches has become more widespread. Semiconductor switches have a faster switching speed than relays, and can avoid momentary power supply interruptions when switching power sources. Furthermore, because semiconductor switches do not have mechanical contacts, they are highly durable and the limit on the number of switching cycles is significantly relaxed.

[0003] Conventional technologies for power supply systems using such semiconductor switches include Patent Documents 1 and 2. Patent Document 1 discloses a protection technology that suppresses reverse current flow from the second power supply to the first power supply without increasing the size or cost of the control circuit.

[0004] Furthermore, Patent Document 2 includes a first pair of switches for selectively connecting a first power supply node to an output node, a second pair of switches for selectively connecting a second power supply node to the output node, and a switch control circuit, and the switch control circuit operates to connect only one of the first power supply node or the second power supply node to the output node at any one time. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2022-061736 [Patent Document 2] Special Publication No. 2019-514328 Summary of the Invention [Problem to be solved by the invention]

[0006] According to the technology described in Patent Document 1, when the main power supply fails, the main power supply is disconnected to prevent current from flowing back from the sub-power supply to the main power supply. With this technology, switching occurs only when the main power supply fails, and selective power supply using the main power supply and the sub-power supply is not possible during normal use.

[0007] According to the technology described in Patent Document 2, a first power supply and a second power supply can be selectively connected to an output node. However, this technology connects only one of the first and second power supplies to the output node, which may result in a temporary power interruption when switching between power supplies. Furthermore, if there is a difference in the power supply voltage between the first and second power supplies due to individual differences or deterioration of the power supplies, an overcurrent may flow through the semiconductor switch due to an inrush current or discharge current during switching, potentially damaging the semiconductor switch. Furthermore, because the inrush current during switching varies depending on the current capacity of the connected load, it is generally necessary to estimate the maximum current under the worst-case condition where all connected loads are operating, and then select a semiconductor switch that satisfies this condition. This increases the cost of the semiconductor switch.

[0008] In view of the above circumstances, there has been a demand for a method that can suppress damage to the semiconductor switch even when there is a difference in the output voltage between the first power supply and the second power supply. [Means for solving the problem]

[0009] In order to solve the above problem, one embodiment of the power supply switching device of the present invention is a power supply switching device comprising: a first semiconductor switch provided between a first power supply source that supplies power to a load device and the load device; a second semiconductor switch provided between a second power supply source that supplies power to the load device and the load device; and a switch control device that controls the drive voltages of the first semiconductor switch and the second semiconductor switch. When switching from one power supply source to the other between the first power supply source and the second power supply source, the switch control device provides an intermediate state that holds the semiconductor switch connected to the power supply source that supplies power after the switch in a non-saturated state, and changes the holding time of the intermediate state according to the voltage difference between the voltages output by the first power supply source and the second power supply source. [Effects of the Invention]

[0010] According to at least one aspect of the present invention, the duration of time that a semiconductor switch connected to a power supply source that supplies power after switching is held in an intermediate state is changed according to the difference in output voltage between a first power supply and a second power supply, thereby making it possible to prevent damage to the semiconductor switch due to an overcurrent even when there is a difference in output voltage between the first power supply and the second power supply. Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic diagram showing an example in which a plurality of power sources are connected to a vehicle control device mounted on a vehicle. [Figure 2] 1 is a diagram illustrating an example of the configuration of a power supply switching device according to a first embodiment of the present invention. [Figure 3] 3 is a diagram illustrating an example of the operation of the power supply switching device according to the first embodiment of the present invention. FIG. [Figure 4] FIG. 10 is a diagram illustrating an example of the configuration of a power supply switching device according to a second embodiment of the present invention. [Figure 5]FIG. 10 is an explanatory diagram of a method for estimating an inrush current at the time of power supply switching using load information in a power supply switching device according to a second embodiment of the present invention. [Figure 6] FIG. 10 is a diagram illustrating an example of the operation of the power supply switching device according to the second embodiment of the present invention. [Figure 7] FIG. 10 is a diagram illustrating an example of the configuration of a power supply switching device according to a third embodiment of the present invention. [Figure 8] FIG. 10 is a diagram illustrating an example of the configuration of a power supply switching device according to a fourth embodiment of the present invention. [Figure 9] FIG. 10 is a diagram illustrating an example of the operation of the power supply switching device according to the fourth embodiment of the present invention. [Figure 10] 10A and 10B are diagrams illustrating the effect of providing an overlap period between the gate voltages of the first semiconductor switch and the second semiconductor switch in the power supply switching device according to the fourth embodiment of the present invention. [Figure 11] FIG. 10 is a diagram illustrating an example of the configuration of a power supply switching device according to a fifth embodiment of the present invention. [Figure 12] FIG. 13 is a diagram showing a first example of a configuration for turning on a semiconductor switch of a power supply switching device according to a sixth embodiment of the present invention. [Figure 13] FIG. 13 is a diagram illustrating an example of the operation of a semiconductor switch in the first configuration example of the power supply switching device according to the sixth embodiment of the present invention. [Figure 14] FIG. 13 is a diagram illustrating a second configuration example for turning on a semiconductor switch of a power supply switching device according to a sixth embodiment of the present invention. [Figure 15] FIG. 13 is a diagram illustrating an example of the operation of a semiconductor switch in the second configuration example of the power supply switching device according to the sixth embodiment of the present invention. [Figure 16] FIG. 13 is a diagram illustrating a third configuration example for turning on a semiconductor switch of a power supply switching device according to a sixth embodiment of the present invention. [Figure 17] FIG. 13 is a diagram illustrating an example of the operation of a semiconductor switch in the third configuration example of the power supply switching device according to the sixth embodiment of the present invention. [Figure 18] FIG. 2 is a block diagram illustrating an example of the hardware configuration of a computer included in the power supply switching device according to each embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, examples of modes for carrying out the present invention (hereinafter referred to as "embodiments") will be described with reference to the accompanying drawings. In this specification and the accompanying drawings, identical components or components having substantially the same functions will be assigned the same reference numerals, and redundant explanations will be omitted. Furthermore, when there are multiple components having the same or similar functions, they may be described using the same reference numerals with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description.

[0013] First Embodiment First, an example of a vehicle equipped with a power supply switching device that switches between a plurality of power supplies will be described with reference to FIG. Fig. 1 is a schematic diagram showing an example in which a plurality of power sources are connected to a vehicle control device mounted on a vehicle. As shown in Fig. 1, a vehicle 100 is configured to include a vehicle control device 110, sensors 120, actuators 130, a first power supply source ("first power source" in the figure) 2a, and a second power supply source ("second power source" in the figure). The vehicle control device 110 is connected to the sensors 120, the actuators 130, the first power supply source 2a, and the second power supply source 2b, respectively.

[0014] The vehicle control device 110 includes a power supply switching device 1 and a controller 111. The controller 111 receives detection signals from the sensors 120 via a signal line d1 and transmits control signals to the actuators 130 via a control line s1 to control the vehicle 100. The controller 111 analyzes the detection signals received from the sensors 120, generates control signals based on the analysis results, and controls the operation of the actuators 130. The controller 111 can be configured using, for example, an ECU (Electronic Control Unit). The sensors 120 and the actuators 130 are load devices that consume power supplied from the first power supply source 2a or the second power supply source 2b.

[0015] The power supply switching device 1 switches the power supply source between the first power supply source 2a and the second power supply source 2b based on the power supply voltages of the first power supply source 2a and the second power supply source 2b. The power supply switching device 1 is supplied with power from the first power supply source 2a via a power supply line p1 and from the second power supply source 2b via a power supply line p2. The power supply switching device 1 then supplies the power received from the first power supply source 2a or the second power supply source 2b to the sensors 120 via a power supply line p3 and to the actuators 130 via a power supply line p4.

[0016] 1, a configuration has been described in which the power supply switching device 1 is built into the vehicle control device 110, but the power supply switching device 1 may be separate from the vehicle control device 110. Also, a configuration may be adopted in which the controller 111 is capable of controlling the power supply switching device 1. For example, a terminal used by a mechanic or the like may be connected to the controller 111, and the controller 111 may be configured to control the ON / OFF of the first semiconductor switch 3a and the second semiconductor switch 3b based on commands from the terminal.

[0017] Next, the configuration of the power supply switching device 1 according to the first embodiment of the present invention will be described with reference to FIG. 2 is a diagram showing an example of the configuration of a power supply switching device 1 according to a first embodiment of the present invention. The power supply switching device 1 is connected to a first power supply source 2a and a second power supply source 2b. For example, the first power supply source 2a and the second power supply source 2b are connected to a power converter such as an on-board battery or a DC / DC converter. The power supply switching device 1 includes a first semiconductor switch 3a, a second semiconductor switch 3b, and a switch control device 5.

[0018] A first semiconductor switch 3a is provided between a first power supply source 2a that supplies power to the load devices 4a to 4c and the load devices 4a to 4c. Power from the first power supply source 2a is supplied to the plurality of load devices 4a to 4c via the first semiconductor switch 3a. For example, the first semiconductor switch 3a is configured with a field-effect transistor M. The field-effect transistor M of the first semiconductor switch 3a is connected so that a body diode (also called a "parasitic diode") configured between its drain and source is reversely connected to the direction of power supply from the first power supply source 2a. In other words, the anode side of the body diode is connected to the source of the field-effect transistor M, and the cathode side is connected to the drain of the field-effect transistor M.

[0019] A second semiconductor switch 3b is provided between a second power supply source 2b that supplies power to the load devices 4a to 4c and the load devices 4a to 4c. Power from the second power supply source 2b is supplied to the plurality of load devices 4a to 4c via the second semiconductor switch 3b. For example, the second semiconductor switch 3b is configured by a field effect transistor M. The field effect transistor M of the second semiconductor switch 3b has a body diode formed between its drain and source that is connected in the opposite direction to the power supply direction from the second power supply source 2b. In other words, the anode side of the body diode is connected to the source of the field effect transistor M, and the cathode side is connected to the drain of the field effect transistor M.

[0020] The load devices 4a to 4c are configured so that power can be supplied from either the first power supply source 2a or the second power supply source 2b by controlling the first semiconductor switch 3a and the second semiconductor switch 3b. The output terminal of the first semiconductor switch 3a is electrically connected to the output terminal of the second semiconductor switch 3b, and the plurality of load devices 4a to 4c are connected to the output terminal.

[0021] The load devices 4a to 4c are actuators 130 such as motors and solenoids mounted on the vehicle 100, and sensors 120 such as cameras. In this embodiment, the number of connected load devices is three, but this is not limited to this, and a configuration in which two or more load devices are connected may also be used. In the following description, when it is not necessary to distinguish between the load devices 4a to 4c, they will be referred to as "load device 4."

[0022] The switch control device 5 outputs a control signal (gate voltage) to the first semiconductor switch 3a and the second semiconductor switch 3b to switch the power supply. The switch control device 5 includes a voltage comparator 7 and a gate voltage control circuit 6.

[0023] The voltage comparator 7 monitors the voltage Va output by the first power supply source 2a and the voltage Vb output by the second power supply source 2b, and detects the voltage difference Vd (=Va-Vb). This voltage difference Vd is output to the gate voltage control circuit 6.

[0024] The gate voltage control circuit 6 generates and outputs a gate voltage Vga of the field-effect transistor M serving as the first semiconductor switch 3a and a gate voltage Vgb of the field-effect transistor M serving as the second semiconductor switch 3b in accordance with the voltage difference Vd. When the gate voltage Vga of the first semiconductor switch 3a is at a high level, the first semiconductor switch 3a is in an ON state. When the gate voltage Vgb of the second semiconductor switch 3b is at a high level, the second semiconductor switch 3b is in an ON state. In the following description, when there is no need to distinguish between the first semiconductor switch 3a and the second semiconductor switch 3b, they will be referred to as the "semiconductor switch 3."

[0025] 2, an N-channel MOS field effect transistor is used as the field effect transistor M, but a P-channel MOS field effect transistor or other field effect transistors may also be used. Alternatively, the semiconductor switch 3 may be configured using a bipolar transistor.

[0026] Next, an example of the operation of the power supply switching device 1 according to this embodiment will be described with reference to FIG. Fig. 3 is a diagram showing an example of the operation of the power supply switching device 1. The upper part of Fig. 3 shows the voltage profile of the gate voltage Vga when switching from the first power supply source 2a to the second power supply source 2b, the middle part of Fig. 3 shows the voltage profile of the gate voltage Vgb, and the lower part of Fig. 3 shows the current I2 flowing through the second semiconductor switch 3b. In Fig. 3, the horizontal axis represents time t.

[0027] The voltages Va and Vb output by the first power supply source 2a and the second power supply source 2b vary due to individual differences in the on-board battery and DC / DC converter, the state of charge, wiring length, and deterioration of the on-board battery and power supply wiring, etc. Below, an example will be described in which the voltage Va of the first power supply source 2a is 13 V and the voltage Vb of the second power supply source 2b is 14 V, and the first power supply source 2a with a lower output voltage is switched to the second power supply source 2b with a higher output voltage.

[0028] As shown in FIG. 3, when power is supplied from the first power supply source 2a to the load devices 4a to 4c (first power supply S1), the gate voltage Vga of the first semiconductor switch 3a is at a high level, and the gate voltage Vga of the second semiconductor switch 3b is at a low level.

[0029] When switching the power supply source from the first power supply S1 state to the second power supply 2b, the gate voltage control circuit 6 first sets the gate voltage Vga of the first semiconductor switch 3a to low level. Then, simultaneously with this, or after the gate voltage Vgb of the second semiconductor switch 3b starts to rise, the gate voltage control circuit 6 raises the gate voltage Vgb to an intermediate voltage Vm between low level and high level, and holds it at the intermediate voltage Vm for a holding time Tm (intermediate state S2).

[0030] It takes a certain amount of time (rise time) for the gate voltage control circuit 6 to raise the gate voltage from a low level to the intermediate voltage Vm. Therefore, the time during which the gate voltage is actually held at the intermediate voltage Vm can be said to be shorter than the hold time Tm, which starts when the gate voltage starts to rise, as shown in FIG. 3. However, since the rise time is shorter than the time during which the gate voltage is held at a constant value of the intermediate voltage Vm, the hold time Tm is defined as the period from when the gate voltage starts to rise to when it starts to rise to the next voltage level. For example, the next voltage level is a high level in FIG. 3, and is the second intermediate voltage in FIG. 13, which will be described later.

[0031] Thereafter, the gate voltage control circuit 6 raises the gate voltage Vgb of the second semiconductor switch 3b to a high level, thereby completely switching the power supply source from the first power supply source 2a to the second power supply source 2b (second power supply S3).

[0032] As described above, in this embodiment, the voltage levels of the gate voltages Vga and Vgb have three states: High level, Low level, and intermediate voltage. The High level is a voltage at which the on-resistance of the field-effect transistors serving as the first semiconductor switch 3a and the second semiconductor switch 3b is minimized, and is, for example, a voltage at which the gate-source voltage is 10 V or more. The Low level is a voltage at which the output characteristics (I D -V DS The intermediate voltage is the voltage at which the output characteristic of a field-effect transistor reaches the non-saturation region, and the source-drain resistance changes depending on the gate voltage.

[0033] The hold time Tm is dynamically set according to the voltage difference Vd between the voltages output by the first power supply source 2a and the second power supply source 2b. When the voltage difference Vd is small, the hold time Tm is shortened, and when the voltage difference Vd is large, the hold time Tm is lengthened. In other words, when the voltage difference Vd is greater than a predetermined value, the gate voltage control circuit 6 changes the hold time Tm to be longer than a preset reference time, and when the voltage difference Vd is equal to or smaller than the predetermined value, the gate voltage control circuit 6 changes the hold time Tm to be shorter than the reference time.

[0034] In this embodiment, the state in which the gate voltage of the semiconductor switch is between a low level and a high level is defined as the "intermediate state." In a conventional power supply switching device, as shown by the thin solid line in the middle of Figure 3, the voltage profile from when the gate voltage Vgb rises from a low level to a high level in the intermediate state is fixed. The holding time is the time for limiting the inrush current that flows through the semiconductor switch when the power supply is switched, and can also be called the "current limiting time."

[0035] When switching from a power supply source with a different voltage value, such as from the first power supply source 2a (voltage Va=13V) to the second power supply source 2b (voltage Vb=14V) shown in this embodiment, an inrush current occurs according to the voltage difference Vd between the two power supplies. In a conventional configuration, a large inrush current flows through the second semiconductor switch 3b, exceeding the allowable current indicated by the dashed dotted line.

[0036] In the configuration of this embodiment, the current I2 flowing through the second semiconductor switch 3b when switching from the intermediate state S2 to the second power supply S3 will be described. As shown in the lower part of Figure 3, a first peak current flows when the gate voltage Vgb of the second semiconductor switch 3b rises to the intermediate voltage Vm, and then, after the first peak current decreases, a second peak current flows when the gate voltage Vgb rises to a high level.

[0037] As described above, in this embodiment, the gate voltage Vgb of the second semiconductor switch 3b is increased stepwise rather than from a low level to a high level all at once. This allows the peak current I2 (peak current) flowing through the second semiconductor switch 3b during power supply switching to be dispersed so that it does not exceed the allowable current. Furthermore, in this embodiment, the power supply source can be changed according to the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b, allowing the power supply source to be switched without exceeding the allowable current. Conventional power supply devices do not have a configuration for changing the holding time Tm of the intermediate voltage Vm in the intermediate state according to the voltage difference Vd during power supply switching. Therefore, in conventional power supply devices, as the voltage difference Vd increases, the peak current of the semiconductor switch increases accordingly, potentially exceeding the allowable current. However, this problem is resolved by this embodiment.

[0038] As described above, the power supply switching device (power supply switching device 1) according to the first embodiment is a power supply switching device including a first semiconductor switch (first semiconductor switch 3a) provided between a first power supply source (first power supply source 2a) that supplies power to load devices (4a to 4c) and the load devices, a second semiconductor switch (second semiconductor switch 3b) provided between a second power supply source (second power supply source 2b) that supplies power to the load devices and the load devices, and a switch control device (switch control device 5) that controls the drive voltages of the first semiconductor switch and the second semiconductor switch. When switching from one power supply source to the other between the first power supply source and the second power supply source, the switch control device provides an intermediate state that holds the semiconductor switch (second semiconductor switch 3b) connected to the power supply source that supplies power after the switch (for example, second power supply source 2b) in a non-saturated state, and changes the holding time (holding time Tm) of the intermediate state according to the voltage difference (voltage difference Vd) between the voltages output by the first power supply source and the second power supply source.

[0039] According to this embodiment having the above configuration, the time for which the intermediate state of the semiconductor switch connected to the power supply source that supplies power after switching is maintained (current limit time) is changed according to the voltage difference between the output voltages of the first power supply source and the second power supply source. This makes it possible to suppress damage to the semiconductor switch due to overcurrent and to switch the power supply source smoothly without interrupting the power supply, even when there is a difference between the output voltages of the first power supply source and the second power supply source.

[0040] <Second embodiment> Next, a power supply switching device according to a second embodiment will be described. The second embodiment is an example of a configuration in which the first semiconductor switch 3a and the second semiconductor switch 3b are controlled in consideration of information (load information) of the load device 4 in addition to the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b. The following describes the power supply switching device according to the second embodiment, focusing on the differences from the first embodiment.

[0041] First, the configuration of the power supply switching device according to this embodiment will be described with reference to FIG. 4 is a diagram showing an example of the configuration of a power supply switching device 1A according to this embodiment. The power supply switching device 1A includes a switch control device 5A instead of the switch control device 5 of the power supply switching device 1 according to the first embodiment. That is, the power supply switching device 1A includes a first semiconductor switch 3a, a second semiconductor switch 3b, and a switch control device 5A.

[0042] The switch control device 5A outputs control signals to the first semiconductor switch 3a and the second semiconductor switch 3b to switch the power supply. The switch control device 5A includes a voltage comparator 7, a gate voltage control circuit 6A, and load information 8A.

[0043] The gate voltage control circuit 6A generates and outputs a gate voltage Vga of the first semiconductor switch 3a (field-effect transistor M) and a gate voltage Vgb of the second semiconductor switch 3b (field-effect transistor M) in accordance with the voltage difference Vd output by the voltage comparator 7. The gate voltage control circuit 6A also generates and outputs the gate voltage Vga and the gate voltage Vgb in accordance with load information 8A based on the equivalent electrical resistance and equivalent capacitance of the load devices 4a to 4c. The load information 8A is stored in a memory or the like. The gate voltage control circuit 6A generates the gate voltage Vga and the gate voltage Vgb by referring to the memory in which the load information 8A is stored.

[0044] A feature of this embodiment is that gate voltages Vga and Vgb are generated and output in accordance with load information 8A in addition to voltage difference Vd. As shown in FIG. 4, load information 8A is a parameter based on an equivalent circuit model of load devices 4a to 4c. The load devices 4a to 4c can be represented by an equivalent circuit of equivalent electrical resistance and equivalent capacitance as shown in the figure. The load information 8A is information based on the equivalent electrical resistance and equivalent capacitance of these multiple load devices 4a to 4c. In this embodiment, it is desirable that the information representing the electrical characteristics of the load devices includes at least the equivalent electrical resistance and equivalent capacitance. For example, although the electrical resistance and capacitance of the load device 4 have been exemplified as electrical characteristics, a reactance component may also be taken into consideration.

[0045] For example, the load device 4a has an equivalent capacitance C1 and an equivalent electrical resistance Rs1 connected in series. L Similarly, the load device 4b has an equivalent capacitance C2 and an equivalent electrical resistance Rs2 connected in series. L 2 are connected in parallel. Furthermore, the load device 4c has an equivalent capacitance C3 and an equivalent electrical resistance Rs3 connected in series. L 3 are connected in parallel. One end of the equivalent circuit of the load devices 4a to 4c is connected to the power supply line, and the other end is grounded.

[0046] In this embodiment, an example of a procedure for determining a gate voltage profile based on the load information 8A will be described with reference to FIGS. 5 is an explanatory diagram of a method for estimating inrush current during power supply switching in power supply switching device 1A using load information 8A. In FIG. 5, the vertical axis represents current I2 flowing through second semiconductor switch 3b, and the horizontal axis represents time t. For example, when switching from first power supply source 2a to second power supply source 2b, current I2 flowing through second semiconductor switch 3b can be predicted by the following equation (1):

[0047]

number

[0048] Here, "i c " is the capacitance charging current of the current I2 flowing through the second semiconductor switch 3b. R " is the DC component of the current I2 flowing through the second semiconductor switch 3b. "t" is the time elapsed since the gate voltage Vgb was applied to the second semiconductor switch 3b. "Vd" is the voltage difference between the voltages output by the first power supply source 2a and the second power supply source 2b (hereinafter also referred to as "power supply voltage difference"). "Rs" is the parallel combined resistance of the electrical resistances (Rs1 to Rs3 in FIG. 4) connected in series to the equivalent capacitance of each load device 4. "C" is the parallel combined capacitance of the equivalent capacitances (C1 to C3) of each load device 4. "Vb" is the output voltage of the second power supply source 2b. L " is the equivalent electrical resistance (R L 1~R L 3) is the parallel combined resistance.

[0049] The peak current of the inrush current flowing through the second semiconductor switch 3b during power supply switching is estimated based on the above formula (1). If the peak current exceeds the allowable current, the value of the source-drain resistance Rsd of the second semiconductor switch 3b is calculated using the following formula (2), which takes into account the source-drain resistance Rsd of the second semiconductor switch 3b, so that the allowable current is not exceeded.

[0050]

number

[0051] After calculating the source-drain resistance Rsd from equation (2), the gate voltage Vgb at which the source-drain resistance becomes Rsd is determined from the electrical characteristics of the field-effect transistor M that constitutes the second semiconductor switch 3b. The gate voltage Vgb is determined, for example, from the drain current-gate-source voltage characteristics (Id-V GS The gate voltage Vgb determined here is the intermediate voltage value in the intermediate state in the present invention (the intermediate voltage Vm in FIG. 6).

[0052] Next, an example of the operation of the power supply switching device 1B according to this embodiment will be described with reference to FIG. Fig. 6 is a diagram showing an example of the operation of the power supply switching device 1B. The upper part of Fig. 6 shows the voltage profile of the gate voltage Vgb generated by the gate voltage control circuit 6, and the lower part of Fig. 6 shows the current I2 of the second semiconductor switch 3b. In Fig. 5, the horizontal axis represents time t.

[0053] First, after switching the power supply, the gate voltage control circuit 6 raises the gate voltage Vgb from the Lw level to the intermediate voltage Vm determined as described above. The holding time Tm at the intermediate voltage Vm is determined by the following equation (3) based on the equivalent electrical resistance Rs and equivalent capacitance C of the load device 4 and the source-drain resistance Rsd of the field-effect transistor.

[0054]

number

[0055] In equation (3), "k" is a constant. When the gate voltage Vgb is held in the intermediate state for the holding time Tm and then raised to a high level, the second semiconductor switch 3b is fully turned on. In this voltage profile, the current I2 has a first peak current when the gate voltage Vgb is switched to the intermediate voltage Vm, and a second peak current when the gate voltage Vgb subsequently goes high. According to this embodiment, the peak current is distributed into the first peak current and the second peak current according to the voltage difference Vd and the electrical characteristics of the load device 4, so that the peak current can be switched so as not to exceed the allowable current.

[0056] In this embodiment, an example of determining the hold time Tm from the equivalent electrical resistance and equivalent capacitance has been described above. However, the hold time Tm can be optimized by multiplying the time constant (= C(Rs+Rsd)) in equation (3) by a predetermined coefficient k. That is, the hold time Tm can be changed by changing the rise curve (rise rate) of the gate voltage Vgd depending on the value of k. For example, if there is a margin for the second peak current value of the current I2 up to the allowable current, k<1 can be set to make the hold time Tm shorter than the time constant. If there is no margin for the peak current value, k>1 can be set to make the hold time Tm longer than the time constant. That is, the gate voltage Vgb can be optimized using the source-drain resistance Rsd and the hold time Tm of the field-effect transistor M of the second semiconductor switch 3b as parameters.

[0057] In addition, in this embodiment, an example has been shown in which the gate voltage Vgb (intermediate voltage Vm) held in the intermediate state has one value, but multiple voltage values may be set and the gate voltage Vgb may be increased in two or more step voltages. These voltage profiles are design parameters and are set appropriately depending on the characteristics of the semiconductor switch 3, the load device 4, etc.

[0058] As described above, the switch control device (switch control device 5A) in the second embodiment is configured to change the holding time Tm of the intermediate state according to the voltage difference Vd between the voltages output by the first power supply source 2a and the second power supply source 2b and the information (load information 8A) representing the electrical characteristics of the load devices 4a to 4c.

[0059] According to the present embodiment having the above configuration, the gate voltage control circuit 6 sets the voltage profile of the gate voltage of the semiconductor switch 3 based on the information of the load device 4 (load information 8A) in addition to the voltage difference Vd. With this configuration, even if the inrush current at the time of power supply switching changes due to the addition or update of the load device 4, it is possible to suppress failure or degradation of the semiconductor switch 3 due to the inrush current by changing the load information 8A. In other words, it is possible to accommodate changes in the load device 4 without replacing the semiconductor switch 3. For example, even if the number of connected loads or the current capacity changes due to retrofitting, it is not necessary to replace the semiconductor switch 3, and this can be accommodated by modifying the software.

[0060] In this embodiment, the load information 8A is the equivalent electrical resistance and equivalent capacitance of the load device 4, but is not limited to this. For example, an intermediate voltage Vm and a holding time Tm determined in advance from the characteristics of the inrush current flowing through the semiconductor switch 3 may be stored in memory as the load information 8A. In other words, the effects of the present invention can be achieved as long as the load information 8A is information that can appropriately change the parameters (Tm, Vm) that determine the voltage profile of the gate voltage according to the electrical characteristics of the connected load device 4, and can change the voltage profile of the gate voltage and the holding time of the intermediate state.

[0061] <Third embodiment> Next, a power supply switching device according to a third embodiment will be described. The third embodiment is an example in which the gate voltage of a semiconductor switch 3 is controlled based on information representing the electrical characteristics of a load device 4 that is in an energized state among a plurality of load devices 4.

[0062] The configuration of the power supply switching device according to this embodiment will be described with reference to FIG. 7 is a diagram showing an example of the configuration of a power supply switching device 1B according to this embodiment. The power supply switching device 1B has a basic configuration similar to that of the power supply switching device 1A according to the second embodiment, and the following description will focus on the differences between the power supply switching device 1B and the second embodiment.

[0063] The power supply switching device 1B includes a switch control device 5B instead of the switch control device 5A of the power supply switching device 1 according to the second embodiment. That is, the power supply switching device 1B includes a first semiconductor switch 3a, a second semiconductor switch 3b, and the switch control device 5B. The switch control device 5B includes a voltage comparator 7, a gate voltage control circuit 6B, and load information 8A.

[0064] In addition to the configuration of the second embodiment, this embodiment includes load switches 9a to 9c provided on the power supply lines of the load devices 4a to 4c, respectively, and a load switch control device 10 that controls the energization / cutoff of the load switches 9a to 9c based on an external command. The load switch control device 10 may be built into the controller 111 of the vehicle control device 110 shown in Fig. 1. The external command is a command that indicates whether or not to drive each of the connected load devices 4a to 4c.

[0065] A load switch switching command is input to the switch control device 5B from an electronic control unit (ECU) of a power management system. For example, the load switches 9a to 9c are switched when a failure (or a sign of failure) is detected in the load device 4, and the use of the load device 4 is stopped or its function is limited.

[0066] The load switches may be semiconductor switches using field-effect transistors or mechanical switches such as relays. The power supply to the load devices 4a to 4c is controlled by the load switches 9a to 9c. In the following description, when it is not necessary to distinguish between the load switches 9a to 9c, they will be referred to as "load switches 9."

[0067] The load information 8A is information based on the equivalent electrical resistance and equivalent capacitance of the load devices 4a to 4c. However, in this embodiment, the load information 8A is updated based on switching information of the load switches 9a to 9c ("switch information" in the figure) notified from the load switch control device 10, i.e., information on the load devices 4a to 4c connected (energized) to the power line.

[0068] In addition, the load information 8A may include information indicating the electrical characteristics of all load devices 4a to 4c, and based on the switch information, the load information 8A may be updated from the electrical characteristics of the driven load device 4 (electrical characteristics of the equivalent circuit model) and stored in memory.

[0069] The gate voltage control circuit 6B has the same function as the gate voltage control circuit 6A in the second embodiment. The gate voltage control circuit 6B references the memory in which the load information 8A is stored and generates the gate voltages Vga and Vgb in the same manner as in the second embodiment.

[0070] In addition, when information indicating the electrical characteristics of the load devices 4a to 4c is registered in the load information 8A, the gate voltage control circuit 6B may extract only information on the electrical characteristics of the current-carrying load device 4 from the load information 8A based on the switch information, and generate a gate voltage based on the extracted information on the electrical characteristics of the load device 4. The gate voltage control circuit 6B can obtain the switch information before power switching by periodically communicating with the load switch control device 10. For example, in FIG. 7, only the load switch 9a is current-carrying, and the load device 4a is connected to the power line and is operating. The gate voltage control circuit 6B generates a gate voltage from the load information 8A based on the electrical characteristics of the load device 4a.

[0071] The inrush current flowing through the semiconductor switch 3 when the power source is switched is determined by the driving state of the load device 4. Therefore, according to this embodiment, the inrush current flowing through the semiconductor switch 3 when the power source is switched can be more accurately estimated, and an optimal gate voltage can be generated.

[0072] Furthermore, before switching from one power supply source to another, the switch control device 5B stops the power supply to one of the multiple load devices 4a to 4c, and the switch control device 5B can change the intermediate state retention time Tm according to information (e.g., equivalent electrical resistance and equivalent capacitance) representing the electrical characteristics of the load devices 4 that are in a powered state among the multiple load devices 4. For example, the multiple load devices 4 are classified in advance into important devices and non-important devices, and the non-important devices are stopped when the power source is switched. This reduces the number of load devices 4 that are connected when the power source is switched, and reduces the inrush current that flows through the semiconductor switch 3 when the power source is switched. For example, important devices are load devices that are important for the safe driving of the vehicle, such as brake lights, headlights, and wipers. Non-important devices are load devices that do not impair the safe driving of the vehicle even if they are temporarily stopped, such as audio, air conditioners, and power windows.

[0073] After switching the power source, the load switch control device 10 supplies power to the load devices 4 to which power supply was stopped. At that time, the load switch control device 10 energizes the load switches 9 connected to the load devices 4 to which power supply was stopped, and drives the corresponding load devices 4, within a range that does not exceed the allowable current of the semiconductor switches 3. For example, the load switch control device 10 drives the multiple load devices 4 that were stopped sequentially rather than simultaneously. Alternatively, the load switch control device 10 may prevent load devices 4 with large inrush currents (equivalent capacitances) from being simultaneously activated, in order to prevent the allowable current of the semiconductor switches 3 from being exceeded. Conversely, power supply may be started simultaneously to multiple load devices 4, as long as it does not exceed the allowable current of the semiconductor switches 3.

[0074] As described above, the switch control device (switch control device 5B) in the third embodiment is configured to change the intermediate state holding time Tm according to information (load information 8A) representing the electrical characteristics of a load device that is in an energized state among the multiple load devices 4a to 4c.

[0075] According to this embodiment having the above configuration, the duration for which the intermediate state of the semiconductor switch connected to the power supply source that supplies power after switching is maintained is changed depending on the voltage difference between the output voltages of the first and second power supply sources and the connected load device. This prevents damage to the semiconductor switch due to overcurrent and enables smooth switching of the power supply source without interrupting the power supply, even if the difference in output voltage between the first and second power supply sources changes. Furthermore, since there is no need to design the semiconductor switch based on the worst-case conditions for the current capacity of the load device connected to the power supply switching device, the cost of the semiconductor switch can be reduced.

[0076] <Fourth embodiment> Next, a power supply switching device according to a fourth embodiment will be described. The fourth embodiment is an example of preventing a backflow current from flowing from the load device 4 to the first power supply source 2a and the second power supply source 2b, and a through current from flowing between the first power supply source 2a and the second power supply source 2b.

[0077] First, the configuration of the power supply switching device according to this embodiment will be described with reference to FIG. 8 is a diagram showing an example of the configuration of a power supply switching device 1C according to this embodiment. The power supply switching device 1C has a basic configuration similar to that of the power supply switching device 1A according to the second embodiment, and the following description will focus on the differences between the power supply switching device 1C and the second embodiment. The biggest difference between the power supply switching device 1C and the power supply switching device 1A according to the second embodiment is that the power supply switching device 1C includes a first semiconductor switch 3c and a second semiconductor switch 3d instead of the first semiconductor switch 3a and the second semiconductor switch 3b.

[0078] The power supply switching device 1C includes a first semiconductor switch 3c, a second semiconductor switch 3d, and a switch control device 5C. Power from a first power supply source 2a is supplied to a plurality of load devices 4a to 4c via the first semiconductor switch 3c. The first semiconductor switch 3c is composed of a plurality of field effect transistors M1 and M2, and the field effect transistors M1 and M2 are connected in series so that their body diodes are oriented in opposite directions.

[0079] Power from the second power supply source 2b is supplied to the plurality of load devices 4a to 4c via the second semiconductor switch 3d. The second semiconductor switch 3d is composed of a plurality of field effect transistors M3 and M4, which are connected in series so that their body diodes are oriented in opposite directions.

[0080] The switch control device 5C outputs a control signal (gate voltage) to the field effect transistors M1 and M2 of the first semiconductor switch 3c and the field effect transistors M3 and M4 of the second semiconductor switch 3d to switch the power supply. The switch control device 5C includes a voltage comparator 7, a gate voltage control circuit 6C, and load information 8A.

[0081] The gate voltage control circuit 6C generates and outputs a gate voltage Vga1 of the field effect transistor M1 serving as the first semiconductor switch 3c and a gate voltage Vga2 of the field effect transistor M2 serving as the field effect transistor M2 in accordance with the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b detected by the voltage comparator 7. The gate voltage control circuit 6C also generates and outputs a gate voltage Vgb1 of the field effect transistor M3 serving as the second semiconductor switch 3d and a gate voltage Vgb2 of the field effect transistor M4 in accordance with the voltage difference Vd.

[0082] Furthermore, the gate voltage control circuit 6C is capable of generating and outputting gate voltages Vga1, Vga2 and gate voltages Vgb1, Vgb2 according to load information 8A based on the equivalent electrical resistance and equivalent capacitance of the load devices 4a to 4c in addition to the voltage difference Vd.

[0083] In this embodiment, as shown in Fig. 8, two field-effect transistors are connected back-to-back in each of the first semiconductor switch 3c and the second semiconductor switch 3d. The back-to-back connection is a connection configuration in which the body diodes of two field-effect transistors are connected in series with each other facing each other. This makes it possible to block backflow current from the load device 4 to the first power supply source 2a or the second power supply source 2b, and through current between the first power supply source 2a and the second power supply source 2b.

[0084] Next, an example of the operation of the power supply switching device 1C according to this embodiment will be described with reference to FIG. 9 is a diagram showing an example of gate voltages Vga1, Vga2 and gate voltages Vgb1, Vgb2 generated by gate voltage control circuit 6C as an operation example of power supply switching device 1C. The upper part of Fig. 9 shows the voltage profiles of gate voltages Vga1, Vga2 when switching from first power supply source 2a to second power supply source 2b, the middle part of Fig. 9 shows the voltage profiles of gate voltages Vgb1, Vgb2, and the lower part of Fig. 9 shows current I2 flowing through second semiconductor switch 3d. In Fig. 9, the horizontal axis represents time t.

[0085] In this embodiment, as in the first embodiment, it is assumed that the voltage Va of the first power supply source 2a is 13 V and the voltage Vb of the second power supply source 2b is 14 V, and an example of switching from the first power supply source 2a with a low output voltage to the second power supply source 2b with a high output voltage will be described.

[0086] As shown in FIG. 9, when power is supplied from the first power supply source 2a to the load devices 4a to 4c (first power supply S1), the gate voltages Vga1 and Vga2 of the first semiconductor switch 3c are at a high level, and the gate voltages Vgb1 and Vgb2 of the second semiconductor switch 3d are at a low level.

[0087] When switching the power supply source from the first power supply S1 to the second power supply 2b, the gate voltage control circuit 6C first sets the gate voltages Vga1 and Vga2 of the first semiconductor switch 3c to low level.

[0088] Here, the gate voltage control circuit 6C raises the gate voltage Vgb1 of the second semiconductor switch 3d to the intermediate voltage Vm immediately before the gate voltages Vga1 and Vga2 become low. As shown in the middle of FIG. 9, in this embodiment, an overlap period Po is provided in which the gate voltages Vga1 and Vgb1 are simultaneously set to a voltage higher than the low level. When switching from one power supply source to the other during the overlap period Po, the gate voltage control circuit 6C of the switch control device 5C places the other field-effect transistor (e.g., field-effect transistor M3) in an intermediate state before cutting off one power supply. The effect of this overlap period will be described later. The gate voltage control circuit 6C holds the gate voltage Vgb1 at the intermediate voltage Vm for a hold time Tm (intermediate state S2).

[0089] Thereafter, the gate voltage control circuit 6C raises the gate voltage Vgb1 from the intermediate voltage Vm to a high level, and then raises the gate voltage Vgb2 from a low level to a high level, thereby completely switching the power supply source from the first power supply source 2a to the second power supply source 2b (second power supply S3).

[0090] As in the first embodiment, the hold time Tm is dynamically set according to the voltage difference Vd between the voltages output by the first power supply source 2a and the second power supply source 2b. When the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b is small, the hold time Tm is shortened, and when the voltage difference Vd is large, the hold time Tm is lengthened. In this embodiment, a state in which the gate voltage Vgb1 of the field-effect transistor M3 of the second semiconductor switch 3d is a voltage between the low level and the high level is defined as an "intermediate state."

[0091] The current I2 flowing through the second semiconductor switch 3d as a result of the above-described power supply switching control is shown in the lower part of Figure 9. Time t0 is the timing when the gate voltage Vgb1 starts to rise from low level. A first peak current flows when the gate voltage Vgb1 rises to the intermediate voltage Vm (time t1). After that, after the first peak current decreases, a second peak current flows when the gate voltage Vgb1 rises to high level (time t2). Next, a third peak current flows when the gate voltage Vgb2 rises to high level (time t3). When both gate voltages Vgb1 and Vgb2 reach high level (time t4), the power supply source is completely switched to the second power supply source 2b.

[0092] As described above, in the switch control device (switch control device 5C) of the fourth embodiment, when switching from one power supply source to another, an intermediate state is provided in which the field effect transistor (for example, field effect transistor M3) whose body diode is in the opposite direction to the power supply direction is kept in a non-saturated state, and the holding time Tm of the intermediate state is changed according to the voltage difference Vd between the voltages output by the first power supply source 2a and the second power supply source 2b.

[0093] Furthermore, the switch control device (switch control device 5C) according to this embodiment may be configured to provide an intermediate state in which a field-effect transistor (for example, field-effect transistor M3) whose body diode is opposite to the power supply direction is maintained in a non-saturated state when switching from one power supply source to another, and to change the hold time Tm of the intermediate state according to information representing the electrical characteristics of the load devices 4a to 4c. Alternatively, the hold time Tm of the intermediate state may be changed according to the voltage difference Vd and the information representing the electrical characteristics of the load devices 4a to 4c.

[0094] In this manner, in this embodiment, the peak current I2 flowing through the second semiconductor switch 3d can be dispersed so that it does not exceed the allowable current indicated by the dashed line. Furthermore, in this embodiment, the power supply source can be changed according to the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b, so that the power supply source can be switched so as not to exceed the allowable current.

[0095] Here, the effect of providing an overlap period Po between the gate voltages Vga1 and Vgb1 of the first semiconductor switch 3c and the second semiconductor switch 3d will be described with reference to FIG.

[0096] 10 is a diagram illustrating the effect of providing an overlap period Po between the gate voltage Vga1 of the first semiconductor switch 3c and the gate voltage Vgb1 of the second semiconductor switch 3d. The example of Fig. 10 shows the operating states of the field-effect transistors M1 to M4 that constitute the first semiconductor switch 3c and the second semiconductor switch 3d, respectively, when switching from the first power supply source 2a to the second power supply source 2b.

[0097] 10, when power is supplied from the first power supply source 2a to the load devices 4a to 4c (first power supply S1), the field effect transistors M1 and M2 of the first semiconductor switch 3c are in the ON state, and the field effect transistors M3 and M4 of the second semiconductor switch 3d are in the OFF state. Conversely, when power is supplied from the second power supply source 2b to the load devices 4a to 4c (second power supply S3), the field effect transistors M1 and M2 of the first semiconductor switch 3c are in the OFF state, and the field effect transistors M3 and M4 of the second semiconductor switch 3d are in the ON state.

[0098] During the overlap period Po, the field effect transistors M1 and M3 are ON, and the field effect transistors M2 and M4 are OFF. That is, the field effect transistors M2 and M4 are in a state where current flows through their respective modulating diodes, forming a parallel diode circuit.

[0099] As a result, in this embodiment, switching operation is possible without interrupting the power supply when switching power sources. Furthermore, in this embodiment, since any of the body diodes between the first power supply source 2a and the second power supply source 2b is reverse-connected, it is possible to interrupt the through current between the first power supply source 2a and the second power supply source 2b.

[0100] In this embodiment, the holding time Tm and the intermediate voltage Vm are set according to the voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b, but these parameters can be set based on the voltage difference Vd and the load information 8A, as in the second embodiment. Also, the power supply switching device 1C according to this embodiment can be combined with the third embodiment, which uses information on load devices 4 that are in an energized state among a plurality of load devices 4.

[0101] Although the overlap period Po has been described in this embodiment, the overlap period is not an essential component of this embodiment. However, the configuration of the power supply switching device 1C in which an overlap period Po is provided in the gate voltage between the first semiconductor switch 3c and the second semiconductor switch 3d cannot be applied to the first to third embodiments. This is because the first to third embodiments do not include a reverse-connection configuration using two field-effect transistors such as the first semiconductor switch 3c and the second semiconductor switch 3d. Therefore, in the first to third embodiments, if an overlap period is provided in the gate voltages of the first semiconductor switch 3a and the second semiconductor switch 3b, a through current will flow between the first power supply source 2a and the second power supply source 2b.

[0102] <Fifth embodiment> Next, a power supply switching device according to a fifth embodiment will be described. The fifth embodiment is an example of a power supply switching device that forms a diode parallel circuit during power supply switching, and that includes a configuration for suppressing an increase in voltage drop and power loss due to the forward voltage of the body diode.

[0103] The configuration of the power supply switching device according to this embodiment will be described with reference to FIG. 11 is a diagram showing an example of the configuration of a power supply switching device 1D according to this embodiment. The power supply switching device 1D has a basic configuration similar to that of the power supply switching device 1C according to the fourth embodiment, and the following description will focus on the differences between the power supply switching device 1D and the fourth embodiment. The main difference between the power supply switching device 1D and the power supply switching device 1C according to the fourth embodiment is that the power supply switching device 1D includes ideal diode control circuits 11a and 11b.

[0104] The power supply switching device 1D includes a first semiconductor switch 3e, a second semiconductor switch 3f, and a switch control device 5D. Power from a first power supply source 2a is supplied to a plurality of load devices 4a to 4c via the first semiconductor switch 3e. The first semiconductor switch 3e is configured by reversely connecting a field effect transistor M1 and a field effect transistor M2, similar to the first semiconductor switch 3c in the fourth embodiment. However, it differs from the fourth embodiment in that the gate voltage of the field effect transistor M2 is input from an ideal diode control circuit 11a.

[0105] Power from the second power supply source 2b is supplied to the plurality of load devices 4a to 4c via the second semiconductor switch 3f. The second semiconductor switch 3f is configured by reversely connecting the field effect transistor M3 and the field effect transistor M4, similar to the second semiconductor switch 3d in the fourth embodiment. However, it differs from the fourth embodiment in that the gate voltage of the field effect transistor M4 is input from the ideal diode control circuit 11b.

[0106] The switch control device 5D outputs a control signal (gate voltage) to the field effect transistor M1 of the first semiconductor switch 3e and the field effect transistor M3 of the second semiconductor switch 3f to switch the power supply. The switch control device 5D includes a voltage comparator 7, a gate voltage control circuit 6A, and load information 8A. The switch control device 5D can have the same configuration as the switch control device 5A in the second embodiment. Alternatively, the switch control device 5D may have the same configuration as the switch control device 5 in the first embodiment, but without referring to the load information 8.

[0107] The gate voltage control circuit 6A generates and outputs a gate voltage Vga1 of the field effect transistor M1 serving as the first semiconductor switch 3e and a gate voltage Vgb1 of the field effect transistor M3 serving as the second semiconductor switch 3f in accordance with a voltage difference Vd between the output voltages of the first power supply source 2a and the second power supply source 2b detected by a voltage comparator 7. The gate voltage control circuit 6A can also generate and output the gate voltage Vga1 of the field effect transistor M1 and the gate voltage Vgb1 of the field effect transistor M3 in accordance with load information 8A based on the equivalent electrical resistance and equivalent capacitance of the load devices 4a to 4c in addition to the voltage difference Vd.

[0108] 11, in the first semiconductor switch 3e, the gate voltage Vga2 of the field effect transistor M2 is controlled by an ideal diode control circuit 11a, and in the second semiconductor switch 3f, the gate voltage Vgb2 of the field effect transistor M4 is controlled by an ideal diode control circuit 11b.

[0109] The ideal diode control circuit 11a includes operational amplifiers 12a and 13a that detect the current direction based on the drain and source voltages of a field-effect transistor M2, and a transistor 14a that adjusts a gate voltage Vga2 based on the outputs of the operational amplifiers 12a and 13a. The power supply to the operational amplifiers 12a and 13a is not shown. In the example of FIG. 11, a bipolar transistor is used as the transistor 14a, but this is not a limitation.

[0110] The operational amplifier 12a outputs a high-level signal to the gate of the transistor 14a when the current flowing through the field-effect transistor M2 is in the reverse direction (reverse direction relative to the body diode). For example, when the second semiconductor switch 3f is in the ON state and the output voltage of the second power supply source 2b is higher than that of the first power supply source 2a, the current flowing through the field-effect transistor M2 is in the reverse direction. When the current flowing through the field-effect transistor M2 is in the reverse direction, the operational amplifier 12a turns on the transistor 14a and pulls down the gate voltage Vga2 to immediately shut off the field-effect transistor M2.

[0111] The operational amplifier 13a outputs a high-level signal to the gate of the field-effect transistor M2 when the current flowing through the field-effect transistor M2 is in the forward direction (forward with respect to the body diode). The operational amplifier 13a operates on a boosted power supply, and when the current flowing through the field-effect transistor M2 becomes forward, it sets the gate voltage Vga2 to a high level to energize the field-effect transistor M2.

[0112] This configuration of the ideal diode control circuit 11a enables diode operation with reduced voltage drop. The ideal diode control circuit 11b has a similar configuration.

[0113] The ideal diode control circuit 11b includes operational amplifiers 12b and 13b that detect the current direction based on the drain voltage and source voltage of the field effect transistor M4, and a transistor 14b that adjusts the gate voltage Vgb2 based on the outputs of the operational amplifiers 12b and 13b.

[0114] When the current flowing through field-effect transistor Mf is in the reverse direction (reverse direction relative to the body diode), operational amplifier 12b outputs a High-level signal to the gate of transistor 14b. For example, when first semiconductor switch 3e is in the ON state and the output voltage of first power supply source 2a is higher than that of second power supply source 2b, the current flowing through field-effect transistor M4 is in the reverse direction. When the current flowing through field-effect transistor M4 is in the reverse direction, operational amplifier 12b turns on transistor 14b and pulls down the gate voltage Vgb2 to immediately shut off field-effect transistor M4.

[0115] When the current flowing through the field-effect transistor M4 is in the forward direction (forward with respect to the body diode), the operational amplifier 13b outputs a high-level signal to the gate of the field-effect transistor M4. The operational amplifier 13b operates on a boosted power supply, and when the current flowing through the field-effect transistor M4 is in the forward direction, the operational amplifier 13b sets the gate voltage Vgb2 to a high level to energize the field-effect transistor M4.

[0116] As described above, in the power supply switching device (power supply switching device 1D) according to the fifth embodiment, the switch control device (switch control device 5D) cuts off a field effect transistor (field effect transistors M2, M4) whose body diode is forward in the power supply direction among multiple field effect transistors constituting a semiconductor switch connected to one power supply source, and a field effect transistor (field effect transistors M2, M4) whose body diode is forward in the power supply direction among multiple field effect transistors (field effect transistors M4) constituting a semiconductor switch connected to the other power supply source, when the current flowing through the field effect transistor (field effect transistors M2, M4) whose body diode is forward in the power supply direction becomes reverse to the output supply direction.

[0117] In the fourth embodiment described above, a parallel diode circuit was formed using the body diodes of field-effect transistors M2 and M4 when switching power supplies, but this configuration had the problem of increased voltage drop and power loss due to the forward voltage of the body diodes. In this embodiment, by using field-effect transistors with low ON resistance to provide a function equivalent to that of a diode, damage due to a shoot-through current between the first power supply source 2a and the second power supply source 2b can be prevented and the voltage drop and power loss can be suppressed.

[0118] Sixth Embodiment Next, a power supply switching device according to a sixth embodiment will be described. In the first and second embodiments, when the first semiconductor switch 3a and the second semiconductor switch 3b are turned on, the gate voltages Vga and Vgb are controlled using a two-stage voltage profile with a period during which they are held at an intermediate voltage. However, the present invention is not limited to this. For example, the configuration for turning on the first semiconductor switch 3 may be any of the first to third configuration examples shown below.

[0119] (First configuration example for turning on the semiconductor switch) First, a first configuration for turning on the semiconductor switch 3 will be described with reference to Figures 12 and 13. The first configuration is an example in which the gate voltage generated by the voltage source is increased in three or more stages based on a voltage profile.

[0120] 12 is a diagram showing a first example configuration for turning on the semiconductor switch 3 of the power supply switching device according to this embodiment. In the first example configuration, the field-effect transistor M of the semiconductor switch 3 is turned on based on the gate voltage generated by the voltage source 15, and power from the power supply source 2 is supplied to the load device 4.

[0121] FIG. 13 is a diagram illustrating an example of the operation of the semiconductor switch 3 in the first exemplary configuration of the power supply switching device according to this embodiment. In FIG. 13, the vertical axis represents the gate voltage of the field-effect transistor M, and the horizontal axis represents time t. FIG. 13 illustrates an example of a voltage profile in which the gate voltage rises in three stages, passing through a first intermediate state S21 and a second intermediate state S22, as the gate voltage rises from a low level to a high level. FIG. 13 also illustrates an example in which the gate voltage (intermediate voltage) is maintained at a higher value in the first intermediate state S21 and the second intermediate state S22, as indicated by the dashed lines. Note that not only the values of the intermediate voltages in the first intermediate state S21 and the second intermediate state S22 but also the respective retention times Tm in the first intermediate state S21 and the second intermediate state S22 may be changed as appropriate.

[0122] (Second configuration example for turning on the semiconductor switch) Next, a second configuration for turning on the semiconductor switch 3 will be described with reference to Figures 14 and 15. The second configuration is an example in which the gate voltage is controlled by a current source using the electrical resistance and capacitance components of an external circuit connected to the gate of the field-effect transistor.

[0123] 14 is a diagram showing a second example configuration for turning on the semiconductor switch 3 of the power supply switching device according to this embodiment. In the second example configuration, a current source 16 is connected to the gate of the field-effect transistor M of the semiconductor switch 3 via an electrical resistor 17. One end of a capacitor 18 is connected to the connection midpoint between the gate of the field-effect transistor M and the electrical resistor 17, and the other end of the capacitor 18 is grounded. The electrical resistor 17 and the capacitor 18 form a so-called CR circuit. A current output from the current source 16 passes through the CR circuit and is input to the gate, turning on the field-effect transistor M of the semiconductor switch 3, thereby supplying power from the power supply source 2 to the load device 4. Using this CR circuit, the value of the gate voltage in the intermediate state (intermediate voltage) and the hold time Tm can be adjusted.

[0124] FIG. 15 is a diagram illustrating an example of the operation of the semiconductor switch 3 according to the second exemplary configuration of the power supply switching device of this embodiment. As shown in FIG. 15, the rate at which the gate voltage rises from a low level to a high level (corresponding to the hold time Tm) can be changed by adjusting the time constant of the CR circuit. For example, by reducing the time constant of the CR circuit, the gate voltage can be made to rise faster, thereby shortening the intermediate state (hold time Tm). Furthermore, by increasing the amount of current supplied from the current source 16, the gate voltage rises to a high level more quickly. That is, the hold time Tm during which the gate voltage remains within the intermediate voltage range (intermediate state) can be adjusted by adjusting the amount of current supplied from the current source 16. In this case, the gate voltage in the intermediate state is not maintained at a constant value such as the intermediate voltage Vm described above.

[0125] (Third configuration example for turning on a semiconductor switch) Next, a third configuration for turning on the semiconductor switch 3 will be described with reference to Figures 16 and 17. The third configuration is an example in which a PWM (Pulse Width Modulation) generator is provided and a PWM waveform is input to the gate as an intermediate state. This configuration can also achieve the same effect.

[0126] 16 is a diagram showing a third example configuration for turning on the semiconductor switch 3 of the power supply switching device according to this embodiment. The third example configuration shown in FIG. 16 is a configuration in which the voltage source 15 in FIG. 12 is replaced with a PWM generator 19. In the third example configuration, the field-effect transistor M of the semiconductor switch 3 is turned on based on the PWM signal output by the PWM generator 19, and power is supplied from the power supply source 2 to the load device 4. At this time, an intermediate state (intermediate voltage) of the gate voltage is generated by controlling the duty ratio of the PWM signal.

[0127] 17 is a diagram showing an example of the operation of the semiconductor switch 3 in the third configuration example of the power supply switching device according to this embodiment. The gate voltage in the intermediate state (corresponding to the intermediate voltage Vm) can be adjusted by controlling the duty ratio of the PWM signal. For example, by keeping the duty ratio of the PWM signal constant, the gate voltage is maintained at the intermediate voltage Vm. Furthermore, the application time of the PWM signal (the period during which the low level and the high level are alternately repeated) corresponds to the maintenance time Tm of the intermediate state.

[0128] [Computer hardware configuration] Next, the hardware configuration of the computer included in the power supply switching device in each of the above-described embodiments will be described with reference to FIG.

[0129] 18 is a block diagram showing an example of the hardware configuration of a computer included in a power supply switching device according to each embodiment. A calculator 20 shown in FIG. 18 is hardware used as a so-called computer.

[0130] The computer 20 includes a CPU (Central Processing Unit) 21, a ROM (Read Only Memory) 22, a RAM (Random Access Memory) 23, a non-volatile storage 26, and a network interface 27, all of which are connected to a bus.

[0131] The CPU 21 is an example of a processor as a computing device. The ROM 22 and the RAM 23 are examples of memories. For example, the load information 8A is stored in the ROM 22 or the nonvolatile storage 26.

[0132] The nonvolatile storage 26 is a nonvolatile storage element with a larger capacity than a memory. A program for realizing the functions of the power supply switching device according to each embodiment of the present invention is stored in the nonvolatile storage 26. The nonvolatile storage 26 is an example of a computer-readable non-transitory recording medium. The program may also be stored in the ROM 22.

[0133] The network interface 27 is configured by a communication device or the like that controls communication with other devices (for example, ECUs) via a network such as a communication line or a CAN, etc. The network interface 27 is an example of an input / output device.

[0134] Although FIG. 18 has been described as an example of the hardware configuration of the computer included in the power supply switching device, the hardware configuration of the computer included in the controller 111 can also be the same.

[0135] Furthermore, the present invention is not limited to the above-described embodiments, and various other applications and modifications are possible without departing from the spirit of the present invention as defined in the claims. For example, the above-described embodiments have been described in detail and specifically to clearly explain the present invention, and are not necessarily limited to those including all of the components described. Furthermore, it is possible to replace part of the configuration of one embodiment with a component of another embodiment. It is also possible to add a component of another embodiment to the configuration of one embodiment. It is also possible to add, replace, or delete other components from part of the configuration of each embodiment.

[0136] Furthermore, the above-described configurations, functions, processing units, etc. may be partially or entirely realized in hardware, for example, by designing them as integrated circuits, etc. As the hardware, a broad processor device such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit) may be used.

[0137] In the above-described embodiment, the control lines and information lines are those that are considered necessary for the explanation, and not all control lines and information lines in the product are necessarily shown. In reality, it can be considered that almost all components are connected to each other. [Explanation of symbols]

[0138] REFERENCE SIGNS LIST 1, 1A to 1D...power supply switching device, 2a...first power supply source, 2b...second power supply source, 3...semiconductor switch, 3a, 3c, 3e...first semiconductor switch, 3b, 3d, 3f...second semiconductor switch, 4, 4a to 4c...load device, 5, 5A to 5D...switch control device, 6, 6A, 6C...gate voltage control circuit, 7...voltage comparator, 8A...load information, 9a to 9c...load switch, 10...load switch control device, 11a, 11b...ideal diode control circuit, 12a, 12b, 13a, 13b...operational amplifier, 14a, 14b...transistor, 15...voltage source, 16...current source, 19...PWM generator, 100...vehicle, 110...vehicle control device, 120...sensors, 130...actuators

Claims

1. A power supply switching device comprising: a first semiconductor switch provided between a first power supply source that supplies power to a load device and the load device; a second semiconductor switch provided between a second power supply source that supplies power to the load device and the load device; and a switch control device that controls drive voltages of the first semiconductor switch and the second semiconductor switch, When switching from one of the first power supply source and the second power supply source to the other, the switch control device provides an intermediate state in which the semiconductor switch connected to the power supply source that supplies power after the switching is maintained in a non-saturated state, and changes the duration of time for which the intermediate state is maintained in accordance with a voltage difference between the voltages output by the first power supply source and the second power supply source. Power switching device.

2. The switch control device changes the hold time in a direction longer than the reference time when the voltage difference is greater than a predetermined value, and changes the hold time in a direction shorter than the reference time when the voltage difference is equal to or less than the predetermined value. The power supply switching device according to claim 1 .

3. The switch control device changes the holding time of the intermediate state in response to the voltage difference and information representing the electrical characteristics of the load device. The power supply switching device according to claim 2 .

4. The output terminal of the first semiconductor switch is electrically connected to the output terminal of the second semiconductor switch, and the plurality of load devices are connected to the output terminal. The power supply switching device according to claim 3 .

5. The switch control device changes the holding time of the intermediate state in accordance with information representing the electrical characteristics of a load device that is in a conducting state among the plurality of load devices. The power supply switching device according to claim 4.

6. before the switch control device switches from one power supply source to the other power supply source, stopping power supply to any one of the plurality of load devices; The switch control device changes the holding time of the intermediate state in accordance with information representing the electrical characteristics of a load device that is in a conducting state among the plurality of load devices. The power supply switching device according to claim 5 .

7. the first semiconductor switch and the second semiconductor switch are each configured by connecting a plurality of field effect transistors in series so that their body diodes are oriented in opposite directions; The switch control device provides an intermediate state in which the field effect transistor whose body diode is in the reverse direction to the power supply direction is maintained in a non-saturated state when switching from one power supply source to the other power supply source, and changes the duration of time the intermediate state is maintained in accordance with the voltage difference between the voltages output by the first power supply source and the second power supply source. The power supply switching device according to claim 1 .

8. The switch control device provides an intermediate state in which the field effect transistor on the side where the body diode is in the reverse direction to the power supply direction is maintained in a non-saturated state when switching from one power supply source to the other power supply source, and changes the duration of the intermediate state according to information representing the electrical characteristics of the load device. The power supply switching device according to claim 7.

9. When switching from one power supply source to another, the switch control device places the other field effect transistor in an intermediate state before cutting off one power supply.

9. The power supply switching device according to claim 7 or 8.

10. The switch control device cuts off a field effect transistor, among a plurality of field effect transistors constituting a semiconductor switch connected to one power supply source, whose body diode is in a forward direction with respect to the power supply direction, and a field effect transistor, among a plurality of field effect transistors constituting a semiconductor switch connected to the other power supply source, whose body diode is in a forward direction with respect to the power supply direction, when a current flowing through the field effect transistor is in a reverse direction with respect to the output supply direction.

9. The power supply switching device according to claim 7 or 8.

11. The information representing the electrical characteristics of the load device includes at least an equivalent electrical resistance and an equivalent capacitance.

9. The power supply switching device according to claim 3 or 8.

12. A vehicle control device including a controller that controls a vehicle and a power supply switching device, the power supply switching device includes: a first semiconductor switch provided between a first power supply source that supplies power to a load device provided in the vehicle and the load device; a second semiconductor switch provided between a second power supply source that supplies power to the load device and the load device; and a switch control device that controls drive voltages of the first semiconductor switch and the second semiconductor switch; When switching from one of the first power supply source and the second power supply source to the other, the switch control device provides an intermediate state in which the semiconductor switch connected to the power supply source that supplies power after the switching is maintained in a non-saturated state, and changes the duration of time for which the intermediate state is maintained in accordance with a voltage difference between the voltages output by the first power supply source and the second power supply source. Vehicle control device.

13. A power supply switching method using a power supply switching device including: a first semiconductor switch provided between a first power supply source that supplies power to a load device and the load device; a second semiconductor switch provided between a second power supply source that supplies power to the load device and the load device; and a switch control device that controls drive voltages of the first semiconductor switch and the second semiconductor switch, in the switch control device, when switching from one of the first power supply source and the second power supply source to the other, an intermediate state is provided in which the semiconductor switch connected to the power supply source that supplies power after the switching is maintained in a non-saturated state, and a voltage difference between the voltages output by the first power supply source and the second power supply source is detected; The retention time of the intermediate state is changed according to the voltage difference. Power switching method.

Images