Filters for laminated circuit assemblies

The laminated circuit assembly with a frequency-absorbing material in a cavity structure addresses signal interference and thermal load issues, enhancing communication and scalability in quantum computing systems.

JP7727719B2Active Publication Date: 2025-08-21GOOGLE LLC
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Patent Information

Application Number
JP2023517773
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-09-16
Filing Date
2021-09-16
Publication Date
2025-08-21
Estimated Expiration
2041-09-16

AI Technical Summary

Technical Problem

Conventional filtering methods for laminated circuit assemblies in quantum computing systems do not adequately address signal interference and thermal load issues, particularly with infrared signals, which can interfere with communication and increase thermal load on components.

Method used

A laminated circuit assembly with a filter portion that includes a frequency-absorbing material, configured to provide less attenuation to lower frequencies and more attenuation to higher frequencies, particularly infrared signals, by forming a cavity in the substrate and filling it with a frequency-absorbing material.

Benefits of technology

The solution improves signal communication by reducing interference and thermal load, enabling high-performance, compact, and scalable implementations of signal lines in quantum computing systems.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

For example, a laminated circuit assembly for filtering signals in one or more signal lines in a quantum computing system is provided. In one example, the laminated circuit assembly includes one or more signal lines arranged in a first direction within a substrate. The laminated circuit assembly includes a dielectric portion of the substrate. The laminated circuit assembly includes a filter portion of the substrate extending in the first direction and including a frequency absorbing material that provides less attenuation to a first signal at a first frequency than to a second signal at a second, higher frequency. The filter portion is configured to attenuate infrared signals passing through the one or more signal lines.
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Description

[Technical Field]

[0001] Priority claims

[0001] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 079,258, entitled "Filter for Laminated Circuit Assembly," filed September 16, 2020, which is incorporated herein by reference.

[0002]

[0002] The present disclosure relates generally to laminated circuit assemblies. More particularly, aspects of the present disclosure relate to filters for laminated circuit assemblies. [Background technology]

[0003] Quantum computing is a computational method that exploits quantum effects such as superposition of basis states and quantum entanglement to perform certain calculations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits, e.g., "1" or "0," quantum computing systems can manipulate information using quantum bits ("qubits"). A qubit can refer to a quantum device that allows for the superposition of multiple states (e.g., data in both "0" and "1" states) and / or the superposition of data itself in multiple states. According to conventional terminology, the superposition of "0" and "1" states in a quantum system can be expressed, for example, as a|0〉 + b|1〉. The "0" and "1" states of a digital computer are analogous to the |0〉 and |1〉 basis states of a qubit, respectively. Summary of the Invention [Problem to be solved by the invention]

[0004]

[0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the description that follows, or may be learned from the description, or may be learned by practice of the embodiments.

[0005] One exemplary aspect of the present disclosure relates to a laminated circuit assembly. The laminated circuit assembly includes one or more signal lines arranged in a first direction within a substrate. The laminated circuit assembly includes a dielectric portion of the substrate. The laminated circuit assembly includes a filter portion of the substrate extending in the first direction and including a frequency absorbing material that provides less attenuation to a first signal at a first frequency than to a second signal at a second, higher frequency. The filter portion is configured to attenuate infrared signals passing through the one or more signal lines.

[0006] Another exemplary aspect of the present disclosure relates to a method for manufacturing a filter for signal lines. The method includes receiving a laminated circuit assembly having one or more signal lines arranged in a first direction within a dielectric material of a substrate, where a second direction is perpendicular to the substrate and a third direction is orthogonal to the first and second directions. The method includes forming a cavity in the substrate by removing a portion of the dielectric material above the signal line in the second direction, where the cavity extends along the signal line in the first direction. The method includes filling the cavity with a frequency absorbing material, where the frequency absorbing material provides less attenuation for a first signal at a first frequency than for a second signal at a second, higher frequency. The filled cavity is configured to attenuate infrared signals passing through the one or more signal lines.

[0007]

[0007] Other aspects of the present disclosure relate to various systems, methods, apparatus, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0008]

[0008] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the associated principles.

[0009]

[0009] A detailed description of embodiments aimed at those skilled in the art is set forth in the specification, which refers to the accompanying drawings. [Brief explanation of the drawings]

[0010] [Figure 1] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 2]

[0011] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 3]

[0012] 1 illustrates an isometric cross-sectional view of an exemplary portion of a laminated circuit assembly according to an exemplary embodiment of the present disclosure. [Figure 4]

[0013] 1 illustrates an isometric cross-sectional view of an exemplary portion of a processed laminated circuit assembly according to an exemplary embodiment of the present disclosure. [Figure 5]

[0014] 1 illustrates an isometric cross-sectional view of an exemplary portion of a processed laminated circuit assembly according to an exemplary embodiment of the present disclosure. [Figure 6]

[0015] 1 illustrates an isometric cross-sectional view of an exemplary portion of a processed laminated circuit assembly according to an exemplary embodiment of the present disclosure. [Figure 7]

[0016] 1A-1C illustrate cross-sectional views of exemplary processed laminated circuit assemblies according to exemplary embodiments of the present disclosure. [Figure 8]

[0017] 10 illustrates a cross-sectional view of an exemplary processed laminated circuit assembly according to another exemplary embodiment of the present disclosure. [Figure 9]

[0018] 10 illustrates a cross-sectional view of an exemplary processed laminated circuit assembly according to another exemplary embodiment of the present disclosure. [Figure 10]

[0019] 10 illustrates a cross-sectional view of an exemplary processed laminated circuit assembly according to another exemplary embodiment of the present disclosure. [Figure 11]

[0020] 1 illustrates an exemplary method of manufacturing a laminated circuit assembly according to aspects of an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0011]

[0021] An exemplary aspect of the present disclosure relates to a laminated circuit assembly. The circuit assembly can include a signal line disposed along a substrate. The substrate can include a filter portion that attenuates signals traveling along the signal line. In some embodiments, the filter portion can provide different levels of attenuation based on the frequency of the signal on the signal line. For example, the filter portion can include an absorbing material configured to provide less attenuation to a signal at a first frequency than to a second signal at a second, higher frequency. In one embodiment, the filter portion can attenuate signals in the infrared frequency range.

[0012]

[0022] More particularly, embodiments of laminated circuit assemblies according to exemplary aspects of the present disclosure can include signal wires of any suitable conductive material (e.g., copper, etc.). In some embodiments, the signal wires can include a superconducting material, such as a material characterized by superconducting properties at or below about 10 Kelvin (including exemplary temperatures below about 1 Kelvin and / or about 20 milliKelvin). For example, in one embodiment, the signal wires can include niobium. In some embodiments, the signal wires can include one or more superconducting materials in addition to another conductive material, such as copper or tin. For example, the superconducting material can be coated, covered, and / or otherwise laminated with another conductive material (e.g., deposited and / or electroplated copper, etc.) to protect the superconducting material, strengthen and / or stiffen portions of the superconducting material, and / or cooperate to form the signal wire.

[0013]

[0023] Substrate embodiments according to exemplary aspects of the present disclosure can include a dielectric material. For example, the dielectric material can include one or more polymers, one or more ceramics, or a composite thereof (e.g., a polymer matrix with one or more ceramic fillers). In some embodiments, the dielectric material can be rigid or substantially rigid. In some embodiments, the dielectric material can include a resilient material (e.g., a flex material). For example, one embodiment of a laminate circuit assembly includes a flex circuit board.

[0014]

[0024] As used herein, a "flex circuit" refers to a substrate including at least one generally planar substrate (e.g., a layered substrate) or other support on which one or more signal lines are formed or disposed and which has flexibility in at least one plane. As used herein, "flexibility" refers to the ability to deform (e.g., be subjected to mechanical stress, etc.) without breaking. For example, a rectangular flex circuit may be flexible along the largest surface of the rectangular flex circuit. A rectangular flex circuit may be flexible and / or rigid along at least a portion of its edges. Flexibility can be achieved as a property of the material (e.g., metals such as copper, copper alloys, niobium, aluminum, etc., dielectric materials, non-metals, polymers, rubber, etc.) from which the flex circuit and / or layers of the flex circuit are formed, by hinging and / or segmenting the flex circuit (e.g., hinging and / or segmenting rigid portions), and / or by any other suitable method. The substrate may be strictly planar (e.g., having a cross-section that is substantially linear across its length and width) and / or may be generally planar in that the substrate bends, wrinkles, or otherwise exhibits a shape that is non-linear in at least one cross-section, but generally has a depth that is significantly less (e.g., less than about 10%) than its length and width.

[0015]

[0025] In some embodiments, one or more layers of dielectric material may be stacked together with one or more signal lines sandwiched therebetween to form a substrate with embedded signal lines. In general, however, it is contemplated that signal lines may be disposed along one or more surfaces of the substrate (e.g., external surfaces as in a microstrip implementation) and / or within the substrate according to any suitable construction method.

[0016]

[0026] An embodiment of a substrate according to an exemplary aspect of the present disclosure can include a filter material. In some embodiments, the filter material can be distributed and / or embedded within a dielectric material. For example, a polymer dielectric material can be doped with a filter material (e.g., magnetically loaded with frequency absorbing particles). In this way, the dielectric portion of the substrate and the filter portion of the substrate can be identical, since the dielectric portion can be the portion that provides the filtering effect.

[0017]

[0027] However, in some embodiments, the filter portion can include a different material than some other portions of the substrate, such as the dielectric portion. For example, the filter portion of the substrate can include a portion of a dielectric material (e.g., optionally the same dielectric material) that includes a higher concentration of frequency absorbing components (e.g., frequency absorbing particles) than another portion of the same or a different dielectric material (e.g., which may include none). For example, additive manufacturing techniques could be applied to selectively place material that includes an absorbing component within a larger portion of material that otherwise does not include the absorbing component.

[0018]

[0028] In some examples, the filter material can provide less attenuation to signals at a first frequency and more attenuation to signals at a second, higher frequency. For example, some filter materials provide attenuation that increases substantially monotonically with increasing signal frequency for at least a portion of a target frequency band. In some embodiments, aspects of the filter material can be configured for low-pass and / or band-pass operation.

[0019]

[0029] In some embodiments, the filter portion of the substrate may be bounded by one or more boundaries of a cavity in the substrate (e.g., a cavity in a dielectric material). For example, the cavity in the substrate may be filled with a filter material (e.g., a magnetically supported polymer). In some embodiments, the cavity may be filled (e.g., partially or completely) with the filter material through an access in the substrate if the filter material is in any pourable, injectable, and / or moldable state (e.g., flowable particulate, soft / plasticized material, gel, slurry, paste, foam, uncured thermoset material, softened / molten thermoplastic material, etc.). In some embodiments, the cavity may be filled with the filter material in a substantially solid state (e.g., by pressing into the cavity, etc.).

[0020]

[0030] In some embodiments, the cavity can radially surround or otherwise enclose at least a portion of the signal line. For example, the signal line can extend in a first direction within the substrate. A second direction can be defined perpendicular to the outer surface of the substrate (e.g., through the thickness of the substrate). A third direction can be defined orthogonal to the first and second directions. In general, the dimensions of the cavity in the first, second, and third directions can be configured to produce a desired filtering action of the signal on the signal line when the cavity is filled with a filtering material. For example, in one embodiment, the length of the cavity in the first direction can be extended to increase the attenuation of the filter for a given signal frequency. For example, in one embodiment, the filter material can provide a linearly increasing attenuation having a slope of at least about 0.5 dB / GHz. In addition to its length extending in the first direction, the cavity can extend above the signal line in the second direction and / or laterally to the signal line in the third direction.

[0021]

[0031] In some embodiments, one or more conductors can be laminated onto the substrate. For example, a planar conductor can be laminated onto one surface of the substrate, and in some embodiments, another planar conductor can be laminated onto the opposing surface of the substrate. For example, the substrate, signal line, and one or more planar conductors can be arranged in a microstrip or stripline configuration. In some embodiments, a conductor can be applied onto one or more accesses in the substrate that are used to fill the cavity with the filter material. For example, a planar conductor can be laminated onto an access so that it optionally overlaps one or more other planar conductors. In some embodiments, the conductive material can be sprayed, spread, deposited, and / or otherwise applied onto the access. For example, the conductive material can include a curable non-metallic matrix that is applied in an uncured state.

[0022]

[0032] Exemplary aspects of the present disclosure are also directed to methods of manufacturing a laminated circuit assembly. For example, a laminated circuit assembly including one or more signal lines arranged in a first direction within a dielectric material of a substrate can be received or otherwise selected for processing. In one embodiment, a cavity can be formed in the substrate. For example, the cavity can be formed by removing a portion of the dielectric material within the substrate. The material can be removed by any suitable method, including ablation, abrasion, cutting, etc. Once formed, the cavity can be filled with a frequency-absorbing material. In some embodiments, the cavity can be filled with the frequency-absorbing material while the dielectric material (e.g., a polymer) is in an uncured state.

[0023]

[0033] For example, the frequency absorbing material may provide less attenuation to a first signal at a first frequency than to a second signal at a second, higher frequency (e.g., as described herein). In some embodiments, the filled cavity may be configured to attenuate infrared signals passing through one or more signal lines.

[0024]

[0034] In some embodiments, a first signal line can have a first filter section associated therewith and a second adjacent signal line can have a second filter section associated therewith, the first filter section and the second filter section being offset from one another in a first direction.

[0025]

[0035] Exemplary aspects of the present disclosure are also directed to a cryostat including the circuit assembly described herein. For example, the cryostat can include one or more cooling stages for cooling one or more components of a computing system. In one embodiment, the stages can be configured to cool a portion of the computing system to about 20 millikelvin or less. One or more signal lines coupling a control unit to the cooled portion of the computing system can be part of a circuit assembly as disclosed herein, including a filter portion as disclosed herein.

[0026]

[0036] Aspects of the present disclosure provide many technical effects and advantages. For example, circuit assemblies, systems, and methods according to aspects of the present disclosure provide improved communication of highly sensitive signals. For example, in some embodiments, multiple signals (e.g., control signals and / or other interface signals) are communicated over signal lines of a circuit assembly according to the present disclosure. For example, a first signal can have a first frequency less than about 500 MHz, and a second signal can have a second frequency greater than about 2 GHz and less than about 8 GHz. Circuit assemblies according to exemplary embodiments of the present disclosure can be configured to include a frequency absorbing material that provides greater attenuation to the second signal than to the first signal. In this manner, the attenuation applied to each set of interface signals can be configured for desired operating characteristics. As a further advantage, circuit assemblies according to exemplary embodiments of the present disclosure can be configured to provide greater attenuation to infrared signals than to either the first or second signals. For example, in some embodiments, infrared signals can interfere with communications and / or increase the thermal load on connected components.

[0027]

[0037] As a further advantage, circuit assemblies, systems, and methods according to aspects of the present disclosure provide improved manufacturability. For example, embodiments of the present disclosure can provide high performance circuit assemblies that can be manufactured at low cost and with high yields.

[0028]

[0038] As a further advantage, circuit assemblies, systems, and methods according to aspects of the present disclosure provide compact and scalable implementations of filtered signal lines. For example, some implementations are sensitive to signal interference (e.g., qubit interface signals), and conventional approaches to filtering and isolating signal lines for qubit interfaces do not provide an adequately compact configuration for scaling the number of qubits in a quantum computing system.

[0029]

[0039] Referring again to the figures, further exemplary embodiments of the systems and methods of the present disclosure are described in further detail. The use of the term "about" in conjunction with a numerical value refers to within 10% of the stated amount.

[0030]

[0040] Figure 1 illustrates an exemplary quantum computing system 50. The exemplary system 50 is an example of a system implemented as a classical or quantum computer program on one or more classical or quantum computing devices at one or more locations, in which the systems, components, and techniques described below may be implemented. Figure 1 illustrates an exemplary quantum computing system that can be used to practice aspects of the present disclosure. Those skilled in the art using the disclosure provided herein will understand that other quantum computing structures or systems can be used without departing from the scope of the present disclosure.

[0031]

[0041] System 50 includes quantum hardware 52 in data communication with one or more classical processors 54. For example, quantum hardware 52 can represent and / or manipulate information using qubits. A qubit can be or include any suitable quantum device that allows for the superposition of multiple states (e.g., data in both "0" and "1" states). By way of example, a qubit can be or include a unit of superconducting material, such as a superconducting material that achieves superconductivity at temperatures below about 10 mK.

[0032]

[0042] Quantum hardware 52 may include components for performing quantum computations. For example, quantum hardware 52 may include a quantum system 60, a control device 62, and a readout device 64 (e.g., a readout resonator). Quantum system 60 may include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystems may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0033]

[0043] The classical processor 54 may be a binary processor, such as a processor that operates on data represented as multiple bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0 V) ​​and a high voltage (e.g., 5 V) at a reference point, such as a memory cell, circuit node, or the like. The low voltage may be associated with a “0” state, and the high voltage may be associated with a “1” state. The classical processor 54 may be configured to control the quantum hardware 52, in addition to any other suitable function of the classical processor 54. For example, the classical processor 54 may be coupled to the quantum hardware 52 (e.g., by a signal line) and / or configured to send control signals to perform quantum operations using the quantum hardware 52. As an example, the classical processor 54 may be configured to send control signals that implement quantum gate operations in the quantum hardware 52 (e.g., by control device 62). Additionally and / or alternatively, the classical processor 54 may be configured to send control signals that cause the quantum hardware 52 to perform quantum state measurements and / or provide quantum state measurements to the classical processor 54 (e.g., by readout device 64). For example, classical processor 54 may accept measurements of quantum system 60 that may be interpretable by classical processor 54 .

[0034]

[0044] The type of multilevel quantum subsystem utilized by system 50 may vary. For example, in some cases it may be convenient to include one or more readout devices 64 attached to one or more superconducting qubits (e.g., transmon, flux, gmon, xmon, or other qubits).

[0035]

[0045] Quantum circuits may be constructed and applied to a register of qubits included in quantum system 60 via multiple signal lines coupled to one or more control devices 62. Exemplary control devices 62 operating on a register of qubits may be used to implement quantum logic gates or circuits of quantum logic gates, such as Hadamard gates, controlled-NOT (CNOT) gates, controlled phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc. One or more control devices 62 may be configured to operate on quantum system 60 via one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem may be a superconducting qubit, and control device 62 may be configured to provide control pulses on control lines (e.g., signal line 120) to generate magnetic fields to tune the frequencies of the qubits.

[0036]

[0046] Quantum hardware 52 may further include a readout device 64 (e.g., a readout resonator). Measurement results 58 obtained via the measurement device may be provided to classical processor 54 for processing and analysis. In some implementations, quantum hardware 52 may include quantum circuitry, and control device 62 and readout device 64 may implement one or more quantum logic gates that operate on quantum system 60 via physical control parameters (e.g., microwave pulses) transmitted via wires included in quantum hardware 52. Further examples of control devices include arbitrary waveform generators from which DACs generate signals.

[0037]

[0047] Readout device 64 may be configured to perform quantum measurements on quantum system 60 and transmit measurement results 58 to classical processor 54 (e.g., over signal line 120). Additionally, quantum hardware 52 may be configured to accept data (e.g., over signal line 120) from classical processor 54 specifying physical control parameter values ​​56. Quantum hardware 52 may use the accepted physical control parameter values ​​56 to update the operation of control device 62 and readout device 64 on quantum system 60. For example, quantum hardware 52 may accept data specifying new values ​​representing voltage magnitudes of one or more DACs included in control device 62 and update the operation of the DACs on quantum system 60 accordingly. Classical processor 54 may be configured to initialize quantum system 60 to an initial quantum state, for example, by sending data to quantum hardware 52 specifying an initial set of parameters 56.

[0038]

[0048] The readout device 64 reads the state of an element of the quantum system, such as a qubit, to measure the state of the element (e.g., qubit).

number

number

[0039]

[0049] System 50 includes a control device 62. Control device 62 may operate quantum hardware 52. For example, control device 62 may include a waveform generator configured to generate control pulses according to exemplary aspects of the present disclosure.

[0040]

[0050] In some implementations, the control device 62 may include a data processing device and associated memory. The memory may include a computer program having instructions that, when executed by the data processing device, cause the data processing device to perform one or more functions described herein.

[0041]

[0051] FIG. 2 illustrates an exemplary quantum computing system 300 according to an exemplary embodiment of the present disclosure. The quantum computing system 300 may include one or more classical processors 302 and quantum hardware 304 including one or more qubits. The quantum computing system 300 may include a chamber mount 308 configured to support the quantum hardware 304 and a vacuum chamber configured to receive the chamber mount 308 and place the quantum hardware 304 in a vacuum. The vacuum chamber may provide a cooling gradient from an end of the vacuum chamber (e.g., a cap 307) to the quantum hardware 304. For example, the vacuum chamber may provide a cooling gradient from a first temperature, such as room temperature (e.g., about 300 Kelvin), to a second temperature, such as absolute zero (e.g., less than about 1 Kelvin), to provide a temperature at the quantum hardware 304 at which the qubits experience superconductivity. In some embodiments, the cooling gradient may be provided by multiple cooling stages that gradually increase and / or decrease the temperature. As an example, the cooling stages may be stages of a stepwise cryogenic cooling system, such as a dilution refrigerator.

[0042]

[0052] The quantum computing system 300 may include one or more signal lines between the classical processor 302 and the quantum hardware 304. According to exemplary embodiments of the present disclosure, the quantum computing system 300 may include one or more flex circuit boards 306 including one or more signal lines. The flex circuit board 306 may be configured to transmit signals via the one or more signal lines through a vacuum chamber to couple the one or more classical processors 302 to the quantum hardware 304. The flex circuit board 306 may include multiple signal lines and may provide significantly improved signal line density in addition to providing improved isolation, reduced thermal conductivity, and / or improved scalability. For example, including a flex circuit board 306 according to exemplary embodiments of the present disclosure to couple the classical processor 302 to the quantum hardware 304 may provide an infrastructure that reliably scales to the increasingly large qubit counts achieved and / or expected in current and / or future quantum computing systems.

[0043]

[0053] In some embodiments, some or all of the flex circuit board 306 may include at least one ground plane. The ground plane may form an outer surface of the flex circuit board 306, such as an outer surface along its largest surface. In some embodiments, the flex circuit board 306 may include two ground planes, such as two parallel, spaced-apart ground planes. For example, two ground planes may form both largest outer surfaces of the flex circuit board 306. The ground planes may act as electrical isolation layers to isolate signal lines on one side of the ground plane from interfering signals (e.g., from signal lines on other layers, other substrates, the environment, etc.) on the other side of the ground plane. For example, the ground planes may be coupled to earth and / or other suitable grounds or references.

[0044]

[0054] The ground layer may be or include any suitable conductive material. In some embodiments, the ground layer may be or include a superconducting ground layer including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, less than about 20 milliKelvin, etc. By way of example, the ground layer may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the ground layer may be or include a material having high signal transmission performance characteristics, such as low resistance, low reflectivity, and low distortion, so that the signal is not substantially altered by passage through the signal line. By way of example, the ground layer may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the ground layer may be or include a material having desirable thermal properties, such as suitably high and / or low heat transfer, such as, for example, copper, copper alloys, thin superconducting materials, etc.

[0045]

[0055] In some embodiments, the flex circuit board 306 may include at least one dielectric layer. The dielectric layer may be or include any suitable dielectric material, such as a dielectric polymer. In some embodiments, the dielectric layer may be or include a flexible dielectric material. As an example, the dielectric layer may be or include a polyimide. At least a portion of the dielectric layer may be formed on or be disposed proximate to at least a portion of the inner surface of the ground plane. For example, in some embodiments, the inner surface of the ground plane may mate with the outer surface of the dielectric layer. Additionally, in some embodiments, the inner surfaces of two dielectric layers may mate with a signal line disposed therebetween.

[0046]

[0056] The flex circuit board 306 may include one or more signal wires. The one or more signal wires may be disposed on a surface (e.g., an inner surface) of at least one dielectric layer. By way of example, in some implementations, the one or more signal wires may be disposed between opposing inner surfaces of two dielectric layers. The signal wires may be or include any suitable conductive material. In some embodiments, the signal wires may be or include superconducting signal wires including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 degrees Kelvin, such as less than about 1 degree Kelvin, less than about 20 milliKelvin, etc. By way of example, the signal wires may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the signal wires may be or include materials having high signal transmission performance characteristics. By way of example, the signal wires may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the signal wires may be or include materials with desirable thermal properties, such as, for example, copper, copper alloys, thin superconducting materials, and the like.

[0047]

[0057] In some embodiments, the flex circuit board 306 may include one or more vias. For example, the vias may extend through ground planes, dielectric layers, and / or signal lines. The vias may serve to improve isolation of the signal lines. Additionally and / or alternatively, the vias may couple multiple ground planes and / or serve to transmit signals between layers of the flex circuit board. In some embodiments, the vias may be plated with a via plate extending along the via. In some embodiments, the via plate may be or include a conductive material, such as copper.

[0048]

[0058] For example, in some embodiments, quantum computing system 300 may include quantum hardware 304 in data communication with one or more classical processors 302. For example, quantum hardware 304 may represent and / or manipulate information using qubits. A qubit may be or include any suitable quantum device that allows for a superposition of multiple states (e.g., both “0” and “1” states). By way of example, a qubit may be or include a unit of superconducting material, such as a superconducting material that achieves superconductivity at a temperature below about 3 degrees Kelvin, such as below about 1 degree Kelvin, such as below about 20 milliKelvin. In some embodiments, quantum computing system 300 may include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0049]

[0059] The classical processor 302 may be a binary processor, such as a processor that operates on data represented as multiple bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0 V) ​​and a high voltage (e.g., 5 V) at a reference point, such as a memory cell, circuit node, or the like. The low voltage may be associated with a "0" state, and the high voltage may be associated with a "1" state. The classical processor 302 may be configured to control the quantum hardware 304, in addition to any other suitable functions of the classical processor 302. For example, the classical processor 302 may be coupled to the quantum hardware 304 (e.g., by signal lines included in the flex circuit board 306 according to an exemplary embodiment of the present disclosure) and / or may be configured to send control signals to perform quantum operations using the quantum hardware 304. As an example, the classical processor 302 may be configured to send control signals that implement quantum gate operations in the quantum hardware 304 (e.g., by a control device). Additionally and / or alternatively, classical processor 302 can be configured to send control signals that cause quantum hardware 304 to perform quantum state measurements and / or provide quantum state measurements (e.g., by a readout device) to classical processor 302. For example, classical processor 302 can accept measurements of the quantum system that can be interpretable by classical processor 302.

[0050]

[0060] According to an exemplary embodiment of the present disclosure, the quantum computing system 300 may include one or more flex circuit boards 306 including one or more signal lines. The classical processor 302 may be coupled to at least one first flex circuit board. For example, the classical processor 302 may be coupled to the first flex circuit board 314 by a classical flex interconnect 332. The classical flex interconnect 332 may convert from a classical signal transmission medium (e.g., a coaxial cable) 312 to the first flex circuit board 314.

[0051]

[0061] As an example, the classical flex interconnect 332 may be or may include a compression interposer. The compression interposer may include an array (e.g., a two-dimensional array) of spring pads. For example, a connector that receives signals from the classical processor 302 via one or more coaxial cables 312 (e.g., one coaxial cable 312 per signal line) may be compressed against the compression interposer to form signal communication between the spring pads and the connector (e.g., coaxial cable). Each spring pad may be coupled to a signal line on the first flex circuit board 314 so that a signal may be transmitted from the classical processor 302 (e.g., coaxial cable) to the signal line. The compression interposer may provide for connecting a signal transmission medium 312 having a relatively low spatial density, such as a coaxial cable that can occupy a relatively large space per cable, to a signal transmission medium having a relatively high spatial density, such as the signal lines embedded within the first flex circuit board 314 provided according to an exemplary embodiment of the present disclosure. Additionally, compressive interposers can achieve high isolation between and / or low reflectivity along signal lines suitable for quantum computing applications.

[0052]

[0062] In some embodiments, the first flex circuit board 314 can be or can include a first flex circuit board material for ground planes and / or signal lines. The first flex circuit board material can be selected to provide high signal transfer performance characteristics. By way of example, the first flex circuit board material can be or can include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the first flex circuit board 314 can include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0053]

[0063] The first flex circuit board 314 can pass through an airtight seal 352 disposed at an end (e.g., an entrance) of the vacuum chamber, such as the cap 307. For example, the flex circuit board (e.g., the first flex circuit board 314) can be configured to pass through the airtight seal 352 such that a first portion of the flex circuit board (e.g., the first flex circuit board 314) is disposed within the vacuum chamber and a second portion of the flex circuit board (e.g., the first flex circuit board 314) is disposed outside the vacuum chamber, while the airtight seal 352 forms a vacuum seal for the vacuum chamber. The airtight seal 352 allows the first flex circuit board 314 to enter the vacuum chamber without (e.g., substantially) breaking the vacuum created by the vacuum chamber. As an example, the airtight seal 352 can include a mating seal for each first flex circuit board 314. The mating seal can receive the first flex circuit board 314 and form a vacuum seal with the surface of the first flex circuit board 314. Additionally, the hermetic seal 352 can include one or more seal slots configured to receive the mating seal and / or the first flex circuit board 314. For example, the mating seal can form a vacuum seal with the seal slot while allowing the first flex circuit board 314 to pass through the seal slot and enter the vacuum chamber. In this manner, the flex circuit board 306 can enter the vacuum chamber without experiencing signal interruptions due to circuit board damage, as the board can pass through the vacuum chamber continuously. In some embodiments, the hermetic seal 352 can include a fastening system, such as screws, bolts, seal rings, O-rings, etc., to secure the mating seal to the seal slot and / or form a vacuum seal. In some embodiments, the hermetic seal 352 can form a vacuum seal without the need for adhesive materials (e.g., glue, resin, etc.), e.g., so that residual adhesive materials do not contaminate the flex circuit board 306.

[0054]

[0064] The first flex circuit board 314 can be coupled to at least one second flex circuit board 316. The first flex circuit board 314 can be coupled to the second flex circuit board 316 by at least one flex-flex interconnect 334. For example, the flex-flex interconnect 334 can couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the first flex circuit board 314 to the second flex circuit board 316. By way of example, the flex-flex interconnect 334 can be formed by soldering, welding, and / or otherwise fusing components of the first flex circuit board 314 to the second flex circuit board 316. The flex-flex interconnect 334 can be or include any suitable interconnection of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnection.

[0055]

[0065] The second flex circuit board 316 may have at least a different material composition than the first flex circuit board 314. In some embodiments, the second flex circuit board 316 may be or include a second flex circuit board material for ground planes and / or signal lines. The second flex circuit board material may be selected to provide high signal transfer performance characteristics and / or low thermal conductivity. By way of example, the second flex circuit board material may be or include a copper alloy and / or other suitable material having desired thermal properties. For example, the second flex circuit board 316 may include copper alloy signal lines and / or ground planes to reduce thermal conductivity from the top of the vacuum chamber (e.g., the first circuit board 314) and / or to dissipate heat generated in subsequent components, such as the surface-mounted attenuator 354.

[0056]

[0066] In some embodiments, the second flex circuit board 316 may be coupled to at least one surface-mount attenuator board 318. For example, the second flex circuit board 316 may be coupled to the surface-mount attenuator board 318 by at least one flex-flex interconnect 336. For example, the flex-flex interconnect 336 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the second flex circuit board 316 to the surface-mount attenuator board 318. By way of example, the flex-flex interconnect 336 may be formed by soldering, welding, and / or otherwise fusing components of the second flex circuit board 316 to the surface-mount attenuator board 318. The flex-flex interconnect 336 may be or include any suitable interconnection of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnection.

[0057]

[0067] The surface mount attenuator substrate 318 may be a flexible printed circuit board. In some embodiments, the surface mount attenuator substrate 318 may be or include a surface mount attenuator substrate material for ground planes and / or signal lines. The surface mount attenuator substrate material may be selected to provide high signal transfer performance characteristics. By way of example, the surface mount attenuator substrate material may be or include copper, brass, gold, and / or other suitable materials with high signal transfer performance characteristics. For example, the surface mount attenuator substrate may include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0058]

[0068] The surface-mount attenuator substrate 318 can include one or more surface-mount attenuators 354. The surface-mount attenuators 354 can be configured to attenuate or block thermal photon interference. In some embodiments, the surface-mount attenuator substrate 318 and / or the surface-mount attenuators 354 can be disposed at a sufficiently low temperature so that the surface-mount attenuators 354 do not generate thermal photons. In some embodiments, the surface-mount attenuators 354 can be disposed within an isolation plate. The isolation plate can be configured to isolate one or more surface-mount attenuators. The isolation plate can be attached to the surface-mount attenuator substrate 318. In some embodiments, the isolation plate can be mounted to a ground plane and / or grounded. The isolation plate can include one or more cavities configured to isolate a first surface-mount attenuator from a second surface-mount attenuator. For example, the cavity can surround the first surface-mount attenuator in the direction of the second surface-mount attenuator to block crosstalk between the attenuators.

[0059]

[0069] The quantum computing system 300 may include at least one third flex circuit board 320. For example, the surface-mount attenuator substrate 318 may be coupled to the third flex circuit board 320 by at least one flex-flex interconnect 338. For example, the flex-flex interconnect 338 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the surface-mount attenuator substrate 318 to the third flex circuit board 320. By way of example, the flex-flex interconnect 338 may be formed by soldering, welding, and / or otherwise fusing components of the surface-mount attenuator substrate 318 to the third flex circuit board 320. The flex-flex interconnect 338 may be or include any suitable interconnection of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnection.

[0060]

[0070] The third flex circuit board 320 can be positioned within the vacuum chamber at a point where the cooling gradient is sufficiently low for the material to exhibit superconductivity. For example, at least a portion of the third flex circuit board 320 can have a temperature below about 3 degrees Kelvin.

[0061]

[0071] In some embodiments, the third flex circuit board 320 can be or include a third flex circuit material for the ground plane and / or signal lines. The material of the third flex circuit board 320 can be selected to be superconductive at temperatures at which at least a portion of the third flex circuit board 320 experiences superconductivity. By way of example, the material of the third flex circuit board 320 can be or include niobium, tin, aluminum, and / or other suitable superconducting materials. For example, the third flex circuit board 320 can include copper-plated niobium signal lines and / or ground planes to provide superconductivity. For example, copper plating on a copper-plated niobium substrate can be useful for interfacing with superconducting niobium, which can improve signal transmission characteristics. In some embodiments, a copper-plated niobium substrate can be formed by first applying a layer of niobium, then applying a thin layer of copper to prevent oxide formation, and then applying a thicker layer of copper.

[0062]

[0072] In some embodiments, the third flex circuit board 320 may be coupled to at least one fourth flex circuit board 322. The third flex circuit board 320 may be coupled to the fourth flex circuit board 322 by at least one flex-flex interconnect 340. For example, the flex-flex interconnect 340 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the third flex circuit board 320 to the fourth flex circuit board 322. By way of example, the flex-flex interconnect 340 may be formed by soldering, welding, and / or otherwise fusing components of the third flex circuit board 320 to the fourth flex circuit board 322. The flex-flex interconnect 340 may be or include any suitable interconnection of two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnection.

[0063]

[0073] The fourth flex circuit board 322 can couple the third flex circuit board 320 to the quantum hardware 304. For example, a connector 342 on an end of the fourth flex circuit board 322 can be attached to a port in signal communication with the quantum hardware 304. By way of example, the connector can be a T-joint connector, such as a T-joint connector comprising a superconducting material (e.g., tin). Additionally and / or alternatively, the connector 342 can be a planar spring array.

[0064]

[0074] In some embodiments, the fourth flex circuit board 322 can be or include a fourth flex circuit material for the ground plane and / or signal lines. The material of the fourth flex circuit board 322 can be selected to provide high signal transmission performance characteristics. By way of example, the material of the fourth flex circuit board 322 can be or include copper, brass, gold, and / or other suitable materials having high signal transmission performance characteristics. For example, the fourth flex circuit board 322 can include copper signal lines and / or ground planes to provide high signal transmission performance characteristics. Additionally and / or alternatively, the material of the fourth flex circuit board 322 can be selected to be superconducting at temperatures experienced by at least a portion of the fourth flex circuit board 322. By way of example, the material of the fourth flex circuit board 322 can be or include niobium, tin, aluminum, and / or other suitable superconducting materials.

[0065]

[0075] According to exemplary aspects of the present disclosure, the fourth flex circuit board 322 may be or include a filter 356, such as an XYZ and / or IR filter 356. The filter 356 may include a laminate circuit assembly according to any of the embodiments described herein. For example, the filter 356 may be configured to reduce the effects of noise, thermal photons, and / or other potential interference sources. As an example, the filter 356 may include a cavity in the fourth flex circuit board 322 filled with a filter material, such as a particulate suspension, to provide XYZ / IR filtering. In some examples, the filter material may provide less attenuation for signals at a first frequency and more attenuation for signals at a second, higher frequency. For example, some filter materials provide attenuation that substantially monotonically increases with increasing signal frequency for at least a portion of a target frequency band. In some embodiments, aspects of the filter material may be configured for low-pass and / or band-pass operation.

[0066]

[0076] FIG. 3 illustrates an exemplary laminated circuit assembly that may be used to implement a filter according to an exemplary embodiment of the present disclosure. The laminated circuit assembly 100 includes a signal line 102 within a substrate 104. In the illustrated embodiment, planar conductors 106 a and 106 b are laminated on the top and bottom surfaces of the substrate 104, respectively; however, it is contemplated that any one of the planar conductors 106 a and 106 b may be replaced with other conductor shapes and / or omitted. For example, the embodiment illustrated in FIG. 3 may correspond to a “stripline” configuration, in which the signal line 102 includes a conductive trace extending in the x-direction between two parallel planar conductors; however, the systems and methods of the present disclosure may include embodiments with other circuit configurations, including a “microstrip” configuration and virtually any configuration of one or more conductors 102 (which may be traces, wires, etc.) and substrate 104 (e.g., generally a circuit board such as a single-layer, double-layer, and / or multi-layer printed circuit board).

[0067]

[0077] In some embodiments, the signal line 102 may include one or more conductive materials (e.g., copper, gold, silver, aluminum, tin, zinc, niobium, palladium, platinum, titanium, tungsten, vanadium, magnesium, molybdenum, magnesium diboride, etc.) formed into a conductive body such as a strip or trace. For example, the signal line 102 may include multiple conductive materials formed into an alloy and / or composite material.

[0068]

[0078] In some embodiments, the signal wire 102 can include multiple layers of conductive material. In one example, the signal wire 102 can include at least one layer of a superconducting material (e.g., niobium, which is superconducting at temperatures below about 3 degrees Kelvin, such as below about 1 degree Kelvin, such as below about 20 milliKelvin). In some embodiments, the superconducting material can be laminated with another conductor. For example, a superconducting layer can be deposited on the surface of a substrate, such as by vacuum deposition, and another layer (e.g., a copper layer, a tin layer, etc.) can be deposited on the surface of the superconducting conductor. In some embodiments, another layer can be deposited on the superconducting layer to protect it (e.g., from oxidation). For example, a first deposition can deposit a superconducting material on a substrate in a vacuum environment, and without releasing the vacuum, a second deposition can deposit another conductor to shield the superconducting material from the atmosphere. In some embodiments, one or more additional layers of conductive material (e.g., the same or different conductive material) can be plated on top of the deposited layer. For example, the second deposition can provide a thin protective coating for the superconductor, and subsequent plating (e.g., electroplating) can provide a thicker conductive layer. In some exemplary aspects, the thicker plated conductive layer can provide structural support to improve the strength and / or resilience of the superconducting layer of the signal line 102. In some embodiments, one or more planar conductors 106a and 106b (and any plated vias associated therewith) can be similarly formed using one or more deposition layers and one or more plated layers.

[0069]

[0079] In some embodiments, the signal lines 102 may be deposited or otherwise laminated on a substrate. In some embodiments, the signal lines 102 may be embedded within the substrate. For example, one or more layers of a polymer substrate may be fused or otherwise bonded together such that any signal lines 102 on the surface of one of the layers may be embedded within the entire substrate. An example is shown in FIG. 3, where the signal lines 102 are embedded within the substrate 104 and extend in the x-direction.

[0070]

[0080] In some embodiments, the substrate 104 can include one or more polymers. In some implementations, the substrate 104 can include a reinforced polymer, such as a fiber-reinforced polymer (e.g., fiberglass). In some embodiments, the substrate 104 can include a filled polymer. In some embodiments, the substrate can carry a filler that includes frequency-absorbing particles.

[0071]

[0081] In some embodiments, the substrate 104 can include a filter portion. For example, a portion of the substrate 104 can comprise a filter for filtering signals traveling along the signal line 102 (e.g., along a transmission line including the signal line 102 and / or planar conductors 106a and 106b, if present). The filter portion can include a filter material that filters the signals. The filter material can be the same as or different from the material of the substrate 104. For example, in one embodiment, the filter portion includes a portion of the substrate 104 surrounding and / or adjacent to the signal line 102, which can be loaded with frequency absorbing particles to provide a desired filtering effect on the signal on the signal line 102. In some embodiments, the substrate 104 can be loaded with frequency absorbing particles to provide a filtering effect.

[0072]

[0082] In some embodiments, a cavity can be formed in the substrate 104 that can be filled with a filter material different from the substrate 104. For example, the dielectric portion can be formed from a first polymer. The frequency absorbing material can include frequency absorbing particles embedded in a second polymer (e.g., a curable polymer) that is different from the first polymer. As an example, the cavity can be filled with the curable polymer if the curable polymer is in an uncured state.

[0073]

[0083] In general, the cavity can be formed according to any suitable approach. For example, the cavity can be formed by removing material within the substrate 104. However, it is also contemplated that the cavity can be formed by selectively omitting the substrate 104 in areas where filter material is intended to be disposed. For example, the substrate 104 can be formed in layers as described above, where one or more of the layers can include voids that, when bonded with adjacent layers, provide a cavity within the substrate 104 that can be filled with filter material. In some embodiments, the substrate 104 can be formed using additive manufacturing techniques, where one or more portions of the substrate 104 can be selectively left unadded during manufacturing, thereby forming the cavity.

[0074]

[0084] In some embodiments, a cavity can be formed in the substrate 104 by processing an existing laminated circuit assembly. For example, FIG. 3 illustrates a laminated circuit assembly 100 that can be processed according to exemplary aspects of the present disclosure. In some embodiments, processing can include removing a portion of one or more layers of material that can be laminated to the substrate 104. For example, in FIG. 4, the laminated circuit assembly 100 is shown with a portion of the planar conductors 106a removed, exposing a region 108 of the substrate 104. While FIG. 4 illustrates the exposed region 108 as a rectangle, it should be understood that the exposed region 108 can take substantially any form, and some embodiments can be devoid of the planar conductors 106a, such that the exposed region 108 can take substantially the form of a surface of the substrate 104. The exposed region 108 can provide access for removing material from the substrate 104.

[0075]

[0085] In some embodiments, processing can include removing portions of the substrate 104 to form cavities that can be partially or completely filled with filter material. For example, Figure 5 shows a laminated circuit assembly 100 with portions of the substrate 104 removed along a length 110, a width 112, and a depth 114.

[0076]

[0086] In some embodiments, portions of the substrate 104 can be removed by cutting, drilling, milling, polishing, or otherwise mechanical removal. In some embodiments, portions of the substrate 104 can be removed by etching or other chemically reactive material removal processes. In some embodiments, portions of the substrate 104 can be removed by ablation to form a cavity (e.g., laser ablation, etc.). For example, as shown in FIG. 5 , material can be removed from the substrate 104 from one direction (e.g., from the y-direction as shown). For example, material from the substrate 104 can be selectively removed from above the signal line 102 in the y-direction and from the side of the signal line 102 in the z-direction. In some examples, depending on the material removal method, the composition of the signal line 102 and / or a coating thereon can affect the selective removal of material. For example, in some embodiments, the material of the signal line 102 can be resistant to the removal process (or at least more resistant than the surrounding material of the substrate 104). In this manner, a material removal process can be applied over the area covered by length 110 and width 112 without masking the area above signal line 102. For example, the material of signal line 102 can be resistant to the ablation process such that the area covered by length 110 and width 112 can be ablated without masking the area above signal line 102. In this manner, the speed and throughput of the ablation process can be improved.

[0077]

[0087] After the material of the substrate 104 is removed, the cavity thereby formed can be filled with a filter material to form the filter portion 116 of the substrate 104, as shown in FIG. 6. The filter portion 116 can be completely filled, as shown in FIG. 1D, or in some examples, can be partially filled. For example, the filter portion 116 can be filled with a first filter material and a second filter material, each of which partially fills the cavity. In some embodiments, the filter material can partially fill the cavity (e.g., the portion of the cavity immediately surrounding the signal line 102), and another material (e.g., the material of the substrate 104) can fill the remainder of the cavity to encapsulate the filter material. The filter portion 116 can extend over the surface of the substrate 104 and / or over the outer surface of a planar conductor laminated to the substrate 104 (e.g., as shown in FIG. 6).

[0078]

[0088] FIG. 7 illustrates a cross-sectional view of a filter portion 116 within a substrate 104. The filter portion 116 can take on virtually any shape defined by one or more boundaries of a cavity formed within the substrate 104. For example, one boundary may be defined based on the depth 118 of the signal line 102 within the substrate 104. Another boundary may be configured to extend the legs of the filter portion 116 an additional depth 120 to surround the signal line 102, such that the legs can cover the thickness 122 of the signal line 102 plus another distance 124 beyond the thickness 122 of the signal line 102. In this manner, the filter portion 116 can at least partially surround the signal line 102 and provide filtering for one or more signals traveling along the signal line 102. Furthermore, the width 112 of the cavity may be configured such that the filter portion 116 can extend a distance 126 on one or both sides of the signal line 102 beyond the width 128 of the signal line 102. In some examples, filter portion 116 extends at least distance 126 on either side of signal line 102, but can optionally extend a distance greater than distance 126 on one side of the signal line to provide additional filtering and / or shielding on one side of signal line 102 (e.g., to reduce crosstalk and / or other interference from another signal line nearby on that side).

[0079]

[0089] While the foregoing description references illustrations showing cavities being formed that expose the signal wires 102, it is contemplated that cavities according to other exemplary aspects of the present disclosure may be formed so as not to expose the signal wires 102. For example, in some cases, it may be desirable to form the cavities in one process (e.g., one set of equipment) and then transfer the processed substrate 104 to another system for further processing. In an embodiment, it may be desirable for at least some substrate material to remain to protect and / or shield the signal wires 102 from damage and / or contamination. For example, in some embodiments, the filter material of the filter portion may exert mechanical stress on the signal wires 102 as the filter material fills the cavities (e.g., during insertion and / or injection, during adhesion of the filter material, and / or during curing of the filter material, etc.). In some circumstances, it may be desirable for at least a portion of the substrate material of the substrate 104 to remain as support for the signal wires.

[0080]

[0090] 8 shows a cross-sectional view of a circuit assembly 200 having a different profile of filter portion 116 that does not extend to signal wire 102, but instead is separated from the top of signal wire 102 by a distance 230. Similarly, in some embodiments, the legs of filter portion 116 can be spaced apart by a distance 232 that may be greater than width 128 of signal wire 102 to leave some of the material of substrate 104 surrounding signal wire 102.

[0081]

[0091] While the foregoing description has referred to illustrations showing material from the substrate 104 being removed from one side of the substrate (e.g., one outer surface), it is contemplated that material may be removed from both sides (e.g., above and below the signal line 102 in the y-direction). For example, FIG. 9 shows a circuit assembly 250 having another profile of the filter portion 116. A cavity may be formed in the substrate 104 that divides the substrate 104 into two portions 104a and 104b (at least in the view plane shown; portions 104a and 104b may, in some embodiments, be connected outside the view). In some embodiments, the cavity may be formed by removing material from both sides of the circuit assembly 250 (e.g., by removing a region of the planar conductor 106a, if present, and / or by removing a region of the planar conductor 106b, if present). In this manner, a substantially symmetrical cavity may be formed (e.g., reflectively symmetric with respect to the signal line 102).

[0082]

[0092] In some embodiments, the cavity can extend to one or more (e.g., all) surfaces of the signal line 102 so that substrate material from the substrate 104 does not remain within the filter portion 116 (e.g., so that the cavity extends depths 118a and 118b to abut the signal line 102, as shown in the circuit assembly 400 of FIG. 10). However, as shown in FIG. 9, in some embodiments, dielectric supports 256a and 256b can be provided (e.g., no substrate material is removed). The dielectric supports 256a and 256b can be configured to be the same or different (e.g., the support heights 256a and 256b can be the same or different). In this manner, support can be provided for the signal line 102 to support the signal line during subsequent processing (e.g., filling the filter portion 116 with filter material). The dielectric supports 256a and 256b can include portions of the dielectric that are not removed during the formation of the cavity.

[0083]

[0093] FIG. 9 also shows covers 258a and 358b that can be used to cover the accesses used to form the cavities in the substrate 104. One or both of the covers 258a and 258b can include a conductive material. In one embodiment, the covers 258a and 258b are included within the planar conductors 106a and 106b, respectively (e.g., the planar conductors 106a and / or 106b can be laminated to the substrate 104 after the formation of the filter portion 116). In some embodiments, another conductor (e.g., another planar conductor) can be applied or laminated over the access to form at least one of the covers 258a and 358b. For example, a conductive paint or other coating can be applied. The conductive coating can be dried and / or cured in situ to provide one or both of the covers 358a and 358b.

[0084]

[0094] In some embodiments, any one, subset, or all of the above-mentioned communications may be communicated via one or more signals traveling along filtered signal line 102 described herein according to exemplary aspects of the present disclosure. For example, in one embodiment, filtered signal line 102 according to exemplary aspects of the present disclosure may be used to communicate qubit interface signals from a control device for controlling and / or reading the behavior of one or more qubits. For example, in one embodiment, signal line 102 may be used to communicate one or more signals related to Pauli X, Y, and / or Z operators.

[0085]

[0095] In one embodiment, the quantum computing system comprises a qubit and a signal line 102 associated with the qubit. The signal line 102 and the qubit may be configured and arranged such that, during operation of the quantum computing device, the signal line 102 enables coupling of an XY qubit control flux bias over a first frequency range. The signal line 102 may also provide coupling of a Z qubit control flux bias over a second frequency range. In some embodiments, the attenuation of signals traveling along the signal line 102 may be configured to avoid excessive Joule heating caused by excessive attenuation of signals in a different frequency range. For example, the dimensions and / or filter material of the filter portion 116 may be configured such that the filter portion 116 includes a frequency absorbing material that provides less attenuation for signals at a first frequency and more attenuation for signals at a second, different frequency (e.g., which may be higher or lower). For example, some filter materials provide attenuation that increases substantially monotonically with increasing signal frequency for at least a portion of a target frequency band.

[0086]

[0096] In some embodiments, aspects of the filter material can be configured for low-pass and / or band-pass operation. For example, in one embodiment, filter portion 116 can be configured to attenuate with a first attenuation level in a frequency band between 0 and 0.5 GHz and a second attenuation level in a frequency band between 2 and 8 GHz. In some cases, the XY control signals can operate in the microwave frequency band, while the Z control signal (which in some examples can be a higher-power signal than the XY control signals) can operate in the 0-0.5 GHz band. Over-attenuating the Z qubit control signal can result in significant Joule heating within the attenuator. Heating, in turn, can increase noise and make it difficult to maintain the low temperatures that may be necessary to provide superconducting operation of the qubit's circuit elements. For example, Joule heating can overtax or exceed the cooling power of the cryostat or cryostat stage in which the qubit is operating. In some embodiments, the filter portion 116 can be configured to attenuate signals greater than about 10 GHz with a level of attenuation greater than the attenuation provided for the 0-0.5 GHz frequency band and the 2-8 GHz frequency band to attenuate thermal radiation (e.g., infrared signals) passing through and / or traveling along the signal line.

[0087]

[0097] 11 shows a flowchart diagram of an exemplary method 600 according to an exemplary embodiment of the present disclosure. FIG. 11 shows steps performed in a particular order for purposes of explanation and discussion. Those skilled in the art, using the disclosure provided herein, will understand that the various steps of any method disclosed herein may be adapted, modified, performed simultaneously, omitted, include steps not shown, rearranged, and / or extended in various ways without departing from the scope of the present disclosure.

[0088]

[0098] At 602, the method may include receiving or obtaining a laminated circuit assembly. The laminated circuit assembly may be configured according to any of the exemplary embodiments disclosed herein. The laminated circuit assembly may include one or more signal lines disposed in a first direction within a dielectric material of a substrate. The laminated circuit assembly may define a second direction perpendicular to the substrate and a third direction orthogonal to the first and second directions.

[0089]

[0099] In step 604, the method may include forming a cavity in the substrate by removing a portion of the dielectric material above the signal line in the second direction. The cavity may extend in the first direction along the signal line.

[0090]

[0100] At 606, the method may include filling the cavity with a frequency absorbing material. The frequency absorbing material may be configured according to any of the embodiments disclosed herein. The frequency absorbing material may provide less attenuation for a first signal at a first frequency than for a second signal at a second, higher frequency. The filled cavity may be configured to attenuate infrared signals passing through one or more signal lines.

[0091] Additional Disclosures

[0101] Implementations of the digital and / or quantum subject matter and digital functional and quantum operations described herein may be implemented in digital electronic circuitry, suitable quantum circuitry, or more generally, in quantum computing systems, in specifically implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware including the structures disclosed herein and their structural equivalents, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0092]

[0102] Implementations of the digital and / or quantum subject matter described herein can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing apparatus. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or one or more combinations thereof. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagated signal capable of encoding digital and / or quantum information (e.g., a machine-generated electrical signal, a machine-generated optical signal, or a machine-generated electromagnetic signal), which is generated to encode the digital and / or quantum information for transmission to an appropriate receiver device for execution by the data processing apparatus.

[0093]

[0103] The terms quantum information and quantum data refer to information or data carried, held, or stored by quantum systems, where the smallest nontrivial system is a qubit, i.e., a system that defines a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be appropriately approximated as two-level systems in the corresponding context. Such quantum systems can include multilevel systems, e.g., having two or more levels. By way of example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis state is identified with a ground state and a first excited state, but it is understood that other configurations are possible in which the computational state is identified with a higher-level excited state.

[0094]

[0104] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and encompasses all types of apparatus, devices, and machines for processing digital and / or quantum data, including, by way of example, a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, and combinations thereof. An apparatus may also be or further include special-purpose logic circuits, such as, for example, a field programmable gate array (FPGA), or an application-specific integrated circuit (ASIC), or a quantum simulator, i.e., a quantum data processing apparatus designed to simulate or generate information about a specific quantum system. In particular, a quantum simulator is a special-purpose quantum computer that does not have the capability to perform general-purpose quantum computations. In addition to hardware, an apparatus can optionally include code that generates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0095]

[0105] A digital computer program may also be called or written as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be deployed in any form, such as as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program may also be called or written as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be translated into a suitable quantum programming language or written in a quantum programming language, e.g., QCL or Quipper.

[0096]

[0106] A digital and / or quantum computer program may, but need not, correspond to a file in a file system. A program can be stored as part of a file holding other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple cooperating files (e.g., files storing one or more modules, subprograms, or portions of code). A digital and / or quantum computer program can be deployed to run on one digital or quantum computer, or on multiple digital and / or quantum computers located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network capable of transmitting quantum data using quantum systems, e.g., qubits. Generally, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum data and digital data.

[0097]

[0107] The processes and logic flows described herein may, where appropriate, be performed by one or more programmable digital and / or quantum computers operating on one or more digital and / or quantum processors and executing one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows may also be performed by special purpose logic circuitry (e.g., FPGAs or ASICs) or quantum simulators, or may be implemented by, and apparatus may also be implemented in, combinations of special purpose logic circuitry or quantum simulators with one or more programmed digital and / or quantum computers.

[0098]

[0108] One or more digital and / or quantum computer systems are "configured" to perform particular operations or actions means that software, firmware, hardware, or a combination thereof is installed on the system that, when in operation, causes the system to perform the operation or action. One or more digital and / or quantum computer programs are configured to perform particular operations or actions means that the one or more programs contain instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer can accept instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform the operation or action.

[0099]

[0109] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on a general-purpose or dedicated digital and / or quantum microprocessor or both, or any other kind of central digital and / or quantum processing unit. Typically, the central digital and / or quantum processing unit accepts instructions and digital and / or quantum data from a read-only memory, or a random access memory, or a quantum system suitable for transmitting quantum data, e.g., photons, or a combination thereof.

[0100]

[0110] Some exemplary elements of a digital and / or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory may be supplemented by, or incorporated into, dedicated logic circuitry or a quantum simulator. Generally, a digital and / or quantum computer also includes one or more mass storage devices for storing digital and / or quantum data, such as magnetic, magneto-optical, or optical disks, or a quantum system suitable for storing quantum information, or is operably coupled to accept digital and / or quantum data from, transfer digital and / or quantum data to, or both of, these one or more mass storage devices. However, a digital and / or quantum computer need not have such devices.

[0101]

[0111] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, including, by way of example, semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, e.g., trapped atoms or electrons. Quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, e.g., a light-matter interface where light is used for transmission and material for storing and preserving quantum characteristics of quantum data, such as superposition or quantum coherence.

[0102]

[0112] Control of the various systems described herein, or portions thereof, may be implemented in a digital and / or quantum computer program product stored on one or more non-transitory machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. The systems described herein, or portions thereof, may each be implemented as an apparatus, method, or electronic system that may include one or more digital and / or quantum processing devices and memory for storing executable instructions for performing the operations described herein.

[0103]

[0113] While this specification includes details of many specific implementations, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be unique to particular implementations. Certain features described herein in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various functions described in the context of a single implementation may also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, even if features are described above as acting in a particular combination and initially claimed as such, one or more features from a claimed combination may, in some cases, be deleted from that combination, and the claimed combination may be directed to subcombinations or variations of subcombinations.

[0104]

[0114] Similarly, while operations are shown in the figures in a particular order, this should not be understood as requiring such operations to be performed in the particular order shown, or in sequential order, or that all of the illustrated operations be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above-described implementations should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged in multiple software products.

[0105]

[0115] Specific implementations of the present subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. 1. A laminated circuit assembly comprising: one or more signal lines disposed within the substrate in a first direction; a dielectric portion of the substrate; a filter portion of the substrate extending in the first direction and including a frequency absorbing material, the frequency absorbing material providing less attenuation to a first signal at a first frequency than to a second signal at a second, higher frequency; Equipped with the filter portion is configured to attenuate infrared signals passing through the one or more signal lines; A laminated circuit assembly, wherein the filter portion includes a boundary defined by a cavity formed in the dielectric portion, the cavity being at least partially filled with the frequency absorbing material.

2. 10. The laminated circuit assembly of claim 1, wherein the one or more signal lines are configured to transmit control signals from a classical computing device to quantum hardware.

3. 10. The laminated circuit assembly of claim 1, wherein the dielectric portion is formed of a polymer and the filter portion includes frequency absorbing particles embedded within the polymer.

4. 2. The laminated circuit assembly of claim 1, wherein the dielectric portion is formed of a first polymer and the frequency absorbing material comprises frequency absorbing particles embedded in a second polymer different from the first polymer.

5. a second direction perpendicular to the substrate, and a third direction orthogonal to the first direction and the second direction; 2. The laminated circuit assembly of claim 1, wherein a first portion of the cavity is disposed above the signal line along the second direction, and a second portion of the cavity is disposed to the side of the signal line along the third direction.

6. The laminated circuit assembly of claim 5 , wherein the first portion of the cavity extends from an outer surface of the substrate to the signal line.

7. a dielectric support supporting the signal line, the dielectric support including a portion of the dielectric portion not removed during formation of the cavity; The laminated circuit assembly of claim 5 , wherein a third portion of the cavity is disposed below the signal line along the second direction.

8. a first conductive layer laminated to an outer surface of the substrate, the first conductive layer including an access for filling the cavity with the frequency absorbing material; 6. The laminated circuit assembly of claim 5, further comprising: a second conductive layer covering said access.

9. The laminated circuit assembly of claim 8 wherein the second conductive layer comprises a curable non-metallic matrix.

10. 5. The laminated circuit assembly of claim 4, wherein the second polymer is a curable polymer, the cavity is at least partially filled with the frequency absorbing material, and the second polymer is in an uncured state.

11. the one or more signal lines: a first signal line having a corresponding first filter section; a second adjacent signal line having a corresponding second filter section; Equipped with 2. The laminated circuit assembly of claim 1, wherein the first filter portion and the second filter portion are offset from each other in the first direction.

12. The laminated circuit assembly of claim 1 , wherein the filter portion is configured to attenuate signals in at least one of the one or more signal lines by at least 0.5 dB / GHz.

13. The laminated circuit assembly of claim 1 , wherein the cavity is formed by ablation of the dielectric.

14. 2. The laminated circuit assembly of claim 1, wherein the first frequency is less than 500 MHz and the second frequency is greater than 2 GHz and less than 8 GHz, and wherein a frequency absorbing material provides greater attenuation to the infrared signal than to either the first signal or the second signal.

15. A method for manufacturing a signal line filter, comprising: receiving a laminated circuit assembly including one or more signal lines disposed in a first direction within a dielectric material of a substrate, wherein a second direction is perpendicular to the substrate and a third direction is orthogonal to the first and second directions; forming a cavity in the substrate by removing a portion of the dielectric material above the signal lines in the second direction, the cavity extending in the first direction along the signal lines, the cavity exposing at least a portion of the one or more signal lines; filling the cavity with a frequency absorbing material, the frequency absorbing material configured to provide less attenuation to a first signal at a first frequency than to a second signal at a second, higher frequency, the filled cavity attenuating infrared signals passing through the one or more signal lines; A method comprising:

16. The method of claim 15 , wherein the cavity is formed by ablation of the dielectric material.

17. 16. The method of claim 15, further comprising the step of: laminating a conductive layer on an outer surface of the substrate, the conductive layer covering an access for filling the cavity with the frequency absorbing material.

18. 1. A cryogenic cooling system comprising: a plurality of cooling stages configured to cool a cooling portion of the computing system to a temperature below 3 Kelvin; one or more signal lines coupling a control unit to the cooling portion of the computing system; The laminated circuit assembly according to any one of claims 1 to 14; A cryogenic cooling system comprising:

19. 20. The cryogenic cooling system of claim 18, wherein one or more of the plurality of cooling stages is configured to cool to a temperature below 20 millikelvin and comprises the laminated circuit assembly.

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