Power supply circuit

Abstract

To provide a power supply circuit that operates stably, independent of a capacitance value of a smoothing capacitor.SOLUTION: The power supply circuit includes: a smoothing capacitor that is charged by a charging current from an output transistor and outputs a voltage generated by the charging as an output voltage; and a control loop that controls a conduction state of the output transistor according to a difference value between the output voltage and a reference voltage. The control loop includes: an AD conversion circuit; a duty adjustment circuit; a capacitance calculation circuit that outputs a control signal according to a capacitance value of the smoothing capacitor according to an error value output by the AD conversion circuit when a duty has been adjusted by the duty adjustment circuit, and a gain adjustment circuit that has a digital compensation circuit, an addition circuit, a PWM signal generation circuit, and a drive circuit, and adjusts the gain of the control loop by adjusting a compensation factor of the digital compensation circuit on the basis of the control signal.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present embodiment relates to a power supply circuit. [Background technology]

[0002] Conventionally, power supply circuit technology has been disclosed that adjusts the on-duty of an output transistor using a control loop and controls the charging of a smoothing capacitor to adjust the output voltage. The load response changes depending on the capacitance value of the smoothing capacitor. When the capacitance value of the smoothing capacitor is large, the circuit operation is stable but the load response is slow. On the other hand, when the capacitance value of the smoothing capacitor is small, the load response is fast but oscillation problems occur, so a configuration to avoid oscillation is required. A power supply circuit that operates stably without depending on the capacitance value of the smoothing capacitor is desired. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-184962 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment is to provide a power supply circuit that operates stably without depending on the capacitance value of a smoothing capacitor. [Means for solving the problem]

[0005] According to one embodiment, a power supply circuit includes: a smoothing capacitor that is charged with a charging current from an output transistor and outputs a voltage generated by the charging as an output voltage; and a control loop that controls the conduction state of the output transistor in accordance with a difference between the output voltage and a reference voltage, the control loop including an AD conversion circuit that converts the difference between the output voltage and the reference voltage into an error value that is a digital signal; a duty adjustment circuit that generates a signal for adjusting an on-duty ratio; and a control loop that controls the error value when the duty is adjusted by the duty adjustment circuit. Based on the amount of variation in The capacitance value of the smoothing capacitor Calculate the calculated signal a capacitance calculation circuit that outputs the Calculated Signal a digital compensation circuit that generates a control value so that the output voltage and the reference voltage are equal in accordance with the error value; an adder circuit that adds the control value, which is the output of the digital compensation circuit, to an output signal of the duty adjustment circuit; a PWM signal generation circuit that generates a PWM signal in accordance with the output signal of the adder circuit; and a drive circuit that generates a drive signal in accordance with the output signal of the PWM signal generation circuit and supplies the drive signal to the output transistor, wherein the gain adjustment circuit Calculated Signal The compensation coefficient of the digital compensation circuit is adjusted based on the above. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a diagram showing the configuration of a power supply circuit according to a first embodiment. [Figure 2] FIG. 2 is a diagram for explaining a method for adjusting the gain of a control loop. [Figure 3] FIG. 3 is a diagram showing an example of a configuration for adjusting the gain of a control loop. [Figure 4] FIG. 4 is a diagram for explaining the effect of gain adjustment of the control loop. [Figure 5] FIG. 5 is a diagram showing another example of a configuration for adjusting the gain of a control loop. [Figure 6] FIG. 6 is a diagram for explaining another method of adjusting the gain of the control loop. [Figure 7]FIG. 7 is a diagram showing the configuration of a power supply circuit according to a second embodiment. [Figure 8] FIG. 8 is a diagram showing the configuration of a power supply circuit according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, power supply circuits according to embodiments will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to these embodiments.

[0008] (First embodiment) FIG. 1 is a diagram showing the configuration of a power supply circuit according to a first embodiment. This embodiment includes a DC voltage source 10. The DC voltage source 10 supplies an input voltage Vin to an input terminal 1. This embodiment also includes output transistors Q1 and Q2. The source of the output transistor Q1 is connected to the input terminal 1, and the drain is connected to one end of an inductor L. The drain of the output transistor Q2 is connected to the drain of the output transistor Q1 and one end of the inductor L, and the source is grounded. The output transistors Q1 and Q2 are alternately turned on and off in response to a drive signal from a drive circuit 70, controlling the conduction state. The first embodiment constitutes a DC / DC converter of a switching power supply circuit.

[0009] The other end of the inductor L is connected to one end of a smoothing capacitor C. The other end of the smoothing capacitor C is grounded. The smoothing capacitor C is charged by the current supplied from the inductor L. The charging voltage of the smoothing capacitor C, i.e., the voltage at one end of the smoothing capacitor C, is supplied to the output terminal 2 as the output voltage Vout. The output voltage Vout is applied to the load 12.

[0010] This embodiment has a control loop that controls the output voltage Vout to be equal to the reference voltage Vref. The control loop has an error amplifier 40 and a comparison circuit 60. The error amplifier 40 compares the output voltage Vout with the reference voltage Vref and outputs a control signal control according to the difference between them. When the output voltage Vout becomes higher than the reference voltage Vref, the level of the control signal control increases, and when the output voltage Vout becomes lower than the reference voltage Vref, the level of the control signal control decreases.

[0011] The comparator circuit 60 compares the control signal control with the triangular wave from the triangular wave generator circuit 50, generates a PWM (Pulse Width Modulation) signal PWM whose on-duty varies according to the level of the control signal control, and supplies it to the driver circuit 70. The driver circuit 70 supplies a drive signal to the output transistors Q1 and Q2 in response to the PWM signal PWM. In order to avoid a shoot-through current that occurs when the output transistors Q1 and Q2 are simultaneously turned on, the driver circuit 70 provides a dead time for the drive signal before supplying it to the gates of the output transistors Q1 and Q2.

[0012] This embodiment includes a current sensor 11, a current detection circuit 20, and a gain adjustment circuit 30. The current sensor 11 senses the input current Iin output by the output transistor Q1 and supplies a signal corresponding to the input current Iin to the current detection circuit 20. For convenience, the following description will be given assuming that the value of the input current Iin detected by the current sensor 11 is supplied directly to the current detection circuit 20. For convenience, the input current Iin may also be referred to as the charging current of the smoothing capacitor C.

[0013] The current detection circuit 20 supplies a detection signal Det corresponding to the input current Iin to the gain adjustment circuit 30. The gain adjustment circuit 30 generates a gain adjustment signal Gn for adjusting the gain of the error amplifier 40 according to the detection signal Det from the current detection circuit 20, and supplies the gain adjustment signal Gn to the error amplifier 40. For example, the gain adjustment circuit 30 selects the gain adjustment signal Gn corresponding to the input current Iin from a data table (not shown) and outputs it. The gain of the error amplifier 40 is adjusted according to the gain adjustment signal Gn.

[0014] The method for adjusting the control loop gain will be explained using Figure 2. In Figure 2, the horizontal axis represents time, and the vertical axis represents the input current Iin. When the power supply circuit starts up, the charging voltage of the smoothing capacitor C, and therefore the output voltage Vout, is zero. When the power supply circuit starts up and the output transistor Q1 turns on, charging of the smoothing capacitor C begins. The input current Iin at this time has a value that corresponds to the difference voltage between the input voltage Vin and the output voltage Vout, which is the charging voltage of the smoothing capacitor C.

[0015] When the value of the smoothing capacitor C is large, it takes time to charge the smoothing capacitor C, and the rise of the output voltage Vout becomes slow. For this reason, the larger the capacitance value of the smoothing capacitor C at startup, the larger the input current Iin becomes. Therefore, as the capacitance value of the smoothing capacitor C increases from a small value to a large value, the input current Iin increases as shown by the solid lines 111 to 112 and 113 in FIG. 2. In other words, the larger the capacitance value of the smoothing capacitor C, the longer the detection time T C The input current Iin becomes large during the detection time T C By detecting the value of the input current Iin at the input terminal, the magnitude relationship of the capacitance value of the smoothing capacitor C can be detected.

[0016] In this embodiment, changes in the input current Iin caused by differences in the capacitance value of the smoothing capacitor C are detected to adjust the gain of the control loop. The input current Iin is compared with thresholds Ith1 and Ith2, and a gain adjustment signal Gn corresponding to the comparison result is supplied to the error amplifier 40 to adjust the gain of the error amplifier 40. When the input current Iin is smaller than the threshold Ith1, the gain is set to G1, and a gain adjustment signal Gn corresponding to the gain G1 is supplied to the error amplifier 40. Similarly, when the input current Iin is equal to or greater than the threshold Ith1 but smaller than the threshold Ith2, the gain is set to G2. When the input current Iin is equal to or greater than the threshold Ith2, the gain is set to G3. The gains are set in the order of gain G1 to G3, from smallest to largest. Note that increasing the number of thresholds Ithn and the corresponding gain adjustment signals Gn improves the accuracy of detecting the capacitance value of the smoothing capacitor C, enabling fine-grained gain adjustment of the control loop.

[0017] An example of a configuration for adjusting the gain of the error amplifier 40 will be described using FIG. 3. Components corresponding to those in the previously described embodiments are given the same reference numerals, and redundant descriptions will be provided only when necessary. This also applies hereinafter. In this example configuration, the current value of a current source 41 that supplies a bias current to the error amplifier 40 is adjusted by a gain adjustment signal Gn from a gain adjustment circuit 30. By increasing the bias current of the error amplifier 40, the gain of the error amplifier 40 can be increased. By increasing the gain of the error amplifier 40, the gain of the control loop can be increased, and the bandwidth of the control loop can be widened.

[0018] The effect of this embodiment will be described using Figure 4. The upper part of Figure 4 shows the bandwidth of the control loop before gain adjustment. The dashed-dotted line 100 indicates a gain of 0. The dashed line 101 indicates the case where the capacitance value of the smoothing capacitor C is the smallest. The dashed line 102 indicates the case where the capacitance value of the smoothing capacitor C is the next smallest, and the solid line 103 indicates the case where the capacitance value of the smoothing capacitor C is the largest. When the capacitance value of the smoothing capacitor C is the smallest, the load response is fast, the frequency F1 at which the gain becomes 0 is the highest, and the bandwidth of the control loop is the widest. As the capacitance value of the smoothing capacitor C increases, the frequency at which the gain becomes 0 decreases from F2 to F3, and the bandwidth of the control loop narrows.

[0019] The lower part shows the effect of adjusting the gain of the control loop in this embodiment. The gain of the error amplifier 40 is adjusted according to the capacitance value of the smoothing capacitor C. Dashed line 101A corresponds to the dashed line 101 in the upper part, and represents the case where the capacitance value of the smoothing capacitor C is the smallest. In this case, the gain of the error amplifier 40 is adjusted by the gain adjustment signal Gn so that it becomes the highest. This adjustment speeds up the load response of the control loop, and the frequency at which the gain becomes 0 can be increased to F0. In other words, the bandwidth of the control loop can be widened.

[0020] Similarly, the gain of the error amplifier 40 is adjusted according to the capacitance value of the smoothing capacitor C to adjust the bandwidth of the control loop. This adjustment, for example, can widen the frequency band for all capacitance values ​​of the smoothing capacitor C to F0, regardless of the capacitance value of the smoothing capacitor C. By detecting the input current Iin at startup and automatically adjusting the gain of the control loop, the bandwidth of the control loop can be adjusted to be the same regardless of the capacitance value of the smoothing capacitor C. This adjustment can provide a power supply circuit that operates stably, independent of the capacitance value of the smoothing capacitor C in the power supply circuit. For example, it can provide a power supply circuit that operates stably when the capacitance value of the smoothing capacitor C is changed according to user requirements, or when the capacitance value of the smoothing capacitor C changes over time.

[0021] 5 is a diagram showing another example of a configuration for adjusting the gain of a control loop. A current detection circuit 20 of this configuration has a comparison circuit 21. The comparison circuit 21 compares an input current Iin with a reference current Ia. When the input current Iin becomes larger than the reference current Ia, the comparison circuit 21 outputs an H-level detection signal Det.

[0022] The gain adjustment circuit 30 of this configuration includes a counter 31, a flip-flop 32, and a setting circuit 33. The counter 31 counts the clock signal CK. The flip-flop 32 responds to the output of the counter 31 and the detection signal Det. The flip-flop 32 supplies the count value of the counter 31 when the detection signal Det becomes H level to the setting circuit 33. In other words, the output of the flip-flop 32 is a signal indicating the time it takes for the input current Iin to reach the reference current Ia. The setting circuit 33 compares the output of the flip-flop 32 with a threshold value Tthn. The setting circuit 33 outputs a gain adjustment signal Gn according to the result of comparing the output of the flip-flop 32 with the threshold value Tthn.

[0023] The adjustment method by the gain adjustment circuit 30 of this configuration example will be described using Figure 6. The horizontal axis of Figure 6 represents time, and the vertical axis represents the input current Iin. The timing at which the input current Iin reaches the reference current Ia is detected by the comparison circuit 21. A signal corresponding to the time it takes for the input current Iin to reach the reference current Ia is output from the flip-flop 32 and compared with the threshold value Tthn in the setting circuit 33. If the capacitance value of the smoothing capacitor C is large, the input current Iin at startup becomes large, and therefore, as shown by the solid line 123, the time T1 until the input current Iin reaches the reference current Ia is short.

[0024] The smaller the capacitance value of the smoothing capacitor C, the longer the times T2 and T3 it takes for the input current Iin to reach the reference current Ia, as shown by solid lines 122 and 121. Therefore, by detecting the input current Iin at the start of the power supply circuit and detecting the times T1, T2, and T3 it takes for the input current Iin to reach the reference current Ia, it is possible to detect the magnitude relationship of the value of the smoothing capacitor C.

[0025] If the time T3 required for the input current Iin to reach the reference current Ia is equal to or greater than the threshold value Tth2, the smallest gain G1 is selected. If the time T2 required for the input current Iin to reach the reference current Ia is shorter than the threshold value Tth2 and equal to or greater than the threshold value Tth1, the gain G2 is selected, and if the time T1 required for the input current Iin to reach the reference current Ia is shorter than the threshold value Tth1, the largest gain G3 is selected. The gain of the error amplifier 40 is adjusted according to the gains G1 to G3.

[0026] By this adjustment, when the capacitance value of the smoothing capacitor C is large, the gain of the error amplifier 40 is adjusted to be high, so that the gain of the control loop including the error amplifier 40 increases and the load response becomes faster. This makes it possible to widen the bandwidth of the control loop. A power supply circuit is configured in which the gain of the control loop is automatically adjusted according to the capacitance value of the smoothing capacitor C, and the bandwidth of the control loop is automatically adjusted.

[0027] (Second embodiment) 7 is a diagram showing the configuration of a power supply circuit according to a second embodiment. The control loop of this embodiment includes a subtraction circuit 71. The subtraction circuit 71 outputs an output signal corresponding to the difference between the output voltage Vout and the reference voltage Vref. The subtraction circuit 71 is configured, for example, by a differential amplifier circuit. The output signal of the subtraction circuit 71 is supplied to an A / D converter 72. Various A / D converters can be used as the A / D converter 72, such as a successive approximation type A / D converter or a flash type A / D converter.

[0028] The A / D converter 72 outputs an error value ER[n] of a digital signal in accordance with the output signal of the subtraction circuit 71. The error value ER[n] is supplied to a digital compensation circuit 73.

[0029] The digital compensation circuit 73 receives the error value ER[n] output by the A / D converter 72, and calculates and outputs a control value CT[n] by PID (Proportional Integral Derivative) calculation to perform PID control so that the output voltage Vout is equal to the reference voltage Vref.

[0030] The control value CT[n] output by the digital compensation circuit 73 is expressed by, for example, the following equation (1). CT[n]=CT[n-1]+K1×ER[n]+K2×ER[n-1] +K3×[n-2]+K4×ER[n-3] ··· (1) Here, ER is the error value, and K1, K2, K3, and K4 are compensation coefficients. Also, [n] is the current value, [n-1] is the value in the previous switching cycle, [n-2] is the value in the switching cycle two cycles ago, and [n-3] is the value in the switching cycle three cycles ago. The control value CT[n] of the digital compensation circuit 73 is supplied to an adder circuit 77.

[0031] This embodiment includes a capacitance calculation circuit 74, a gain adjustment circuit 75, and a duty adjustment circuit 76. The duty adjustment circuit 76 generates an adjustment signal DT that changes the duty of the PWM signal, and supplies the signal to an adder circuit 77.

[0032] The capacitance calculation circuit 74 generates a calculation signal VC corresponding to the capacitance value of the smoothing capacitor C based on the amount of fluctuation in the error value ER[n]. When the capacitance value of the smoothing capacitor C is large, the amount of change in the output voltage Vout relative to a change in the duty instruction signal duty is small. The capacitance calculation circuit 74 calculates the degree of change in the output voltage Vout when the duty instruction signal duty is changed, and generates and outputs a calculation signal VC corresponding to the capacitance value of the smoothing capacitor C depending on the magnitude of the change. Information indicating that the duty has been adjusted is supplied to the capacitance calculation circuit 74 from the duty adjustment circuit 76.

[0033] The adder circuit 77 adds the control value CT[n] and the adjustment signal DT to generate a duty instruction signal duty, which is then supplied to the digital PWM circuit 78. The digital PWM circuit 78 generates a PWM signal PWM in response to the duty instruction signal duty and supplies it to the drive circuit 70.

[0034] The on-duty of the PWM signal PWM changes due to the adjustment signal DT from the duty adjustment circuit 76, and the on-time of the output transistors Q1 and Q2 changes. The change in the on-time of the output transistors Q1 and Q2 changes the output voltage Vout. As a result, the difference between the output voltage Vout and the reference voltage Vref changes, and the error value ER[n] supplied from the A / D converter 72 to the capacitance calculation circuit 74 changes.

[0035] The gain adjustment circuit 75 compares the calculation signal VC from the capacitance calculation circuit 74 with a preset threshold value (not shown), selects a gain adjustment signal Gn according to the comparison result from a data table (not shown), and supplies the selected signal to the digital compensation circuit 73. The compensation coefficients K1, K2, K3, and K4 of the digital compensation circuit 73 are adjusted by the gain adjustment signal Gn.

[0036] When a small capacitance value of the smoothing capacitor C is detected, the compensation coefficients K1, K2, K3, and K4 are adjusted to be smaller, and when a large capacitance value is detected, the compensation coefficients K1, K2, K3, and K4 are adjusted to be larger. The gain of the digital compensation circuit 73 is adjusted by adjusting the compensation coefficients K1, K2, K3, and K4, and the gain of the control loop is adjusted. In other words, since the gain of the control loop can be adjusted according to the capacitance value of the smoothing capacitor C, it is possible to adjust the bandwidth of the control loop to be constant, for example, regardless of the capacitance value of the smoothing capacitor C. Note that the adjustment of the compensation coefficients of the digital compensation circuit 73 does not have to be for all of the compensation coefficients K1 to K4; for example, only the compensation coefficient K1 may be adjusted.

[0037] According to this embodiment, the on-duty of the output transistors Q1 and Q2 is intentionally changed, and the resulting change in the output voltage Vout is detected to calculate the magnitude of the capacitance of the smoothing capacitor C. The gain of the control loop including the digital compensation circuit 73 is then adjusted based on the calculation result. Because the gain of the control loop is adjusted according to the capacitance of the smoothing capacitor C, a power supply circuit is provided that operates stably regardless of the capacitance of the smoothing capacitor C. Furthermore, because the gain of the digital compensation circuit 73 is digitally adjusted, the control loop gain adjustment in this embodiment is less susceptible to noise and other factors. Furthermore, because this embodiment performs control based on the change in the output voltage Vout, the current sensor 11 and current detection circuit 20 of the previously described embodiments can be omitted. The on-duty adjustment by the duty adjustment circuit 76 can be performed when the power supply circuit is in a stable operating state after startup.

[0038] (Third embodiment) FIG. 8 is a diagram showing the configuration of a power supply circuit according to a third embodiment. Similar to the first embodiment, this embodiment includes an error amplifier 40 that compares the output voltage Vout with a reference voltage Vref and outputs a control signal control in accordance with the differential output. The error amplifier 40 forms a control loop that adjusts the conduction state of the output transistor Q1 so that the output voltage Vout is equal to the reference voltage Vref. When the output voltage Vout is higher than the reference voltage Vref, the level of the control signal control output by the error amplifier 40 increases, and when the output voltage Vout is lower than the reference voltage Vref, the level of the control signal control decreases. The gate voltage of the P-channel output transistor Q1 changes in accordance with the level of the control signal control, thereby controlling the conduction state of the output transistor Q1 and equalizing the output voltage Vout to the reference voltage Vref.

[0039] The gain of the error amplifier 40 is adjusted by a gain adjustment signal Gn from the gain adjustment circuit 30. The configuration in which the input current Iin at startup is compared with the thresholds Ith1 and Ith2 and the gain adjustment signal Gn is generated in accordance with the result can be the same as that in the first embodiment.

[0040] This embodiment configures a so-called linear regulator that controls the conduction state of the output transistor Q1 to make the output voltage Vout equal to the reference voltage Vref. The bandwidth of the control loop can be automatically adjusted by automatically adjusting the gain of the error amplifier 40 that configures the control loop in accordance with the capacitance value of the smoothing capacitor C. This makes it possible to provide a power supply circuit that operates stably and is not dependent on the capacitance value of the smoothing capacitor C.

[0041] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0042] 1 input terminal, 2 output terminal, Q1, Q2 output transistors, C smoothing capacitor, 10 DC voltage source, 12 load, 20 current detection circuit, 30 gain adjustment circuit, 40 error amplifier, 50 triangular wave generation circuit, 60 comparison circuit, 70 drive circuit, 73 digital compensation circuit, 74 capacitance calculation circuit, 75 gain adjustment circuit, 76 duty adjustment circuit.

Claims

1. a smoothing capacitor that is charged by a charging current from the output transistor and outputs a voltage generated by the charging as an output voltage; a control loop that controls the conduction state of the output transistor in accordance with a difference between the output voltage and a reference voltage; Equipped with The control loop an AD conversion circuit that converts a difference between the output voltage and the reference voltage into an error value that is a digital signal; a duty adjustment circuit that generates a signal for adjusting an on-duty ratio; a capacitance calculation circuit that calculates a capacitance value of the smoothing capacitor based on a fluctuation amount of the error value when the duty is adjusted by the duty adjustment circuit, and outputs the calculated capacitance value as a calculation signal; a gain adjustment circuit that adjusts a gain of the control loop based on the calculated signal; a digital compensation circuit that generates a control value in accordance with the error value so that the output voltage and the reference voltage are equal; an adder circuit that adds the control value, which is the output of the digital compensation circuit, and the output signal of the duty adjustment circuit; a PWM signal generating circuit that generates a PWM signal in response to an output signal of the adding circuit; a drive circuit that generates a drive signal based on an output signal from the PWM signal generation circuit and supplies the drive signal to the output transistor; Equipped with the gain adjustment circuit adjusts the compensation coefficient of the digital compensation circuit based on the calculated signal. A power supply circuit characterized by:

2. the gain adjustment circuit adjusts the compensation coefficient of the digital compensation circuit to increase it when the amount of change in the output voltage becomes small based on the calculated signal.

2. The power supply circuit according to claim 1.

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