Vehicle control system and circuit device

The vehicle control system employs hard logic circuits to convert communication frames between different protocols, addressing the challenge of high costs and environmental vulnerabilities in microcomputer-less systems, enhancing efficiency and mountability.

JP7729123B2Active Publication Date: 2025-08-26DENSO CORP
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
JP2021143380
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-09-02
Publication Date
2025-08-26
Estimated Expiration
2041-09-02

AI Technical Summary

Technical Problem

Vehicle control systems face challenges in converting communication frames between different protocols without using software processing due to increased costs associated with countermeasures against vibration and heat, particularly in microcomputer-less systems.

Method used

A vehicle control system and circuit device that utilizes hard logic circuits, including first and second sequence circuits, to convert communication frames without software processing, using storage devices to store conversion information and perform frame conversions between CAN and SPI protocols.

Benefits of technology

Enables communication frame conversion between different protocols efficiently, reducing costs and improving mountability by minimizing power consumption and vulnerability to vibration and heat, while reducing the need for microcomputers and wire harnesses.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007729123000001
    Figure 0007729123000001
  • Figure 0007729123000002
    Figure 0007729123000002
  • Figure 0007729123000003
    Figure 0007729123000003
Patent Text Reader

Abstract

To make it possible to convert communication frames without using software processing.SOLUTION: An ECU 201 communicates with an external ECU 300 using CAN frames, and communicates with a control IC 51, which is a control target in the ECU 300, using at least one SPI frame that is different in format from the CAN frames. The ECU 201 includes a first sequence circuit 21 that performs frame conversion of CAN frames to SPI frames and a second sequence circuit 22 that performs frame conversion of SPI frames to CAN frames.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present disclosure relates to a vehicle control system and a circuit device. [Background technology]

[0002] Patent Document 1 discloses a technique for transferring messages via communication paths with different communication protocols. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-328119 Summary of the Invention [Problem to be solved by the invention]

[0004] In vehicle control systems, it is conceivable to use software processing in a microcomputer to convert communication frames into communication frames of different communication protocols. However, in vehicle control systems, microcomputer-less systems are being considered due to the increased costs associated with countermeasures against vibration and heat depending on the environment in which the system is installed.

[0005] One disclosed object is to provide a vehicle control system capable of converting communication frames without using software processing, and another disclosed object is to provide a circuit device capable of converting communication frames without using software processing. [Means for solving the problem]

[0006] The vehicle control system disclosed herein comprises: The electronic control device communicates with the electronic control unit using a control communication frame, and the electronic control unit communicates with a control circuit that is a control target using at least one circuit communication frame that has a format different from that of the control communication frame, The system includes at least one of a first sequence circuit (21) in a hard logic circuit that converts a control communication frame into a circuit communication frame, and a second sequence circuit (22) in a hard logic circuit that converts a circuit communication frame into a control communication frame. And, the first sequence circuit converts the frame by extracting an address and data for the circuit communication frame included in the data portion of the control communication frame received from the electronic control device and storing the address and data in the circuit communication frame; The storage device (71) further includes storage information including a start position for extracting an address and data in a data portion of an extraction source communication frame, and indicating a storage destination of the address and a storage destination of the data in accordance with a communication protocol of a storage destination communication frame of the address and data, The first sequence circuit or the second sequence circuit stores the address and data according to the stored information and performs frame conversion. It is characterized by:

[0007] In this way, the vehicle control system includes at least one of a first sequence circuit that converts a control communication frame into a circuit communication frame and a second sequence circuit that converts a circuit communication frame into a control communication frame, so that the vehicle control system can convert communication frames without using software processing.

[0008] The circuit device disclosed herein is characterized by being equipped with a vehicle control system, and therefore the circuit device can achieve the same effects as the vehicle control system.

[0009] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims and in this section are intended to exemplify correspondences with the following embodiments and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a block diagram showing a schematic configuration of a vehicle communication system according to a first embodiment. [Figure 2] 1 is an image plane showing information stored in a first register. [Figure 3]10 is an image plane showing information stored in a second register. [Figure 4] 10 is a flowchart showing a processing operation of the conversion IC on an SPI frame. [Figure 5] 10 is a flowchart showing the processing operation of a conversion IC on a CAN frame. [Figure 6] FIG. 10 is a conceptual diagram showing the conversion process from a CAN frame to an SPI frame. [Figure 7] FIG. 10 is a block diagram showing a schematic configuration of a vehicle communication system according to a second embodiment. [Figure 8] 10 is a flowchart showing a processing operation of the conversion IC on an SPI frame. [Figure 9] 10 is a flowchart showing the processing operation of a conversion IC on a CAN frame. [Figure 10] FIG. 10 is a block diagram showing a schematic configuration of a vehicle communication system according to a third embodiment. [Figure 11] 10 is a flowchart showing a processing operation of the conversion IC on an SPI frame. [Figure 12] 10 is a flowchart showing the processing operation of a conversion IC on a CAN frame. [Figure 13] FIG. 10 is a block diagram showing a schematic configuration of a vehicle communication system according to a fourth embodiment. [Figure 14] 10 is a diagram showing fixed information stored in a fifth register. [Figure 15] 10 is an image plane showing information stored in a second register. [Figure 16] 10 is a flowchart showing a processing operation of the conversion IC on an SPI frame. [Figure 17] 10 is a flowchart showing the processing operation of a conversion IC on a CAN frame. [Figure 18] FIG. 1 is an image diagram showing a schematic configuration of a CAN data frame. [Figure 19] FIG. 1 is an image diagram showing a schematic configuration of data converted in SPI communication. [Figure 20]FIG. 1 is a conceptual diagram showing a schematic configuration of an SPI frame. [Figure 21] FIG. 10 is a block diagram showing a schematic configuration of a vehicle communication system according to a fifth embodiment. [Figure 22] 10 is a flowchart showing a processing operation of the conversion IC on an SPI frame. [Figure 23] 10 is a flowchart showing the processing operation of a conversion IC on a CAN frame. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, several embodiments for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, parts corresponding to matters described in the preceding embodiment may be assigned the same reference numerals, and duplicated explanations may be omitted. In each embodiment, when only a part of the configuration is described, the other parts of the configuration may be applied by referring to the other embodiment described previously.

[0012] (First embodiment) The vehicle control system of this embodiment will be described with reference to Figures 1 to 6. The vehicle control system is configured to be mountable on a vehicle. The vehicle control system is mounted on the vehicle and performs various controls of the vehicle.

[0013] 1 and other figures, each component is indicated by an abbreviation. Specifically, the CAN transceiver 11 is indicated as CANTR, the CAN controller 12 as CANCTR, the first sequence circuit 21 as 1SQC, the second sequence circuit 22 as 2SQC, the CAN register 31 as CANREG, and the SPI register 41 as 1SPIREG. Also, the control IC 51 is indicated as 1CIC, the first register 61 as 1REG, the second register 62 as 2REG, the ECU 201 as 2ECU, the conversion IC 101 as CHAIC, and the external ECU 300 as 1ECU. ECU is an abbreviation for Electronic Control Unit.

[0014] <Configuration> A schematic configuration of a vehicle control system will be described using Fig. 1. The vehicle control system includes an ECU 201, an external ECU 300, and a CAN bus 400 that communicatively connects the ECU 201 and the external ECU 300. However, the present disclosure is not limited to this, and the vehicle control system can also be applied to the ECU 201. This also applies to other embodiments. The external ECU 300 corresponds to an electronic control device. The ECU 201 corresponds to a circuit device.

[0015] In this embodiment, as an example, communication conforming to the CAN communication protocol (hereinafter referred to as CAN communication) is performed between the ECU 201 and the external ECU 300. Also, an example is employed in which communication conforming to the SPI communication protocol is performed between the multiple ICs 51 and 101 within the ECU 201. However, the present disclosure is not limited to this. The present disclosure can be used as long as the communication protocol between the ECU 201 and the external ECU 300 and the communication protocol (communication standard) between the multiple ICs 51 and 101 within the ECU 201 are different. CAN is a registered trademark. CAN is an abbreviation for Controller Area Network. SPI is an abbreviation for Serial Peripheral Interface.

[0016] <External ECU300> The external ECU 300 includes a microcomputer having at least one CPU and at least one storage device. The external ECU 300 may be connected to various sensors and other ECUs. The storage device stores programs, data, and the like. The data may be pre-stored data, sensor signals output from sensors, or SPI data received via a CAN bus 400 (described later).

[0017] In the external ECU 300, a CPU executes a program. By executing the program, the CPU performs various arithmetic processing using data. The external ECU 300 outputs a control signal or the like as a result of the arithmetic processing. In other words, the external ECU 300 has a calculation function and a function of controlling the control IC 51.

[0018] 1, external ECU 300 is connected to ECU 201 via a CAN bus 400. External ECU 300 includes a communication device for performing communication via CAN bus 400. The communication device is a CAN transceiver, a CAN controller, or the like. External ECU 300 transmits a communication frame including data (control data) indicating the control signal via CAN bus 400. External ECU 300 also receives the communication frame transmitted from ECU 201 via CAN bus 400.

[0019] The communication frames communicated via the CAN bus 400 can also be called CAN frames. These communication frames correspond to control communication frames. The CAN frames transmitted from the external ECU 300 include an SPI address in addition to control data. On the other hand, the CAN frames transmitted from the ECU 201 include the SPI data generated by the control IC 51, the SPI address of the control IC 51, and the like.

[0020] In the following, the control data and the SPI address are also collectively referred to as CAN data. The CAN frame may include other CAN data, which is data other than the CAN data. The other CAN data is, for example, a CAN ID unique to the CAN frame. The SPI address is the address of the device to which the control data included in the CAN frame is sent. The destination device is a circuit within the ECU 201, for example, the control IC 51 within the ECU 201. The SPI frame may include other SPI data other than the SPI address and the SPI data. The SPI frame corresponds to a circuit communication frame.

[0021] <ecu201> 1, the ECU 201 includes a CAN transceiver 11, a conversion IC 101, and a control IC 51. Unlike the external ECU 300, the ECU 201 is configured with a hard logic circuit and does not include a microcomputer. IC is an abbreviation for integrated circuit.

[0022] The CAN transceiver 11, together with the CAN controller 12, constitutes a communication device for communication via the CAN bus 400. The CAN transceiver 11 may be built into the conversion IC 101.

[0023] The conversion IC 101 and the control IC 51 are hard logic circuits. The conversion IC 101 and the control IC 51 are connected via an SPI bus 501. The conversion IC 101 and the control IC 51 transmit and receive SPI frames via the SPI bus 501. The conversion IC 101 converts a CAN frame and transmits the resulting SPI frame to the control IC 51 via the SPI bus 501. The conversion IC 101 receives the SPI frame transmitted from the control IC 51 via the SPI bus 501.

[0024] The conversion IC 101 is a circuit that converts communication frames of different communication protocols. The conversion IC 101 has a function for converting communication frames, in other words, a function for converting communication protocols. The conversion IC 101 includes a CAN controller 12, a plurality of sequence circuits 21 and 22, and a plurality of registers 31, 41, 61, and 62. The processing operation of the conversion IC 101 will be explained later. The conversion of communication frames can also be considered as the conversion of communication protocols or communication standards.

[0025] The sequence circuits 21 and 22 include a plurality of switching elements, etc. The sequence circuits 21 and 22 mainly have a conversion function. The first sequence circuit 21 has a conversion function of converting a CAN frame into an SPI frame. The second sequence circuit 22 has a conversion function of converting an SPI frame into a CAN frame.

[0026] The CAN register 31 stores data in a CAN frame received via the CAN bus 400. In this case, the CAN register 31 stores an SPI address and the like in addition to control data. The CAN register 31 also stores data in a CAN frame to be transmitted via the CAN bus 400. In this case, the CAN register 31 stores SPI data generated by the control IC 51, the SPI address of the control IC 51, and the like. By storing the SPI data, the SPI address, and the like in the CAN register 31, the conversion IC 101 can transmit the SPI data, the SPI address, and the like in a CAN frame.

[0027] The SPI register 41 stores data to be transmitted to the control IC 51 via the SPI bus 501 and data received from the control IC 51. In other words, the SPI register 41 stores data contained in an SPI frame to be transmitted to the control IC 51, and also stores data contained in an SPI frame received from the control IC 51. The data transmitted to the control IC 51 is CAN data, etc. The data received from the control IC 51 is SPI data, an SPI address, etc. The conversion IC 101 stores the CAN data in the SPI register 41, thereby enabling it to transmit the CAN data in an SPI frame.

[0028] The first register 61 stores storage information. The storage information stored in the first register 61 is information for storing CAN data in an SPI frame. This storage information can be called SPI conversion information or first storage information. As shown in FIG. 2, the storage information includes SPI protocol information (number of bits of address / data and starting position), other SPI data, and position information for extracting the SPI address / data portion from the CAN data. The other data information in FIG. 2 includes a CRC (Cyclic Redundancy Check), etc.

[0029] The second register 62 stores storage information. The storage information in the second register 62 is different from the storage information in the first register 61. The storage information stored in the second register 62 is information for storing the SPI data generated by the control IC 51, the SPI address of the control IC 51, etc. in a CAN frame. This storage information can be considered CAN conversion information or second storage information. As shown in FIG. 3, the storage information includes SPI protocol information (number of bits and start position of address / data), CAN ID, position information for storing the SPI address / data portion in the CAN data, etc.

[0030] The SPI conversion information and CAN conversion information can also be considered information indicating the storage destination of the address and the storage destination of the data according to the communication protocol of the communication frame in which the address and the data are stored. The SPI conversion information includes information indicating the storage destination of the SPI address and the control data according to the communication protocol of the SPI frame, which is the communication frame in which the SPI address and the control data are stored. The CAN conversion information includes information indicating the storage destination of the SPI address and the SPI data according to the communication protocol of the CAN frame, which is the communication frame in which the SPI address and the SPI data are stored.

[0031] The control IC 51 is connected to the conversion IC 101 as well as to controlled devices such as actuators (not shown). The control IC 51 receives SPI frames from the conversion IC 101 via the SPI bus 501. The received SPI frames include CAN data and the like. The control IC 51 also transmits SPI frames to the conversion IC 101 via the SPI bus 501. The transmitted SPI frames include SPI data generated by the control IC 51, the SPI address of the control IC 51, and the like. The control IC 51 controls the controlled devices according to the control data in the CAN data. The control IC 51 corresponds to a control circuit. The control IC 51 can also be referred to as a drive IC.

[0032] The control IC 51 and the conversion IC 101 are not limited to those that perform communication in accordance with the SPI protocol. The control IC 51 and the conversion IC 101 may also be configured to perform communication in accordance with other serial communication protocols, such as I2C. I2C is a registered trademark. I2C is an abbreviation for Inter-Integrated Circuit.

[0033] <Summary so far> As described above, the vehicle control system includes ECU 201 configured with a hard logic circuit and external ECU 300 configured mainly with a microcomputer. In the vehicle control system, various functions are allocated to ECU 201 and external ECU 300.

[0034] However, the actuator, which is the device to be controlled, generates heat and vibrates when driven. In addition, in order to reduce the amount of wire harnesses and improve mountability, it is preferable to place the control device in close proximity to the actuator.

[0035] Because external ECU 300 has a microcomputer, its functionality can be flexibly improved by implementing the latest chipset. Furthermore, the vehicle control system concentrates the calculation functions on the external ECU 300 side. In other words, the vehicle control system does not allocate the calculation functions to ECU 201.

[0036] This allows the ECU 201 to be miniaturized and consume less power. Therefore, the ECU 201 has a higher degree of freedom in installation than the external ECU 300. Furthermore, the ECU 201 has better vibration resistance and heat resistance than the external ECU 300. In other words, the ECU 201 requires less cost increase due to countermeasures against vibration and heat than the external ECU 300.

[0037] Therefore, ECU 201 can be more easily arranged in the vicinity of the actuator than external ECU 300. In other words, by arranging ECU 201 in the vicinity of the actuator, the vehicle control system can reduce the number of wire harnesses and improve mountability. Furthermore, ECU 201 does not require software development.

[0038] Therefore, the vehicle control system can reduce the number of wire harnesses and improve mountability while suppressing increases in costs associated with vibration countermeasures and heat countermeasures. Note that placing the ECU 201 in close proximity to the actuator means that the ECU 201 is attached directly to the actuator or adjacent to the actuator.

[0039] The external ECU 300 and the ECU 201 are configured to use CAN communication, which allows for relatively stable communication. That is, CAN communication, which has better noise resistance than serial communication, is used between the external ECU 300 and the ECU 201. On the other hand, the ECU 201 is configured to communicate between the ICs 51 and 101 in accordance with the SPI protocol.

[0040] As described above, the communication protocols between the external ECU 300 and the ECU 201 and between the ICs 51 and 101 are different. Therefore, in order for the external ECU 300 to control the control IC 51, a conversion of the communication protocol is required. Furthermore, in order to transmit SPI data or the like of the control IC 51 to the external ECU 300, a conversion of the communication protocol is required. Therefore, in the present disclosure, a communication protocol conversion function is provided in the ECU 201.

[0041] It is also conceivable that the communication protocol conversion function is provided in external ECU 300. However, in this case, serial communication, which has lower noise resistance than CAN communication, is used between external ECU 300 and ECU 201, which is not preferable.

[0042] <Processing operation> 4 and 5, the processing operation of the conversion IC 101 will be described. As an example of the processing operation of the conversion IC 101, the communication protocol conversion function will be described.

[0043] First, the processing operation for converting a CAN frame into an SPI frame will be described with reference to FIG.

[0044] When controlling the control IC 51, the external ECU 300 transmits a CAN frame including CAN data via the CAN bus 400. On the other hand, the ECU 205 receives the CAN frame via the CAN transceiver 11 and the CAN controller 12. The CAN controller 12 stores the CAN data and the like included in the received CAN frame in the CAN register 31.

[0045] When the CAN controller 12 receives a CAN frame, the conversion IC 101 executes the processing operation shown in the flowchart of Fig. 3. Furthermore, when CAN data is stored in the CAN register 31, the conversion IC 101 may execute the processing operation shown in the flowchart of Fig. 4.

[0046] In step S10, storage information is set (stored) in the first register 61. That is, SPI conversion information is set in the first register 61 in order to convert the CAN frame into an SPI frame.

[0047] In step S11, the CAN data in the CAN register 31 is set in the SPI register 41. More specifically, as shown in FIG. 6, the first sequence circuit 21 stores the CAN data in the CAN register 31 in the SPI register 41 according to the storage information in the first register 61. The first sequence circuit 21 extracts the SPI address and control data from the CAN data according to the storage information. The first sequence circuit 21 stores the extracted SPI address in the address section of the SPI register 41 according to the storage information. The first sequence circuit 21 also stores the control data in the data section of the SPI register 41 according to the storage information. In this way, the CAN data is stored in the SPI frame. The first sequence circuit 21 may also store other CAN data in the SPI frame.

[0048] As described above, the first sequence circuit 21 converts the CAN frame into an SPI frame by storing the CAN data in the SPI register 41. In other words, the first sequence circuit 21 converts the frame by extracting the address and data for the SPI frame from the CAN frame received from the external ECU 300 and storing them in the SPI frame. Then, the conversion IC 101 transmits the SPI frame including the data stored in the SPI register 41 via the SPI bus 501.

[0049] In this way, the vehicle control system can transmit data to any address at the destination by including the address and data of the SPI frame, which is the destination communication frame, in the data of the CAN frame, which is the communication frame before conversion. As described above, the SPI frame address included in the CAN frame data is the address of a register provided in the control IC 51. The data included in the CAN frame data is control data. Transmitting data to any address at the destination means transmitting the control data and other data included in the CAN data to the address of a register provided in the control IC 51.

[0050] Next, the processing operation for converting from an SPI frame to a CAN frame will be described with reference to FIG.

[0051] The control IC 51 receives an SPI frame via the SPI bus 501. The control IC 51 controls the controlled device according to the data stored in the data portion of the SPI frame. The control IC 51 writes information obtained by controlling the controlled device and flags resulting from abnormality detection into a data register. The control IC 51 then transmits an SPI frame via the SPI bus 501, the SPI frame including the written data and an SPI address, which is the address of the register in which the written data is written. When the conversion IC 101 receives the SPI frame, the SPI data and the SPI address are stored in the SPI register 41.

[0052] When the conversion IC 101 receives the SPI frame, it executes the processing operation shown in the flowchart of Fig. 5. Furthermore, when the data of the SPI frame is stored in the SPI register 41, the conversion IC 101 may execute the processing operation shown in the flowchart of Fig. 5.

[0053] In step S20, storage information is set in the second register 62. That is, CAN conversion information is set in the second register 62 in order to convert the SPI frame into a CAN frame.

[0054] In step S21, the SPI address and SPI data of the SPI register 41 are set in the CAN register 31. More specifically, the second sequence circuit 22 stores the SPI address and SPI data of the SPI register 41 in the CAN register 31 according to the storage information of the second register 62. The second sequence circuit 22 extracts the SPI address and SPI data of the SPI frame according to the storage information. The second sequence circuit 22 stores the extracted SPI address and SPI data in the data section of the CAN register 31 according to the storage information. As a result, the SPI address and SPI data are stored in the CAN frame. Note that the second sequence circuit 22 may also store other SPI data in the CAN frame.

[0055] As described above, the second sequence circuit 22 converts the SPI frame into a CAN frame by storing the SPI address and SPI data in the CAN register 31. In other words, the second sequence circuit 22 converts the frame by extracting the SPI address and SPI data from the SPI frame received from the control IC 51 and storing them in the CAN frame. Then, the conversion IC 101 transmits the CAN frame including the data stored in the CAN register 31 via the CAN bus 400.

[0056] In this way, the vehicle control system can transmit an arbitrary address before conversion by having the address and data of the SPI frame, which is the communication frame before conversion, included in the data of the CAN frame, which is the communication frame after conversion. As described above, the address and data included in the data of the CAN frame are the SPI address and SPI data received from the control IC 51. Transmitting an arbitrary address before conversion means transmitting the SPI address received from the control IC 51 to the external ECU 300.

[0057] <Effects> As described above, the vehicle control system includes the first sequence circuit 21 that converts CAN frames into SPI frames and the second sequence circuit 22 that converts SPI frames into CAN frames. Therefore, the vehicle control system can convert communication frames without using software processing. Furthermore, when the vehicle control system is applied to an ECU 201, the ECU 201 can achieve the same effect. Furthermore, the present disclosure can achieve the same effect as long as it includes at least one of the first sequence circuit 21 and the second sequence circuit 22.

[0058] The vehicle control system can convert the communication frame using the first sequence circuit 21 and the second sequence circuit 22. That is, the vehicle control system can convert the communication frame using a hard logic circuit. Therefore, even if the communication protocol between the external ECU 300 and the ECU 201 is different from the communication protocol between the conversion IC 101 and the control IC 51, the vehicle control system can control the control IC 51 without providing a microcomputer in the ECU 201.

[0059] Vehicle control systems convert communication frames using hard logic circuits. Generally, hard logic circuits cannot be reprogrammed, unlike microcomputers, and there are concerns that increased inter-ECU communication will increase bus load.

[0060] However, by including addresses and data in the CAN frame, the vehicle control system can freely change the control data. By storing information based on the communication frame and its associated unique identification information in a memory device, the vehicle control system can transmit to ICs with different protocols. This is also possible for ICs with the same protocol, so the transmission destination can essentially be changed.

[0061] In addition, the vehicle control system can transmit multiple communication frames via CAN communication by storing only the bit information to be transmitted in the CAN data. This allows the vehicle control system to reduce bus load even when the communication frame is converted using a hard logic circuit. The bit information is the SPI address and control data.

[0062] The preferred embodiments of the present disclosure have been described above. However, the present disclosure is not limited to the above embodiments, and various modifications are possible within the scope of the present disclosure. Hereinafter, the second to fifth embodiments will be described as other aspects of the present disclosure. The above embodiments and the second to fifth embodiments can be implemented independently, or can be implemented in appropriate combinations. The present disclosure is not limited to the combinations shown in the embodiments, and can be implemented in various combinations.

[0063] (Second embodiment) A vehicle communication system according to a second embodiment will be described with reference to Figures 7 to 9. In this embodiment, differences from the first embodiment will be mainly described. This embodiment differs from the first embodiment in the configuration and processing operation of the ECU 202 (conversion IC 102). In Figure 7 and other figures, each component is indicated by an abbreviation. Specifically, the flash memory 71 is indicated as FMEM, the third sequence circuit 23 is indicated as 3SQC, and the fourth sequence circuit 24 is indicated as 4SQC.

[0064] 7, the ECU 202 includes a conversion IC 102. The conversion IC 102 includes a third sequence circuit 23, a fourth sequence circuit 24, and a flash memory 71 in addition to the configuration of the conversion IC 101.

[0065] The flash memory 71 corresponds to the storage device in the claims. The flash memory 71 stores the SPI conversion information and CAN conversion information described in the above embodiment. The flash memory 71 is built into the conversion IC 102. However, the flash memory 71 may be provided outside the conversion IC 102.

[0066] The third sequence circuit 23 and the fourth sequence circuit 24 each include a plurality of switching elements, etc. The third sequence circuit 23 stores the SPI conversion information stored in the flash memory 71 in the first register 61. The fourth sequence circuit 24 stores the CAN conversion information stored in the flash memory 71 in the second register 62.

[0067] 8 and 9, the processing operation of the conversion IC 102 will be described. As an example of the processing operation of the conversion IC 102, the communication protocol conversion function will be described.

[0068] First, the processing operation for converting a CAN frame into an SPI frame will be described with reference to Fig. 8. The trigger for starting the flowchart in Fig. 8 is the same as in the first embodiment. This also applies to the other embodiments.

[0069] In step S30, the storage information (SPI conversion information) is set in the flash memory 71.

[0070] In step S31, similar to step S10, stored information is set in the first register 61. Here, the third sequence circuit 23 sets stored information from the flash memory 71 in the first register 61. Step S32 is similar to step S11.

[0071] Next, the processing operation for converting from an SPI frame to a CAN frame will be described with reference to Fig. 9. The trigger for starting the flowchart in Fig. 9 is the same as in the first embodiment. This also applies to the other embodiments.

[0072] In step S40, the storage information (CAN conversion information) is set in the flash memory 71.

[0073] In step S41, similar to step S20, stored information is set in the second register 62. Here, the fourth sequence circuit 24 sets stored information from the flash memory 71 in the second register 62. Step S42 is similar to step S21.

[0074] The vehicular communication system of the second embodiment can achieve the same effects as the first embodiment. The vehicular communication system of the second embodiment stores storage information in the flash memory 71. Therefore, the vehicular communication system of the second embodiment can convert to a plurality of communication protocols. Note that, in the present disclosure, it is sufficient that at least one of the first sequence circuit 21 and the second sequence circuit 22 performs frame conversion.

[0075] (Third embodiment) A vehicle communication system according to a third embodiment will be described using FIGS. 10 to 12. This embodiment will mainly focus on differences from the second embodiment. This embodiment differs from the second embodiment in the configuration and processing operation of the ECU 203 (conversion IC 103). In FIG. 10 and other figures, each component is abbreviated. Specifically, the fifth sequence circuit 25 is referred to as 5SQC, the third register 63 as 3REG, the sixth sequence circuit 26 as 6SQC, and the first comparator 81 as 1CMP. The seventh sequence circuit 27 is referred to as 7SQC, the fourth register 64 as 4REG, the eighth sequence circuit 28 as 8SQC, and the second comparator 82 as 2CMP.

[0076] 10, the ECU 203 includes a conversion IC 103. In addition to the configuration of the conversion IC 102, the conversion IC 103 includes a fifth sequence circuit 25, a third register 63, a sixth sequence circuit 26, and a first comparator 81. Furthermore, the conversion IC 103 includes a seventh sequence circuit 27, a fourth register 64, an eighth sequence circuit 28, and a second comparator 82.

[0077] The flash memory 71 stores identification information unique to a pre-conversion communication frame and storage information for the pre-conversion communication frame in association with each other. That is, the flash memory 71 stores identification information unique to a CAN frame, which is a pre-conversion communication frame, in association with storage information (SPI conversion information) for that CAN frame. Furthermore, the flash memory 71 stores multiple pieces of identification information and multiple pieces of SPI conversion information in association with each other. The identification information here may be a CAN ID or identification information assigned to a CAN frame. The identification information may also be referred to as an identification ID.

[0078] The flash memory 71 also stores identification information unique to the SPI frame, which is the pre-conversion communication frame, in association with storage information for that SPI frame (CAN conversion information). Furthermore, the flash memory 71 also stores multiple pieces of identification information in association with multiple pieces of CAN conversion information. The identification information here can be the SPI address or the identification information assigned to the SPI frame.

[0079] Here, the configuration of the conversion IC 103 and the processing operation of the conversion IC 103 will be described with reference to FIGS.

[0080] 11, the fifth sequence circuit 25 stores the CAN data and CAN ID stored in the CAN register 31 in the third register 63 (step S50). The fifth sequence circuit 25 sets the stored information (SPI conversion information) and a plurality of pieces of identification information associated with the SPI conversion information in the flash memory 71 (step S51).

[0081] The sixth sequence circuit 26 inputs the CAN ID stored in the third register 63 and the SPI conversion information stored in the flash memory 71 to the first comparator 81. More specifically, the sixth sequence circuit 26 inputs the CAN ID stored in the third register 63 to the first comparator 81, and also inputs the identification information associated with each of the multiple pieces of SPI conversion information to the first comparator 81 in order. The first comparator 81 compares the CAN ID with the multiple pieces of identification information in order (step S52). The first comparator 81 outputs the identification information that matches the CAN ID.

[0082] The third sequence circuit 23 receives the identification information output from the first comparator 81. The third sequence circuit 23 stores the SPI conversion information associated with the identification information output from the first comparator 81 from the flash memory 71 into the first register 61 (step S53). Note that step S54 is similar to step S11.

[0083] On the other hand, the seventh sequence circuit 27 and the eighth sequence circuit 28 each include a plurality of switching elements, etc. The seventh sequence circuit 27 stores the SPI address and SPI data stored in the SPI register 41 in the fourth register 64 (step S60). The stored information (CAN conversion information) and a plurality of pieces of identification information associated with the CAN conversion information are set in the flash memory 71 (step S61).

[0084] The eighth sequence circuit 28 inputs the SPI address stored in the fourth register 64 and the CAN conversion information stored in the flash memory 71 to the second comparator 82. More specifically, the eighth sequence circuit 28 inputs the SPI address stored in the fourth register 64 to the second comparator 82, and also inputs the identification information associated with each of the multiple pieces of CAN conversion information to the second comparator 82 in order. The second comparator 82 compares the SPI address with the multiple pieces of identification information in order (step S62). The second comparator 82 outputs the identification information that matches the SPI address.

[0085] The fourth sequence circuit 24 receives the identification information output from the second comparator 82. The fourth sequence circuit 24 stores the CAN conversion information associated with the identification information output from the second comparator 82 from the flash memory 71 into the second register 62 (step S63). Note that step S64 is similar to step S21.

[0086] Therefore, the first sequence circuit 21 performs frame conversion by storing the SPI address and control data in the SPI frame according to the storage information associated with the CAN frame, which is the pre-conversion communication frame. Similarly, the second sequence circuit 22 performs frame conversion by storing the SPI address and SPI data in the CAN frame according to the storage information associated with the SPI frame, which is the pre-conversion communication frame.

[0087] The vehicle communication system of the third embodiment can achieve the same effects as the second embodiment. The vehicle communication system of the third embodiment can convert communication frames corresponding to a plurality of communication frames by providing identification information in association with stored information.

[0088] (Fourth embodiment) A vehicle communication system according to the fourth embodiment will be described using FIGS. 13 to 20. This embodiment will mainly focus on differences from the second embodiment. This embodiment differs from the second embodiment in the configuration and processing operation of the ECU 204 (conversion IC 104). In FIG. 13 and other figures, each component is abbreviated. Specifically, the first control IC 51 is referred to as 1CIC, the second control IC 52 as 2CIC, the third control IC 52 as 3CIC, the first SPI register 41 as 1SPIREG, the second SPI register 42 as 2SPIREG, the third SPI register 43 as 3SPIREG, and the fifth register 65 as 5REG. The first control IC 51 is the same as the control IC 52. The first SPI register 41 is the same as the SPI register 41.

[0089] The ECU 204 includes a plurality of control ICs 51, 52, and 53. The ECU 204 includes a plurality of SPI buses 501 to 503. The conversion IC 201 includes a plurality of SPI registers 41 to 43. The conversion IC 201 includes a fifth register 65.

[0090] The second control IC 52 and the third control IC 53 are connected to a control target device different from that of the first control IC 51. Furthermore, the second control IC 52 is connected to a control target device different from that of the third control IC 53. The second control IC 52 is connected to the second SPI register 42 via a second SPI bus 502. Furthermore, the third control IC 53 is connected to the third SPI register 43 via a third SPI bus 503.

[0091] The ECU 204 may include three or more control ICs. Similarly, the ECU 204 may include four or more SPI buses. Furthermore, the ECU 204 may include four or more SPI registers.

[0092] 13 to 20, the processing operation of the conversion IC 103 will be described in accordance with the configuration of the conversion IC 104. The conversion IC 104 converts one CAN frame into multiple SPI frames. The conversion IC 104 also converts multiple SPI frames into one CAN frame.

[0093] The fifth register 65 stores the fixed information shown in Fig. 14. The fixed information is information indicating values ​​that are the same in the communication frame from which the address and data are extracted and the communication frame to which the data is stored. In other words, the fixed information is information indicating values ​​that are the same in the CAN frame, which is the communication frame from which the address and data are extracted, and the SPI frame, which is the communication frame to which the data is stored. Therefore, the fixed information can be said to be data (fixed bit information) that stores the SPI data. In addition, here, fixed information corresponding to each of the multiple SPI registers 41 to 43 is used.

[0094] FIG. 18 shows an example of a CAN frame. The CAN frame contains part of the data of each SPI frame as CAN data. For example, part of the data of SPI frame f1 is stored in the first and second bits of the CAN data. Part of the data of SPI frame f3 is stored in the fifth to twelfth bits of the CAN data. FIG. 19 shows the items of each SPI frame f1 to f8 and the number of changed bits. FIG. 20 shows each SPI frame f1 to f8 converted from one CAN frame. Note that the cross marks in FIG. 20 indicate the data (bits) to be converted from the CAN data into each SPI frame f1 to f8. Therefore, all data other than the data to be converted in each SPI frame f1 to f8 can be considered fixed information. Similarly, each SPI frame contains part of the data of the CAN frame as an SPI address and SPI data.

[0095] The first sequence circuit 21 converts one CAN frame into a plurality of SPI frames in accordance with the storage information stored in the first register 61 and the fixed information stored in the fifth register 65.

[0096] 16, the stored information (SPI conversion information) and the fixed information are set in the flash memory 71 (step S70). Then, the third sequence circuit 23 stores the SPI conversion information from the flash memory 71 in the fifth register 65 (step S71). The third sequence circuit 23 stores the fixed information from the flash memory 71 in the fifth register 65 (step S71).

[0097] The first sequence circuit 21 converts the CAN frame into an SPI frame in accordance with the SPI conversion information and the fixed information (step S72). More specifically, the first sequence circuit 21 stores the CAN data in the CAN register 31 in each of the SPI registers 41 to 43 corresponding to the SPI addresses. Furthermore, the first sequence circuit 21 stores the fixed information in each of the SPI registers 41 to 43 corresponding to the SPI addresses.

[0098] Specifically, the first sequence circuit 21 extracts the SPI address and SPI data corresponding to the first SPI register 41 from the CAN register 31. The first sequence circuit 21 extracts fixed information corresponding to the first SPI register 41 from the fifth register 65. Then, the first sequence circuit 21 stores the extracted SPI address, SPI data, and fixed information corresponding to the first SPI register 41 in the first SPI register 41, thereby performing frame conversion.

[0099] The SPI address and SPI data are part of the CAN data stored in the CAN register 31. The SPI address and SPI data are also part of the SPI frame formed by storing them in the first SPI register 41.

[0100] Similarly, the first sequence circuit 21 performs frame conversion by extracting the SPI address, SPI data, and fixed information corresponding to the second SPI register 42 and storing them in the second SPI register 42. The first sequence circuit 21 also performs frame conversion by extracting the SPI address, SPI data, and fixed information corresponding to the third SPI register 43 and storing them in the third SPI register 43.

[0101] In this way, the conversion IC 104 converts one CAN frame into multiple SPI frames, and then transmits the SPI frames, including the data stored in the SPI registers 41 to 43, via the SPI buses 501 to 503.

[0102] 15 (CAN conversion information) is stored in the second register 62. Here, the stored information used corresponds to each of the multiple SPI registers 41 to 43. The second sequence circuit 22 converts multiple SPI frames into one CAN frame in accordance with this stored information.

[0103] 17, the stored information is set in the flash memory 71 (step S80). The fourth sequence circuit 24 sets the stored information from the flash memory 71 to the second register 62 (step S81).

[0104] Then, the second sequence circuit 22 stores the SPI address and SPI data of each of the SPI registers 41 to 43 in the CAN register 31 according to the storage information of the second register 62 (step S82). The second sequence circuit 22 extracts the SPI address and SPI data, which are part of the data of the SPI frame, from each of the SPI registers 41 to 43 according to the storage information. The second sequence circuit 22 stores the extracted SPI address and SPI data of each of the SPI registers 41 to 43 in the data section of the CAN register 31 according to the storage information. As a result, the SPI address and SPI data of each of the SPI registers 41 to 43 are stored in the CAN frame.

[0105] The vehicle communication system of the fourth embodiment can achieve the same effects as the second embodiment. In the vehicle communication system of the fourth embodiment, fixed information is stored in the flash memory 71. The conversion IC 104 then stores the fixed information stored in the flash memory 71 in each of the SPI registers 41 to 43 corresponding to the SPI addresses. This allows the external ECU 300 to transmit a CAN frame that does not include fixed information. In other words, the external ECU 300 does not need to transmit fixed information. Therefore, the vehicle communication system of the fourth embodiment can reduce the communication load on the CAN bus 400. Note that the fixed information can also be applied to the other embodiments.

[0106] Furthermore, one CAN frame contains a portion of the data of each SPI frame to be converted. Therefore, the vehicle communication system of the fourth embodiment can reduce the amount of data transmitted from the external ECU 300, thereby reducing the communication load on the CAN bus 400. Similarly, one CAN frame contains a portion of the data of each SPI frame to be converted. Therefore, the vehicle communication system of the fourth embodiment can reduce the communication load on the CAN bus 400.

[0107] (Fifth embodiment) 21 to 23, a vehicle communication system according to the fifth embodiment will be described. This embodiment is a combination of the third and fourth embodiments. The ECU 205 is a combination of the ECU 203 and the ECU 204.

[0108] 22 shows the processing operation for converting from a CAN frame to an SPI frame. Step S90 is the same as step S50. Step S91 performs steps S51 and S70. Step S92 is the same as step S52. Step S93 is the same as step S71. Step S94 is the same as step S72.

[0109] 23 shows the processing operation for converting from an SPI frame to a CAN frame. Step S100 is the same as step S60. Step S101 is the same as step S61. Step S102 is the same as step S62. Step S103 is the same as step S63. Step S104 is the same as step S82.

[0110] The vehicle communication system of the fifth embodiment can achieve the same effects as the third and fourth embodiments.

[0111] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, although various combinations and forms are shown in the present disclosure, other combinations and forms including only one element, more, or less than one element are also within the scope and spirit of the present disclosure. [Explanation of symbols]

[0112] 11...CAN transceiver, 12...CAN controller, 21 to 28...first to eighth sequence circuits, 31...CAN register, 41...SPI register, 42...second SPI register, 43...third SPI register, 51...control IC, 52...second control IC, 61 to 65...first to fifth registers, 71...flash memory, 81...first comparator, 82...second comparator, 201 to 205...ECU, 101 to 105...conversion IC, 300...external ECU, 400...CAN bus, 501 to 503...SPI bus

Claims

1. communication with an electronic control device using a control communication frame, and communication with a control circuit that is a control target in the electronic control device using at least one circuit communication frame that has a format different from that of the control communication frame, The system includes at least one of a first sequence circuit (21) in a hard logic circuit that performs frame conversion of the control communication frame into the circuit communication frame, and a second sequence circuit (22) in a hard logic circuit that performs frame conversion of the circuit communication frame into the control communication frame, the first sequence circuit extracts an address and data for the circuit communication frame included in a data portion of the control communication frame received from the electronic control device and stores the address and data in the circuit communication frame, thereby converting the frame; a storage device (71) storing storage information including a start position for extracting the address and the data in the data portion of the extraction source communication frame, and indicating a storage destination of the address and a storage destination of the data in accordance with a communication protocol of a storage destination communication frame of the address and the data; The first sequence circuit or the second sequence circuit stores the address and the data and performs frame conversion according to the stored information.

2. 2. The vehicle control system according to claim 1, wherein the second sequence circuit converts the frame by extracting the address and data of the circuit communication frame from the circuit communication frame received from the control circuit and storing them in the control communication frame.

3. the storage device stores, in addition to the storage information, fixed information indicating values ​​that are the same between the address and the communication frame from which the data is extracted and the communication frame from which the data is stored; 3. The vehicle control system according to claim 1, wherein the first sequence circuit stores the address and the data according to the stored information, and stores the value indicated by the fixed information and performs frame conversion.

4. 4. The vehicle control system according to claim 1, wherein the first sequence circuit converts a part of one of the control communication frames into a plurality of the circuit communication frames.

5. 5. The vehicle control system according to claim 1, wherein the second sequence circuit converts some of the plurality of circuit communication frames into one of the control communication frames.

6. the storage device stores identification information unique to the pre-conversion communication frame and the storage information for the pre-conversion communication frame in association with each other; The vehicle control system according to any one of claims 1 to 5, wherein the first sequence circuit and the second sequence circuit store the address and the data and convert the frame according to the stored information associated with the pre-conversion communication frame.

7. 7. The vehicle control system according to claim 1, comprising: the electronic control unit; and a hard logic circuit having the first sequence circuit, the second sequence circuit, and the control circuit.

Citation Information

Patent Citations

  • Communication message converter, communication method, and communication system

    JP2005328119A

  • Wire harness and communication relay method

    WO2020122140A1