Minimizing delays when migrating direct memory access (DMA) mapped pages

Abstract

During the memory reallocation process, it is determined that each set of memory pages to be reallocated is enabled for direct memory access (DMA) operations. Before writing the initial data to the set of memory pages, a pre-access delay is performed simultaneously for each memory page in the set of memory pages.

Description

[Technical Field]

[0001] The present invention relates generally to methods, systems, and computer program products for computer system memory management, and more particularly to methods, systems, and computer program products for minimizing delays in migrating Direct Memory Access (DMA) mapped pages. [Background technology]

[0002] A page is a unit of physical or virtual memory. Some hardware and operating system combinations support only one page size, while others support multiple page sizes, for example, 16 kilobytes, 64 kilobytes, 16 megabytes, 64 megabytes, and 16 gigabytes. A segment is a unit of physical or virtual memory that contains one or more pages.

[0003] DMA allows certain hardware devices to have direct access to physical system memory. Typically, a processor initiates a data transfer and then performs other operations while the transfer is in progress. Mapping a device for DMA access means allocating a buffer in system memory and associating a range of system memory addresses in the buffer with corresponding addresses in the device's memory. As a result, reads or writes to addresses within the allocated system memory address range actually access the DMA-mapped device instead.

[0004] Interrupts are often used to notify the processor that a DMA operation has completed. However, the operation may not actually be complete when the interrupt is generated, and some data may not have yet arrived at its destination. For this reason, when reallocating system memory, some computer systems implement a reallocation delay of a predetermined length before freeing up DMA-mapped memory pages for other uses.

[0005] Exemplary embodiments recognized that, as currently implemented, computer systems that implement a predetermined reallocation delay do so for each DMA-mapped memory page as it is reallocated. Thus, if the memory being reallocated includes several DMA-mapped pages, a separate delay is performed for each DMA-mapped page, and the total delay is the sum of each separate delay. For example, when reallocating a large amount of memory in a system with 32 terabytes of memory, the resulting total delay time can degrade system performance and lead to customer complaints. Therefore, exemplary embodiments recognized an unmet need to reduce the total reallocation delay time while still maintaining data integrity. Summary of the Invention

[0006] Exemplary embodiments provide methods, systems, and computer program products. One embodiment includes a method for determining, during a memory reallocation process, that each set of memory pages to be reallocated is enabled for DMA operations. One embodiment performs a pre-access delay before writing initial data to the set of memory pages, and the pre-access delay is performed simultaneously for each memory page in the set of memory pages.

[0007] One embodiment includes a computer-usable program product that includes one or more computer-readable storage devices and program instructions stored on at least one of the one or more storage devices.

[0008] One embodiment includes a computer system including one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions stored in at least one of the one or more storage devices and executed by at least one of the one or more processors via at least one of the one or more memories.

[0009] Viewed from a first aspect, the present invention provides a computer-implemented method comprising: determining, during a memory reallocation process, that a set of memory pages to be reallocated are each enabled for direct memory access (DMA) operations; and, following completion of the memory reallocation process, performing a pre-access delay before writing initial data to the set of memory pages, wherein the pre-access delay is performed concurrently for each memory page in the set of memory pages.

[0010] Preferably, the present invention provides a computer-implemented method further comprising setting a DMA deferral flag for memory pages that are enabled for DMA operations.

[0011] Preferably, the present invention provides a computer-implemented method, wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in the set of memory pages.

[0012] Preferably, the present invention provides a computer-implemented method further comprising setting a DMA deferral flag for the set of memory pages that are enabled for DMA operations.

[0013] Preferably, the present invention provides a computer-implemented method, wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0014] Preferably, the present invention provides a computer-implemented method, wherein the pre-access delay is performed by delaying execution of program instructions for a predetermined time.

[0015] Preferably, the present invention provides a computer-implemented method further comprising: during the second memory reallocation process, determining that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and, in response to determining that a time longer than a threshold time has not yet elapsed since the reallocation of a memory page enabled for DMA operations in the set of memory pages, performing a pre-access delay following completion of the memory reallocation process and prior to writing second initial data to the second set of memory pages, wherein the pre-access delay is performed concurrently for each memory page in the second set of memory pages.

[0016] Viewed from another aspect, the present invention provides a computer program product for minimizing delays in migrating DMA mapped pages, the computer program product including one or more computer-readable storage media and program instructions collectively stored on the one or more computer-readable storage media, the program instructions including: program instructions for determining, during a memory reallocation process, that each of a set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay following completion of the memory reallocation process and before writing initial data to the set of memory pages, the pre-access delay being performed concurrently for each memory page in the set of memory pages.

[0017] Preferably, the present invention provides a computer program product further comprising program instructions for setting a DMA delay flag for memory pages that are enabled for DMA operations.

[0018] Preferably, the present invention provides a computer program product, wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in the set of memory pages.

[0019] Preferably, the present invention provides a computer program product further comprising program instructions for setting a DMA delay flag for a set of memory pages that are enabled for DMA operations.

[0020] Preferably, the present invention provides a computer program product, wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0021] Preferably, the present invention provides a computer program product, wherein the pre-access delay is performed by delaying execution of the program instructions for a predetermined time.

[0022] Preferably, the present invention provides a computer program product further comprising: during the second memory reallocation process, determining that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and, in response to determining that more than a threshold time has not yet elapsed since the reallocation of a memory page enabled for DMA operations in the set of memory pages, performing a pre-access delay prior to writing second initial data to the second set of memory pages following completion of the memory reallocation process, wherein the pre-access delay is performed concurrently for each memory page in the second set of memory pages.

[0023] Preferably, the present invention provides a computer program product wherein the stored program instructions are stored on at least one of one or more storage media of a local data processing system and the stored program instructions are transferred over a network from a remote data processing system.

[0024] Preferably, the present invention provides a computer program product wherein the stored program instructions are stored on at least one of one or more storage media of a server data processing system, and the stored program instructions are downloaded to a remote data processing system over a network and used on a computer readable storage device associated with the remote data processing system.

[0025] Preferably, the present invention provides a computer program product, wherein the computer program product is provided as a service in a cloud environment.

[0026] Viewed from another aspect, the present invention provides a computer system including one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions, the program instructions stored in at least one of the one or more storage devices and executed by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions including: program instructions for determining, during a memory reallocation process, that each of a set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay prior to writing initial data to the set of memory pages following completion of the memory reallocation process, the pre-access delay being performed concurrently for each memory page in the set of memory pages.

[0027] Preferably, the present invention provides a computer system further comprising program instructions for setting a DMA delay flag for memory pages that are enabled for DMA operations.

[0028] Preferably, the present invention provides a computer system wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in the set of memory pages.

[0029] Preferably, the present invention provides a computer system further comprising setting a DMA deferral flag for a set of memory pages that are enabled for DMA operations.

[0030] Preferably, the present invention provides a computer system, wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0031] Preferably, the present invention provides a computer system further comprising: program instructions for determining, during the second memory reallocation process, that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and program instructions for executing, in response to determining that a time longer than a threshold time has not yet elapsed since the reallocation of a memory page enabled for DMA operations in the set of memory pages, a pre-access delay prior to writing second initial data to the second set of memory pages following completion of the memory reallocation process, wherein the pre-access delay is executed concurrently for each memory page in the second set of memory pages.

[0032] Viewed from another aspect, the present invention provides a data processing environment including one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions, the program instructions stored in at least one of the one or more storage devices and executed by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions including: program instructions for determining, during a memory reallocation process, that each of a set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay prior to writing initial data to the set of memory pages following completion of the memory reallocation process, the pre-access delay being performed concurrently for each memory page in the set of memory pages.

[0033] Viewed from another aspect, the present invention provides a memory management subsystem comprising: a memory controller; and a memory manager configured to cause the memory controller to perform an operation including: determining, during a memory reallocation process, that each of the sets of memory pages to be reallocated is enabled for direct memory access (DMA) operations; and, following completion of the memory reallocation process, performing a pre-access delay before writing initial data to the set of memory pages, wherein the pre-access delay is performed concurrently for each memory page in the set of memory pages.

[0034] The particular novel features which are believed to be characteristic of this invention are set forth in the appended claims. The invention itself, however, as well as its preferred mode of use, further objects and advantages thereof, will best be understood from the following detailed description of illustrative embodiments, read in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0035] [Figure 1] 1 is a block diagram of a network of data processing systems in which illustrative embodiments may be implemented; [Figure 2] 1 is a block diagram of a data processing system in which illustrative embodiments may be implemented; [Figure 3] FIG. 1 is a block diagram of an exemplary configuration for minimizing delays in migrating DMA-mapped pages, according to an exemplary embodiment. [Figure 4] FIG. 1 illustrates an example of minimizing delays when migrating DMA-mapped pages, according to an exemplary embodiment. [Figure 5] FIG. 10 illustrates a continuation of the example of minimizing delays when migrating DMA-mapped pages, according to an exemplary embodiment. [Figure 6] FIG. 1 illustrates a flowchart of an exemplary process for minimizing delays in migrating DMA-mapped pages, according to an exemplary embodiment. [Figure 7] FIG. 1 illustrates a cloud computing environment according to one embodiment of the present invention. [Figure 8] FIG. 1 illustrates abstraction model layers according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0036] The illustrative embodiments have recognized an unmet need to reduce total reallocation latency while maintaining data integrity. The illustrative embodiments have recognized that currently available tools or solutions do not address these needs or provide an adequate solution to these needs. The illustrative embodiments used to describe the present invention generally address and solve the above problems, as well as other problems associated with minimizing DMA memory latency.

[0037] An embodiment may be implemented as a software application, which may be configured as a modification to an existing memory management system, as a separate application working in conjunction with an existing memory management system, as a stand-alone application, or some combination thereof.

[0038] Specifically, some example embodiments provide a method for determining, during a memory reallocation process, that each set of memory pages to be reallocated is enabled for DMA operations, performing a pre-access delay simultaneously for each memory page enabled for DMA, and then writing initial data to the set of memory pages.

[0039] One embodiment receives a memory reallocation request. A memory reallocation request is a request to move or migrate the contents of a portion of memory that is currently in use to another location. One example of a reason for moving the contents of a portion of memory is to assemble a contiguous memory region that includes the original portion of memory. For example, to fulfill a request from an application for a contiguous 16 megabyte portion of memory, a memory management system may identify a suitable starting location. However, the proposed contiguous 16 megabyte portion may already be in use, so its contents must be relocated elsewhere to free up the desired contiguous 16 megabytes for use.

[0040] As part of the memory reallocation process, one embodiment determines whether pages of memory within the contiguous memory region being assembled are enabled for DMA operations by being the subject of DMA mapping. One embodiment detects the presence of DMA mapping using any suitable technique and stores the results of the DMA mapping determination. One embodiment detects the presence of DMA mapping using metadata maintained by the operating system. For example, the AIX® operating system maintains metadata describing the state of each memory page, including the page's size and status (e.g., free, in-use, paged-in, or paged-out), which paging device the page belongs to if the page is in paging space, and whether the DMA mapper is enabled for the page. Other operating systems maintain similar page-related metadata.

[0041] To record the DMA operation status of a page, one embodiment maintains a flag for each page or other subset of memory being reallocated. The flag for the page is set if the page requires a delay due to DMA mapping, and cleared otherwise. Another embodiment maintains one flag for the entire portion of memory being consolidated. This flag is set if any page within the entire portion requires a delay due to DMA mapping, and cleared otherwise. Another embodiment uses other currently known techniques to record the need for a delay.

[0042] When recording the DMA operation status of a page, one embodiment also records the time when the migration from that page occurred using any currently known technique. Then, when the memory reallocation process is complete, this embodiment also references the time when the data migration from the particular DMA-mapped page occurred. If enough time has already passed since the migration, the delay has effectively already been performed and does not need to be performed again. For example, consider a memory reallocation process in which one embodiment encounters a DMA-mapped page early in the process. By the time the reallocation process is complete, the delay time may have already naturally elapsed and no additional delay is necessary. Therefore, if no delay needs to be performed, this embodiment clears the appropriate DMA flag.

[0043] Before a newly assembled contiguous memory region can be freed and made available for use, it must be set to a predetermined initial value. Setting a memory region to an initial value overwrites any data previously stored in that region by another application, preventing unauthorized access to the previously stored data. The initial value is typically zero, but other initial values ​​or patterns of values ​​are possible. Because the initial value is typically zero, the component that sets one or more initial values ​​is also called a zeroing engine. Furthermore, some applications mistakenly assume that newly allocated memory is set to zero or some other predetermined value, resulting in software errors. Zeroing a memory region helps prevent these errors. Furthermore, if an application is provided with memory already set to a desired value (e.g., zero), the application does not need to perform initialization itself, improving application efficiency. Some operating systems also include memory allocation functions that set newly allocated memory to a specific value or pattern.

[0044] A currently known implementation of a system for setting a region of memory to a predetermined initial value receives one or more ranges of memory addresses, optionally subdivides those ranges into smaller ranges, and sets each memory range to its initial value using a set of worker threads that run in parallel with each other. In one currently known implementation, each range of memory addresses is a 16 megabyte page of memory. In other currently known implementations, each range of memory addresses is a page of memory smaller or larger than 16 megabytes. In other currently known implementations, each range of memory addresses is a segment of memory containing several memory pages. Some currently known implementations receive one or more starting addresses of the range of memory to be set, and the ending address or size of the range is a predetermined constant.

[0045] One embodiment modifies currently known implementations by determining whether any of the input ranges of memory addresses are flagged as requiring a pre-access delay as described herein. If one or more input ranges of a memory address page require a pre-access delay, one embodiment performs the delay for each memory range simultaneously. One embodiment performs the delay by delaying the execution of the operation for a predetermined amount of time, e.g., 250 ms.

[0046] If a delay is performed, when the delay completes, one embodiment uses a set of worker threads running in parallel with each other to set each memory range to its desired initial value. Finally, one embodiment provides the now-allocated and initialized requested contiguous memory region to the requestor.

[0047] The scheme for minimizing delays in migrating DMA-mapped pages described herein is not available in currently available methods in the technological field of memory management endeavors. When implemented to run on a device or data processing system, the method of one embodiment described herein significantly advances the capabilities of that device or data processing system with respect to determining, during a memory reallocation process, that each set of memory pages to be reallocated is enabled for DMA operations. The method simultaneously performs a pre-access delay for each memory page enabled for DMA before writing initial data to the set of memory pages.

[0048] The exemplary embodiments are described, by way of example only, with respect to particular types of memory portions, delays, initial values, operations, mappings, decisions, measurements, devices, data processing systems, environments, components, and applications. Any particular manifestation of these and other similar artifacts is not intended to limit the invention. Any appropriate manifestation of these and other similar artifacts may be selected within the scope of the exemplary embodiments.

[0049] Additionally, exemplary embodiments may be implemented with any type of data, data source, or access to a data source via a data network. Any type of data storage device may provide data to an embodiment of the present invention, either locally at a data processing system or via a data network, within the scope of the present invention. When describing an embodiment using a mobile device, any type of data storage device suitable for use with a mobile device may provide data to such an embodiment, either locally at the mobile device or via a data network, within the scope of the exemplary embodiments.

[0050] The exemplary embodiments are described using specific code, designs, architectures, protocols, layouts, circuit diagrams, and tools as examples only and are not intended to be limiting. Furthermore, the exemplary embodiments are described in some examples using specific software, tools, and data processing environments for clarity of explanation only, by way of example. The exemplary embodiments may be used with other equivalent or similar purpose structures, systems, applications, or architectures. For example, other equivalent mobile devices, structures, systems, applications, or architectures thereof may be used with such embodiments of the present invention within the scope of the present invention. The exemplary embodiments may be implemented in hardware, software, or a combination thereof.

[0051] The examples in this disclosure are used for clarity of explanation only and are not intended to limit the exemplary embodiments. Additional data, operations, actions, tasks, activities, and operations are contemplated by this disclosure, and the same are contemplated within the scope of the exemplary embodiments.

[0052] Any advantages listed herein are examples only and are not intended to be limitations on example embodiments. Additional or different advantages may be realized by certain example embodiments. Furthermore, certain example embodiments may have some, all, or none of the above-listed advantages.

[0053] Although this disclosure includes detailed descriptions of cloud computing, it should be understood that implementation of the teachings recited herein is not limited to cloud computing environments. Rather, embodiments of the present invention may be implemented in conjunction with any other type of computing environment now known or later developed.

[0054] Cloud computing is a service delivery model that enables convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal administrative effort or interaction with a service provider. The cloud model can include at least five characteristics, at least three service models, and at least four deployment models.

[0055] The features are as follows: On-Demand Self-Service: Cloud consumers can unilaterally provision computing capacity, such as server time and network storage, automatically as needed, without requiring human interaction with the provider of the service. Broad Network Access: Capabilities are available over the network and are accessed through standard mechanisms that facilitate use by heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs). Resource Pooling: Pooling a provider's computing resources to serve multiple consumers using a multi-tenant model where various physical and virtual resources are dynamically allocated and reallocated according to demand. The consumer generally has no control over or knowledge of the exact location of the resources provided, although there is a sense of location independence in that the location may be identifiable at a higher level of abstraction (e.g., country, state, or data center). Rapid Elasticity: Capacity can be rapidly and elastically provisioned, sometimes automatically, to quickly scale out and rapidly release to quickly scale in. To the consumer, provisionable capacity often appears unlimited and can be purchased in any quantity at any time. Metered Services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at a level of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, managed, and reported to provide transparency to both providers and consumers of utilized services.

[0056] The service model is as follows: Software as a Service (SaaS): The consumer is offered the ability to use a provider's applications running on a cloud infrastructure. The applications are accessible from a variety of client devices through thin-client interfaces such as web browsers (e.g., web-based email). The consumer does not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, storage, or even individual application features, with the possible exception of limited user-specific application configuration settings. Platform as a Service (PaaS): The ability offered to consumers is to deploy applications they create or acquire, written using programming languages ​​and tools supported by the provider, onto a cloud infrastructure. The consumer does not manage or control the underlying cloud infrastructure, including the network, servers, operating systems, or storage, but does control the deployed applications and, in some cases, the application hosting environment configuration. Infrastructure as a Service (IaaS): The ability offered to consumers is to provision processing, storage, network, and other basic computing resources onto which they can deploy and run any software, which can include operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but they do control the operating systems, storage, deployed applications, and possibly limited control over selected networking components (e.g., host firewalls).

[0057] The deployment model is as follows: Private Cloud: Cloud infrastructure is operated exclusively for an organization. It can be managed by the organization or a third party and can reside on-premise or off-premise. Community Cloud: Cloud infrastructure is shared by several organizations to support a specific community with common concerns (e.g., mission, security requirements, policies, and compliance considerations). It may be managed by the organization or a third party and may reside on-premise or off-premise. Public Cloud: Cloud infrastructure is made available to the general public or large industry groups and is owned by an organization that sells cloud services. Hybrid Cloud: A cloud infrastructure is a composite of two or more clouds (private, community, or public) that remain unique entities but are joined by standardized or proprietary technologies that allow for data and application portability (e.g., cloud bursting for load balancing between clouds).

[0058] Cloud computing environments are service-oriented with an emphasis on statelessness, low coupling, modularity, and semantic interoperability. At the core of cloud computing is an infrastructure that includes a network of interconnected nodes.

[0059] Referring now to the figures, and in particular to Figures 1 and 2, these figures are exemplary diagrams of data processing environments in which illustrative embodiments may be implemented. Figures 1 and 2 are merely examples and are not intended to assert or imply any limitation with respect to the environments in which different embodiments may be implemented. In particular implementations, many changes may be made to the depicted environments based on the description below.

[0060] 1 illustrates a block diagram of a network of data processing systems in which exemplary embodiments may be implemented. Data processing environment 100 is a network of computers in which exemplary embodiments may be implemented. Data processing environment 100 includes network 102. Network 102 is the medium used to provide communications links between the various interconnected devices and computers within data processing environment 100. Network 102 may include connections such as wired, wireless communication links, or fiber optic cables.

[0061] Client or server are merely exemplary roles for particular data processing systems connected to network 102 and are not intended to exclude other configurations or roles for these data processing systems. Server 104 and server 106, along with storage unit 108, are coupled to network 102. Software applications may run on any computer in data processing environment 100. Clients 110, 112, and 114 are also coupled to network 102. A data processing system, such as server 104 or 106, or client 110, 112, or 114, may contain data and may have software applications or software tools running thereon.

[0062] 1 illustrates certain components that may be used in an exemplary implementation of one embodiment, without implying any limitation to such an architecture. For example, servers 104 and 106 and clients 110, 112, and 114 are illustrated as servers and clients, by way of example only, and not to imply any limitation to a client-server architecture. As another example, one embodiment may be distributed across several data processing systems and data networks as shown, although other embodiments may be implemented on a single data processing system within the scope of an exemplary embodiment. Data processing systems 104, 106, 110, 112, and 114 also represent exemplary nodes within a cluster, partitions, and other configurations suitable for implementing an embodiment.

[0063] Device 132 is one example of a device described herein. For example, device 132 may take the form of a smartphone, a tablet computer, a laptop computer, a stationary or portable client 110, a wearable computing device, or any other suitable device. Any software applications described as executing in the other data processing systems of FIG. 1 may be configured to execute in a similar manner in device 132. Any data or information stored or generated in the other data processing systems of FIG. 1 may be configured to be stored or generated in a similar manner in device 132.

[0064] The application 105 implements one embodiment described herein and runs on any of the servers 104 and 106, the clients 110, 112, and 114, and the device 132.

[0065] Servers 104 and 106, storage unit 108, clients 110, 112, and 114, and device 132 may be coupled to network 102 using wired connections, wireless communication protocols, or other suitable data connections. Clients 110, 112, and 114 may be, for example, personal computers or network computers.

[0066] In the depicted example, server 104 may provide data such as, for example, boot files, operating system images, and applications to clients 110, 112, and 114. Clients 110, 112, and 114 may be clients to server 104 in this example. Clients 110, 112, 114, or some combination thereof, may include their own data, boot files, operating system images, and applications. Data processing environment 100 may include additional servers, clients, and other devices not shown.

[0067] In the depicted example, data processing environment 100 may be the Internet. Network 102 may represent a collection of networks and gateways that communicate with each other using Transmission Control Protocol / Internet Protocol (TCP / IP) and other protocols. At the heart of the Internet is a backbone of data communication links between major nodes or host computers, including thousands of commercial, government, educational, and other computer systems that route data and messages. Of course, data processing environment 100 may also be implemented as a number of different types of networks, such as an intranet, a local area network (LAN), or a wide area network (WAN). Figure 1 is intended as an example, and not as architectural limitations to different illustrative embodiments.

[0068] Among other uses, data processing environment 100 may be used to implement a client-server environment in which exemplary embodiments may be implemented. A client-server environment allows software applications and data to be distributed across a network, with applications functioning using interactivity between client and server data processing systems. Data processing environment 100 may also employ a service-oriented architecture in which interoperable software components distributed across a network may be packaged together as a coherent business application. Data processing environment 100 may also take the form of a cloud and employ a cloud computing model of service delivery to enable convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal administrative effort or interaction with a service provider.

[0069] Referring to Figure 2, this figure illustrates a block diagram of a data processing system in which exemplary embodiments may be implemented. Data processing system 200 is an example of a computer, such as servers 104 and 106 or clients 110, 112, and 114 in Figure 1, or other type of device in which computer-usable program code or instructions implementing the processes of exemplary embodiments may be located.

[0070] Data processing system 200 also represents a data processing system, or configuration therein, such as data processing system 132 of FIG. 1, in which computer-usable program code or instructions that implement the processes of the exemplary embodiments may be located. Data processing system 200 is described as a computer by way of example only, and without limitation. Implementations in the form of other devices, such as device 132 of FIG. 1, may modify data processing system 200, such as by adding a touch interface, or even omit certain illustrated components from data processing system 200, without departing from the general description of the operation and functionality of data processing system 200 described herein.

[0071] In the illustrated example, data processing system 200 employs a hub architecture including a North Bridge and memory controller hub (NB / MCH) 202 and a South Bridge and input / output (I / O) controller hub (SB / ICH) 204. A processing unit 206, main memory 208, and a graphics processor 210 are coupled to North Bridge and memory controller hub (NB / MCH) 202. Processing unit 206 may include one or more processors and may be implemented using one or more heterogeneous processor systems. Processing unit 206 may be a multi-core processor. In certain implementations, graphics processor 210 may be coupled to NB / MCH 202 via an accelerated graphics port (AGP).

[0072] In the illustrated example, a local area network (LAN) adapter 212 is coupled to a south bridge and I / O controller hub (SB / ICH) 204. An audio adapter 216, a keyboard and mouse adapter 220, a modem 222, a read-only memory (ROM) 224, a port 232 such as a universal serial bus (USB), and PCI / PCIe® devices 234 are coupled to the south bridge and I / O controller hub 204 via a bus 238. A hard disk drive (HDD) or solid-state drive (SSD) 226 and a CD-ROM 230 are coupled to the south bridge and I / O controller hub 204 via a bus 240. The PCI / PCIe® devices 234 may include, for example, an Ethernet adapter, an add-in card, and a PC card for a notebook computer. PCI uses a card bus controller, while PCIe® does not. ROM 224 may be, for example, a flash binary input / output system (BIOS). Hard disk drive 226 and CD-ROM 230 may use, for example, integrated drive electronics (IDE), serial advanced technology attachment (SATA) interfaces, or variations such as external SATA (eSATA) and micro-SATA (mSATA). Super I / O (SIO) devices 236 may be coupled to south bridge and I / O controller hub (SB / ICH) 204 via bus 238.

[0073] Memory such as main memory 208, ROM 224, or flash memory (not shown) are some examples of computer-usable storage devices. Hard disk drives or solid state drives 226, CD-ROMs 230, and other similarly usable devices are some examples of computer-usable storage devices that include computer-usable storage media.

[0074] An operating system runs on processing unit 206. The operating system coordinates and controls various components within data processing system 200 of FIG. 2. The operating system may be a commercially available operating system for any type of computing platform, including, but not limited to, server systems, personal computers, and mobile devices. An object-oriented or other type of programming system may work in conjunction with the operating system to provide calls to the operating system from programs or applications running on data processing system 200.

[0075] 1 may be located on a storage device, such as in the form of code 226A on hard disk drive 226, and loaded into at least one of one or more memories, such as main memory 208, for execution by processing unit 206. The processing of exemplary embodiments may be performed by processing unit 206 using computer-implemented instructions, which may be located in a memory, such as main memory 208, read-only memory 224, or in one or more peripheral devices.

[0076] Additionally, in some cases, code 226A may be downloaded over network 201A from remote system 201B, where similar code 201C is stored in storage device 201D. In other cases, code 226A may be downloaded over network 201A to remote system 201B, where the downloaded code 201C is stored in storage device 201D.

[0077] The hardware in Figures 1 and 2 may vary depending on the implementation. Other internal hardware or peripheral devices, such as flash memory, equivalent non-volatile memory, or optical disk drives, may be used in addition to or in place of the hardware depicted in Figures 1 and 2. Additionally, the processing of the illustrative embodiments may be applied to multiprocessor data processing systems.

[0078] In some illustrative examples, data processing system 200 may be a personal digital assistant (PDA), which is typically configured with flash memory to provide non-volatile memory for storing operating system files and / or user-generated data. The bus system may include one or more buses, such as a system bus, an I / O bus, and a PCI bus. Of course, the bus system may be implemented using any type of communications fabric or architecture that provides for a transfer of data between various components or devices attached to the fabric or architecture.

[0079] The communications unit may include one or more devices used to transmit and receive data, such as a modem or network adapter. The memory may be, for example, main memory 208 or a cache, such as that found in north bridge and memory controller hub 202. The processing unit may include one or more processors or CPUs.

[0080] 1 and 2 and above-described examples are not meant to imply architectural limitations. For example, data processing system 200 may also be a tablet computer, a laptop computer, or a telephone device in addition to taking the form of a mobile or wearable device.

[0081] When a computer or data processing system is described as a virtual machine, virtual device, or virtual component, the virtual machine, virtual device, or virtual component operates like data processing system 200 by using virtualized representations of some or all of the components depicted within data processing system 200. For example, in a virtual machine, virtual device, or virtual component, processing unit 206 is represented as a virtualized instance of all or a portion of the hardware processing unit 206 available to the host data processing system, main memory 208 is represented as a virtualized instance of all or a portion of the main memory 208 that may be available to the host data processing system, and disk 226 is represented as a virtualized instance of all or a portion of the disk 226 that may be available to the host data processing system. The host data processing system in such a case is represented by data processing system 200.

[0082] 3, a block diagram of an exemplary configuration for minimizing delays in migrating DMA-mapped pages is shown, in accordance with an exemplary embodiment. Application 300 is an example of application 105 of FIG. 1 and may run on any of servers 104 and 106, clients 110, 112, and 114, and device 132 of FIG. 1.

[0083] The reallocation module 310 receives a memory reallocation request, for example, to move the contents of a portion of memory to assemble a contiguous memory region that includes the original portion. As part of the memory reallocation process, the module 310 determines whether pages of memory within the contiguous memory region being assembled are enabled for DMA operations by being subject to DMA mapping. The module 310 saves the results of the DMA mapping determination. One implementation of the module 310 maintains a flag for each page of memory being reallocated. The flag for a page is set if the page requires a delay due to DMA mapping, and cleared otherwise. Another implementation of the module 310 maintains a flag for the entire portion of memory being consolidated. The flag is set if any page within the entire portion requires a delay due to DMA mapping, and cleared otherwise. Another implementation of the module 310 records the need for a delay using other suitable techniques.

[0084] When recording the DMA operation status of a page, one implementation of module 310 also records the time when the migration from that page occurred. Then, when the memory reallocation process is complete, this implementation also references the time when the data migration from the particular DMA-mapped page occurred. If enough time has already passed since the migration, the delay has effectively already been performed and does not need to be performed again. Therefore, if the delay does not need to be performed, this implementation of module 310 clears the appropriate DMA flag.

[0085] The initial data writing module 320 modifies currently known implementations by determining whether any of the input ranges of memory addresses are flagged as requiring a pre-access delay as described herein. If one or more input ranges of memory address pages require a pre-access delay, the module 320 performs the delay for each memory range simultaneously. One implementation of the module 320 performs the delay by delaying the execution of the process for a predetermined time, e.g., 250 ms. Once the delay is complete, the module 320 sets each memory range to its desired initial value using a set of worker threads running in parallel with each other. Finally, the module 320 provides the requested contiguous memory region, now allocated and initialized, to the requestor.

[0086] 4, which illustrates an example of minimizing delays in migrating DMA-mapped pages according to an exemplary embodiment, which can be performed using application 300 of FIG.

[0087] As shown, application 300 receives memory reallocation request 402. As part of the memory reallocation process in memory 410, the application determines that page 412 is not subject to DMA mapping, but that pages 414 and 416 are subject to DMA mapping. As a result, application 300 creates page list 420. In page list 420, the flag for page 412 is clear, indicating that page 412 does not require a delay due to DMA mapping. The flags for pages 414 and 416 are set, indicating that pages 414 and 416 require a delay due to DMA mapping. In other implementations of application 300, page list 420 is replaced with a single flag that is set if any of pages 412, 414, and 416 are subject to DMA mapping, and is cleared otherwise.

[0088] Referring to Figure 5, this figure shows a continuation of the example of minimizing delays in migrating DMA-mapped pages, according to an exemplary embodiment. Initial data write module 320 is the same as initial data write module 320 of Figure 3. Pages 412, 414, and 416 and page list 420 are the same as pages 412, 414, and 416 and page list 420 of Figure 4.

[0089] As shown, in page list 420, flags for pages 414 and 416 are set, indicating that pages 414 and 416 require a delay due to DMA mapping. Note that pages 414 and 416 may be a subset of a larger memory range received by initial data write module 320. Additionally, page list 420 indicates the status of only a portion of one or more ranges of memory addresses received by module 320. Because pages 414 and 416 require a delay, initial data write module 320 performs a single pre-allocation delay 510. Once delay 510 is complete, module 320 performs operations 512, 514, and 516 using a set of worker threads that run in parallel with each other. Operation 512 zeros page 412, operation 514 zeros page 414, and operation 516 zeros page 416. Once the memory pages are set to the desired values, application 300 provides memory reallocation 520 to the reallocation requestor.

[0090] 6, a flowchart of an exemplary process for minimizing delays in migrating DMA-mapped pages is shown, in accordance with an exemplary embodiment. Process 600 may be implemented in application 300 of FIG.

[0091] In block 602, the application identifies a memory page to be reallocated and migrates data in that page to another location. In block 604, the application determines whether the page to be reallocated is enabled for DMA operations. If it is enabled (the "YES" path out of block 604), the application sets the DMA deferral flag for this page in block 606. If it is not enabled (the "NO" path out of block 604), or after block 606, the application determines in block 608 whether other pages are to be reallocated. If it is (the "YES" path out of block 608), the application returns to block 602. If it is not reallocated (the "NO" path out of block 608), the application determines in block 610 whether the DMA flag is set for a memory page in the set of pages to be reallocated. If it is (the "YES" path out of block 610), the application performs a pre-access deferral in block 612. If not (the "NO" path out of block 610), or after block 612, the application writes initial data to the set of pages and frees the set of pages for use in block 614. The application then terminates.

[0092] Referring now to FIG. 7, an exemplary cloud computing environment 50 is shown. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 10, with which local computing devices used by cloud consumers, such as, for example, a personal digital assistant (PDA) or mobile phone 54A, a desktop computer 54B, a laptop computer 54C, or an automobile computer system 54N, or any combination thereof, may communicate. The nodes 10 may communicate with each other. They may be grouped physically or virtually in one or more networks (not shown), such as, for example, the private, community, public, or hybrid clouds described above, or any combination thereof. This enables the cloud computing environment 50 to provide infrastructure-as-a-service, platform-as-a-service, or software-as-a-service services, or any combination thereof, without requiring cloud consumers to maintain resources on their local computing devices. It should be understood that the types of computing devices 54A-N shown are intended to be exemplary only, and that computing node 10 and cloud computing environment 50 can communicate with any type of computerized device via any type of network and / or network-addressable connection (e.g., using a web browser).

[0093] Referring now to Figure 8, a set of functional abstraction layers provided by cloud computing environment 50 (Figure 7) is shown. It should be understood in advance that the illustrated components, layers, and functions are intended to be exemplary only, and embodiments of the present invention are not limited thereto. As shown, the following layers and corresponding functions are provided:

[0094] Hardware and software layer 60 includes hardware and software components. Examples of hardware components include mainframe 61, RISC (Reduced Instruction Set Computer) architecture-based servers 62, servers 63, blade servers 64, storage devices 65, and networks and networking components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0095] The virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities may be provided: virtual servers 71, virtual storage 72, virtual networks including virtual private networks 73, virtual applications and operating systems 74, and virtual clients 75.

[0096] In one example, the management layer 80 may provide the following functions: Resource provisioning 81 provides dynamic procurement of computing and other resources utilized to execute tasks within the cloud computing environment. Metering and pricing 82 provides cost tracking as resources are utilized within the cloud computing environment and accounting or billing for the consumption of these resources. In one example, these resources may include application software licenses. Security provides identity verification for cloud consumers and tasks, as well as protection for data and other resources. User portal 83 provides consumers and system administrators with access to the cloud computing environment. Service level management 84 provides allocation and management of cloud computing resources so that requested service levels are met. Service level agreement (SLA) planning and fulfillment 85 provides advance arrangement and procurement of cloud computing resources anticipated for future requests according to SLAs.

[0097] The workload layer 90 provides examples of functionality for which a cloud computing environment may be utilized. Examples of workloads and functions that may be provided from this layer include mapping and navigation 91, software development and lifecycle management 92, virtual classroom instruction delivery 93, data analytics processing 94, transaction processing 95, and application selection based on cumulative vulnerability risk assessment 96.

[0098] Thus, exemplary embodiments provide a computer-implemented method, system or apparatus, and computer program product for minimizing delays in migrating DMA-mapped pages, and other related features, functions, or operations. When an embodiment, or portions thereof, is described with respect to a type of device, the computer-implemented method, system or apparatus, computer program product, or portions thereof, is adapted or configured for use with an appropriate and equivalent representation of that type of device.

[0099] While an embodiment is described as being implemented in an application, delivery of the application in a Software-as-a-Service (SaaS) model is contemplated within the scope of the exemplary embodiment. In a SaaS model, the functionality of an application implementing an embodiment is provided to users by running the application on a cloud infrastructure. Users can access the application using a variety of client devices through a thin-client interface, such as a web browser (e.g., web-based email) or other lightweight client application. Users do not manage or control the underlying cloud infrastructure, including the cloud infrastructure's network, servers, operating system, or storage. In some cases, users may not even manage or control the functionality of the SaaS application. In other cases, a SaaS implementation of an application may allow for possible exceptions to limited user-specific application configuration settings.

[0100] The present invention may be a system, method, or computer program product, or combination thereof, integrated at any possible level of technical detail. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to carry out aspects of the present invention.

[0101] A computer-readable storage medium may be any tangible device capable of retaining and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of computer-readable storage media includes portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital versatile disk (DVD), Memory Stick®, floppy disk, mechanically encoded devices such as punch cards or grooved ridge structures having instructions recorded thereon, and any suitable combination thereof. Computer-readable storage medium, as used herein, should not be construed as a transitory signal per se, such as, for example, radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through fiber optic cable), or electrical signals transmitted over wires.

[0102] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or storage device over a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network may include copper transmission cables, fiber optic transmission cables, wireless transmission cables, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device.

[0103] The computer-readable program instructions for carrying out the operations of the present invention may be source or object code written in any combination of one or more programming languages, including assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, integrated circuit configuration data, or object-oriented programming languages ​​such as Smalltalk®, C++, and procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the last scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or a connection may be made to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may be personalized by utilizing state information of the computer-readable program instructions to execute the computer-readable program instructions to perform aspects of the present invention.

[0104] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0105] These computer-readable program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when the instructions are executed by the processor of the computer or other programmable data processing apparatus, means are generated for implementing the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams. These computer-readable program instructions may also be stored on a computer-readable storage medium capable of directing a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner, such that the computer-readable storage medium on which the instructions are stored constitutes an article of manufacture containing instructions that implement aspects of the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.

[0106] Furthermore, computer-readable program instructions may be loaded into a computer, other programmable data processing apparatus, or other device and caused to perform a series of operational steps on the computer, other programmable apparatus, or other device to generate a computer-implemented process that, when executed on the computer, other programmable apparatus, or other device, implements the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.

[0107] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, which includes one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks may occur out of the order depicted. For example, depending on the functionality involved, two blocks shown in succession may in fact be executed substantially concurrently, or the blocks may possibly be executed in the reverse order. It will also be noted that each block in the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, can be implemented by a dedicated hardware-based system that performs the specified functions or acts or executes a combination of dedicated hardware and computer instructions.

Claims

1. During the memory reallocation process, determining 604 that each of the set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; performing (612) a pre-access delay prior to writing initial data to the set of memory pages following completion of the memory reallocation process, the pre-access delay being performed simultaneously for each memory page in the set of memory pages; 11. A computer-implemented method comprising:

2. Setting the DMA deferral flag for memory pages that are enabled for DMA operations The computer-implemented method of claim 1 , further comprising:

3. 3. The computer-implemented method of claim 2, wherein the pre-access delay is performed in response to determining that the DMA delay flag is set for a memory page in the set of memory pages.

4. setting a DMA deferral flag for said set of memory pages that are enabled for DMA operations; The computer-implemented method of claim 1 , further comprising:

5. 5. The computer-implemented method of claim 4, wherein the pre-access deferral is performed in response to determining that the DMA deferral flag is set for the set of memory pages.

6. The computer-implemented method of claim 1 , wherein the pre-access delay is performed by delaying execution of program instructions for a predetermined amount of time.

7. During the second memory reallocation process, determining 604 that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; responsive to determining that a time greater than a threshold time has not yet elapsed since reallocation of memory pages enabled for DMA operations within the set of memory pages, performing the pre-access delay (612) following completion of the memory reallocation process and prior to writing second initial data to the second set of memory pages, wherein the pre-access delay is performed concurrently for each memory page within the second set of memory pages; The computer-implemented method of claim 1 , further comprising:

8. 1. A computer program product for minimizing delays in migrating DMA mapped pages, comprising: the computer program is stored on one or more computer-readable storage media; The computer program comprises: During the memory reallocation process, program instructions (604) determine that each of the set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; program instructions (612) for executing a pre-access delay following completion of the memory reallocation process and before writing initial data to the set of memory pages, the pre-access delay being executed simultaneously for each memory page in the set of memory pages; a computer program comprising:

9. A program instruction that sets the DMA delay flag for memory pages that are enabled for DMA operations.

9. The computer program of claim 8, further comprising:

10. 10. The computer program product of claim 9, wherein the pre-access delay is performed in response to determining that the DMA delay flag is set for a memory page in the set of memory pages.

11. A program instruction that sets a DMA delay flag for the set of memory pages that are enabled for DMA operations.

9. The computer program of claim 8, further comprising:

12. 12. The computer program product of claim 11, wherein the pre-access delay is performed in response to determining that the DMA delay flag is set for the set of memory pages.

13. 9. The computer program product of claim 8, wherein the pre-access delay is performed by delaying execution of a program instruction for a predetermined time.

14. During the second memory reallocation process, determining 604 that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; responsive to determining that a time greater than a threshold time has not yet elapsed since reallocation of memory pages enabled for DMA operations within the set of memory pages, performing the pre-access delay (612) following completion of the memory reallocation process and prior to writing second initial data to the second set of memory pages, wherein the pre-access delay is performed concurrently for each memory page within the second set of memory pages; 9. The computer program of claim 8, further comprising:

15. 9. The computer program product of claim 8, wherein the stored program instructions are stored on at least one of the one or more computer-readable storage media of a local data processing system, and the stored program instructions are transferred over a network from a remote data processing system.

16. 9. The computer program product of claim 8, wherein the stored program instructions are stored on at least one of the one or more computer-readable storage media of a server data processing system, and the stored program instructions are downloaded over a network to a remote data processing system and used in a computer-readable storage device associated with the remote data processing system.

17. The computer program of claim 8 , wherein the computer program is provided as a service in a cloud environment.

18. 1. A computer system including one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions, the program instructions being stored in at least one of the one or more computer-readable storage devices and executed by at least one of the one or more processors via at least one of the one or more computer-readable memories, the stored program instructions comprising: During the memory reallocation process, program instructions (604) determine that each of the set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; program instructions (612) for executing a pre-access delay following completion of the memory reallocation process and before writing initial data to the set of memory pages, the pre-access delay being executed simultaneously for each memory page in the set of memory pages; 1. A computer system comprising:

19. A program instruction that sets the DMA delay flag for memory pages that are enabled for DMA operations.

20. The computer system of claim 18, further comprising:

20. 20. The computer system of claim 19, wherein the pre-access delay is performed in response to determining that the DMA delay flag is set for a memory page in the set of memory pages.

21. setting a DMA deferral flag for said set of memory pages that are enabled for DMA operations; 20. The computer system of claim 18, further comprising:

22. 22. The computer system of claim 21, wherein the pre-access delay is performed in response to determining that the DMA delay flag is set for the set of memory pages.

23. program instructions (604) for determining, during a second memory reallocation process, that each of the second set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; program instructions (612) for performing the pre-access delay following completion of the memory reallocation process and prior to writing second initial data to the second set of memory pages in response to determining that a time greater than a threshold time has not yet elapsed since reallocation of memory pages enabled for DMA operations within the set of memory pages, the pre-access delay being performed concurrently for each memory page within the second set of memory pages; 20. The computer system of claim 18, further comprising:

24. a memory controller; a memory manager; the memory manager configured to cause the memory controller to perform an operation, the operation comprising: During a memory reallocation process, determining that each of the set of memory pages to be reallocated is enabled for direct memory access (DMA) operations; performing a pre-access delay following completion of the memory reallocation process and prior to writing initial data to the set of memory pages, the pre-access delay being performed concurrently for each memory page in the set of memory pages; The memory management subsystem, including:

Images