Electrical Circuit

Abstract

To provide an electric circuit having a variable reactor that can obtain a wide matching range with a small component size and a small number of components.SOLUTION: A variable reactor 10 has: an LC series resonance circuit 14 formed by connecting an inductor L0 and a capacitor C0 in series and having a resonance characteristic at a predetermined frequency; FET_Q1 formed by connecting in-between a drain and a source to the LC series resonance circuit 14 in series; and a diode Di and a shunt capacitor Cs connected in parallel with in-between the drain and the source of the FET_Q1. A gate drive voltage Vgs for driving a control terminal of the variable reactor by a phase control circuit 12 has a phase difference φ that lags in phase with respect to an input current ir of a signal electrically conducted between input and output terminals 10a to 10c of the variable reactor 10. The phase difference φ is variable.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an electric circuit with a variable reactor. [Background technology]

[0002] When a power transmission system wirelessly supplies power from a power transmission electrode to an electric vehicle traveling on the power transmission electrode using an electric or magnetic field, the load on the electric vehicle fluctuates. It is important for this type of power transmission system to maintain the desired output even when the load fluctuates.

[0003] Conventionally, automatic matching technology has been proposed that adaptively matches a fluctuating load (see, for example, Patent Document 1). In contactless power transfer technology, if a reactance component occurs in the load due to misalignment of the power transmitting and receiving electrodes, the power supplied to the battery decreases. This is thought to be caused by two reasons: first, a decrease in the power factor of the entire system, and second, a decrease in transmitted power due to the input (load) impedance deviating from the optimal value. In particular, the second reason is a phenomenon that occurs when a resonant inverter is used as the power transmitting circuit that generates the AC power input to the power transmitting electrodes.

[0004] To address this issue, for example, the technology disclosed in Patent Document 1 proposes incorporating an automatic matching circuit consisting of a switching element and a capacitor, thereby making the reactance of the total impedance of the automatic matching circuit and the load as seen from the output terminal of the power transmission circuit zero, in other words, canceling out the reactance component of the load using the automatic matching circuit.

[0005] Conventionally, variable capacitors for motor control, so-called trimmer capacitors, and reactor arrays that switch the number of connections of a large number of inductors have been mainly used. However, these technologies have the problem of large component size or a large number of components (see, for example, Non-Patent Document 1).

[0006] The technology described in Patent Document 1 proposes a circuit called ATAC or MERS, which is composed only of an FET, its driver circuit, and a capacitor. This technology described in Patent Document 1 can cancel out reactance with a smaller component size and fewer components than conventional technology, but the larger the reactance that is canceled out with the transmitted power, the higher the voltage applied to the FET. This limits the FET's withstand voltage, resulting in a problem that the reactance that can be canceled out is smaller than that of the conventional technology, and the matching range is narrower. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] International Publication No. 2013 / 057896 [Non-patent literature]

[0008] [Non-Patent Document 1] Yoshinori Narisue, "Tunable Reactor for Resonant Coupling Wireless Power Transfer," IEICE Society Magazine, no. 57, June 2021 Summary of the Invention [Problem to be solved by the invention]

[0009] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an electric circuit equipped with a variable reactor that can obtain a wide matching range with a small component size and a small number of components. [Means for solving the problem]

[0010] The invention of claim 1 comprises a variable reactor having an LC series resonant circuit, a diode, and a shunt capacitor. The LC series resonant circuit has a resonant inductor and a resonant capacitor connected in series and has a resonant characteristic at a predetermined frequency. The FET has its drain-source connected in series to the LC series resonant circuit. The diode and shunt capacitor are connected in parallel to the drain-source of the FET. The variable reactor is configured by connecting the LC series resonant circuit and the series-connected circuit between the drain and source of the FET between input / output terminals and connecting the gate of the FET to a control terminal.

[0011] The resonant frequency of the LC series resonant circuit, the frequency of the signal applied between the input / output terminals of the variable reactor, and the frequency of the gate drive voltage that drives the control terminal by the gate drive circuit are all set to the same predetermined frequency, and the duty ratio of the gate drive voltage is fixed to a predetermined value.

[0012] The gate drive voltage that drives the control terminal of the variable reactor by the gate drive circuit is driven so as to have a phase difference that lags the phase of the input current of the signal that is passed between the input and output terminals of the variable reactor, making the phase difference variable.

[0013] According to the invention of claim 1, the phase difference of the gate drive voltage with respect to the input current can be varied, and the reactance can be varied by changing the phase difference. As mentioned above, the variable reactor can be configured with an LC series resonant circuit, a diode, and a shunt capacitor, and as a result, a wide matching range can be obtained with a small component size and a small number of components. [Brief explanation of the drawings]

[0014] [Figure 1] Circuit configuration diagram of the variable reactor shown in the first embodiment [Figure 2] Block diagram showing the use and control configuration of the variable reactor [Figure 3] Control method diagram [Figure 4]A diagram showing the relationship between the phase difference between the input current and the FET drive voltage and the real and imaginary parts of the impedance. [Figure 5] A diagram showing the change in waveform of each part with respect to the phase difference [Figure 6] Circuit configuration example of a phase control circuit shown in the second embodiment [Figure 7] Diagram showing the operation of the phase control circuit [Figure 8] Electrical diagram of the phase detection circuit [Figure 9] 10 is a configuration example of an electric circuit using a variable reactor according to the third embodiment. [Figure 10] 10 is a configuration example of an electric circuit using a variable reactor according to the fourth embodiment. [Figure 11] 10 is a configuration example of an electric circuit using a variable reactor according to the fifth embodiment. [Figure 12] 10 is a configuration example of an electric circuit using a variable reactor according to the sixth embodiment. [Figure 13] 13. A configuration example of an electric circuit using a variable reactor according to the seventh embodiment. [Figure 14] FIG. 13 is a diagram showing the relationship between the change in reactance of the variable reactor and the conduction loss of the diode in the seventh embodiment. [Figure 15] 13. An example of the configuration of an electric circuit using a variable reactor according to the eighth embodiment. [Figure 16] 13. A configuration example of an electric circuit using a variable reactor according to the ninth embodiment. [Figure 17] Configuration example of an electric circuit using a variable reactor according to the tenth embodiment [Figure 18] Configuration example of an electric circuit using a variable reactor according to the eleventh embodiment DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, several embodiments of an electric circuit using a variable reactor will be described with reference to the drawings. Note that parts that are substantially common to the embodiments will be described by using the same or similar reference numerals.

[0016] (First embodiment) A first embodiment will be described below with reference to FIGS. 1 to 5. FIG. 1 shows the basic configuration of a variable reactor 10. The variable reactor 10 has an input terminal 10a, an output terminal 10c, and a control terminal 10b. The variable reactor 10 has an LC series resonant circuit 14, a FET_Q1, a diode Di, and a shunt capacitor Cs between these terminals 10a to 10c. In this application, the input terminal 10a and the output terminal 10c may also be referred to as "input / output terminals 10a, 10c." The space between the input terminal 10a and the output terminal 10c may also be referred to as "input / output terminals 10a-10c." The LC series resonant circuit 14 is configured by connecting a resonant inductor L0 and a resonant capacitor C0 in series, and has a resonant characteristic at a predetermined frequency, for example, in the MHz band. The FET_Q1 is configured by connecting the drain and source of the LC series resonant circuit 14 in series.

[0017] The diode Di and the shunt capacitor Cs are connected in parallel between the drain and source of the FET_Q1. In this embodiment, the diode Di is configured to be external to the FET_Q1, but may be substituted by a body diode built into the FET_Q1.

[0018] Also, although an example is shown in which the shunt capacitor Cs is configured externally to the FET_Q1, it may be substituted by the parasitic capacitance that is parasitic on the FET_Q1, or by the parasitic capacitance that is parasitic on the diode Di described above. Furthermore, the function of the shunt capacitor Cs may be configured by combining these external capacitors and the above-mentioned parasitic capacitance components.

[0019] The variable reactor 10 is configured by connecting an LC series resonant circuit 14 and a series connection circuit between the drain and source of an FET_Q1 between input and output terminals 10a and 10c, and connecting the gate of the FET_Q1 to a control terminal 10b.

[0020] A phase control circuit 12 is connected to the control terminal 10b of the variable reactor 10. The phase control circuit 12 controls the gate drive voltage v of the FET_Q1 connected to the control terminal 10b of the variable reactor 10. gs The phase control circuit 12 generates the gate drive voltage v when driving the gate of the FET_Q1. gs The duty ratio is fixed to a predetermined value (for example, 50%). Although the predetermined value is exemplified as 50%, it may be set to more than 50% or less than 50%.

[0021] The phase control circuit 12 controls the gate drive voltage v of the FET_Q1. gs The input current i of the signal applied between the input terminal 10a and the output terminal 10c of the variable reactor 10 is r In this embodiment, the phase difference φ can be varied by the function of the phase control circuit 12.

[0022] The voltage V input between the input and output terminals 10a-10c of the variable reactor 10 r , current i r The frequency of FET_Q1 and the gate drive voltage v gs The frequency is set to be the same as the resonant frequency of the aforementioned LC series resonant circuit 14 at a predetermined frequency (MHz band). In this application, "same" refers to a set value when the components of the variable reactor 10 operate ideally, and it is common technical knowledge among those skilled in the art that if there is an error in the components, the influence of the error is included within an allowable range.

[0023] When the variable reactor 10 is used, a high-frequency signal is input between the input and output terminals 10a and 10c. This signal is applied to the LC series resonant circuit 14 and also to the FET_Q1 and the shunt capacitor C s , and diode D i The phase control circuit 12 drives the gate of the FET_Q1 to connect the shunt capacitor C s and diode D i Controls the current flowing through the

[0024] 2 is a configuration example in which variable reactor 10 is used, and a load 22 with a fluctuating impedance is driven using a high-frequency power supply 21 that supplies high-frequency power at a predetermined frequency. According to the configuration example of electric circuit 20 shown in Fig. 2, AC power is input from high-frequency power supply 21 to variable reactor 10, and variable reactor 10 is connected to load 22 with a fluctuating impedance.

[0025] The electric circuit 20 includes a variable reactor 10, a phase detection circuit 11, and a phase control circuit 12. The phase detection circuit 11 has an input impedance Z in For example, the output current i of the high frequency power supply 21 is out and the output voltage v of the high frequency power supply 21 out The reactance component is detected as the phase difference θ.

[0026] The phase detection circuit 11 outputs the detection result to the phase control circuit 12. The phase control circuit 12 controls the input impedance Z of the phase detection circuit 11. in Based on the detection result of the reactance component of the variable reactor 10, the impedance Z between the input and output terminals 10a and 10c is calculated. r Control.

[0027] As shown in FIG. 3, the phase control circuit 12 detects the output voltage v of the high frequency power supply 21 detected by the phase detection circuit 11. out and output current i out The reactance X between the input and output terminals 10a-10c of the variable reactor 10 is set to zero (= the reactance component of the input impedance Zin is zero). r At this time, the phase control circuit 12 controls the gate drive voltage v of the FET_Q1. gs This gate drive voltage v gs is the input current i flowing through the input terminal 10a r is controlled to have a phase difference φ with respect to

[0028] The phase difference φ is the real part Re(Z) of the impedance Zr between the input and output terminals 10a and 10c of the variable reactor 10. r ) is less than a predetermined value. r ) is preferably set to be variable. Here, the imaginary part Im(Z r ) is the reactance X between the input and output terminals 10a and 10c of the variable reactor 10. r The real part Re(Z r ) is below a certain value, for example, as close to zero as possible, the gate drive voltage v gs is the input current i r It is desirable to set the phase difference φ, which is the phase delay relative to the input signal, to be variable between a minimum value of 270° and a maximum value of 360°.

[0029] FIG. 4 shows the change in the real part Re(Zr) and the imaginary part Im(Zr) of the impedance Zr of the variable reactor 10 with the change in the phase difference φ. The inventors have clarified that when the phase difference φ is in the range of 270° to 360°, the FET_Q1 performs soft switching. Also, considering that the LC series resonant circuit 14 is resonating at a predetermined frequency at this time, the impedance Z of the variable reactor 10 r is the drain-source impedance Z ds1 It has been clarified that this can be expressed by the following equation (1).

[0030]

number

[0031] In this equation (1), V ds1 is the drain-source voltage v of FET_Q1 ds is the complex Fourier coefficient of n=1 when the input current i r The phase difference φ is the complex Fourier coefficient of n=1 when the input current ir and the gate drive voltage v of FET_Q1 are gs 10 shows the phase difference between the two.

[0032] In the range of φ=270° to 360° where equation (1) holds, the real part Re(Zr) of the impedance Zr of variable reactor 10 is very close to zero and can be expressed only by its imaginary part Im(Zr), which allows variable reactor 10 to be regarded as a pure capacitive reactance. By changing the phase difference φ within the range where equation (1) holds, it is possible to control the magnitude of the capacitive reactance as shown in the lower diagram of Figure 4.

[0033] The results shown in FIG. 4 show the results when ideal switching is performed under conditions where there is no parasitic capacitance or resistance between the gate and source or between the gate and drain in the FET_Q1, and the LC series resonant circuit 14 is assumed to operate as an ideal resonant filter. When applied to an actual FET_Q1, it is desirable to adjust the phase difference φ by adding or subtracting an offset depending on the magnitude of the parasitic capacitance. Also, when an actual FET or LC series resonant circuit 14 is applied, the resistance of the FET or LC series resonant circuit 14 is adjusted to the real part Re(Z r ) and therefore it is desirable that the components actually used have as little resistance as possible.

[0034] Figure 5 shows the simulation results of the waveforms of each part as the phase difference φ changes. In particular, the gate drive voltage v of FET_Q1 gs , input current i r , shunt capacitor C s The current i c , diode D i The current i Di , drain current i ds , the drain-source voltage v of FET_Q1 ds , and the relationship is shown.

[0035] The phase control circuit 12 applies a gate voltage with a predetermined duty ratio to the gate of the FET_Q1 to drive the FET_Q1 in quasi-class E operation. At this time, the gate drive voltage v gs exceeds the threshold voltage of FET_Q1, the drain current i dsflows. See the sections t0 to t1 at φ=260°, t0a to t1a at φ=270°, t0b to t1b at φ=310°, and t0c to t1c at φ=360°. At this time, the input current i r flows into the drain of FET_Q1, the drain current i ds is the input current of a given frequency i r The shunt capacitor C s Since the voltage between the terminals of is zero, the current i c does not flow.

[0036] Then, the gate drive voltage v gs When the voltage is below the threshold voltage of FET_Q1, the drain current i ds Therefore, the input current i r is the shunt capacitor C s The current i c changes. See the sections t1 to t0 at φ=260°, t1a to t0a at φ=270°, t1b to t0b at φ=310°, and t1c to t0c at φ=360°.

[0037] When the phase difference φ is 270°≦φ<360°, the gate drive voltage v gs At the timings t1a and t1b when the input current i r is a positive value.

[0038] Shunt capacitor C s current i c When a current flows in the positive direction, the shunt capacitor C s The voltage at rises, and the drain-source voltage vds of FET_Q1 rises. If the input current ir continues to decrease at a positive value, the shunt capacitor C s The current i c The drain-source voltage of FET_Q1 also decreases, but ds continues to rise. See t1a at φ=270° and t1b at φ=310°.

[0039] Input current i rreaches zero and becomes negative, the current i c Similarly, the input current i reaches zero, becomes negative, and continues to decrease. r becomes negative, the drain-source voltage v of FET_Q1 ds Then, the drain-source voltage v of FET_Q1 ds When the current i c becomes zero. See t1a → t0a at φ=270° and t1b → t0b at φ=310°.

[0040] In the case of an example where the phase difference φ is 310°, the gate drive voltage v of FET_Q1 at timing t2b → t0b gs is below the threshold voltage of FET_Q1, and FET_Q1 is off. During this time, diode D i Similarly, in the case of the phase difference φ=360° example, at timing t1c → t0c, the gate drive voltage v of FET_Q1 gs is below the threshold voltage of FET_Q1, and FET_Q1 is off. During this time, diode D i A forward current flows through the

[0041] When the phase difference φ is in the range of 270° to 360°, the phase control circuit 12 then controls the gate drive voltage v gs When the drain current i ds The drain-source voltage v ds This allows soft switching of FET_Q1, and the loss when FET_Q1 is turned on can be reduced to as close to zero as possible.

[0042] In addition, when the phase difference φ is between 270° and 360°, if the phase difference φ is relatively small, the input current i r per cycle, the shunt capacitor C s The time that current flows to the drain-source voltage v ds On the other hand, when the phase difference φ is relatively large, the amplitude of the input current i r per cycle, the shunt capacitor C sThe time that current is applied to the drain-source voltage v ds The amplitude of becomes relatively small.

[0043] When the phase difference φ is 260°, which is outside the range of 270° to 360°, the drain-source voltage v ds Before the drain current i ds At this time, the drain-source voltage v ds turns on before reaching zero, so the drain current i ds A positive inrush current occurs in the drain-source voltage V, which makes soft switching impossible. ds If the loss is reduced to a predetermined value or less, the loss can be reduced.

[0044] Therefore, the phase difference φ does not necessarily have to be in the range of 270° to 360°, and may be in the range of 0° to 30°, 0° to 45°, or 270° to 30°, or 270° to 45°. Even within the range of 270° to 360°, the larger the phase difference φ is, the larger the shunt capacitor C s The current i c The amplitude of the variable reactor 10 can be reduced. r can be reduced.

[0045] According to this embodiment, the input current i r Gate drive voltage v gs Since the phase difference φ is variable, the reactance X of the variable reactor 10 can be changed by changing the phase difference φ. r The variable reactor 10 can be configured with an LC series resonant circuit 14, a diode Di, and a shunt capacitor Cs, and as a result, can be configured with a small number of parts. Since there are no mechanical parts such as a motor, the size can be made small.

[0046] By operating the FET_Q1 in quasi-class E mode, soft switching can be performed, resulting in low loss. By using the LC series resonant circuit 14, the generation of harmonics due to the switching of the FET_Q1 can be suppressed. For example, even if the phase difference φ is adjusted to a range of about 270° to 360° or 0° to 45°, the impedance Z of the variable reactor 10 r The real part of Re(Z r ) can be lowered, resulting in a wider matching range.

[0047] (Second embodiment) The second embodiment will be described with reference to Fig. 6 to Fig. 8. In the second embodiment, a specific example of the phase control circuit 12 and the phase detection circuit 11 will be described. As shown in Fig. 6, the phase control circuit 12 includes a square wave oscillator 30, a resistor R tr and capacitor C tr , DC blocking capacitor C b , buffer b f1 , a D flip-flop 31, a driver 32 driven by the Q output of the D flip-flop 31, and a resistor R b1 and R b2 A resistor voltage divider circuit 33 is configured by connecting resistors R ch1 , R ch2 , diode D ch , capacitor C ch and a peripheral circuit consisting of a resistor R tr and capacitor C tr constitutes an integrator 34. The output of the driver 32 is connected to the gate of the FET_Q1.

[0048] The integrator 34 receives the square wave output from the square wave oscillator 30, delays the phase of the voltage according to a predetermined time constant, and dulls the voltage waveform. b The clock signal is input to the clock terminal C of the D flip-flop 31 via the

[0049] D flip-flop 31 connects the D terminal to the power supply V cc It is configured by pulling up to resistor R b1 , R b2 The divided voltage by the voltage divider circuit isf1 The clock signal is input to the clock terminal C of the D flip-flop 31 through the resistor R. The / Q terminal and the / CLR terminal of the D flip-flop 31 are connected to a peripheral circuit. ch1 , R ch2 , diode D ch , and capacitor C ch It is configured by combining the above in the illustrated form.

[0050] As shown in FIG. 7, the D flip-flop 31 outputs a square wave voltage from the Q terminal in synchronization with the input voltage of the clock terminal C, and a triangular wave, which is a dull version of the square wave voltage output from the integrator 34, is input to the buffer b. f1 The triangular wave is input to the clock terminal C via the resistor voltage divider circuit 33. The voltage of the triangular wave is adjusted by the resistor voltage divider circuit 33. f1 This allows you to change the timing at which the input threshold is exceeded, and the phase of the output signal relative to the input signal. See the output waveforms for φ=φ1 and φ=φ2.

[0051] Accordingly, it is possible to adjust the rising timing of the Q terminal of the D flip-flop 31 to either the leading or lagging side. As a result, the phase control circuit 12 can output the result of phase control based on the integration result by the integrator .

[0052] 8 shows an example of the configuration of the phase detection circuit 11. The phase detection circuit 11 detects the output current i out Transformer T rc Primary coil T rc1 Current I L and the output voltage v of the high frequency power supply 21. out Transformer T rv Primary coil T rv1 to voltage V s and detect these currents I L and voltage V s The phase difference φ between the DC voltage V b The signal is then converted into a double balanced mixer for detection.

[0053] The double balanced mixer uses a transformer T rc Secondary coil T rc2 , and transformer T rv Secondary coil T rv2 A full-wave rectifier D connected to v It is equipped with a full-wave rectifier D v The secondary coil T rc2 , T rv2 The voltages Vr and Vl output from the secondary coil T rc2 Resistor R connected to the midpoint of b and capacitor C b The smoothing circuit generates a DC voltage V b Detect.

[0054] DC voltage to be detected V b is the secondary coil T rc2 , T rv2 Since the voltage Vb varies depending on the phase difference θ, the current I L and voltage V s The configuration of the first embodiment can be realized by applying such exemplary configurations of the phase control circuit 12 and the phase detection circuit 11. Note that the phase control circuit 12 and the phase detection circuit 11 are not limited to the exemplary circuit configurations shown in this embodiment, and other exemplary circuit configurations are also applicable.

[0055] (Third embodiment) An electric circuit 320 of the third embodiment will be described with reference to FIG. 9. As shown in the right diagram of FIG. 9, the electric circuit may be configured to include a plurality of variable reactors 10. In this case, the plurality of variable reactors 10 may be configured by connecting their input / output terminals 10a-10c in series. By connecting in this manner, the voltage V applied to the variable reactor 10 r1 , V r2 can be reduced, and the design conditions for the drain-source breakdown voltage of FET_Q1 can be relaxed.

[0056] (Fourth embodiment) An electric circuit 420 of the fourth embodiment will be described with reference to FIG. 10. As shown in the right diagram of FIG. 10, the electric circuit may be configured to include a plurality of variable reactors 10. In this case, the plurality of variable reactors 10 may be configured by connecting their input / output terminals 10a-10c in parallel. By connecting in this manner, the current i flowing through each variable reactor 10 is r1 , i r2 This reduces the drain-source current i of FET_Q1. ds This allows the design conditions for the allowable current to be relaxed.

[0057] (Fifth embodiment) An electric circuit 520 of the fifth embodiment will be described with reference to Fig. 11. As shown in Fig. 11, an inductor L a In this case, in order to form a parallel resonant circuit, an inductor L a It is preferable to configure the variable reactor 10 so that its reactance is equal to the maximum reactance of the variable reactor 10.

[0058] Inductor L a The reactance of X L Let the reactance of the variable reactor 10 be X r Then, the impedance Z of these parallel resonant circuits is r can be expressed as the following equation (2).

[0059]

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[0060] In principle, the reactance X of the variable reactor 10 r When adjusted to 0, the impedance Z r The imaginary part (reactance component) of the variable reactor 10 is zero, and the reactance X r =X L When the impedance of the parallel resonant circuit is adjusted to , the imaginary part of the impedance of the parallel resonant circuit becomes infinite.r The variable range of the imaginary part of can be made infinite.

[0061] (Sixth embodiment) An electric circuit 620 of the sixth embodiment will be described with reference to Fig. 12. As shown in Fig. 12, a capacitor C a In this case, the capacitor C a Reactance X C is 1 / ωCa(ω=2×π×current i r The impedance of the parallel circuit is Z r The imaginary part of can be expressed as the following equation (3-1).

[0062]

number

[0063] In this equation (3-1), the impedance Z of the variable reactor 10 r The adjustable range of the imaginary part of s ), then the impedance Z of the parallel circuit is r The adjustable range of the imaginary part of the impedance Z r The variable range of the imaginary part of can be adjusted to an appropriate range.

number

[0064] According to this embodiment, a capacitor C is connected in parallel with the variable reactor 10. a By adding this, the current flowing through the variable reactor 10 can be reduced.

[0065] (Seventh embodiment) An electric circuit 720 of the seventh embodiment will be described with reference to Fig. 13 and Fig. 14. As shown in Fig. 13, an inductor L is connected in series between the input / output terminals 10a and 10c of the variable reactor 10. bThat is, according to the electric circuit 720 shown in Fig. 13, the resonant inductor L0 is connected through the input terminal 10a of the variable reactor 10, but a separate inductor L b is connected.

[0066] With this configuration, as shown in Figure 14, the inductor L b After adding the inductor, the variable range of the phase difference φ is narrowed, and the inductor L b Reactance X L The minimum value of the variable range of the imaginary part (reactance component) of the impedance Zr' between the input / output terminals 10a and 10c is increased by the amount of the inductor L b By adding a diode D i Therefore, the condition of the phase difference φ where a large current flows through the diode D i This eliminates the need to adjust the phase difference φ within a range where the conduction loss increases.

[0067] (Eighth embodiment) An electric circuit 820 of the eighth embodiment will be described with reference to Fig. 15. As shown in Fig. 15, a capacitor C a2 In this case, the capacitor C a2 Reactance X C2 is 1 / ωC a2 The impedance of the series-connected circuit is Z r The imaginary part of can be expressed as the following equation (4-1).

[0068]

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[0069] In this equation (4-1), the impedance Z of the variable reactor 10 r The adjustable range of the imaginary part of s ), then the impedance of the series circuit is Z rThe adjustable range of the imaginary part of the impedance Z r The variable range can be adjusted to an appropriate range.

[0070]

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[0071] According to this embodiment, a capacitor C is connected in series with the variable reactor 10. a2 By adding this, the voltage applied to the variable reactor 10 can be reduced.

[0072] (Ninth embodiment) An electric circuit 920 of the ninth embodiment will be described with reference to Fig. 16. The electric circuit 920 shown in Fig. 16 is configured to drive a load 22 whose impedance varies. The electric circuit 920 shown in Fig. 16 is configured such that a variable reactor 10 is inserted in series between a high frequency power supply 21 and the load 22. If the impedance of the load 22 is R+jX, then the input impedance Z when looking at the load 22 from the high frequency power supply 21 is in can be expressed as the following equation (5).

[0073]

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[0074] Also X=X r The reactance X of the variable reactor 10 is r By controlling the input impedance Z in By making the imaginary part (reactance component) of zero, power matching can be achieved and a drop in supplied power can be prevented.

[0075] (Tenth embodiment) An electric circuit 1020 of the tenth embodiment will be described with reference to Fig. 17. The electric circuit 1020 shown in Fig. 17 is configured to drive a load 22 whose impedance varies. The electric circuit 1020 shown in Fig. 17 is configured such that a variable reactor 10 is inserted in parallel with the load 22. If the impedance of the load 22 is R+jX, then the input impedance Z in can be expressed as the following equation (6).

[0076]

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[0077] Here, the reactance X of the variable reactor 10 is set to satisfy the condition of the following equation (7). r By controlling the input impedance Z in By setting the imaginary part (reactance component) of the above to zero, power matching can be achieved, and a drop in the power supplied to the load 22 can be prevented.

[0078]

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[0079] (Eleventh embodiment) The eleventh embodiment will be described with reference to Fig. 18. As shown in Fig. 18, two variable reactors 10 and an inductor L c The π-type automatic matching circuit 50 may be configured by configuring the π-type automatic matching circuit 50 with an input impedance Z in can be adjusted to any impedance, provided that the impedance is within the limits of the heat generation and withstand voltage of the components of the π-type automatic matching circuit 50.

[0080] Output impedance and input impedance Z of the high frequency power supply 21 in The impedance Z of the variable reactor 10 is adjusted to match the r By controlling the reactance, it is possible to prevent a decrease in the power supplied to the load 22. This is a more practical configuration than simply setting the reactance to zero.

[0081] (Other embodiments) The present invention is not limited to the above-described embodiment, and the following modifications or extensions are possible. As described above, the present invention is suitable for application to a power transmission system in which the load 22 fluctuates, and is applicable to, for example, a contactless power supply system, an induction heating system, and a power transmission system for a plasma process.

[0082] Gate drive voltage v gs is not limited to a square-wave pulse voltage, but may be a sine wave. The duty ratio of the gate drive waveform of the square-wave pulse voltage is preferably determined from the time it takes for the gate voltage to reach the threshold voltage, but this duty ratio may be 50% or a duty ratio different from 50%.

[0083] Although the present invention has been described based on the above-described embodiment, it is understood that the present invention is not limited to the embodiment or structure. The present invention also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including one, more, or less than one element, are also within the scope and spirit of the present invention. [Explanation of symbols]

[0084] In the drawings, 10 denotes a variable reactor, 11 denotes a phase detection circuit (detection circuit), 12 denotes a phase control circuit (gate drive circuit), 14 denotes an LC series resonant circuit, 20, 320, 420, 520, 620, 720, 820, 920, 1020, and 1120 denote electrical circuits, Q1 denotes a FET, L0 denotes a resonant inductor, C0 denotes a resonant capacitor, Di denotes a diode, Cs denotes a shunt capacitor, and Q1 denotes a FET.

Claims

1. Resonant inductor (L ０ ) and a resonant capacitor (C ０ ) connected in series and having a resonance characteristic at a predetermined frequency; A FET (Q １ )and, A diode (D ｉ ) and a shunt capacitor (C ｓ ) and a variable reactor (10) configured by connecting the LC series resonant circuit and a series connection circuit between the drain and source of the FET between input / output terminals and connecting the gate of the FET to a control terminal; the resonant frequency of the LC series resonant circuit, the frequency of the signal applied between the input / output terminals of the variable reactor, and the frequency of the gate drive voltage that drives the control terminal by a gate drive circuit (12) are all set to the same predetermined frequency, and the duty ratio of the gate drive voltage is fixed to a predetermined value; An electric circuit that drives the gate drive voltage so as to have a phase difference that causes the phase to lag behind the input current of the signal applied between the input and output terminals of the variable reactor, and makes the phase difference variable.

2. 2. The electric circuit according to claim 1, wherein the phase difference is set to be variable within a range that satisfies a condition that the real part of the impedance between the input and output terminals of the variable reactor is equal to or less than a predetermined value.

3. 3. The electric circuit according to claim 2, wherein the phase difference is set to be variable between a minimum value of 270° and a maximum value of 360°.

4. A plurality of the variable reactors is provided, The electric circuit according to claim 1 , wherein the input / output terminals of the plurality of variable reactors are connected in series.

5. A plurality of the variable reactors is provided, The electric circuit according to claim 1 , wherein the input / output terminals of the plurality of variable reactors are connected in parallel.

6. 4. The electric circuit according to claim 1, wherein an inductor is connected in parallel between the input and output terminals of the variable reactor.

7. 4. The electric circuit according to claim 1, wherein a capacitor is connected in parallel between the input and output terminals of the variable reactor.

8. 4. The electric circuit according to claim 1, wherein an inductor is connected in series to an input / output terminal of the variable reactor.

9. 4. The electric circuit according to claim 1, wherein a capacitor is connected in series to an input / output terminal of the variable reactor.

10. configured to drive a load (22) with varying impedance; The electric circuit according to claim 1 , wherein the variable reactor is connected in series with the load.

11. configured to drive a load (22) with varying impedance; 4. The electric circuit according to claim 1, wherein the variable reactor is connected in parallel with the load.

12. The device is configured to drive a load (22) whose impedance varies using a high frequency power supply (21) that supplies high frequency power of the predetermined frequency, a π-type automatic matching circuit inserted between the high-frequency power supply and the load; 4. The electric circuit according to claim 1, wherein the variable reactor constitutes the π-type automatic matching circuit.

13. The device is configured to drive a load (22) whose impedance varies using a high frequency power supply (21) that supplies high frequency power of the predetermined frequency, a detection circuit (11) for detecting an input impedance when looking at the load from the high frequency power supply; The impedance between the input and output terminals of the variable reactor (Z ｒ The gate drive circuit (12) controls the 4. An electric circuit according to claim 1, comprising:

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