Manufacturing method of structure and manufacturing method of capacitor

Abstract

To provide a structure manufacturing method and a capacitor manufacturing method that can eliminate processing defects that may occur when processing recesses in a semiconductor substrate.SOLUTION: A structure manufacturing method according to an embodiment includes forming a recess 2 in a semiconductor substrate 1, oxidizing at least a bottom inner surface 2a of the recess 2, and contacting at least the bottom inner surface 2a of the recess 2 with a liquid capable of dissolving the oxide of the semiconductor substrate material.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] SUMMARY OF THE INVENTION An embodiment of the present invention relates to a method for manufacturing a structure and a method for manufacturing a capacitor. [Background technology]

[0002] Etching is a well-known method for forming holes and grooves in semiconductor wafers. One known etching method is MacEtch (Metal-Assisted Chemical Etching). MacEtch is a method for etching semiconductor substrates using, for example, a precious metal as a catalyst. When high-aspect-ratio trenches are formed in a silicon wafer using MacEtch, needle-like, elongated silicon remains at the bottom of the trench. These needle-like silicon can cause cracks when a dielectric layer, insulating layer, or electrode is formed on the trench during capacitor manufacturing. For example, cracks in the dielectric layer can cause leakage defects. Furthermore, there is concern that needle-like silicon can cause a decrease in the breakdown voltage characteristics of capacitors due to electric field concentration at the corners. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-243851 [Patent Document 2] International Publication No. 2009-054076 [Patent Document 3] International Publication No. 2003-105209 [Patent Document 4] Special Publication No. 2013-527103 Summary of the Invention [Problem to be solved by the invention]

[0004] According to the embodiments, a method for manufacturing a structure and a method for manufacturing a capacitor are provided that can eliminate processing defects that may occur when processing a recess in a semiconductor substrate. [Means for solving the problem]

[0005] According to an embodiment, forming a recess in a semiconductor substrate; oxidizing at least the bottom inner surface of the recess; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess; A method for manufacturing a structure is provided, comprising: The recesses are formed in the semiconductor substrate by etching using a catalyst containing a noble metal.

[0006] According to an embodiment, forming a recess in a semiconductor substrate; forming an oxide containing impurities on at least the inner bottom surface of the recess; heating the semiconductor substrate in the presence of oxygen gas; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess; A method for manufacturing a structure is provided, comprising: The recesses are formed in the semiconductor substrate by etching using a catalyst containing a noble metal.

[0007] According to another embodiment, there is provided a method for manufacturing a capacitor, comprising: manufacturing a structure including a semiconductor substrate having a recess according to any of the methods of the embodiments; and forming a conductive or dielectric layer in the recess of the semiconductor substrate. [Brief explanation of the drawings]

[0008] [Figure 1] 5A to 5C are schematic diagrams illustrating an example of a recess forming step in the method according to the embodiment. [Figure 2] FIG. 4 is a schematic diagram showing an example of a state after a recess forming step in the method of the embodiment. [Figure 3] FIG. 2 is a schematic diagram showing an example of an oxidation step in the method of the embodiment. [Figure 4] 5A and 5B are schematic diagrams illustrating an example of an oxide removal step in the method according to the embodiment. [Figure 5] 5A to 5C are schematic diagrams illustrating a step of a method for manufacturing a capacitor according to an embodiment. [Figure 6] 5A to 5C are schematic diagrams illustrating an example of a step of forming an oxide containing impurities in the method of the embodiment. [Figure 7] FIG. 2 is a schematic diagram showing an example of an oxidation step in the method of the embodiment. [Figure 8] 5A and 5B are schematic diagrams illustrating an example of an oxide removal step in the method according to the embodiment. [Figure 9] 5A to 5C are schematic diagrams illustrating a step of a method for manufacturing a capacitor according to an embodiment. [Figure 10] 10 is a scanning electron microscope photograph showing a cross section near the bottom of a trench after an etching process in a method according to an embodiment. [Figure 11] 1 is a scanning electron microscope photograph showing a cross section near the bottom of a trench of a capacitor manufactured by a method of an embodiment. [Figure 12] FIG. 4 is a schematic diagram showing an oxide removal step according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, the embodiments will be described in detail with reference to the drawings. Note that components that perform the same or similar functions are designated by the same reference numerals throughout the drawings, and redundant explanations will be omitted.

[0010] The semiconductor may be selected from silicon (Si); germanium (Ge); semiconductors made of compounds of group III and group V elements, such as gallium arsenide (GaAs) and gallium nitride (GaN); and silicon carbide (SiC). In one example, the semiconductor substrate includes silicon. Note that the term "group" as used herein refers to a group in the short periodic table.

[0011] The semiconductor substrate is, for example, a semiconductor wafer. The semiconductor wafer may be doped with impurities and may have semiconductor elements such as transistors and diodes formed thereon. The main surface of the semiconductor wafer may be parallel to any crystal plane of the semiconductor. For example, the semiconductor wafer may be a silicon wafer whose main surface is a (100) plane or a silicon wafer whose main surface is a (110) plane.

[0012] Examples of semiconductor substrate materials include semiconductors selected from the above types. An example of the semiconductor substrate material is Si. Examples of oxides of semiconductor substrate materials include oxides of semiconductors selected from the above types. An example of this oxide is Si oxide (SiO2). (First embodiment) According to a first embodiment, there are provided a method for manufacturing a first structure and a method for manufacturing a first capacitor, each of which includes forming a recess in a semiconductor substrate, oxidizing at least the inner bottom surface of the recess to form an oxide of the semiconductor substrate material, and removing the oxide of the semiconductor substrate material by contacting at least the inner bottom surface of the recess with a liquid capable of dissolving the oxide of the semiconductor substrate material.

[0013] Each step will be described below with reference to Figures 1 to 5. In each figure, the direction parallel to the thickness direction of the semiconductor substrate is the z-axis direction, and the plane parallel to the main surface of the semiconductor substrate is the xy plane. An example of forming a trench as the recess will be described.

[0014] (recess formation) Formation of recesses (e.g., trenches) in a semiconductor substrate is performed, for example, by etching. An example of etching is etching using a catalyst containing a precious metal, known as MacEtch (Metal-Assisted Chemical Etching). Formation of recesses (e.g., trenches) using the MacEtch method will be described with reference to FIG. 1 . The semiconductor substrate 1 may be, for example, a Si substrate (silicon wafer). On one main surface of the semiconductor substrate 1 along the xy plane, a catalytic layer 11 containing a precious metal is formed in the portion where the recess is to be formed, and a mask layer 12 is formed in the portion where the recess is not to be formed. The main surface on which the catalytic layer 11 and mask layer 12 are formed is brought into contact with an etching agent (not shown) containing an oxidizing agent and a corrosive agent. The oxidizing agent oxidizes the portion of the surface adjacent to the precious metal, and the corrosive agent dissolves and removes the oxide. Therefore, under the action of the catalytic layer, the etching agent can etch the surface of the semiconductor substrate in a direction perpendicular to the surface (e.g., in the z-axis direction). As a result, a recess 2 (e.g., a trench) having a depth in the z-axis direction can be formed in the semiconductor substrate 1, as shown in FIG. 2 . The recessed portion (trench) 2 extends along the y-axis direction. A plurality of recessed portions (trench) 2 may be provided at intervals along the x-axis direction.

[0015] Here, examples of the catalyst layer, mask layer and etching agent are as follows:

[0016] The mask layer may be made of, for example, organic materials such as polyimide, fluororesin, phenolic resin, acrylic resin, and novolac resin, or inorganic materials such as silicon oxide and silicon nitride.

[0017] In the catalyst layer, the noble metal may be present as noble metal particles, for example, one or more metals selected from the group consisting of Au, Ag, Pt, Pd, Ru, and Rh.

[0018] The thickness of the catalyst layer is preferably in the range of 0.01 μm to 0.3 μm, and more preferably in the range of 0.05 μm to 0.2 μm. If the catalyst layer is too thick, the etching agent has difficulty reaching the semiconductor, and etching proceeds slowly. If the catalyst layer is too thin, the ratio of the total surface area of ​​the precious metal particles to the area to be etched is too small, and etching proceeds slowly.

[0019] The thickness of the catalyst layer is the distance from one main surface of the catalyst layer to the opposite main surface in an image of a cross section parallel to the thickness direction thereof observed with a scanning electron microscope (SEM).

[0020] The catalyst layer may have discontinuous portions.

[0021] The noble metal particles are preferably spherical in shape, but may also have other shapes, such as rods or plates, and act as catalysts for the oxidation reaction of the semiconductor surface in contact with them.

[0022] The particle size of the noble metal particles is preferably in the range of 0.001 μm to 1 μm, and more preferably in the range of 0.01 μm to 0.5 μm.

[0023] Here, the "particle size" is a value obtained by the following method. First, the main surface of the catalyst layer is photographed using a scanning electron microscope. The magnification is set to a range of 10,000 to 100,000 times. Next, the area of ​​each precious metal particle is determined from the image. Next, assuming that each precious metal particle is spherical, the diameter of the precious metal particle is determined from the area. This diameter is defined as the "particle size" of the precious metal particle.

[0024] The catalyst layer may be a porous catalyst layer.

[0025] The catalyst layer can be formed by, for example, electrolytic plating, reduction plating, or displacement plating. The catalyst layer may be formed by applying a dispersion containing precious metal particles or by a vapor-phase deposition method such as vapor deposition or sputtering. Among these methods, displacement plating can deposit precious metals directly and uniformly on the surface of a semiconductor. The formation of a porous catalyst layer by displacement plating will be described below as an example.

[0026] For example, an aqueous solution of tetrachloroaurate (III) or silver nitrate can be used to deposit a precious metal by displacement plating. An example of this process is described below.

[0027] The displacement plating solution is, for example, a mixture of an aqueous solution of tetrachloroauric acid (III) tetrahydrate and hydrofluoric acid, which has the effect of removing native oxide films from semiconductor surfaces.

[0028] When a semiconductor substrate is immersed in a displacement plating solution, the native oxide film on the surface of the semiconductor substrate is removed and a precious metal, in this case gold, is deposited on the surface of the semiconductor substrate, thereby forming a porous catalyst layer.

[0029] The concentration of tetrachloroauric(III) acid tetrahydrate in the displacement plating solution is preferably in the range of 0.0001 mol / L to 0.01 mol / L, and the concentration of hydrogen fluoride in the displacement plating solution is preferably in the range of 0.1 mol / L to 6.5 mol / L.

[0030] The displacement plating solution may further contain a sulfur-based complexing agent, or may further contain glycine and citric acid.

[0031] The etching agent includes a corrosive agent and an oxidizing agent. The etching agent may include water as a solvent. The etching agent may be an aqueous solution.

[0032] The etchant can dissolve oxides of the semiconductor substrate material. The oxides are, for example, SiO2. The etchant can be, for example, hydrofluoric acid or ammonium fluoride. One or more types of etchant can be used. In consideration of the etching rate, a etchant containing hydrofluoric acid is preferred.

[0033] The hydrogen fluoride concentration in the etching agent is preferably in the range of 0.4 mol / L to 20 mol / L, more preferably in the range of 0.8 mol / L to 16 mol / L, and even more preferably in the range of 2 mol / L to 10 mol / L. If the hydrogen fluoride concentration is too low, it is difficult to achieve a high etching rate. If the hydrogen fluoride concentration is too high, there is a possibility that the controllability of etching in the processing direction (e.g., the thickness direction of the semiconductor substrate) will decrease.

[0034] The oxidizing agent in the etching agent may be at least one selected from the group consisting of hydrogen peroxide, nitric acid, AgNO3, KAuCl4, HAuCl4, K2PtCl6, HPtCl6, Fe(NO3)3, Ni(NO3)2, Mg(NO3)2, Na2S2O8, K2S2O8, KMnO4, and K2Cr2O7. Hydrogen peroxide is preferred as the oxidizing agent because it does not produce harmful by-products and does not contaminate semiconductor elements.

[0035] The concentration of the oxidizing agent, such as hydrogen peroxide, in the etching agent is preferably in the range of 0.2 mol / L to 8 mol / L, more preferably in the range of 0.5 mol / L to 5 mol / L, and even more preferably in the range of 0.5 mol / L to 4 mol / L. If the oxidizing agent concentration is too low, it is difficult to achieve a high etching rate. If the oxidizing agent concentration is too high, excessive side etching may occur.

[0036] When a recess is formed using the MacEtch method, etching proceeds along the catalyst. However, due to porosity or unevenness during formation, the catalyst layer does not completely cover the portion of the semiconductor substrate where the recess is to be formed, and some uncovered areas may remain. In the partially uncovered areas, processing does not proceed, and needle-like, elongated semiconductor substrate material 3 (e.g., acicular silicon) remains on the inner bottom surface 2a of the formed recess 2, as shown in Figure 2. For convenience of explanation, Figure 2 omits the catalyst layer and mask layer. For example, when a dielectric layer is formed on the recess 2 to manufacture a capacitor, the acicular semiconductor substrate material 3 may break, causing cracks in the dielectric layer and resulting in leakage defects. Furthermore, the presence of the acicular semiconductor substrate material 3 may form corners, which may lead to a decrease in breakdown voltage characteristics due to electric field concentration at the corners. To remove the acicular semiconductor substrate material 3, the following oxidation and oxide removal processes are performed. (Removal of catalyst layer and mask layer) Before the oxidation step, a step of removing the catalyst layer and the mask layer may be carried out.

[0037] The catalyst layer can be removed by, for example, washing with aqua regia, and the mask layer can be removed by, for example, washing with hot phosphoric acid.

[0038] If no residue of the mask layer is present, removal of the mask layer can be omitted. (oxidation) Of the inner surfaces of the recess 2, at least the bottom inner surface 2a is oxidized to form an oxide of the semiconductor substrate material. An example of the oxidation process is shown in FIG. 3. In FIG. 3, in addition to the bottom inner surface 2a of the recess 2, the sidewalls 2b are also oxidized. As a result, the surface layer 5 of the entire inner surface of the recess 2 is oxidized to form an oxide of the semiconductor substrate material. Furthermore, because the needle-shaped semiconductor substrate material 3 is thin, for example, several tens of nanometers, as the surface layer 5 of the inner surface of the recess 2 is oxidized, the entire needle-shaped semiconductor substrate material 3 is oxidized to form an oxide 4 of the needle-shaped semiconductor substrate material.

[0039] The oxidation method is not particularly limited, but examples thereof include thermal oxidation, anodic oxidation, and photo-oxidation. Thermal oxidation is oxidation carried out at high temperatures, and the temperature is preferably set to a temperature below the melting point of the semiconductor substrate material. Si, an example of a semiconductor substrate material, has a melting point of approximately 1400°C. Therefore, when a Si substrate (Si wafer) is used as the semiconductor substrate, the thermal oxidation temperature is preferably set to a temperature between 800°C and 1100°C. This allows for stable oxidation and a high rate of formation of the Si oxide film.

[0040] The oxygen gas supply rate during thermal oxidation is preferably 0.5 L / min to 10 L / min. The oxidation rate of the semiconductor substrate material (e.g., Si) varies depending on the partial pressure of oxygen gas in the oxygen-containing atmosphere. The higher the oxygen partial pressure, the higher the oxide generation rate tends to be, enabling stable oxidation. Furthermore, adding a small amount of Cl2 and / or HCl gas to the oxygen-containing atmosphere can promote oxidation. HCl gas may be added at approximately 1 to 10% in the oxygen-containing atmosphere.

[0041] Anodic oxidation is a method of forming an oxide film on the surface of a semiconductor substrate by applying a potential to the semiconductor substrate as an anode in an electrolyte. Photo-oxidation is a local oxidation method using a laser. On the other hand, CVD (chemical vapor deposition) can form an oxide film (e.g., a silicon oxide film) on a semiconductor substrate, but it does not oxidize the semiconductor substrate itself. Therefore, with CVD, only an oxide film is formed on the needle-shaped semiconductor substrate material, and the needle-shaped semiconductor substrate material itself remains unoxidized. Therefore, only the oxide film on the needle-shaped semiconductor substrate material is removed in subsequent processes. (Oxide removal) The oxides of the semiconductor substrate material formed by the above oxidation can be removed using a liquid (treatment liquid) capable of dissolving oxides of the semiconductor substrate material. This makes it possible to remove needle-like portions and other fine irregularities on the inner bottom surface 2a of the recess 2, as shown in Figure 4. The treatment liquid only needs to come into contact with the portion of the semiconductor substrate to be treated, and for example, the semiconductor substrate can be immersed in the treatment liquid.

[0042] An example of a liquid capable of dissolving oxides of semiconductor substrate materials is hydrofluoric acid (hydrogen fluoride aqueous solution). The concentration of hydrofluoric acid can be 0.1 mol / L or more and 5 mol / L or less. By setting the concentration of hydrofluoric acid within this range, it is possible to promote dissolution of oxides of semiconductor substrate materials while reducing damage to the upper end of a recess when it comes into contact with the liquid.

[0043] The method described above can be used to manufacture a structure including a semiconductor substrate having one or more recesses. A capacitor can be manufactured by forming electrodes on the semiconductor substrate of the resulting structure and, if necessary, providing an insulating layer or a dielectric layer. An example of a capacitor manufacturing method will be described with reference to FIG. 5. First, a first conductive layer 13, which serves as a lower electrode, is formed by doping a surface region of the semiconductor substrate 1 (including the inner surface of the recess) with P-type or N-type impurities. Next, a dielectric layer 14 is formed on the first conductive layer 13. The dielectric layer 14 is made of, for example, an organic dielectric or an inorganic dielectric. The dielectric layer 14 can be formed by, for example, CVD (chemical vapor deposition). Alternatively, the dielectric layer can be formed by oxidizing, nitriding, or oxynitriding the surface of the first conductive layer.

[0044] Next, a second conductive layer 15, which is an upper electrode, is formed on the dielectric layer 14. The second conductive layer 15 is formed from a conductive layer made of, for example, polysilicon or metal.

[0045] The dielectric layer 14 is then patterned. Next, a metal layer is formed by sputtering or plating, and this is patterned to obtain internal electrodes (e.g., aluminum electrodes). After that, an insulating layer is formed. The insulating layer can be formed, for example, by combining film formation by CVD with photolithography. Next, external electrodes are formed on the insulating layer. The external electrodes can be formed, for example, by combining film formation by sputtering or plating with photolithography. The structure thus obtained is then diced to obtain a capacitor.

[0046] According to the first embodiment described above, it is possible to provide a method for manufacturing a structure and a method for manufacturing a capacitor that can eliminate defects that may occur when processing a recess in a semiconductor substrate. (Second embodiment) According to a second embodiment, there are provided a method for manufacturing a second structure and a method for manufacturing a second capacitor. These manufacturing methods respectively include forming a recess in a semiconductor substrate, forming an oxide containing impurities on at least the inner bottom surface of the recess, heating the semiconductor substrate in the presence of oxygen gas to dope the semiconductor substrate with the impurities and form an oxide of the semiconductor substrate material on at least the inner bottom surface of the recess, and removing the oxide of the semiconductor substrate material by contacting at least the inner bottom surface of the recess with a liquid that can dissolve the oxide of the semiconductor substrate material.

[0047] Each step will be described below with reference to Figures 6 to 9. In each figure, the direction parallel to the thickness direction of the semiconductor substrate is the z-axis direction, and the plane parallel to the main surface of the semiconductor substrate is the xy plane. An example of forming a trench as the recess will be described.

[0048] (recess formation) The step of forming the recessed portion in the semiconductor substrate can be carried out in the same manner as described in the first embodiment. (Removal of catalyst layer and mask layer) Before forming the oxide containing impurities, a step of removing the catalyst layer and the mask layer may be performed in the same manner as described in the first embodiment.

[0049] (Formation of oxides containing impurities) An impurity-containing oxide is formed on at least the bottom inner surface of the recess. An example of this process is shown in Figure 6. An impurity-containing oxide layer 6 is formed on the entire inner surface of the recess 2. As a result, an impurity-containing oxide layer 6 is also formed on the needle-shaped semiconductor substrate material 3. The impurity-containing oxide layer 6 may be formed only on the bottom inner surface where the needle-shaped semiconductor substrate material 3 may be present, or it may be formed on the entire inner surface of the recess 2, or it may be formed on the entire inner surface and the main surface of the semiconductor substrate 1. When forming the impurity-containing oxide layer 6 on the entire inner surface of the recess 2 and the main surface of the semiconductor substrate 1, areas other than the target area may be covered with a mask layer and then heated in the presence of oxygen gas to prevent areas other than the target area from being oxidized in a later process.

[0050] The method for forming the oxide containing impurities is not particularly limited, and examples thereof include CVD (chemical vapor deposition), LPCVD (low pressure chemical vapor deposition), and ion implantation.

[0051] The impurities are not particularly limited as long as they can reduce the resistance of the substrate, but examples include P-type impurities (e.g., B (boron)), N-type impurities (e.g., P (phosphorus), As (arsenic)), etc.

[0052] When P (phosphorus) is used as an impurity and an oxide containing P is formed by CVD, the following conditions can be used. The source gas contains a P compound gas, and may optionally contain N2 gas as a dilution gas and O2 gas as an oxidation gas. Examples of P compound gas include POCl3 gas, PH3 gas, and PF5 gas.

[0053] The flow rates of the source gases can be set within the following ranges, for example: The flow rate of the P compound gas, such as POCl3 gas, can be 0.5 L / min or more and 1 L / min or less; the flow rate of the N2 gas can be 5 L / min or more and 30 L / min or less; and the flow rate of the O2 gas can be 0.5 L / min or more and 5 L / min or less.

[0054] The treatment temperature can be in the range of 900° C. to 1200° C. The treatment time can be in the range of 20 minutes to 60 minutes. (impurity doping and oxidation) By heating the semiconductor substrate in the presence of oxygen gas, the semiconductor substrate is doped with impurities and an oxide of the semiconductor substrate material is formed on at least the inner bottom surface of the recess. An example of this process is shown in FIG. 7. When the semiconductor substrate 1 on which the impurity-containing oxide layer 6 has been formed is heated in the presence of oxygen gas, the semiconductor substrate material (e.g., Si) in the surface layer 7, including the inner surface of the recess 2 of the semiconductor substrate 1, is oxidized. Because the needle-shaped semiconductor substrate material 3 is thin, e.g., several tens of nanometers, as the surface layer 7 of the semiconductor substrate 1 is oxidized, the entire needle-shaped semiconductor substrate material 3 is oxidized, becoming an oxide of the needle-shaped semiconductor substrate material. During this oxidation, thermal diffusion of the impurities occurs, and the impurities are doped from the surface layer 7, including the inner surface of the recess 2 of the semiconductor substrate 1, to the inner region 8. The surface layer 7 and inner region 8, which are doped with the impurities, have low resistance.

[0055] The heating temperature is preferably set to a temperature equal to or lower than the melting point of the semiconductor substrate material. Si, an example of a semiconductor substrate material, has a melting point of approximately 1400°C. Therefore, when using a Si substrate (Si wafer) as the semiconductor substrate, the heating temperature is preferably set to a temperature between 900°C and 1350°C. This allows for stable oxidation and promotes the diffusion of impurities.

[0056] Heating can be performed in an atmosphere containing N2 gas and O2 gas. The oxygen gas supply rate is preferably 0.5 L / min to 5 L / min. The oxidation rate of the semiconductor substrate material (e.g., Si) varies depending on the partial pressure of oxygen gas in the atmosphere, and the higher the oxygen partial pressure, the higher the oxide generation rate tends to be, enabling stable oxidation. In addition, the nitrogen gas supply rate is preferably 5 L / min to 30 L / min. (Oxide removal) A liquid (treatment liquid) capable of dissolving oxides of the semiconductor substrate material is brought into contact with the surface layer 7 (including the needle-like portions) of the semiconductor substrate 1 to remove the oxides of the semiconductor substrate material present in the surface layer 7. The treatment liquid only needs to come into contact with the portion of the semiconductor substrate to be treated, and for example, the semiconductor substrate can be immersed in the treatment liquid. As a result, as shown in FIG. 8, it is possible to remove oxides containing impurities remaining in the semiconductor substrate 1, in addition to the needle-like portions on the inner bottom surface of the recess 2 and other fine irregularities. Note that the region 8 of the impurity-doped region where the semiconductor substrate remains unoxidized is not dissolved in the treatment liquid and remains on the semiconductor substrate 1.

[0057] Examples of the liquid capable of dissolving oxides of the semiconductor substrate material include the same liquids as those described in the first embodiment.

[0058] The method described above allows for the manufacture of a structure including a semiconductor substrate having one or more recesses. A method for manufacturing a capacitor using this structure will be described with reference to FIG. 9. The impurity-doped region 8 formed by the above method becomes a first conductive layer. A dielectric layer 14 is formed on the first conductive layer 8. The dielectric layer 14 can be formed in the same manner as described in the first embodiment. Next, a second conductive layer 15, which is the upper electrode of the capacitor, is formed on the dielectric layer 14. The second conductive layer 15 can be formed in the same manner as described in the first embodiment.

[0059] The subsequent steps can be carried out in the same manner as described in the first embodiment, and a capacitor is obtained.

[0060] According to the method for manufacturing a structure and a method for manufacturing a capacitor of the second embodiment described above, it is possible to remove the needle-like portions during the process of doping impurities into the semiconductor substrate, thereby efficiently eliminating defects that may occur during recess processing.

[0061] 10 shows a scanning electron microscope photograph showing the state of the bottom of the recess (in this case, a trench) after the recess formation process in the methods of the first and second embodiments. Fig. 10 is a scanning electron microscope photograph showing an enlarged view of the bottom of the trench in a cross section of the semiconductor substrate (e.g., a Si wafer) 1 cut along the z-axis direction (thickness direction). As shown in Fig. 10, it can be seen that multiple needle-like Si 3 protrude upward from the bottom surface of the trench 2.

[0062] Following the method of the second embodiment, the needle-like Si was removed and the dielectric layer and second conductive layer were formed, followed by scanning electron microscope observation. P was used as the impurity, and a P-containing oxide layer was formed by CVD. An example of the observation results is shown in FIG. 11. FIG. 11 is a scanning electron microscope photograph showing an enlarged view of the bottom of a trench in a cross section of a Si wafer (semiconductor substrate 1) cut along the z-axis direction (thickness direction). As shown in FIG. 11, no needle-like Si was observed on the bottom surface of the trench 2, and it was confirmed that the dielectric layer and second conductive layer were free of defects such as corners.

[0063] Furthermore, after removing the needle-like silicon and forming the first conductive layer, dielectric layer, and second conductive layer according to the method of the first embodiment, scanning electron microscope observation revealed that no needle-like silicon was observed on the bottom surface of the trench, and it was confirmed that the dielectric layer and the second conductive layer had no defects such as corners. Note that the oxidation used to remove the needle-like silicon was performed by thermal oxidation.

[0064] On the other hand, when the needle-like Si was removed by immersion in a processing solution 21 made of fluoronitric acid or an alkaline aqueous solution, as shown in Fig. 12, rather than by the methods of the first and second embodiments, some of the needle-like Si3 remained. Furthermore, when the wafer was immersed in the processing solution 21 for a long time in order to completely remove the needle-like Si3, damage such as the formation of pores at the upper ends of the trenches occurred.

[0065] According to at least one of the above-described embodiments, the method includes forming an oxide of the semiconductor substrate material on at least the bottom inner surface of the recess, and bringing a liquid capable of dissolving the oxide of the semiconductor substrate material into contact with at least the bottom inner surface of the recess, thereby eliminating defects that may occur during recess processing.

[0066] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. The inventions described in the original claims of this application are set forth below. [1] forming a recess in a semiconductor substrate; oxidizing at least the bottom inner surface of the recess; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess. A method for manufacturing a structure, comprising: [2] forming a recess in a semiconductor substrate; forming an oxide containing impurities on at least the inner bottom surface of the recess; heating the semiconductor substrate in the presence of oxygen gas; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess. A method for manufacturing a structure, comprising: [3] The method for producing a structure according to [1] or [2], wherein the recesses are formed in the semiconductor substrate by etching using a catalyst containing a noble metal. [4] The method for producing a structure according to any one of [1] to [3], wherein the semiconductor substrate is a Si substrate, and the oxide of the semiconductor substrate material is a Si oxide. [5] The method for producing a structure according to [4], wherein the liquid capable of dissolving the oxide of the semiconductor substrate material contains hydrogen fluoride. [6] A structure including a semiconductor substrate having a recess is produced by the method according to any one of [1] to [5]. forming a conductive or dielectric layer in the recess of the semiconductor substrate. [Explanation of symbols]

[0067] 1...semiconductor substrate, 2...recess, 2a...inner bottom surface of recess, 2b...side wall of recess, 3...needle-shaped semiconductor substrate material, 4...oxide of needle-shaped semiconductor substrate material, 5...surface layer, 6...oxide layer containing impurities, 7...surface layer, 8...impurity-doped region, 11...catalyst layer, 12...mask layer.

Claims

1. forming a recess in a semiconductor substrate; oxidizing at least the bottom inner surface of the recess; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess. wherein the recess is formed in the semiconductor substrate by etching using a catalyst containing a noble metal.

2. forming a recess in a semiconductor substrate; forming an oxide containing impurities on at least the inner bottom surface of the recess; heating the semiconductor substrate in the presence of oxygen gas; bringing a liquid capable of dissolving oxides of the semiconductor substrate material into contact with at least the inner bottom surface of the recess. wherein the recess is formed in the semiconductor substrate by etching using a catalyst containing a noble metal.

3. 3. The method for manufacturing a structure according to claim 1, wherein the semiconductor substrate is a Si substrate, and the oxide of the semiconductor substrate material is a Si oxide.

4. 4. The method for manufacturing a structure according to claim 3, wherein the liquid capable of dissolving the oxide of the semiconductor substrate material contains hydrogen fluoride.

5. A structure comprising a semiconductor substrate having a recess is produced by the method according to any one of claims 1 to 4; forming a conductive or dielectric layer in the recess of the semiconductor substrate.

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