Oscillator

Abstract

To provide an oscillator achieving an improvement in frequency-temperature characteristics and a reduction in noise.SOLUTION: An oscillator 4 includes: a resonator 10; an oscillation circuit 30 configured to oscillate the resonator 10; a first temperature compensation circuit 40 configured to perform a first temperature compensation processing of temperature-compensating for a frequency of a first clock signal CK1 generated by oscillation of the resonator 10 by the oscillation circuit 30; and a second temperature compensation circuit 110 configured to receive the first clock signal CK1 subjected to the first temperature compensation processing, and to output a second clock signal CK2 subjected to a second temperature compensation processing based on the first clock signal CK1. The first temperature compensation circuit 40 is configured to perform a first-order first temperature compensation processing as the first temperature compensation processing. and the second temperature compensation circuit 110 is configured to perform a high-order second temperature compensation processing as the second temperature compensation processing.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an oscillator and the like. [Background technology]

[0002] In oscillators that oscillate a resonator such as a quartz crystal resonator, temperature compensation processing is performed on the oscillation frequency. For example, Patent Document 1 discloses an oscillator including a first circuit device and a second circuit device. The first circuit device oscillates the resonator to generate a first clock signal and performs a first temperature compensation processing to temperature compensate the frequency of the first clock signal. The second circuit device receives the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs a second temperature compensation processing to temperature compensate the frequency of the second clock signal. By using this configuration, Patent Document 1 realizes an oscillator with reduced frequency micro-jumps. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-136941 Summary of the Invention [Problem to be solved by the invention]

[0004] In the prior art of Patent Document 1, most of the frequency temperature characteristics of the vibrator are compensated for within the oscillation loop by the first circuit device, which requires a high frequency tuning sensitivity of the oscillation circuit, which may degrade phase noise, especially noise near the carrier frequency. [Means for solving the problem]

[0005] One aspect of the present disclosure relates to an oscillator including: a vibrator; an oscillation circuit that oscillates the vibrator; a first temperature compensation circuit that performs a first temperature compensation process to temperature-compensate the frequency of a first clock signal generated by oscillation of the vibrator by the oscillation circuit; and a second temperature compensation circuit that receives the first clock signal that has undergone the first temperature compensation process and outputs a second clock signal that has undergone a second temperature compensation process based on the first clock signal, wherein the first temperature compensation circuit performs a first-order first temperature compensation process as the first temperature compensation process, and the second temperature compensation circuit performs a higher-order second temperature compensation process as the second temperature compensation process. [Brief explanation of the drawings]

[0006] [Figure 1] 3 shows an example of the configuration of an oscillator according to the present embodiment. [Figure 2] 3 shows a detailed configuration example of the oscillator of the present embodiment. [Figure 3] An explanatory diagram of oscillator mode settings and sensitivity settings. [Figure 4] An explanatory diagram of oscillator mode settings and sensitivity settings. [Figure 5] FIG. 10 is a diagram showing the relationship between the temperature of a circuit device and the temperature of a vibrator. [Figure 6] An explanatory diagram of temperature compensation processing in OCXO. [Figure 7] An example of the frequency temperature characteristics of a circuit element in an oscillator circuit. [Figure 8] FIG. 10 is a diagram illustrating phase noise characteristics. [Figure 9] FIG. 10 is a diagram illustrating phase noise characteristics. [Figure 10] FIG. 4 is an explanatory diagram of the frequency temperature characteristics of a circuit element of an oscillator circuit. [Figure 11] 1 shows an example of the configuration of the first temperature compensation circuit. [Figure 12] 10 shows an example of the configuration of a second temperature compensation circuit. [Figure 13] An example of a variable capacitance circuit configuration with variable capacitance sensitivity. [Figure 14] 1 shows an example of the configuration of an oscillator including a first circuit device and a second circuit device. [Figure 15]10 is another example of an oscillator configuration including a first circuit device and a second circuit device. [Figure 16] An example of a jitter cleaning circuit configuration. [Figure 17] An example of oscillator structure. [Figure 18] An example of oscillator structure. [Figure 19] An example of the structure when the oscillator is an OCXO. DETAILED DESCRIPTION OF THE INVENTION

[0007] The present embodiment will be described below. Note that the present embodiment described below does not unduly limit the content of the claims. Furthermore, not all of the configurations described in the present embodiment are necessarily essential components.

[0008] 1. Oscillator 1 shows an example of the configuration of an oscillator 4 of this embodiment. The oscillator 4 of this embodiment includes a resonator 10, an oscillation circuit 30, a first temperature compensation circuit 40, and a second temperature compensation circuit 110.

[0009] The vibrator 10 is an element that generates mechanical vibrations in response to an electrical signal. The vibrator 10 can be realized by a vibrating piece such as a quartz crystal vibrating piece. For example, the vibrator 10 can be realized by a quartz crystal vibrating piece that vibrates in a thickness-shear mode, such as an AT-cut or SC-cut cut angle, a tuning-fork type quartz crystal vibrating piece, or a double-ended tuning-fork type quartz crystal vibrating piece. For example, the vibrator 10 may be a vibrator built into a temperature-compensated crystal oscillator (TCXO) that does not have a thermostatic oven, or a vibrator built into an oven-controlled crystal oscillator (OCXO) that has a thermostatic oven. Note that the vibrator 10 of this embodiment can also be realized by various vibrating pieces, such as a vibrating piece other than a thickness-shear type, tuning-fork type, or double-ended tuning-fork type, or a piezoelectric vibrating piece made of a material other than quartz. For example, the vibrator 10 can be a surface acoustic wave (SAW) resonator or a micro-electromechanical systems (MEMS) resonator, which is a silicon vibrator formed using a silicon substrate.

[0010] The oscillator circuit 30 is a circuit that oscillates the resonator 10. For example, the oscillator circuit 30 generates an oscillation signal by oscillating the resonator 10. The oscillation signal is an oscillation clock signal. For example, the oscillator circuit 30 can be realized by an oscillation driver circuit electrically connected to one end and the other end of the resonator 10, and passive elements such as capacitors and resistors. The driver circuit can be realized, for example, by a CMOS inverter circuit or a bipolar transistor. The driver circuit is the core circuit of the oscillator circuit 30, and the driver circuit drives the resonator 10 with voltage or current, causing it to oscillate. Various types of oscillator circuits, such as inverter type, Pierce type, Colpitts type, or Hartley type, can be used as the oscillator circuit 30. The oscillator circuit 30 also includes a variable capacitance circuit, the capacitance of which can be adjusted to adjust the oscillation frequency. The variable capacitance circuit can be realized, for example, by a variable capacitance element such as a varactor. For example, the variable capacitance circuit can be realized by a variable capacitance element whose capacitance is controlled based on a temperature compensation voltage. Alternatively, the variable capacitance circuit may be realized by a capacitor array and a switch array connected to the capacitor array. In this case, the capacitance of the variable capacitance circuit is controlled by turning on or off a plurality of switches included in the switch array using, for example, a digital control signal. Note that the connection in this embodiment is an electrical connection. An electrical connection is a connection that allows electrical signals to be transmitted, and is a connection that enables the transmission of information by electrical signals. The electrical connection may be a connection via a passive element or the like.

[0011] The first temperature compensation circuit 40 performs a first temperature compensation process. Specifically, the first temperature compensation circuit 40 performs a first temperature compensation process to temperature-compensate the frequency of the first clock signal CK1 generated by the oscillation of the resonator 10 by the oscillation circuit 30. The first temperature compensation process is, for example, a process to suppress and compensate for fluctuations in the frequency of the first clock signal CK1 due to temperature fluctuations. For example, the first temperature compensation process is an analog temperature compensation process using an analog temperature compensation circuit. The first clock signal CK1 is a clock signal based on an oscillation signal generated by the oscillation circuit 30 vibrating the resonator 10. For example, the oscillation signal generated by the oscillation circuit 30 is waveform-shaped by a waveform shaping circuit to generate a square-wave clock signal, and this clock signal is buffered by an output circuit and output to the second temperature compensation circuit 110 as the first clock signal CK1.

[0012] The second temperature compensation circuit 110 performs a second temperature compensation process. Specifically, the second temperature compensation circuit 110 receives a first clock signal CK1 that has been subjected to a first temperature compensation process, and outputs a second clock signal CK2 that has been subjected to a second temperature compensation process based on the first clock signal CK1. The second temperature compensation process is, for example, a process that suppresses and compensates for fluctuations in the frequency of the second clock signal CK2 due to temperature fluctuations. For example, the second temperature compensation process is digital temperature compensation using a digital circuit. The second clock signal CK2 output by the second temperature compensation circuit 110 may have a different frequency from the first clock signal CK1, or the same frequency as the first clock signal CK1.

[0013] The first temperature compensation circuit 40 performs a first-order first temperature compensation process as the first temperature compensation process, while the second temperature compensation circuit 110 performs a higher-order second temperature compensation process as the second temperature compensation process.

[0014] For example, as the first temperature compensation process, the first temperature compensation circuit 40 performs a process of compensating for frequency-temperature characteristics other than the frequency-temperature characteristics of the resonator 10. For example, the first temperature compensation circuit 40 performs a temperature compensation process for the frequency-temperature characteristics of circuit elements provided in the oscillation circuit 30 as frequency-temperature characteristics other than the frequency-temperature characteristics of the resonator 10. The circuit elements are active elements such as transistors, or passive elements such as resistors and capacitors. As a process of compensating for frequency-temperature characteristics other than the frequency-temperature characteristics of the resonator 10, first-order temperature compensation process is suitable.

[0015] On the other hand, the second temperature compensation circuit 110 performs a high-order second temperature compensation process to primarily compensate for the frequency-temperature characteristic of the resonator 10. The second temperature compensation circuit 110 is only required to perform at least a high-order second temperature compensation process, and can also perform a first-order second temperature compensation process. For example, if the resonator 10 has a high-order frequency-temperature characteristic, such as a third-order or fifth-order, the second temperature compensation circuit 110 performs a second temperature compensation process to compensate for this high-order frequency-temperature characteristic. For example, the second temperature compensation circuit 110 performs a second temperature compensation process to temperature-compensate for the remaining frequency-temperature characteristic that could not be temperature-compensated by the first temperature compensation process performed by the first temperature compensation circuit 40. For example, if the resonator 10 has a high-order frequency-temperature characteristic, the high-order frequency-temperature characteristic of the resonator 10 will remain uncompensated by the first-order first temperature compensation process performed by the first temperature compensation circuit 40. However, the second temperature compensation circuit 110 performs a second temperature compensation process to temperature-compensate for this remaining frequency-temperature characteristic. For example, the second temperature compensation circuit 110 performs a second temperature compensation process on the first clock signal CK1 after the first temperature compensation process by the first temperature compensation circuit 40, to bring the frequency-temperature characteristics of the second clock signal CK2 within the required specifications of the oscillator 4. The frequency-temperature characteristics of the second clock signal CK2 being within the required specifications means, for example, that the frequency change of the second clock signal CK2 within the operating temperature range of the oscillator 4 is equal to or less than a specified value.

[0016] For example, in the prior art of Patent Document 1, most of the frequency-temperature characteristics of the resonator are compensated for within the oscillation loop by the first circuit device. This requires, for example, a high frequency tuning sensitivity for the oscillation circuit, which can increase phase noise, especially noise near the carrier frequency, and potentially worsen noise characteristics. On the other hand, if the amount of temperature compensation in the second circuit device is increased, the accuracy of the micro-jump and frequency-temperature characteristics is limited by the resolution of the digital temperature compensation. Thus, there is a trade-off between near-field noise and frequency-temperature characteristics.

[0017] In this embodiment, the first temperature compensation circuit 40 performs first-order first temperature compensation. Therefore, the first temperature compensation circuit 40 does not need to perform higher-order temperature compensation. This reduces phase noise, such as carrier frequency neighbor noise, that would otherwise be caused by the high-order temperature compensation performed by the first temperature compensation circuit 40, thereby preventing deterioration of noise characteristics. Meanwhile, the second temperature compensation circuit 110 performs high-order second temperature compensation, thereby temperature-compensating for remaining high-order frequency-temperature characteristics that cannot be temperature-compensated by the first-order first temperature compensation performed by the first temperature compensation circuit 40. For example, the frequency-temperature characteristics of the circuit elements of the oscillation circuit 30 can be temperature-compensated by the first-order first temperature compensation performed by the first temperature compensation circuit 40, while the high-order frequency-temperature characteristics of the resonator 10 can be temperature-compensated by the second high-order second temperature compensation performed by the second temperature compensation circuit 110. This allows the frequency-temperature characteristics of the second clock signal CK2 to be within the required specifications, thereby realizing an oscillator 4 that can also reduce phase noise, such as neighbor noise.

[0018] Fig. 2 shows a detailed configuration example of the oscillator 4 of this embodiment. The first temperature compensation circuit 40 of the oscillator 4 in Fig. 2 performs first-order first temperature compensation processing as the first temperature compensation processing in the first mode, and performs first-order and higher-order first temperature compensation processing as the first temperature compensation processing in the second mode.

[0019] Specifically, as shown in FIG. 2 , the first temperature compensation circuit 40 includes a primary correction circuit 43 and a high-order correction circuit 44. The primary correction circuit 43 performs primary temperature compensation processing, and the high-order correction circuit 44 performs high-order temperature compensation processing. The primary correction circuit 43 and the high-order correction circuit 44 will be described in detail later with reference to FIG. 11 . In the first mode, for example, when the switch SA1 is turned on and the switch SA2 is turned off, the first temperature compensation circuit 40 performs primary first temperature compensation processing by the primary correction circuit 43. On the other hand, in the second mode, for example, when both the switch SA1 and the switch SA2 are turned on, the first temperature compensation circuit 40 performs primary first temperature compensation processing by the primary correction circuit 43 and high-order first temperature compensation processing by the high-order correction circuit 44.

[0020] In this manner, for example, when prioritizing reduction of phase noise, the oscillator 4 is set to the first mode. As a result, the first temperature compensation circuit 40 performs first-order first temperature compensation processing to output the first clock signal CK1, and the second temperature compensation circuit 110 performs high-order second temperature compensation processing based on the first clock signal CK1 that has undergone the first-order first temperature compensation processing to output the second clock signal CK2. In this manner, the first-order first temperature compensation processing of the first temperature compensation circuit 40 performs temperature compensation for, for example, the frequency-temperature characteristics of the circuit elements of the oscillation circuit 30. Furthermore, by disconnecting the high-order correction circuit 44 in the first mode, phase noise such as nearby noise caused by noise generated by the high-order correction circuit 44 can be reduced. Furthermore, the high-order frequency-temperature characteristics of the resonator 10 that could not be temperature-compensated by the first-order first temperature compensation processing of the first temperature compensation circuit 40 are temperature-compensated by the high-order second temperature compensation processing of the second temperature compensation circuit 110.

[0021] On the other hand, if improving the frequency-temperature characteristic is prioritized over reducing phase noise, the oscillator 4 is set to the second mode. This causes the first temperature compensation circuit 40 to perform first- and high-order first temperature compensation processing to output the first clock signal CK1, and the second temperature compensation circuit 110 to perform high-order second temperature compensation processing based on the first clock signal CK1 that has undergone the first- and high-order first temperature compensation processing to output the second clock signal CK2. This second mode increases phase noise, such as near-field noise caused by noise generated by the high-order correction circuit 44. However, this allows the high-order frequency-temperature characteristic of the resonator 10 to be temperature-compensated by both the first temperature compensation processing of the first temperature compensation circuit 40 and the second temperature compensation processing of the second temperature compensation circuit 110, thereby enabling stricter specification requirements for the frequency-temperature characteristic to be met. As shown in FIG. 2, the first temperature compensation circuit 40 can switch between the first mode, in which first-order first temperature compensation processing is performed, and the second mode, in which first- and high-order first temperature compensation processing is performed. As a result, when priority is given to reducing phase noise, this can be achieved by setting the oscillator 4 to the first mode, and when priority is given to improving the frequency-temperature characteristic, this can be achieved by setting the oscillator 4 to the second mode. Therefore, it is possible to realize an oscillator 4 that can handle both cases where priority is given to reducing phase noise and where priority is given to improving the frequency-temperature characteristic. Furthermore, the same first temperature compensation circuit 40 can be used for an oscillator 4 that is set to the first mode to prioritize reducing phase noise, and an oscillator 4 that is set to the second mode to prioritize improving the frequency-temperature characteristic. Therefore, it is possible to shorten the circuit design period, reduce costs, and the like.

[0022] Next, the configuration of the oscillator 4 in FIG. 2 will be described in more detail. In FIG. 2, the oscillator 4 is provided with a temperature sensor 48. The temperature sensor 48 is a sensor that detects temperature. Specifically, the temperature sensor 48 outputs a temperature-dependent voltage that changes according to the environmental temperature as the temperature detection voltage VTS. For example, the temperature sensor 48 generates the temperature detection voltage VTS, which is a temperature detection signal, by using a circuit element that has temperature dependency. Specifically, the temperature sensor 48 outputs the temperature detection voltage VTS, which changes depending on the temperature, by using, for example, the temperature dependency of the forward voltage of a PN junction. Note that a modification using a digital temperature sensor circuit as the temperature sensor 48 is also possible. In this case, the temperature detection data can be D / A converted to generate the temperature detection voltage VTS.

[0023] The first-order correction circuit 43 of the first temperature compensation circuit 40 receives the temperature detection voltage VTS from the temperature sensor 48 and performs first-order temperature compensation processing. The high-order correction circuit 44 of the first temperature compensation circuit 40 receives the temperature detection voltage VTS from the temperature sensor 48 and performs high-order temperature compensation processing. For example, in the second mode, a first-order correction current generated by the first-order correction circuit 43 based on the temperature detection voltage VTS and a high-order correction current generated by the high-order correction circuit 44 based on the temperature detection voltage VTS are added together, and the added current is converted into a voltage and output as the temperature-compensated voltage VCP.

[0024] The oscillator circuit 30 also includes a variable capacitance circuit 31. This variable capacitance circuit 31 is configured with a variable capacitance element such as a varactor. For example, a MOS-type variable capacitance element is a capacitance element in which the source and drain of a MOS (Metal Oxide Semiconductor) transistor are short-circuited, and the capacitance generated between the short-circuited source and drain and the gate is variably controlled by a temperature compensation voltage VCP, which is a capacitance control voltage. This MOS-type variable capacitance element is also called a MOS varactor. The capacitance of the variable capacitance circuit 31 is variably adjusted by controlling the capacitance of the variable capacitance element based on the temperature compensation voltage VCP from the first temperature compensation circuit 40. Adjusting the capacitance of the variable capacitance circuit 31 adjusts the oscillation frequency of the oscillator circuit 30, thereby achieving temperature compensation.

[0025] 2, the oscillator circuit 30 includes a variable capacitance circuit 31, and the first temperature compensation circuit 40 outputs a temperature compensation voltage VCP to the variable capacitance circuit 31 based on the temperature detection result of the temperature sensor 48. In this way, the first temperature compensation circuit 40 outputs a temperature compensation voltage VCP according to the temperature detection result, such as the temperature detection voltage VTS, from the temperature sensor 48, thereby changing the capacitance of the variable capacitance circuit 31 of the oscillator circuit 30, thereby realizing first temperature compensation processing of the first clock signal CK1 based on the oscillation signal of the oscillator circuit 30.

[0026] The first temperature compensation circuit 40 performs analog temperature compensation using, for example, polynomial approximation. For example, when the temperature compensation voltage VCP that compensates for the frequency-temperature characteristics of the vibrator 10 is approximated by a polynomial, the first temperature compensation circuit 40 performs analog temperature compensation based on the coefficient information of the polynomial in the second mode, which performs first-order and higher-order first temperature compensation processing. Analog temperature compensation is temperature compensation achieved, for example, by adding analog signals such as current signals and voltage signals. For example, when the temperature compensation voltage VCP is approximated by a high-order polynomial, the zeroth-order coefficient, first-order coefficient, and high-order coefficient of the polynomial are stored as zeroth-order correction data, first-order correction data, and high-order correction data, respectively, in a storage circuit realized, for example, by a nonvolatile memory. The high-order coefficients are, for example, coefficients of orders higher than first order, and the high-order correction data are correction data corresponding to the high-order coefficients. For example, when the temperature-compensated voltage VCP is approximated by a third-order polynomial, the zeroth-order coefficient, first-order coefficient, second-order coefficient, and third-order coefficient of the polynomial are stored in the storage circuit as zeroth-order correction data, first-order correction data, second-order correction data, and third-order correction data. Then, in the second mode, the first temperature compensation circuit 40 performs the first temperature compensation process based on the zeroth-order correction data to the third-order correction data. In this case, the second-order correction data and the temperature compensation based on the second-order correction data may be omitted. Also, when the temperature-compensated voltage VCP is approximated by a fifth-order polynomial, the zeroth-order coefficient, first-order coefficient, second-order coefficient, third-order coefficient, fourth-order coefficient, and fifth-order coefficient of the polynomial are stored in the storage circuit as zeroth-order correction data, first-order correction data, second-order correction data, third-order correction data, fourth-order correction data, and fifth-order correction data. Then, in the second mode, the first temperature compensation circuit 40 performs the first temperature compensation process based on the zeroth-order correction data to the fifth-order correction data. In this case, the second-order correction data or the fourth-order correction data, or the temperature compensation based on the second-order correction data or the fourth-order correction data, may be omitted. The degree of polynomial approximation is arbitrary, and for example, a polynomial approximation of a degree greater than 5 may be performed. The zeroth-order correction may be performed by the temperature sensor 48.

[0027] In this embodiment, the oscillator 4 is set to the first mode when used as an oven-controlled oscillator that controls the temperature of the resonator 10. For example, the oscillator 4 is set to the first mode when used as an oven-controlled oscillator that includes an oven. On the other hand, the oscillator 4 is set to the first mode or the second mode when used as a temperature-compensated oscillator that does not control the temperature of the resonator 10. For example, the oscillator 4 is set to the first mode or the second mode when used as a temperature-compensated oscillator that does not include an oven. Note that, for simplicity of explanation, hereinafter, an oven-controlled oscillator that controls the temperature of the resonator 10 will be referred to as an OCXO, and a temperature-compensated oscillator that does not control the temperature of the resonator 10 will be referred to as a TCXO.

[0028] FIG. 3 is an explanatory diagram of the mode and sensitivity settings of the oscillator 4. As shown in FIG. 3, when the oscillator 4 is used as an OCXO, an oven-controlled oscillator that controls the temperature of the resonator 10, it is set to the first mode. Accordingly, the first temperature compensation circuit 40 performs first-order first temperature compensation, and the second temperature compensation circuit 110 performs higher-order second temperature compensation. In an OCXO, a heater circuit 22 (described later in FIG. 15 ) is provided in the oscillator 4, and this heater circuit 22 maintains a constant temperature of the resonator 10. This improves the frequency-temperature characteristics, enabling frequency variation within the operating temperature range to be extremely small, on the order of a few ppb to several tens of ppb. Furthermore, by setting the oscillator 4 to the first mode when used as an OCXO, the first temperature compensation circuit 40 no longer performs higher-order first temperature compensation, thereby reducing nearby noise and improving noise characteristics, as shown in FIG. 3. Therefore, by setting the oscillator 4 to the first mode when used as an OCXO, it is possible to improve both the frequency-temperature characteristics and noise characteristics.

[0029] As shown in FIG. 3 , when the oscillator 4 is used as a TCXO, which is a temperature-compensated oscillator that does not control the temperature of the resonator 10, it is set to either the first mode or the second mode. For example, when the oscillator 4 is used as a TCXO and set to the first mode, the first temperature compensation circuit 40 performs first-order first temperature compensation processing, and the second temperature compensation circuit 110 performs higher-order second temperature compensation processing. As a result, as shown in FIG. 3 , the frequency-temperature characteristics are such that the frequency change within the operating temperature range is several hundred ppb to several ppm, but the nearby noise is reduced, resulting in improved noise characteristics. On the other hand, when the oscillator 4 is used as a TCXO and set to the second mode, the first temperature compensation circuit 40 performs first-order and higher-order first temperature compensation processing, and the second temperature compensation circuit 110 performs higher-order second temperature compensation processing. As a result, as shown in FIG. 3 , the frequency change within the operating temperature range is several tens ppb to several hundred ppb, resulting in improved frequency-temperature characteristics compared to the first mode. However, the nearby noise increases, resulting in worse noise characteristics compared to the first mode. In this way, when the oscillator 4 is used as a TCXO, it can be set to the first mode or the second mode, so that if priority is given to improving noise characteristics, it can be set to the first mode, and if priority is given to improving frequency-temperature characteristics, it can be set to the second mode.

[0030] For example, when the oscillator 4 is set to the second mode and the first temperature compensation circuit 40 performs first-order and higher-order first temperature compensation processes, a first temperature compensation process for coarse adjustment is performed. This reduces the amount of frequency fluctuation in the frequency-temperature characteristics of the first clock signal CK1 output from the first temperature compensation circuit 40. Then, when the second temperature compensation circuit 110 generates the second clock signal CK2 based on the first clock signal CK1 from the first temperature compensation circuit 40, it performs a second temperature compensation process for fine adjustment. In this way, by performing the first temperature compensation process for coarse adjustment by the first temperature compensation circuit 40 and then performing the second temperature compensation process for fine adjustment by the second temperature compensation circuit 110, it is possible to reduce frequency micro-jumps caused by fluctuations in the temperature measurement results, and thereby achieve high accuracy of the clock frequency of the oscillator 4.

[0031] When the oscillator 4 is used as a TCXO, the heater circuit 22 is not provided and the temperature of the vibrator 10 cannot be kept constant, so the frequency temperature characteristics are worse than when it is used as an OCXO, and the frequency change within the operating temperature range is large.

[0032] In this embodiment, as shown in FIG. 3, the capacitance sensitivity of the variable capacitance circuit 31 in FIG. 2 to the temperature-compensated voltage VCP is set lower in the first mode than in the second mode. The capacitance sensitivity is the sensitivity of the variable capacitance circuit 31 to the temperature-compensated voltage VCP, which is a capacitance control voltage. This capacitance sensitivity determines the frequency-voltage sensitivity of the oscillation frequency in the oscillation circuit 30. For example, as will be described later with reference to FIG. 13, the variable capacitance circuit 31 is configured to variably set its capacitance sensitivity to the temperature-compensated voltage VCP. Therefore, in the first mode, the capacitance sensitivity of the variable capacitance circuit 31 is set to a low sensitivity, thereby reducing the change in the oscillation frequency with respect to a change in the temperature-compensated voltage VCP. On the other hand, in the second mode, the capacitance sensitivity of the variable capacitance circuit 31 is set to a high sensitivity, thereby increasing the change in the oscillation frequency with respect to a change in the temperature-compensated voltage VCP.

[0033] For example, as the capacitance sensitivity of the variable capacitance circuit 31 increases, the oscillation frequency of the oscillator circuit 30 changes more significantly with changes in the temperature-compensated voltage VCP. Furthermore, because the temperature-compensated voltage VCP output by the first temperature compensation circuit 40 is also superimposed with noise, such as thermal noise and flicker noise, generated by the circuit elements constituting the first temperature compensation circuit 40, this noise is amplified by the high capacitance sensitivity of the variable capacitance circuit 31. Consequently, the oscillation frequency fluctuates due to noise, resulting in a deterioration in noise characteristics. Therefore, in the first mode, which prioritizes improving noise characteristics, the capacitance sensitivity of the variable capacitance circuit 31 is set to a low sensitivity, as shown in FIG. 3. This prevents the amplification of noise from the circuit elements constituting the first temperature compensation circuit 40, which in turn prevents the oscillation frequency from fluctuating due to noise, thereby preventing a deterioration in noise characteristics.

[0034] 3, the floor noise cannot be improved whether the oscillator 4 is used as an OCXO and set to the first mode, or whether the oscillator 4 is used as a TCXO and set to the first mode or the second mode. Therefore, in this embodiment, a jitter cleaning circuit 150 is provided that cleans the jitter of the second clock signal CK2, as will be described in detail later with reference to FIG. 16. By providing this jitter cleaning circuit 150, it is possible to reduce the jitter noise and also the floor noise, as shown in FIG. 4, thereby further improving the noise characteristics.

[0035] Next, the OCXO will be described in detail. For example, when the oscillator 4 is used as an OCXO, a heater circuit 22 is provided in the oscillator 4 as shown in FIG. 15, which will be described later. By providing this heater circuit 22, it becomes possible to maintain the temperature of the vibrator 10 at a constant temperature, such as 105°C, as shown in FIG. 5. In FIG. 5, the horizontal axis represents the ambient temperature. In the case of FIG. 5, the temperature of the circuit device changes depending on the ambient temperature.

[0036] The OCXO uses a resonator 10, such as an SC-cut resonator, having a frequency-temperature characteristic as shown in A1 of FIG. 6. In the frequency-temperature characteristic of the SC-cut resonator 10 in FIG. 6, the frequency f reaches a maximum at 105°C. The heater circuit 22 controls the temperature of the resonator 10 to maintain the temperature at 105°C. Therefore, the frequency-temperature characteristic is quadratic, as shown in A3, which is an enlarged view of A2 in FIG. 6. For example, as shown in A3 of FIG. 6, the frequency fluctuation of the SC-cut resonator 10 in the temperature range of 105°C to 106°C is approximately 1 ppb. Therefore, by using the heater circuit 22 to limit the temperature fluctuation of the resonator 10 to, for example, a range of 105°C to 106°C, the frequency fluctuation due to the frequency-temperature characteristic of the resonator 10 can be limited to approximately 1 ppb.

[0037] When the oscillator 4 is used as an OCXO and the first mode is set, the second temperature compensation circuit 110 performs a second temperature compensation process to temperature-compensate the second-order frequency-temperature characteristic shown in FIG. 6 . In this case, if the first-order frequency-temperature characteristic of the circuit elements of the oscillation circuit 30 remains in the first clock signal CK1, the second-order frequency-temperature characteristic of A3 in FIG. 6 will be tilted by this first-order frequency-temperature characteristic, resulting in large frequency fluctuations. In this regard, in this embodiment, as shown in FIGS. 3 and 4 , when the oscillator 4 is used as an OCXO, the first mode is set and the first temperature compensation circuit 40 performs a first-order first temperature compensation process. This first-order first temperature compensation process by the first temperature compensation circuit 40 temperature-compensates the first-order frequency-temperature characteristic of the circuit elements of the oscillation circuit 30, thereby reducing the first-order frequency-temperature characteristic remaining in the first clock signal CK1. For example, the first-order frequency temperature characteristic of the circuit elements of the oscillation circuit 30 has a frequency fluctuation of about 100 ppb between 105°C and 115°C as shown in Fig. 7, but this can be compensated for by the first-order first temperature compensation process of the first temperature compensation circuit 40. This makes it possible to suppress the inclination of the second-order frequency temperature characteristic in Fig. 6 due to the first-order frequency temperature characteristic, and to prevent an increase in frequency fluctuation caused by the first-order frequency temperature characteristic of the circuit elements of the oscillation circuit 30.

[0038] FIG. 8 is a diagram illustrating the effects of temperature compensation processing and capacitance sensitivity on phase noise. B1 in FIG. 8 shows the phase noise characteristics when the oscillator 4 is set to the first mode and the first temperature compensation circuit 40 performs first-order first temperature compensation processing. B2 in FIG. 8 shows the phase noise characteristics when the oscillator 4 is set to the second mode and the first temperature compensation circuit 40 performs first-order and higher-order first temperature compensation processing. By setting the oscillator 4 to the first mode as shown in B1 and causing the first temperature compensation circuit 40 to perform only first-order first temperature compensation processing, it is possible to reduce phase noise compared to when the oscillator 4 is set to the second mode as shown in B2 and causing first-order and higher-order second temperature compensation processing to be performed.

[0039] 8 shows the phase noise characteristics when the oscillator 4 is set to the first mode and the capacitance sensitivity of the variable capacitance circuit 31 is set to low sensitivity. In this way, by setting the oscillator 4 to the first mode, causing the first temperature compensation circuit 40 to perform first-order first temperature compensation processing, and setting the capacitance sensitivity of the variable capacitance circuit 31 to low sensitivity, it is possible to reduce the phase noise compared to B1 and B2.

[0040] Fig. 9 is an explanatory diagram of the effect of the jitter cleaning circuit 150, which will be explained later in Fig. 16. B4 in Fig. 9 shows the phase noise characteristics when the jitter cleaning circuit 150 is not used, and B5 in Fig. 9 shows the phase noise characteristics when the jitter cleaning circuit 150 is used. As shown in B5, by using the jitter cleaning circuit 150, floor noise, which is high-frequency noise, can be reduced, and it is possible to reduce it to the floor noise on the jitter cleaning circuit 150 side, for example.

[0041] FIG. 10 is an explanatory diagram of the frequency-temperature characteristics of the circuit elements of the oscillator circuit 30. As shown in FIG. 10, the oscillator circuit 30 includes a drive circuit 36 ​​that drives the resonator 10 and a current source circuit 35 that supplies current to the drive circuit 36. The drive circuit 36 ​​includes a bipolar transistor BP, the base of which is connected to a node N1 on one end of the resonator 10 and the collector of which is connected to a node N2 on the other end of the resonator 10. The emitter of the bipolar transistor BP is connected to the GND node. The current source circuit 35 includes P-type transistors TA and TB connected in a current mirror configuration and a current source IS. Also in FIG. 10, a variable capacitance circuit CVA is connected to the node N1 on one end of the resonator 10, and a variable capacitance circuit CVB is connected to the node N2 on the other end of the resonator 10. These variable capacitance circuits CVA and CVB are composed of variable capacitance elements such as varactors, and their capacitances are variably controlled by a temperature compensation voltage VCP from a first temperature compensation circuit 40. An electrostatic protection circuit 37 is connected to the node N1, and an electrostatic protection circuit 38 is connected to the node N2.

[0042] For example, the bipolar transistor BP in the drive circuit 36 ​​of the oscillator circuit 30 in Figure 10 has a first-order frequency-temperature characteristic due to fluctuations in junction capacitance indicated by CP1 and CP2. For example, the frequency temperature characteristic decreases as the temperature increases. The P-type transistor TB in the current source circuit 35 has a first-order frequency-temperature characteristic due to fluctuations in the gate-drain capacitance and drain-source capacitance indicated by CP3. The electrostatic protection circuits 37 and 38 have a first-order frequency-temperature characteristic due to fluctuations in parasitic capacitance indicated by CP4 and CP5. The electrostatic protection circuits 37 and 38 are composed of, for example, diodes and thyristors. Thus, the circuit elements constituting the drive circuit 36, current source circuit 35, and electrostatic protection circuits 37 and 38 of the oscillator circuit 30 all have first-order frequency-temperature characteristics. Of these frequency-temperature characteristics, the most dominant is that of the circuit elements in the drive circuit 36.

[0043] The first temperature compensation circuit 40 performs a first-order first temperature compensation process to temperature compensate for the frequency-temperature characteristics of the circuit elements of the oscillator circuit 30. For example, the first-order first temperature compensation process of the first temperature compensation circuit 40 performs temperature compensation for the frequency-temperature characteristics of the circuit elements of the drive circuit 36, which are dominant in the frequency-temperature characteristics of the circuit elements of the oscillator circuit 30. The first-order first temperature compensation process of the first temperature compensation circuit 40 can also perform temperature compensation for the frequency-temperature characteristics of circuit elements such as the current source circuit 35 and the electrostatic protection circuits 37 and 38. In this way, the first-order frequency-temperature characteristics of the first clock signal CK1, which are caused by the frequency-temperature characteristics of the circuit elements of the oscillator circuit 30, can be temperature compensated by the first-order first temperature compensation process of the first temperature compensation circuit 40, thereby reducing frequency fluctuations due to temperature fluctuations. This also reduces frequency fluctuations due to temperature fluctuations of the second clock signal CK2 output by the oscillator 4 based on the first clock signal CK1.

[0044] Furthermore, the second temperature compensation circuit 110 performs temperature compensation for the frequency-temperature characteristic of the resonator 10 by a high-order second temperature compensation process. In this way, when the resonator 10 has a high-order frequency-temperature characteristic such as a third-order or fifth-order frequency-temperature characteristic, this high-order frequency-temperature characteristic can be temperature-compensated by the high-order second temperature compensation process of the second temperature compensation circuit 110, thereby making it possible to reduce frequency fluctuations due to temperature fluctuations. This makes it possible to reduce frequency fluctuations of the second clock signal CK2 output by the oscillator 4 due to temperature fluctuations.

[0045] 2.First temperature compensation circuit FIG. 11 shows an example configuration of the first temperature compensation circuit 40. Note that the following description will mainly focus on an example in which the first temperature compensation circuit 40 performs first-order and higher-order first temperature compensation processing in the second mode. Although not shown in FIG. 11, the first temperature compensation circuit 40 actually includes circuits corresponding to the switches SA1 and SA2 in FIG. 2. Furthermore, the first temperature compensation circuit 40 is not limited to the configuration shown in FIG. 11, and various modifications are possible, such as omitting some of the components, adding other components, or replacing some components with other components.

[0046] The first temperature compensation circuit 40 is a circuit that outputs a temperature-compensated voltage VCP by polynomial approximation using temperature as a variable. The first temperature compensation circuit 40 includes a current generation circuit 42 and a current-voltage conversion circuit 46. The current generation circuit 42 generates a function current based on the temperature detection result of a temperature sensor 48. For example, the current generation circuit 42 generates a function current for temperature compensation of the frequency-temperature characteristics of the vibrator 10 based on a temperature detection voltage VTS, which is the temperature detection result from the temperature sensor 48. The current-voltage conversion circuit 46 then converts the function current from the current generation circuit 42 into a voltage and outputs the temperature-compensated voltage VCP. Specifically, the current-voltage conversion circuit 46 outputs the temperature-compensated voltage VCP using an amplifier circuit AM.

[0047] The current generating circuit 42 includes a primary correction circuit 43 and a high-order correction circuit 44. The primary correction circuit 43 outputs a primary current that approximates a linear function based on the temperature detection voltage VTS. For example, the primary correction circuit 43 outputs a linear function current based on primary correction data corresponding to a linear coefficient of a polynomial in the polynomial approximation. The primary correction circuit 43 includes, for example, an operational amplifier, a first variable resistance circuit, a second variable resistance circuit, and a third variable resistance circuit. The operational amplifier, the first variable resistance circuit, and the second variable resistance circuit form an amplifier circuit. The amplifier circuit amplifies the temperature detection voltage VTS based on, for example, a reference voltage VRC. The amplifier circuit outputs the primary current to an input node of the current-voltage conversion circuit 46 via the third variable resistance circuit.

[0048] The high-order correction circuit 44 outputs a high-order current that approximates a high-order function based on the temperature detection voltage VTS to the current-voltage conversion circuit 46. For example, the high-order correction circuit 44 outputs a high-order current based on high-order correction data corresponding to high-order coefficients of a polynomial in the polynomial approximation. As an example, the high-order correction circuit 44 outputs a cubic current that approximates a cubic function. In this case, the high-order correction circuit 44 includes a first differential circuit that performs a differential operation based on the temperature detection voltage VTS and a second differential circuit that performs a differential operation based on the output voltage of the first differential circuit and the temperature detection voltage VTS to output a cubic current. Note that in FIG. 11, the temperature sensor 48 performs offset correction of the temperature detection voltage VTS based on zero-order correction data corresponding to the zero-order coefficient of the polynomial. That is, the temperature sensor 48 adjusts the offset of the temperature detection voltage VTS by the amount indicated by the zero-order correction data. The offset correction of the temperature detection voltage VTS corresponds to zero-order correction in temperature compensation of the oscillation frequency. The high-order correction circuit 44 may further include a correction circuit that performs fourth-order or higher correction. For example, the high-order correction circuit 44 may further include a fourth-order correction circuit that outputs a fourth-order current that approximates a fourth-order function, and a fifth-order correction circuit that outputs a fifth-order current that approximates a fifth-order function.

[0049] The current-voltage conversion circuit 46 adds the primary current and the higher-order current and performs current-to-voltage conversion on the added current to output a temperature-compensated voltage VCP, thereby generating a temperature-compensated voltage VCP that approximates a polynomial function.

[0050] The current-voltage conversion circuit 46 includes an amplifier circuit AM, a resistor RC, and a capacitor CC. The amplifier circuit AM is realized by an operational amplifier. The resistor RC and the capacitor CC are connected in parallel between the output terminal and the inverting input terminal of the amplifier circuit AM. A reference voltage VRC is input to the non-inverting input terminal of the amplifier circuit AM. As a result, the current-voltage conversion circuit 46 outputs a temperature-compensated voltage VCP using, for example, the amplifier circuit AM operating in class A.

[0051] According to the first temperature compensation circuit 40 configured in this manner, the function current generated by the current generation circuit 42 based on the temperature detection result of the temperature sensor 48 can be converted into a voltage by the current-voltage conversion circuit 46 and output as a temperature-compensated voltage VCP.

[0052] 3.Second temperature compensation circuit Fig. 12 shows an example configuration of the second temperature compensation circuit 110. Note that the second temperature compensation circuit 110 is not limited to the configuration shown in Fig. 12, and various modifications are possible, such as omitting some of the components, adding other components, or replacing some of the components with other components.

[0053] In FIG. 12, the second temperature compensation circuit 110 includes a clock signal generation circuit 130 and a processing circuit 160. The second temperature compensation circuit 110 may also include an A / D conversion circuit 168 and a register 166. The A / D conversion circuit 168 performs A / D conversion of the temperature detection voltage ST and outputs digital temperature detection data DT. The register 166 stores a division ratio setting value VDIV. The register 166 can be realized, for example, by a flip-flop circuit. Alternatively, the register 166 may be realized by a memory such as RAM. The processing circuit 160 performs second temperature compensation processing based on the temperature detection data DT and outputs a division ratio setting signal SDIV to the clock signal generation circuit 130 as a digital frequency setting signal. For example, the processing circuit 160 outputs to the clock signal generation circuit 130 a division ratio setting signal SDIV that generates a second clock signal CK2 that has undergone second temperature compensation processing based on the temperature detection data DT from the A / D conversion circuit 168 and the division ratio setting value VDIV from the register 166.

[0054] The clock signal generation circuit 130 includes a PLL circuit 140 to which the first clock signal CK1 is input as a reference clock signal. The PLL circuit 140 is, for example, a fractional-N PLL circuit. The frequency divider circuit 147 performs frequency division processing using a division ratio set by a division ratio setting signal SDIV, which is a frequency setting signal.

[0055] As described above, the second temperature compensation circuit 110 includes a fractional-N PLL circuit 140 that generates the second clock signal CK2 by multiplying the frequency of the first clock signal CK1. Specifically, the second temperature compensation circuit 110 includes a fractional-N PLL circuit 140 to which the first clock signal CK1 is input as a reference clock signal, and the division ratio setting signal SDIV is input as a frequency setting signal to the divider circuit 147 of the PLL circuit 140. In this manner, the division ratio setting signal SDIV that has undergone the second temperature compensation process is input to the divider circuit 147 of the PLL circuit 140, thereby achieving a PLL operation that multiplies the frequency of the first clock signal CK1 and generating the second clock signal CK2 based on a signal whose frequency is multiplied by the first clock signal CK1. This allows the second clock signal CK2 that has undergone the second temperature compensation process to be generated based on the first clock signal CK1. Furthermore, by using the fractional-N type PLL circuit 140, it becomes possible to set not only an integer but also a fraction as the division ratio of the PLL circuit 140, and it becomes possible to generate the second clock signal CK2 of any frequency.

[0056] Next, a more detailed description will be given of the configuration of the clock signal generation circuit 130 of the second temperature compensation circuit 110 in Fig. 12. In Fig. 12, the clock signal generation circuit 130 includes a PLL circuit 140 and an output circuit 180.

[0057] The output circuit 180 outputs a second clock signal CK2 based on the clock signal CKQ output by the PLL circuit 140. For example, the output circuit 180 includes a frequency divider circuit (not shown) that divides the clock signal CKQ, thereby variably setting the frequency of the second clock signal CK2. This allows the user to set the frequency of the second clock signal CK2 to a desired frequency. The output circuit 180 also outputs the second clock signal CK2 to the outside in a signal format such as LVDS (Low Voltage Differential Signaling), PECL (Positive Emitter Coupled Logic), HCSL (High Speed ​​Current Steering Logic), or differential CMOS (Complementary MOS). For example, the output circuit 180 may be a circuit capable of outputting the second clock signal CK2 in at least two signal formats selected from LVDS, PECL, HCSL, and differential CMOS. In this case, the output circuit 180 outputs the second clock signal CK2 in the signal format set by the processing circuit 160.

[0058] The PLL circuit 140 receives the first clock signal CK1 as a reference clock signal and operates as a PLL (Phase Locked Loop). For example, the PLL circuit 140 generates a clock signal CKQ having a frequency that is multiplied by the frequency of the first clock signal CK1. That is, the PLL circuit 140 generates a highly accurate clock signal CKQ that is phase-synchronized with the first clock signal CK1. The PLL circuit 140 includes a phase comparator circuit 142, a control voltage generator circuit 144, a voltage-controlled oscillator circuit 146, and a frequency divider circuit 147.

[0059] The phase comparator circuit 142 performs a phase comparison between the first clock signal CK1, which is a reference clock signal, and the feedback clock signal FBCK. For example, the phase comparator circuit 142 compares the phases of the first clock signal CK1 and the feedback clock signal FBCK, and outputs a signal CQ corresponding to the phase difference between the first clock signal CK1 and the feedback clock signal FBCK as a signal representing the phase comparison result. The signal CQ corresponding to the phase difference is, for example, a pulse signal with a pulse width proportional to the phase difference.

[0060] The control voltage generation circuit 144 generates a control voltage VC2 based on the result of the phase comparison by the phase comparison circuit 142. For example, the control voltage generation circuit 144 performs charge pump operation and filtering based on the signal CQ of the phase comparison result from the phase comparison circuit 142, and generates the control voltage VC2 that controls the oscillation of the voltage-controlled oscillation circuit 146.

[0061] Voltage-controlled oscillator 146, which is a VCO (Voltage-controlled oscillator), generates a clock signal CKQ with a frequency corresponding to a control voltage VC2. For example, the voltage-controlled oscillator 146 generates the clock signal CKQ by oscillating based on the control voltage VC2 from control voltage generation circuit 144. For example, the voltage-controlled oscillator 146 generates the clock signal CKQ with a frequency that changes according to the control voltage VC2 through its oscillation. As an example, the voltage-controlled oscillator 146 has a variable capacitance element such as a varactor, and the capacitance of this variable capacitance element changes based on the control voltage VC2, thereby changing the frequency of the clock signal CKQ, which is an oscillation signal generated by the oscillation operation of the voltage-controlled oscillator 146. Note that the voltage-controlled oscillator 146 may be, for example, an LC oscillator circuit using an inductor.

[0062] The frequency divider circuit 147 divides the clock signal CKQ to output the feedback clock signal FBCK. For example, the frequency divider circuit 147 divides the frequency of the clock signal CKQ by a division ratio set by the division ratio setting signal SDIV, and outputs the resulting signal as the feedback clock signal FBCK. For example, if the oscillation frequency of the voltage-controlled oscillator circuit 146 is fVCO and the division ratio of the frequency division operation of the frequency divider circuit 147 is DIV, the frequency of the feedback clock signal FBCK will be fVCO / DIV. Then, as described above, the phase comparator circuit 142 compares the phase of the first clock signal CK1 with that of the feedback clock signal FBCK from the frequency divider circuit 147.

[0063] By using a PLL circuit 140 having such a configuration including a phase comparison circuit 142, a control voltage generation circuit 144, a voltage controlled oscillation circuit 146, and a frequency divider circuit 147, it is possible to generate a clock signal CKQ that is phase-synchronized with the first clock signal CK1, and to generate and output a highly accurate second clock signal CK2 based on the clock signal CKQ.

[0064] In this embodiment, the processing circuit 160 includes a delta-sigma modulation circuit 162 and an arithmetic circuit 164. The delta-sigma modulation circuit 162 performs delta-sigma modulation, causing the PLL circuit 140 to operate as a fractional-N PLL circuit. The arithmetic circuit 164 performs second temperature compensation processing based on temperature detection data DT from the A / D conversion circuit 168 and a division ratio setting value VDIV from a register 166. The division ratio setting value VDIV is data for setting the division ratio of the PLL circuit 140. The delta-sigma modulation circuit 162 performs delta-sigma modulation on the calculation value that is the calculation result of the arithmetic circuit 164, and outputs a division ratio setting signal SDIV that sets the division ratio of the divider circuit 147.

[0065] For example, in FIG. 12, a fractional frequency divider is configured by a frequency divider circuit 147 and a delta-sigma modulation circuit 162. The fractional frequency divider divides the clock signal CKQ using the inverse of the multiplication rate of the PLL circuit 140 as the division ratio, and outputs the divided clock signal to the phase comparator circuit 142 as a feedback clock signal FBCK. The delta-sigma modulation circuit 162 performs delta-sigma modulation on the value of the decimal part of the frequency division ratio to generate a modulation value that is an integer. For example, the delta-sigma modulation circuit 162 performs third-order or fourth-order delta-sigma modulation processing. The sum of the value of the integer part of the frequency division ratio and the modulation value is set in the frequency divider circuit 147 as a division ratio setting signal SDIV. This realizes a fractional-N PLL circuit 140.

[0066] Specifically, the delta-sigma modulation circuit 162 performs delta-sigma modulation, which integrates and quantizes the fractional frequency division ratio L / M, to generate a delta-sigma modulated signal. The delta-sigma modulation circuit 162 then performs processing to add or subtract the delta-sigma modulated signal and the integer frequency division ratio N, and the output signal after the addition and subtraction is input to the frequency divider circuit 147. This output signal after the addition and subtraction changes in time series among multiple integer frequency division ratios in a range near the integer frequency division ratio N, and its time average value coincides with N+L / M. This N+L / M is set by the frequency division ratio setting signal SDIV from the processing circuit 160. For example, the frequency of the clock signal CKQ is set to fvco, and a phase comparison frequency, which is the frequency of the first clock signal CK1 and the feedback clock signal FBCK, is set to fpfd. In this case, in a steady state where the phase of the first clock signal CK1, which is the reference clock signal, and the phase of the feedback clock signal FBCK are synchronized, the relational expression fvco=(N+L / M)×fpfd holds. By using the fractional-N type PLL circuit 140 configured in this way, it becomes possible to generate a clock signal CKQ by multiplying the first clock signal CK1 by a division ratio expressed as N+L / M.

[0067] The arithmetic circuit 164 performs second temperature compensation processing based on the temperature detection data DT to generate a temperature compensation value. The arithmetic circuit 164 then performs an addition process on the division ratio setting value VDIV and the temperature compensation value to obtain a calculation value, and outputs the obtained calculation value as the calculation result to the delta-sigma modulation circuit 162. The delta-sigma modulation circuit 162 performs delta-sigma modulation on this calculation value to generate a division ratio setting signal SDIV and output it to the frequency divider circuit 147.

[0068] In this way, a fractional frequency divider can be realized, and second temperature compensation processing that suppresses fluctuations in the frequency of the second clock signal CK2 due to temperature changes can be realized. Furthermore, the fractional frequency division processing that realizes the fractional frequency divider and the temperature compensation processing can be executed collectively by digital arithmetic processing in the processing circuit 160. Therefore, it is possible to realize the fractional frequency division processing and the temperature compensation processing while suppressing an increase in the circuit size of the second temperature compensation circuit 110.

[0069] Various processes are conceivable as the second temperature compensation process performed by the second temperature compensation circuit 110. For example, the processing circuit 160 provided in the second temperature compensation circuit 110 may perform the second temperature compensation process based on information from a trained model. For example, the processing circuit 160 performs the second temperature compensation process based on temperature detection results from a temperature sensor and information from a trained model stored in a memory circuit (not shown). The processing circuit 160 then generates a frequency setting signal that has undergone temperature compensation processing. The memory circuit can be implemented, for example, by a semiconductor memory such as a nonvolatile memory. For example, the memory circuit stores information from a trained model that has been machine-learned to obtain a temperature compensation value corresponding to the temperature measurement result. The processing circuit 160 performs the second temperature compensation process to determine a temperature compensation value corresponding to each temperature based on the temperature detection result and the information from the trained model stored in the memory circuit. When the processing circuit 160 performs neural network calculations, the memory circuit stores information on weighting coefficients for the neural network calculations as information from the trained model. The processing circuit 160 executes a second temperature compensation process, for example, by reading weighting coefficient information from a memory circuit based on temperature detection data corresponding to the temperature detection result and performing neural network calculations to determine a temperature compensation value corresponding to each temperature.

[0070] By performing the second temperature compensation process using the trained model information in this manner, it becomes possible to realize a more accurate and appropriate second temperature compensation process. For example, during the manufacturing or shipping of the oscillator 4, the trained model information obtained by measuring the frequency-temperature characteristics of the oscillator 4 is written and stored in a storage circuit realized by a non-volatile memory or the like. For example, during the manufacturing or shipping of the oscillator 4, the frequency characteristics of the clock signal are measured at each temperature while changing the environmental temperature using a thermostatic oven or the like. The trained model information obtained based on the measurement results is then written and stored in the storage circuit. For example, the clock frequency and temperature detection signal at each temperature are monitored, and the trained model information that has been machine-trained to obtain an appropriate temperature compensation value corresponding to the value of the temperature detection signal at each temperature is written and stored in the storage circuit. In this way, during actual operation of the oscillator 4, the processing circuit 160 can execute the second temperature compensation process to obtain temperature compensation data corresponding to the temperature detection result of the temperature sensor. This makes it possible to realize a second temperature compensation process that suppresses and cancels the effects of manufacturing process variations and circuit characteristic variations.

[0071] 4. Variable capacitance circuit Fig. 13 shows an example of the configuration of the variable capacitance circuit 31. The variable capacitance circuit 31 in Fig. 13 is designed so that the capacitance sensitivity can be variably set.

[0072] In FIG. 13, the variable capacitance circuit 31 includes multiple variable capacitance elements CV1, CV2, CV3, and CV4. The variable capacitance elements CV1 to CV4 are, for example, MOS varactors. The variable capacitance circuit 31 also includes DC-blocking capacitors CB2, CB3, and CB4, one end of which is connected to a node N1 on one side of the vibrator 10. Nodes NB2, NB3, and NB4 on the other ends of the capacitors CB2, CB3, and CB4 are connected to one end of the variable capacitance elements CV2, CV3, and CV4, respectively. One end of the variable capacitance element CV1, which serves as the reference variable capacitance element, is connected to the node N1 on one side of the vibrator 10. A node NVR on the other ends of the variable capacitance elements CV1, CV2, CV3, and CV4 is connected to one end of the capacitor CB1, and the other end of the capacitor CB1 is connected to the GND node. A reference voltage VR is supplied to the node NVR on the other ends of the variable capacitance elements CV1, CV2, CV3, and CV4. It is preferable that each of the variable capacitance elements CV1, CV2, CV3, and CV4 is configured by connecting a plurality of variable capacitance elements in parallel, the other ends of which are supplied with different reference voltages VR.

[0073] The variable capacitance circuit 31 also includes switches SB2, SB3, and SB4 and switches SC2, SC3, and SC4 for varying the capacitance sensitivity. The variable capacitance circuit 31 also includes resistors RB1, RB2, RB3, and RB4. A temperature compensation voltage VCP is supplied to one end of the switches SB2, SB3, and SB4. One end of the switches SC2, SC3, and SC4 and one end of the resistors RB2, RB3, and RB4 are connected to the other end of the switches SB2, SB3, and SB4. The other ends of the switches SC2, SC3, and SC4 are connected to the GND node, and the other ends of the resistors RB2, RB3, and RB4 are connected to nodes NB2, NB3, and NB4. One end of the resistor RB1 is supplied with the temperature compensation voltage VCP, and the other end of the resistor RB1 is connected to node N1.

[0074] Switches SB2 and SC2 are exclusively on or off. Switches SB3 and SC3 are also exclusively on or off, and switches SB4 and SC4 are also exclusively on or off. To set the capacitance sensitivity of the variable capacitance circuit 31 to its minimum, switches SB2, SB3, and SB4 are turned off and switches SC2, SC3, and SC4 are turned on. This sets one end of the variable capacitance elements CV2, CV3, and CV4 to the GND potential, and the variable capacitance elements CV2, CV3, and CV4 no longer function as capacitance for the variable capacitance circuit 31. The variable capacitance circuit 31 then has only the variable capacitance element CV1, which is the reference variable capacitance element, and the capacitance of only the variable capacitance element CV1 is controlled based on the temperature compensation voltage VCP. This minimizes the capacitance sensitivity, which is the sensitivity of the variable capacitance circuit 31 to changes in capacitance with respect to the temperature compensation voltage VCP. 3 and 4, when the oscillator 4 is used as a TCXO or OCXO and is set to the first mode, and the first temperature compensation circuit 40 performs primary first temperature compensation processing, the switches SB2, SB3, and SB4 are turned off and the switches SC2, SC3, and SC4 are turned on, thereby setting the capacitance sensitivity to a low sensitivity. By lowering the capacitance sensitivity in this way, it is possible to reduce nearby noise, as described in FIGS. 3 and 4.

[0075] On the other hand, when the capacitance sensitivity of the variable capacitance circuit 31 is set to maximum, the switches SB2, SB3, and SB4 are turned on and the switches SC2, SC3, and SC4 are turned off. As a result, all of the variable capacitance elements CV1, CV2, CV3, and CV4 function as capacitances of the variable capacitance circuit 31, and the temperature compensation voltage VCP is supplied to one end of the variable capacitance elements CV1, CV2, CV3, and CV4. Therefore, the capacitances of the variable capacitance elements CV1, CV2, CV3, and CV4 are controlled based on the temperature compensation voltage VCP. This maximizes the capacitance sensitivity of the variable capacitance circuit 31. Therefore, as described with reference to FIGS. 3 and 4, when the oscillator 4 is used as a TCXO, the second mode is set, and the first temperature compensation circuit 40 performs first-order and higher-order first temperature compensation processing, the switches SB2, SB3, and SB4 are turned on and the switches SC2, SC3, and SC4 are turned off, and the capacitance sensitivity is set to high sensitivity. By increasing the capacitance sensitivity in this way, it becomes possible to reduce the frequency fluctuation in the frequency temperature characteristics compared to when the TCXO is set to the first mode, as explained in FIGS.

[0076] 13, the capacitance sensitivity of variable capacitance circuit 31 can be adjusted to multiple levels between maximum and minimum, but it may also be configured to simply switch between maximum and minimum capacitance sensitivity. Also, in FIG. 13, the case where variable capacitance circuit 31 is provided at node N1 on one end side of vibrator 10 has been described, but it is desirable to also provide variable capacitance circuit 31 at node N2 on the other end side of vibrator 10.

[0077] 5.First circuit device, second circuit device FIG. 14 shows an example configuration of an oscillator 4 including a first circuit device 20 and a second circuit device 100. In this embodiment, as shown in FIG. 14, the oscillator 4 can be configured to include a first circuit device 20 including an oscillation circuit 30 and a first temperature compensation circuit 40, and a second circuit device 100 including a second temperature compensation circuit 110. For example, the first circuit device 20 is a first IC chip, and the second circuit device 100 is a second IC chip. Also, in FIG. 14, as described in FIG. 12, the second temperature compensation circuit 110 is configured by a clock signal generation circuit 130 and a processing circuit 160. Furthermore, as will be described later in FIGS. 17 to 19, for example, the resonator 10 and the first circuit device 20 are housed in a first package 15, and the second circuit device 100 and the first package 15 are housed in a second package 5.

[0078] 14, the oscillation circuit 30 and the first temperature compensation circuit 40 included in the first circuit device 20 generate a first clock signal CK1 that has been subjected to the first temperature compensation process, and the first clock signal CK1 that has been subjected to the first temperature compensation process can be input to the second circuit device 100. Then, the second temperature compensation circuit 110 included in the second circuit device 100 generates a second clock signal CK2 that has been subjected to the second temperature compensation process based on the input first clock signal CK1, and can output the second clock signal CK2 from the terminal TCK of the oscillator 4.

[0079] In FIG. 14, the first circuit device 20 includes, in addition to the oscillation circuit 30 and the first temperature compensation circuit 40, a logic circuit 60, a nonvolatile memory 70, a temperature sensor 48, an output circuit 80, and a power supply circuit 90.

[0080] The logic circuit 60 is a control circuit that performs various control processes. For example, the logic circuit 60 performs overall control of the first circuit device 20 and controls the operation sequence of the first circuit device 20. The logic circuit 60 also performs various processes for controlling the oscillator circuit 30 and controls the reading and writing of information from and to the non-volatile memory 70. The logic circuit 60 can be realized by an ASIC (Application Specific Integrated Circuit) circuit that is automatically placed and routed using a gate array or the like.

[0081] The nonvolatile memory 70 is a memory that retains information even without power. For example, the nonvolatile memory 70 is a memory that can retain information without power and is rewritable. The nonvolatile memory 70 stores various information necessary for the operation of the first circuit device 20. The nonvolatile memory 70 can be implemented as an EEPROM (Electrically Erasable Programmable Read-Only Memory) implemented using FAMOS (Floating Gate Avalanche Injection MOS) memory or MONOS (Metal-Oxide-Nitride-Oxide-Silicon) memory. For example, the nonvolatile memory 70 stores the coefficient information of the polynomial described above when the first temperature compensation circuit 40 performs analog first temperature compensation processing. Specifically, the nonvolatile memory 70 stores information on the zeroth-order coefficient, first-order coefficient, and higher-order coefficient of the polynomial as zeroth-order correction data, first-order correction data, and higher-order correction data, respectively.

[0082] The temperature sensor 48 is provided in the first circuit device 20 and is a sensor that detects temperature and outputs the temperature detection result such as a temperature detection voltage. The output circuit 80 outputs a first clock signal CK1 based on the oscillation signal of the oscillation circuit 30. For example, the output circuit 80 buffers the oscillation signal, which is the oscillation clock signal from the oscillation circuit 30, and outputs it as the first clock signal CK1 to a pad of the first circuit device 20. This first clock signal CK1 is then input to the second circuit device 100 as shown in FIG. 14.

[0083] The power supply circuit 90 is supplied with a power supply voltage VDD and a ground voltage GND, and supplies various power supply voltages for the internal circuits of the first circuit device 20 to the internal circuits. In Fig. 14, for example, the power supply voltage VCC supplied to the terminal TVCC of the oscillator 4 is supplied to the power supply circuit 190 of the second circuit device 100, and the power supply voltage VR1 generated by the power supply circuit 190 using, for example, a regulator is supplied as the power supply voltage VDD to the power supply circuit 90 of the first circuit device 20. In addition, the ground voltage GND supplied to the terminal TGND of the oscillator 4 is supplied to the power supply circuit 90 of the first circuit device 20.

[0084] 14, the second circuit device 100 is provided with a temperature sensor 148, a nonvolatile memory 170, and a power supply circuit 190 in addition to the second temperature compensation circuit 110 configured with the clock signal generation circuit 130 and the processing circuit 160.

[0085] The temperature sensor 148 is a sensor provided in the second circuit device 100 that detects temperature. In FIG. 14 , a temperature detection voltage VTS, which is the temperature detection result of the temperature sensor 148 provided in the first circuit device 20, and the temperature detection result from the temperature sensor 148 provided in the second circuit device 100 are input to the processing circuit 160. The processing circuit 160 then performs a second temperature compensation process based on the temperature detection result of the temperature sensor 48, which is the first temperature sensor, and the temperature detection result of the temperature sensor 148, which is the second temperature sensor. In this manner, the second temperature compensation process can be performed not only based on the temperature detection by the temperature sensor 148 of the second circuit device 100, but also based on the temperature detection result of the temperature sensor 48 located near the resonator 10, thereby enabling temperature compensation process that can appropriately compensate for the frequency-temperature characteristics, etc., of the resonator 10.

[0086] The nonvolatile memory 170 is a memory that retains information even without power supply, for example, a memory that can retain information even without power supply and is rewritable. The nonvolatile memory 170 stores various information necessary for the operation of the second circuit device 100. The nonvolatile memory 170 can be realized by an EEPROM realized by a FAMOS memory or a MONOS memory. For example, when the second temperature compensation circuit 110 performs a digital second temperature compensation process, the nonvolatile memory 170 stores information necessary for this digital second temperature compensation process. For example, when the processing circuit 160 performs the second temperature compensation process based on information of a trained model as described above, the nonvolatile memory 170 stores information of the trained model.

[0087] FIG. 15 shows another example of the configuration of an oscillator 4 including a first circuit device 20 and a second circuit device 100. FIG. 15 differs from FIG. 14 in that a heater circuit 22 is provided in the oscillator 4. For example, the heater circuit 22 is disposed near the resonator 10. By providing the heater circuit 22 in the oscillator 4 in this manner, the temperature of the resonator 10 can be maintained constant, as shown in FIG. 5. This makes it possible to realize the OCXO oscillator 4 having a thermostatic oven, as described in FIG. 6. That is, as shown in FIG. 6, the heater circuit 22 keeps the temperature of the resonator 10 at a constant temperature, such as 105°C. This makes it possible to realize an OCXO oscillator 4 with little frequency fluctuation within the operating temperature range, as described in A2 and A3, using an SC-cut resonator 10 with the frequency-temperature characteristics shown in A1 of FIG. 6.

[0088] The heater circuit 22 includes a heating element. The heating element can be realized, for example, by a heating transistor in which multiple transistors are connected in parallel. Then, for example, based on the heater control signal HCT, a current flows through the heating element realized by the heating transistor, causing the heating element to generate heat. The heat generated by this heating element enables heater control to keep the temperature of the vibrator 10 constant.

[0089] In FIG. 15 , the second circuit device 100 includes a heater control circuit 192 that controls the heater of the heater circuit 22. The heater control signal HCT output by the heater control circuit 192 is input to the heater circuit 22 via a pad or the like of the second circuit device 100. This allows the heater control signal HCT from the heater control circuit 192 to control the heat generation of the heater element of the heater circuit 22, thereby maintaining a constant temperature for the vibrator 10. Specifically, the heater control circuit 192 can perform heater control based on the temperature detection results from a temperature sensor for oven control. By providing the heater control circuit 192 in the second circuit device 100 in this manner, oven control for the OCXO is possible through heater control of the heater circuit 22 by the heater control circuit 192. In other words, oven control of an oven-type oscillator 4 having a thermostatic oven can be achieved. For example, the temperature of the thermostatic oven in which the vibrator 10 is installed can be controlled to maintain a constant temperature for the vibrator 10. The thermostatic oven may be a single-oven type or a double-oven type.

[0090] 6. Jitter cleaning circuit In this embodiment, for example, as shown in Fig. 16, a jitter cleaning circuit 150 that cleans the jitter of the second clock signal CK2 may be provided in the second circuit device 100. By providing such a jitter cleaning circuit 150, it becomes possible to reduce floor noise and improve phase noise characteristics, as described with reference to Figs.

[0091] As shown in FIG. 16, the jitter cleaning circuit 150 is a PLL circuit for jitter cleaning that includes a phase comparator circuit 152, a low-pass filter 154, a voltage-controlled oscillator circuit 156, and a frequency divider circuit 158.

[0092] The phase comparator circuit 152 compares the phase of the clock signal CKQ from the PLL circuit 140 with the feedback clock signal FBCKC and outputs a signal corresponding to the phase difference between the clock signal CKQ and the feedback clock signal FBCKC as a phase comparison result signal. The low-pass filter 154 performs low-pass filtering on the phase comparison result signal from the phase comparator circuit 152 to remove high-frequency components and output a control voltage for the oscillation frequency to the voltage-controlled oscillator circuit 156. The voltage-controlled oscillator circuit 156 operates to oscillate the oscillator 11 and output a clock signal CKC having a frequency corresponding to the control voltage. The frequency divider circuit 158 ​​divides the clock signal CKC and outputs the feedback clock signal FBCKC to the phase comparator circuit 152. The output circuit 180 buffers the clock signal CKC generated by the voltage-controlled oscillator circuit 156 and outputs a second clock signal CK2.

[0093] 16, a jitter cleaning PLL circuit including a phase comparator circuit 152, a low-pass filter 154, a voltage-controlled oscillator circuit 156, and a frequency divider circuit 158 ​​is provided downstream of the PLL circuit 140. The jitter cleaning PLL circuit generates clock signal CKC using, for example, the voltage-controlled oscillator circuit 156 that oscillates the vibrator 11, and therefore has lower phase noise than the PLL circuit 140. Therefore, by providing a jitter cleaning circuit 150 including such a jitter cleaning PLL circuit downstream of the PLL circuit 140 and outputting the second clock signal CK2, it is possible to reduce high-frequency phase noise generated in the PLL circuit 140. Therefore, as described in FIG. 9, high-frequency floor noise can be reduced, and the phase noise characteristics of the second clock signal CK2 can be improved.

[0094] 7. Oscillator Next, structural examples of the oscillator 4 will be described. Fig. 17 shows a first structural example of the oscillator 4. Fig. 17 is a cross-sectional view that schematically shows the structure of the oscillator 4. In this embodiment, the oscillator 4 includes a resonator 10, a first circuit device 20, and a second circuit device 100. Specifically, the oscillator 4 includes a first package 15 that houses the resonator 10 and the first circuit device 20, and a second package 5 that houses the first package 15 and the second circuit device 100. The first package 15 and the second package 5 can also be referred to as a first container and a second container, respectively.

[0095] In this embodiment, the first circuit device 20 housed in the first package 15 performs the first temperature compensation process, and the second circuit device 100 housed in the second package 5 performs the second temperature compensation process. For example, housing the resonator 10 and the first circuit device 20 in the first package 15 constitutes a temperature-compensated oscillator 14 that performs, for example, an analog first temperature compensation process. Housing the oscillator 14 that performs the analog first temperature compensation process and the second circuit device 100 that performs digital second temperature compensation process in the second package 5 constitutes an oscillator 4 that generates a high-precision clock signal. The second circuit device 100 can also be called a correction IC that performs fine-adjustment second temperature compensation process digitally.

[0096] Specifically, the second package 5 is made of, for example, ceramic or the like, and has an internal storage space. This storage space contains an oscillator 14, in which the resonator 10 and the first circuit device 20 are housed in the first package 15, and the second circuit device 100. The storage space is hermetically sealed and is preferably in a reduced pressure state, close to a vacuum. The second package 5 can suitably protect the second circuit device 100 and the oscillator 14 from impact, dust, heat, moisture, etc.

[0097] The second package 5 has a base 6 and a lid 7. Specifically, the second package 5 is composed of the base 6, which supports the oscillator 14 and the second circuit device 100, and the lid 7, which is bonded to the upper surface of the base 6 so as to form an accommodation space between the base 6 and the lid 7. The base 6 has a first recess that opens to the top surface and a second recess that opens to the bottom surface of the first recess inside. The second circuit device 100 is supported on the bottom surface of the first recess. For example, the second circuit device 100 is supported on a stepped portion of the bottom surface via terminal electrodes. The oscillator 14 is supported on the bottom surface of the second recess. For example, the oscillator 14 is supported on a stepped portion of the bottom surface via terminal electrodes. The base 6 also has a third recess that opens to the bottom surface of the second recess, and a circuit component 12 is placed in this third recess. The circuit component 12 to be placed therein may be, for example, a capacitor or an external temperature sensor.

[0098] The second circuit device 100 is electrically connected to the terminals of the oscillator 14 via, for example, bonding wires BW, terminal electrodes formed in the stepped portion, or internal wiring of the second package 5. This allows the first clock signal CK1 and the temperature detection voltage VTS from the oscillator 14 to be input to the second circuit device 100. The second circuit device 100 is also electrically connected to the external terminals 8 and 9 of the oscillator 4 via bonding wires BW, terminal electrodes formed in the stepped portion, or internal wiring of the second package 5. The external terminals 8 and 9 are formed on the outer bottom surface of the second package 5. The external terminals 8 and 9 are connected to an external device via external wiring. The external wiring is, for example, wiring formed on a circuit board on which the external device is mounted. This allows electrical connection between the second circuit device 100 and the external device, allowing the second clock signal CK2 and the like to be output to the external device. The terminals of the oscillator 14 and the external terminals 8 and 9 may also be electrically connected.

[0099] In FIG. 17, the oscillator 14 is arranged below the second circuit device 100. For example, the direction perpendicular to the substrate of the second circuit device 100 and toward the bottom surface of the second package 5 is designated as DA1, and the direction perpendicular to direction DA1 is designated as direction DA2. The substrate of the second circuit device 100 is a semiconductor substrate. In this case, the oscillator 14 is arranged in the direction DA1 of the second circuit device 100. The circuit component 12 is arranged in the direction DA1 of the oscillator 14. The second circuit device 100 is arranged with the direction DA2 as the longitudinal direction of the substrate.

[0100] FIG. 18 shows an example structure of an oscillator 14. The oscillator 14 has a resonator 10, a first circuit device 20, and a first package 15 that houses the resonator 10 and the first circuit device 20. The first package 15 is made of, for example, ceramic or the like, and has an internal housing space in which the resonator 10 and the first circuit device 20 are housed. The housing space is hermetically sealed and is preferably in a reduced pressure state that is close to a vacuum. The first package 15 can suitably protect the resonator 10 and the first circuit device 20 from impact, dust, heat, moisture, and the like.

[0101] The first package 15 has a base 16 and a lid 17. Specifically, the first package 15 is composed of the base 16 that supports the resonator 10 and the first circuit device 20, and the lid 17 that is bonded to the upper surface of the base 16 so as to form an accommodation space between the base 16 and the lid 17. The resonator 10 is supported via terminal electrodes on a stepped portion provided on the inside of the base 16. The first circuit device 20 is disposed on the inside bottom surface of the base 16. Specifically, the first circuit device 20 is disposed so that its active surface faces the inside bottom surface of the base 16. The active surface is the surface on which circuit elements of the first circuit device 20 are formed. Bumps BMP are formed on terminals that are pads of the first circuit device 20. The first circuit device 20 is supported on the inside bottom surface of the base 16 via the conductive bumps BMP. The conductive bumps BMP are, for example, metal bumps, and the resonator 10 and the first circuit device 20 are electrically connected via the bumps BMP and the internal wiring and terminal electrodes of the first package 15. The first circuit device 20 is also electrically connected to external terminals 18 and 19 of the oscillator 14 via the bumps BMP and the internal wiring of the first package 15. The external terminals 18 and 19 are formed on the outer bottom surface of the first package 15. As shown in FIG. 17 , the external terminals 18 and 19 of the oscillator 14 are electrically connected to the second circuit device 100 via bonding wires BW, internal wiring, and terminal electrodes. This allows the first clock signal CK1 and the temperature detection voltage VTS from the oscillator 14 to be input to the second circuit device 100.

[0102] In FIG. 18 , the first circuit device 20 is flip-mounted so that its active surface faces downward, but this embodiment is not limited to this mounting method. For example, the first circuit device 20 may be mounted so that its active surface faces upward. That is, the first circuit device 20 is mounted so that its active surface faces the resonator 10. With this mounting method, the temperature sensor formed on the active surface of the first circuit device 20 faces the resonator 10. The above description deals with a double-sealed structure in which the resonator 10 and the first circuit device 20 are housed in the first package 15 of the oscillator 14, and the oscillator 14 and the second circuit device 100 are housed in the second package 5. However, the structure of the oscillator 4 of this embodiment is not limited to this, and various modifications are possible. For example, a single-sealed structure in which the resonator 10, the first circuit device 20, and the second circuit device 100 are housed in a single second package 5 may be adopted.

[0103] Fig. 19 shows a structural example in which the oscillator 4 is an OCXO. The oscillator 4 in Fig. 19 includes a first package 15 that houses a resonator 10 and a first circuit device 20, a heater circuit 22, and a second package 5 that houses the heater circuit 22 and the first package 15.

[0104] In this way, it is possible to realize an OCXO in which first package 15, which houses resonator 10 and first circuit device 20, serves as a thermostatic oven. For example, heater circuit 22, which is a heater IC, is disposed on the top surface of first package 15, and the temperature of first package 15, which is a thermostatic oven, is controlled by controlling the heat generation of the heat generating element of heater circuit 22 based on the heater control signal HCT described with reference to Fig. 15. This allows temperature control to be performed to keep the temperature of resonator 10 constant, even if the ambient temperature changes, making it possible to realize an OCXO, which is an oven-controlled crystal oscillator.

[0105] 19, it is also possible to use an oscillator of an existing product that includes the resonator 10, the first circuit device 20, and the first package 15 that houses the resonator 10 and the first circuit device 20. That is, an OCXO can be realized by housing the oscillator of an existing product that includes the resonator 10, the first circuit device 20, and the first package 15, together with the heater circuit 22, which is a heater IC, in the second package 5. Therefore, it is possible to realize an OCXO that effectively uses the oscillator of an existing product, thereby reducing product costs, development costs, development time, etc.

[0106] The oscillator 4 in FIG. 19 includes a second circuit device 100 provided in a second package 5 and outputting a heater control signal HCT to the heater circuit 22, and a jitter cleaning vibrator 11 connected to the second circuit device 100. The second circuit device 100 includes a heater control circuit 192, which functions as an oven control circuit, as shown in FIG. 15. The heater control signal HCT from the heater control circuit 192 is input to the heater circuit 22, controlling the heat generation of the heater element in the heater circuit 22. In this manner, the second circuit device 100 controls the temperature based on the heater control signal HCT, thereby controlling the heat generation of the heater circuit 22's heat generating circuit. This in turn controls the temperature of the first package 15, which functions as a thermostatic oven, thereby achieving an OCXO. The second circuit device 100 also includes the jitter cleaning circuit 150 shown in FIG. 16, and a jitter cleaning PLL circuit connected to the vibrator 11 improves the phase noise characteristics of the output signal.

[0107] 19, the vibrator 10 and the first circuit device 20 are housed in an accommodation space SP1 inside the first package 15, and the first package 15 and the heater circuit 22 are housed in an accommodation space SP2 inside the second package 5. A recess is formed in the bottom surface of the second package 5, and the second circuit device 100 and the vibrator 11 are mounted on the bottom surface of this recess.

[0108] The oscillator 4 is not limited to the structure shown in FIG. 19, and various modifications are possible. For example, the second circuit device 100 may be disposed in the accommodation space SP2 of the second package 5. Also, a heater circuit 22 may be provided in the space accommodating the vibrator 10 to perform oven control. For example, the heater circuit 22 may be provided between the stepped portion of the base 16 and the vibrator 10, and heat generated by the heater circuit 22 may be transmitted directly to the vibrator 10.

[0109] As described above, the oscillator of this embodiment includes a resonator, an oscillation circuit that oscillates the resonator, a first temperature compensation circuit that performs first temperature compensation processing to temperature-compensate the frequency of a first clock signal generated by oscillation of the resonator by the oscillation circuit, and a second temperature compensation circuit that receives the first clock signal that has been subjected to the first temperature compensation processing and outputs a second clock signal that has been subjected to second temperature compensation processing based on the first clock signal. The first temperature compensation circuit performs first-order first temperature compensation processing as the first temperature compensation processing, and the second temperature compensation circuit performs higher-order second temperature compensation processing as the second temperature compensation processing.

[0110] In this embodiment, a first clock signal is generated by oscillation of a resonator by an oscillation circuit, and a first temperature compensation process is performed by the first temperature compensation circuit to temperature-compensate the frequency of the first clock signal. The first clock signal that has undergone the first temperature compensation process is then input to a second temperature compensation circuit, which outputs a second clock signal that has undergone a second temperature compensation process based on the first clock signal. In this embodiment, the first temperature compensation circuit performs first-order first temperature compensation, eliminating the need for higher-order first temperature compensation. This reduces noise caused by the higher-order first temperature compensation process and suppresses deterioration of noise characteristics. Meanwhile, the second temperature compensation circuit performs higher-order second temperature compensation, thereby temperature-compensating for high-order frequency-temperature characteristics that remain uncompensated by the first-order first temperature compensation process of the first temperature compensation circuit. This makes it possible to provide an oscillator that can improve frequency-temperature characteristics and reduce noise.

[0111] In addition, in this embodiment, the first temperature compensation circuit may perform first-order first temperature compensation processing as the first temperature compensation processing in the first mode, and may perform first-order and higher-order first temperature compensation processing as the first temperature compensation processing in the second mode.

[0112] In this way, when priority is given to reducing phase noise, this can be achieved by setting the oscillator to the first mode, and when priority is given to improving the frequency-temperature characteristics, this can be achieved by setting the oscillator to the second mode.

[0113] In this embodiment, when used as an oven-controlled oscillator that controls the temperature of the vibrator, the first mode may be set.

[0114] In this way, when used as an oven-controlled oscillator that controls the temperature of the resonator, setting the first mode makes it possible to improve the frequency temperature characteristics and also the noise characteristics.

[0115] In this embodiment, when used as a temperature compensated oscillator that does not control the temperature of the vibrator, the first mode or the second mode may be set.

[0116] When used as a temperature-compensated oscillator that does not control the temperature of the resonator in this way, if priority is given to improving noise characteristics, this can be achieved by setting it to the first mode, and if priority is given to improving frequency-temperature characteristics, this can be achieved by setting it to the second mode.

[0117] In this embodiment, the oscillation circuit may include a variable capacitance circuit, and the first temperature compensation circuit may output a temperature compensation voltage to the variable capacitance circuit based on the temperature detection result of the temperature sensor.

[0118] In this way, the capacitance of the variable capacitance circuit is variably adjusted based on the temperature compensation voltage from the first temperature compensation circuit, thereby realizing the first temperature compensation process.

[0119] In this embodiment, the capacitance sensitivity of the variable capacitance circuit to the temperature compensation voltage may be set to a lower sensitivity in the first mode than in the second mode.

[0120] In this way, by setting the capacitance sensitivity of the variable capacitance circuit to a low sensitivity in the first mode, it is possible to prevent noise from being amplified in the circuit elements that make up the first temperature compensation circuit, and to prevent the oscillation frequency from fluctuating due to noise.

[0121] In this embodiment, the first temperature compensation circuit may perform temperature compensation of the frequency temperature characteristics of the circuit elements of the oscillation circuit by a first-order first temperature compensation process.

[0122] In this way, the first-order frequency-temperature characteristic of the first clock signal resulting from the frequency-temperature characteristic of the circuit elements of the oscillator circuit can be temperature-compensated by the first-order first temperature compensation process of the first temperature compensation circuit, thereby reducing frequency fluctuations due to temperature fluctuations.

[0123] In this embodiment, the second temperature compensation circuit may perform temperature compensation of the frequency-temperature characteristic of the vibrator by a high-order second temperature compensation process.

[0124] In this way, if the vibrator has a high-order frequency-temperature characteristic, this high-order frequency-temperature characteristic can be temperature-compensated by the high-order second temperature compensation processing of the second temperature compensation circuit, thereby reducing frequency fluctuations due to temperature fluctuations.

[0125] In this embodiment, the second temperature compensation circuit may include a fractional-N PLL circuit that generates the second clock signal by multiplying the frequency of the first clock signal.

[0126] In this way, the division ratio setting signal that has undergone the second temperature compensation process can be set in the divider circuit of the PLL circuit, making it possible to generate a second clock signal based on a signal that has multiplied the frequency of the first clock signal, and making it possible to generate a second clock signal that has undergone the second temperature compensation process based on the first clock signal.

[0127] This embodiment may also include a first circuit device including an oscillation circuit and a first temperature compensation circuit, and a second circuit device including a second temperature compensation circuit.

[0128] In this way, the first circuit device that oscillates the oscillator performs the first temperature compensation process, thereby reducing the amount of frequency fluctuation due to the frequency temperature characteristics of the first clock signal output from the first circuit device. Then, after the first temperature compensation process is performed by the first circuit device, the second circuit device performs the second temperature compensation process, thereby achieving high accuracy of the clock frequency, etc.

[0129] This embodiment may also include a first package that houses the vibrator and the first circuit device, and a second package that houses the first package and the second circuit device.

[0130] In this way, by housing the vibrator and the first circuit device in the first package, it becomes possible for the first package to thermally block the transfer of heat from a heat source external to the first package, such as a second circuit device, thereby reducing the adverse effects that heat from a heat source external to the first package has on temperature measurement.

[0131] In this embodiment, a heater circuit may be included to keep the temperature of the vibrator constant.

[0132] In this way, it is possible to perform temperature compensation processing by keeping the temperature of the vibrator constant using the heater circuit, which improves the frequency temperature characteristic and makes it possible to reduce frequency changes within the operating temperature range.

[0133] In this embodiment, the second circuit device may include a heater control circuit that controls the heater of the heater circuit.

[0134] By providing the heater control circuit in the second circuit device in this way, heater control of the heater circuit by the heater control circuit makes it possible to control the oven in an oven-controlled oscillator that controls the temperature of the vibrator, for example.

[0135] In this embodiment, the second circuit device may also include a jitter cleaning circuit that cleans jitter in the second clock signal.

[0136] By providing such a jitter cleaning circuit, floor noise can be reduced and phase noise characteristics can be improved.

[0137] Although the present embodiment has been described in detail above, it will be readily apparent to those skilled in the art that many modifications are possible without substantially departing from the novel features and advantages of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure. For example, a term described at least once in the specification or drawings together with a different term having a broader or equivalent meaning may be replaced with that different term anywhere in the specification or drawings. Furthermore, all combinations of the present embodiment and modifications are also included within the scope of the present disclosure. Furthermore, the configuration and operation of the oscillator are not limited to those described in the present embodiment, and various modifications are possible. [Explanation of symbols]

[0138] 4...oscillator, 5...second package, 6...base, 7...lid, 8, 9...external terminal, 10, 11...resonator, 12...circuit component, 14...oscillator, 15...first package, 16...base, 17...lid, 18, 19...external terminal, 20...first circuit device, 22...heater circuit, 30...oscillator circuit, 31...variable capacitance circuit, 35...current source circuit, 36...drive circuit, 37, 38...electrostatic protection circuit, 40...first temperature compensation circuit, 42...current generation circuit, 43...first-order correction circuit, 44...high-order correction circuit, 46... Current-voltage conversion circuit, 48...temperature sensor, 60...logic circuit, 70...non-volatile memory, 80...output circuit, 90...power supply circuit, 100...second circuit device, 110...second temperature compensation circuit, 130...clock signal generation circuit, 140...PLL circuit, 142...phase comparison circuit, 144...control voltage generation circuit, 146...voltage controlled oscillation circuit, 147...frequency divider circuit, 148...temperature sensor, 150...jitter cleaning circuit, 152...phase comparison circuit, 154...low-pass filter, 156...voltage control Oscillator circuit, 158...divider circuit, 160...processing circuit, 162...delta-sigma modulation circuit, 164...arithmetic circuit, 166...register, 168...A / D conversion circuit, 170...non-volatile memory, 180...output circuit, 190...power supply circuit, 192...heater control circuit, AM...amplifier circuit, BMP...bump, BP...bipolar transistor, BW...bonding wire, CB1, CB2, CB3, CB4, CC...capacitor, CK1...first clock signal, CK2...second clock signal, C KC, CKQ...clock signal, CV1, CV2, CV3, CV4...variable capacitance element, CVA, CVB...variable capacitance circuit, FBCK, FBCKC...feedback clock signal, HCT...heater control signal, IS...current source, RB1, RB2, RB3, RB4, RC...resistor, SA1, SA2, SB2, SB3, SB4, SC2, SC3...switch, SC4...switch, TA, TB...transistor, TCK, TGND, TVCC...pin, VCP...temperature compensation voltage, VTS...temperature detection voltage

Claims

1. A vibrator and an oscillation circuit that causes the oscillator to oscillate; a first temperature compensation circuit that performs a first temperature compensation process to temperature compensate the frequency of a first clock signal generated by oscillation of the resonator by the oscillation circuit; a second temperature compensation circuit that receives the first clock signal that has been subjected to the first temperature compensation process and outputs a second clock signal that has been subjected to a second temperature compensation process based on the first clock signal; Including, the first temperature compensation circuit performs a first-order first temperature compensation process as the first temperature compensation process; The oscillator is characterized in that the second temperature compensation circuit performs a high-order second temperature compensation process as the second temperature compensation process.

2. 2. The oscillator according to claim 1, The first temperature compensation circuit In the first mode, the first temperature compensation process is performed as the first temperature compensation process, In the second mode, the oscillator performs first-order and higher-order first temperature compensation processes as the first temperature compensation process.

3. 3. The oscillator according to claim 2, An oscillator, which is set to the first mode when used as an oven-controlled oscillator for controlling the temperature of the resonator.

4. 3. The oscillator according to claim 2, An oscillator, which is set to the first mode or the second mode when used as a temperature compensated oscillator that does not control the temperature of the resonator.

5. 5. The oscillator according to claim 2, wherein: the oscillation circuit includes a variable capacitance circuit, The first temperature compensation circuit an oscillator that outputs a temperature compensation voltage based on a temperature detection result of a temperature sensor to the variable capacitance circuit;

6. 6. The oscillator according to claim 5, an oscillator, wherein the capacitance sensitivity of the variable capacitance circuit to the temperature compensation voltage is set to a lower sensitivity in the first mode than in the second mode;

7. 7. The oscillator according to claim 1, The first temperature compensation circuit An oscillator, characterized in that temperature compensation of frequency temperature characteristics of circuit elements of the oscillation circuit is performed by the first-order first temperature compensation process.

8. 8. The oscillator according to claim 1, The second temperature compensation circuit An oscillator characterized in that temperature compensation of the frequency-temperature characteristic of the resonator is performed by the high-order second temperature compensation process.

9. 9. The oscillator according to claim 1, The second temperature compensation circuit an oscillator including a fractional-N type PLL circuit that generates the second clock signal by multiplying the frequency of the first clock signal;

10. 10. The oscillator according to claim 1, a first circuit device including the oscillation circuit and the first temperature compensation circuit; a second circuit device including the second temperature compensation circuit; An oscillator comprising:

11. 11. The oscillator according to claim 10, a first package that houses the vibrator and the first circuit device; a second package that houses the first package and the second circuit device; An oscillator comprising:

12. 12. The oscillator according to claim 10 or 11, An oscillator comprising a heater circuit for maintaining a constant temperature of the vibrator.

13. 13. The oscillator according to claim 12, The oscillator is characterized in that the second circuit device includes a heater control circuit that controls the heater of the heater circuit.

14. 14. The oscillator according to claim 10, The second circuit device is An oscillator comprising a jitter cleaning circuit for cleaning jitter in the second clock signal.

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