Strategic stopping for mitigating quantum state leakage

Abstract

Systems and techniques are provided that facilitate strategic stopping for quantum state leakage mitigation. In various embodiments, the system may include a detection component that may detect quantum state leakage associated with one or more qubits. In various aspects, the system may further include a stopping component that may, in response to detecting the quantum state leakage, generate a time stopping before execution of a quantum circuit on one or more qubits. In various embodiments, the stopping component may generate the time stopping after execution of a previous quantum circuit on one or more qubits, where the quantum state leakage occurs during execution of the previous quantum circuit. In some cases, the quantum state leakage may decay during the time stopping.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE This disclosure relates to quantum state leakage, and more particularly to strategic stopping for quantum state leakage mitigation. Summary of the Invention

[0002] The following presents a summary to provide a basic understanding of one or more embodiments of the present invention. This summary is not intended to identify key or critical elements or to delineate the scope of particular embodiments or the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, devices, systems, computer-implemented methods, apparatus, and / or computer program products are described that can facilitate strategic shutting down for quantum state leakage mitigation.

[0003] According to one or more embodiments, a system is provided. The system may include a memory that may store computer-executable components. The system may further include a processor operatively coupled to the memory and that may execute the computer-executable components stored in the memory. In various embodiments, the computer-executable component may include a detection component that may detect quantum state leakage associated with one or more qubits. In various aspects, the computer-executable component may further include a stopping component that may, in response to detecting the quantum state leakage, generate a time stopping before execution of a quantum circuit on the one or more qubits. In various embodiments, the stopping component may generate a time stopping after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurs during execution of the previous quantum circuit. In some cases, the quantum state leakage may decay during the time stopping.

[0004] According to one or more embodiments, the above-described systems may be implemented as computer-implemented methods and / or computer program products. [Brief explanation of the drawings]

[0005] [Figure 1] 1 illustrates a block diagram of an example non-limiting system that facilitates strategic shutting down for quantum state leakage mitigation, according to one or more embodiments described herein.

[0006] [Figure 2] 1 illustrates a block diagram of an example non-limiting system including quantum state leakage facilitating strategic shutting down for quantum state leakage mitigation, according to one or more embodiments described herein.

[0007] [Figure 3] FIG. 1 shows a block diagram of an example non-limiting qubit having various possible quantum states, according to one or more embodiments described herein.

[0008] [Figure 4] 1 illustrates a block diagram of an example non-limiting system including strategic time stopping that facilitates strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0009] [Figure 5] FIG. 1 shows a block diagram of a non-limiting example timeline demonstrating strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0010] [Figure 6] 1 illustrates a block diagram of an example non-limiting system including a decay lookup table that facilitates strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0011] [Figure 7]FIG. 1 illustrates a block diagram of an example non-limiting system including a quantum circuit that facilitates strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0012] [Figure 8] 1 illustrates a block diagram of an example non-limiting system including out-of-service quantum state measurements that facilitate strategic outages for quantum state leakage mitigation, according to one or more embodiments described herein.

[0013] [Figure 9] 1 illustrates a flow diagram of an example non-limiting computer-implemented method for facilitating strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein. [Figure 10] 1 illustrates a flow diagram of an example non-limiting computer-implemented method for facilitating strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein. [Figure 11] 1 illustrates a flow diagram of an example non-limiting computer-implemented method for facilitating strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0014] [Figure 12] 1 illustrates a block diagram of an example non-limiting operating environment in which one or more embodiments described herein may be facilitated.

[0015] [Figure 13] 1 illustrates an example non-limiting cloud computing environment according to one or more embodiments described herein.

[0016] [Figure 14] 1 illustrates non-limiting examples of abstraction model layers according to one or more embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION

[0017] The following detailed description is merely exemplary and is not intended to limit the embodiments and / or the application or uses of the embodiments, nor is there any intention to be bound by any express or implied information presented in the preceding Background or Summary sections or in the Detailed Description section.

[0018] One or more embodiments will now be described with reference to the drawings. Numeral references, etc. are used throughout to refer to like elements. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It will be apparent, however, that in various instances one or more embodiments may be practiced without these specific details.

[0019] In quantum computers, information is communicated and / or represented via qubits (e.g., quantum binary digits). A classical bit can have two basis states (e.g., the state of the bit can be either 0 or 1), and a qubit can be a superposition of basis states (e.g., the state of a qubit can be expressed as α|0〉+β|1〉, where |0〉 represents the ground state of the qubit, |1〉 represents the first excited state of the qubit, and α and β represent complex probability amplitudes). Qubits can be implemented at the atomic scale (e.g., photon polarization can exhibit quantum behavior, electron spin can exhibit quantum behavior, nuclear spin can exhibit quantum behavior, quantum dots can exhibit quantum behavior) and / or at the macroscopic scale (e.g., Josephson junctions can exhibit quantum behavior).

[0020] During quantum computing and / or quantum information processing, one or more quantum circuits may be executed on a set of qubits (e.g., a set of qubits may include one or more qubits). A quantum circuit may be an array of one or more quantum gates that manipulate and / or transform the state of the set of qubits. Specifically, the set of qubits may be initialized in a known state, a quantum circuit may be executed on the set of qubits, thereby transforming their state, and the state of the transformed set of qubits may be measured using any suitable quantum readout technique. The state of the transformed set of qubits may then be reset (e.g., reinitialized) before execution of another quantum circuit on the set of qubits. To increase the speed at which quantum circuits are executed, and therefore the rate at which outputs are sampled, it may be desirable to execute two or more quantum circuits on the set of qubits close together in time; i.e., to increase the repetition rate of the quantum circuits. To facilitate such increased repetition rates, quantum state resetting may be performed using, for example, microwave sideband techniques and / or measurement and feedforward techniques.

[0021] Generally, in quantum computing and / or quantum information processing, a qubit may be assumed to have two basis states: a ground state and a first excited state. However, in reality, a qubit may optionally have more than two basis states: a ground state, a first excited state, and one or more higher excited states (e.g., a second excited state, a third excited state, an mth excited state, for any suitable integer m>1). In such cases, the ground state and the first excited state of the qubit may be considered computational basis states (e.g., states used to perform a quantum computation), and the higher excited states may be considered leaky states (e.g., states not used to perform a quantum computation). That is, quantum state leakage is said to occur when a qubit is in a state other than the ground state or the first excited state. While this disclosure primarily discusses embodiments where the computational basis states include only the ground state and the first excited state and where the leaky states include excited states higher than the first excited state, such embodiments are non-limiting examples. In various other embodiments, the computational basis states may include any suitable number of states (e.g., the ground state, the first excited state, the second excited state, up to the pth excited state, for any suitable positive integer p), and the leaking states may include the remaining possible qubit states (e.g., the (p+1)th excited state, the (p+2)th excited state, up to the mth excited state, where m>p and m represents the total number of possible qubit states). Note that quantum state leakage is distinct from physical charge leakage (e.g., quantum state leakage pertains to the state of the qubit; it does not pertain to the penetration of charge and / or current across some physical barrier used in the physical configuration of the qubit).

[0022] Quantum state leakage can occur during the execution of a quantum circuit and / or during quantum readout (e.g., qubits can leak). Quantum state leakage can impair the execution of subsequent quantum circuits, which may be undesirable. Specifically, quantum state leakage can cause reset techniques (e.g., microwave sideband techniques and / or measurement and feedforward techniques) to fail to fully reinitialize the state of a set of qubits, which can cause subsequent quantum circuits to be performed inaccurately and / or improperly on the set of qubits. Such problems can be exacerbated at high repetition rates; in particular, as repetition rates increase, quantum state leakage is more likely to adversely affect subsequent quantum circuits, thereby resulting in reduced fidelity. Therefore, systems and / or techniques that can ameliorate the technical challenges of quantum state leakage may be desirable.

[0023] Some systems and / or techniques attempt to actively prevent and / or mitigate the formation of quantum state leakage by applying auxiliary electrical pulses to a set of qubits before, during, and / or after executing a quantum circuit on the set of qubits and / or before, during, and / or after measuring the state of the set of qubits. However, such pulses add overhead costs, require frequent calibration to ensure proper functioning, and introduce additional noise that can adversely affect the coherence and / or fidelity of the set of qubits. In other words, systems and / or techniques for actively preventing and / or mitigating quantum state leakage using pulses present many disadvantages of their own.

[0024] Various embodiments of the present invention may address one or more of these technical challenges. Specifically, various embodiments of the present invention may provide systems and / or techniques that can facilitate strategic stopping for quantum state leakage mitigation. In other words, various embodiments of the present invention may be viewed as quantum computing tools (e.g., computer-implemented software) that facilitate high repetition rates of quantum circuits on a set of qubits while simultaneously helping to prevent quantum state leakage in the set of qubits from corrupting subsequent executions of the quantum circuit. In various aspects, such quantum computing tools may measure the state of a set of qubits to detect quantum state leakage associated with the set of qubits using any suitable quantum readout technique. If the quantum computing tool detects quantum state leakage (e.g., if the quantum computing tool determines that at least one qubit in the set of qubits is in a state other than the ground state or the first excited state), the quantum computing tool may generate a strategic time stop prior to execution of a next quantum circuit on the set of qubits. In various aspects, during the strategic time stop, the quantum state leakage can decay and return to a non-leaking state (e.g., the ground state and / or the first excited state). In various cases, once the strategic time stopping has elapsed, the quantum computing tool may execute, cause to be executed, and / or otherwise facilitate the execution of the next quantum circuit. In various cases, if the quantum computing tool does not detect a quantum state leakage (e.g., if the quantum computing tool determines that no qubits in the set of qubits are in a state other than the ground state or the first excited state), the quantum computing tool may avoid generating a strategic time stopping and immediately execute, cause to be executed, and / or otherwise facilitate the execution of the next quantum circuit (e.g., without stopping).

[0025] In various cases, the strategic stopping described herein may prevent loss of fidelity associated with quantum state leakage. Specifically, if a quantum computing tool determines that at least one qubit of a set of qubits is in a leaky state, the quantum computing tool may postpone execution of a next quantum circuit on the set of qubits to allow time for the leaky state to naturally decay back to a non-leaky state. The next quantum circuit may then be executed on the set of qubits after the leaky state has decayed back to a non-leaky state, meaning that the next quantum circuit may not be impaired by the leaky state. Because the leaky state no longer exists when the next quantum circuit is executed (e.g., the leaky state may have decayed during the strategic time stopping), the fidelity of the next quantum circuit may not be diminished by the leaky state.

[0026] Moreover, in various aspects, the strategic stopping described herein may also result in an increased repetition rate of a quantum circuit. Intuitively, one might suggest that, conversely, waiting for leaky states to decay before executing the next quantum circuit may decrease the repetition rate. In short, high repetition rates can be achieved by successively executing quantum circuits as close in time as feasible on a set of qubits, and therefore inserting a stop between successive quantum circuit executions would be expected to decrease the repetition rate. However, the inventors of various embodiments of the present invention recognized that such a stop need not be inserted before the execution of every quantum circuit in a sequence of quantum circuits. Instead, the inventors of various embodiments of the present invention recognized that inserting a stop if quantum state leakage is detected and not inserting a stop if quantum state leakage is not detected may increase the average repetition rate associated with a sequence of quantum circuits without a corresponding loss of fidelity (e.g., a stop may allow leaky states to decay back to non-leaky states; if quantum state leakage is not detected, a stop may be unnecessary because there are no leaky states to decay).

[0027] In various cases, quantum computing tools according to various embodiments of the present invention may be electronically integrated with a set of qubits and include a detection component, a stopping component, and an execution component.

[0028] In various aspects, a prior quantum circuit may have been performed on the set of qubits. In various cases, a detection component of a quantum computing tool may measure the state of the set of qubits (e.g., determine what state each qubit in the set of qubits is currently in). In various aspects, the detection component may facilitate such measurement by using any suitable quantum state readout technique and / or device. For example, in some cases, the detection component may be integrated with any suitable number of microwave readout resonators capable of measuring and / or detecting the state of superconducting qubits in the set of qubits. As another example, in some cases, the detection component may be integrated with any suitable number of photonic sensors capable of measuring and / or detecting the state of spin-based qubits in the set of qubits. It should be understood that these are merely examples of quantum state readout devices / techniques and are non-limiting. In various aspects, the detection component may implement any suitable combination of any other suitable quantum state readout devices / techniques.

[0029] Additionally, as will be appreciated by those skilled in the art, some quantum state readout devices / techniques can binary distinguish between ground states and excited states (e.g., when such a device / technique is implemented, measuring a first excited state will yield the same result as measuring a higher excited state), while other quantum state readout devices / techniques can granularly distinguish between different levels of excited states (e.g., when such a device / technique is implemented, measuring a first excited state will yield a different result than measuring a higher excited state). In various embodiments, any such quantum state readout device / technique may be implemented with a detection component. In various aspects, if the implemented quantum state readout device / technique can distinguish between different levels of excited states, it may be determined / inferred that quantum state leakage has occurred if any qubit in the set of qubits is in an excited state higher than the first excited state. In various cases, if the implemented quantum state readout device / technique can only binary distinguish between ground states and excited (e.g., non-ground) states, it may be determined / inferred that quantum state leakage has occurred if any qubit is in an excited (e.g., non-ground) state. In various other cases, if the implemented quantum state readout device / technique can only binary distinguish between ground states and excited (e.g., non-ground) states, one or more reset operations may be performed after execution of the previous quantum circuit and before measurement by the detection component, and if any qubits are in an excited (e.g., non-ground) state after execution of one or more reset operations, it may be determined / inferred that quantum state leakage has occurred (e.g., if one or more reset operations fail to return a set of qubits to the ground state, quantum state leakage may be inferred).

[0030] In various cases, the stopping component of a quantum computing tool can take action and / or avoid taking action based on quantum state measurements obtained by the detection component. For example, if the detection component determines and / or infers that quantum state leakage exists in the set of qubits, the stopping component can generate a strategic time stop before the execution of a next quantum circuit on the set of qubits, thereby postponing the execution of the next quantum circuit. On the other hand, if the detection component determines and / or infers that quantum state leakage does not exist in the set of qubits, the stopping component can avoid generating a strategic time stop, thereby not postponing the execution of the next quantum circuit. In various aspects, the strategic time stop can be a time span during which the next quantum circuit is not executed. During such a time span, the quantum state leakage detected by the detection component can naturally decay and / or relax back to a non-leaking state (e.g., decay and / or relax from a higher excited state back to the first excited state or the ground state). In various cases, the strategic time stop can have any suitable duration and / or length that allows the quantum state leakage to decay and / or relax back to a non-leaking state. In various embodiments, the duration of the strategic time stopping can be greater than and / or equal to a coherence time associated with the set of qubits, which may be an amount of time (e.g., on the order of milliseconds and / or microseconds) that the quantum state may last before being altered by interaction with the qubit's external environment. In various cases, the strategic time stopping can be on the same order of magnitude as the coherence time associated with the set of qubits (e.g., an order of magnitude can correspond to a power of 10). Thus, for example, if the set of qubits has a coherence time of T microseconds, for any suitable positive number T, then the duration of the strategic time stopping can be greater than and / or equal to T, and less than and / or equal to 10T (e.g., up to an order of magnitude greater than T).However, in various cases, the strategic time stopping can be an order of magnitude or more larger than the coherence time associated with the set of qubits.

[0031] As described above, in various embodiments, the detection component of a quantum computing tool can distinguish between different levels of excited states. In such cases, the stopping component can modify and / or adjust the duration of the strategic time stopping based on the magnitude, order, and / or level of the highest excited state detected by the detection component. In particular, the amount of time required for an excited state to naturally decay and / or relax back to the ground state or to the first excited state can increase with the magnitude, order, and / or level of the excited state (e.g., a third excited state can take longer to decay / relax than a second excited state, a fourth excited state can take longer to decay / relax than a third excited state, etc.). In various embodiments, the stopping component can have any suitable form of electronic access to a decay lookup table that can correlate different magnitudes, orders, and / or levels of excited states with different decay times. In various embodiments, such decay times can be obtained through routine experimentation (e.g., in the laboratory, a qubit can be placed in a second excited state and the amount of time it takes for the qubit to decay back to the first excited state and / or ground state can be recorded; similarly, in the laboratory, a qubit can be placed in a third excited state and the amount of time it takes for the qubit to decay back to the first excited state and / or ground state can be recorded). In this manner, the stopping component can adjust the length / duration of the strategic time stopping based on the magnitude of the quantum state leakage detected by the detection component (e.g., the more severe the quantum state leakage, the more time it may take for the quantum state leakage to dissipate).

[0032] In various aspects, the execution component of the quantum computing tool can execute, cause to be executed, and / or otherwise facilitate execution of the next quantum circuit on the set of qubits after the strategic time stopping has elapsed. As described above, the detection component can determine and / or infer that there is quantum state leakage associated with the set of qubits (e.g., can determine and / or infer that at least one qubit in the set of qubits is in a leaky state). In such cases, the stopping component can determine an amount of time to allow the quantum state leakage to naturally decay and / or relax back to a non-leaky state, and such amount of time can be considered a strategic time stopping. In various instances, the stopping component can implement the strategic time stopping by sending an electronic command to the execution component, the electronic command instructing the execution component to prevent and / or inhibit execution of the next quantum circuit during the strategic time stopping. In various aspects, the electronic command can instruct the execution component to execute, cause to be executed, and / or otherwise facilitate execution of the next quantum circuit once the strategic time stopping has elapsed. At such time, the quantum state leakage may naturally decay and / or relax back to a non-leaky state, so that the execution of the next quantum circuit on the set of qubits may not be impaired by the quantum state leakage. If the detection component determines and / or infers that there is no quantum state leakage associated with the set of qubits, the stopping component may send an electronic command to the execution component instructing the execution component to execute, cause to be executed, and / or otherwise expedite the execution of the next quantum circuit on the set of qubits without waiting / postponing.

[0033] To summarize some of the above, the detection component can measure the state of the set of qubits to determine whether quantum state leakage has occurred. If the detection component concludes that quantum state leakage has occurred, the stopping component can generate a strategic time stop and instruct the execution component to wait for the strategic time stop before executing the next quantum circuit on the set of qubits. Once the strategic time stop has elapsed, the execution component can proceed with execution of the next quantum circuit. If the detection component concludes that quantum state leakage has not occurred, the stopping component can avoid generating a strategic time stop, and the execution component can immediately proceed with execution of the next quantum circuit. By stopping when a leaky state is detected and not stopping when a leaky state is not detected (e.g., hence the name "strategic stopping"), quantum circuits can be executed on the set of qubits at a high / fast average repetition rate without being impaired by leaky states. This is certainly advantageous compared to stopping before each quantum circuit execution. Furthermore, such strategic stopping does not require the implementation and / or calibration of leakage mitigation pulses, making it even more advantageous.

[0034] To help clarify these advantages, consider the following non-limiting example. It should be understood that any numerical values ​​presented in the following example are illustrative and non-limiting. Consider a 20-qubit device with a coherence time of 100 microseconds (e.g., in the real world, it is more complicated, but for the purposes of this example, we assume that the coherence time of all levels / states of the qubits is the same). Further, assume that the leakage rate during the execution of a quantum state measurement is 0.1%, and that the leakage rate during the execution of an entangling gate (e.g., a two-qubit gate such as a Controlled-NOT) is 0.01%. Assume that a quantum circuit including all 20 qubits and with an entangling gate depth of 10 is executed on the 20-qubit device, and then a quantum state measurement is performed on all 20 qubits. In such a case, the probability of leakage of any given qubit during the execution of the circuit and measurement may be approximately 0.2% (e.g., 0.001*(1-0.0001)). 10 and the probability that a qubit leaks during measurement alone is given by 0.001*0.0001 10 the probability that the qubit leaks during the measurement and all entangling gates given by

number

[0035] Various embodiments of the present invention may address this issue by using strategic pauses. Specifically, a time pause long relative to the coherence time (e.g., greater than or on the same order of magnitude as the coherence time) may be inserted after performing a measurement to identify a leaky condition and before a subsequent circuit run. For a 100 microsecond coherence time, the time pause may be as long as 500 microseconds. During such a pause, any detected leaky condition may naturally decay and / or mitigate back to a non-leaky state so that subsequent circuit runs are not impaired by the leaky condition. As noted above, this example may include approximately 4% of runs with leaky conditions. Thus, a 500 microsecond time pause can be added to approximately 4% of the runs and not added to the remaining 96% of runs, which can result in an average repetition rate of approximately 32 microseconds (e.g., 96% of the circuit and measurement repeats in this example do not involve a leak condition and so can take 12 microseconds, and 4% of the circuit and measurement repeats in this example involve a leak condition and so can take 512 microseconds, resulting in 0.96*12+0.04*512=32). Note that an average repetition rate of 32 microseconds is significantly faster than stopping before each circuit, which would result in an average repetition rate of 512 microseconds. Also, note that although the average repetition rate of 32 microseconds is slightly slower than the 12 microsecond repetition rate that would be achieved without any stalling, the implementation of strategic stalling ameliorates the problem of circuit damage and / or contamination due to quantum state leakage (e.g., the implementation of time stalling allows detected leakage to decay and / or mitigate back to a non-leaky state so that such leakage does not impair subsequent circuit execution). Furthermore, as discussed above, strategic stalling does not require the implementation and / or calibration of any additional electrical pulses that would otherwise add overhead costs, noise, and / or decoherence.

[0036] Various embodiments of the present invention may be employed to utilize hardware and / or software to solve problems that are highly technical in nature (e.g., facilitating strategic stalling for quantum state leakage mitigation), are not abstract, and cannot be performed as a set of mental activities by a human. Furthermore, some of the processes performed may be performed by a special-purpose computer (e.g., a device operably coupled to a processor detecting quantum state leakage associated with one or more qubits; and, in response to the device detecting the quantum state leakage, generating a time stall prior to execution of a quantum circuit on one or more qubits, where generating the time stall occurs after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurred during execution of the previous quantum circuit, and where the quantum state leakage decays during the time stall). Such defined tasks are generally not performed manually by a human. Furthermore, neither the human mind nor a person with pen and paper can detect a leaky quantum state of a set of qubits and generate a time stall until the leaked quantum state relaxes back to a non-leaky state. Instead, various embodiments of the present invention are intrinsically and intimately tied to computer technology and cannot be implemented outside of a computing environment (e.g., quantum state leakage reduces the fidelity of quantum computers, and quantum computing techniques that can ameliorate such fidelity loss cannot be utilized in any practical way outside of a quantum computing environment).

[0037] In various instances, embodiments of the present invention can integrate the disclosed teachings regarding strategic stopping for quantum state leakage mitigation into practical applications. Indeed, as described herein, various embodiments of the present invention, which may take the form of systems and / or computer-implemented methods, can be viewed as a quantum computing tool that measures the state of a set of qubits to detect quantum state leakage (e.g., to determine whether any qubits in the set of qubits are in a leaky state). If the quantum computing tool determines that quantum state leakage has occurred, the quantum computing tool can postpone execution of a subsequent quantum circuit on the set of qubits for a specific period of time (e.g., during strategic time stopping). During such period, the quantum state leakage can naturally dissipate and return to the ground state or the first excited state, at which point the quantum state leakage no longer exists (e.g., the qubits are no longer in a leaky state). The quantum computing tool can then execute and / or otherwise cause a subsequent quantum circuit to be performed on the set of qubits. Because the quantum state leakage no longer exists during the execution of the subsequent quantum circuit, the subsequent quantum circuit may not be corrupted by the quantum state leakage. By inserting such a time pause when quantum state leakage is detected and not inserting such a time pause when quantum state leakage is not detected, the quantum circuit may be run at an increased average repetition rate on a set of qubits without a corresponding loss in fidelity and / or accuracy due to the leaky states. In other words, various embodiments of the present invention may improve the performance of quantum computing devices (e.g., increase the repetition rate and decrease the loss in fidelity). Systems and / or techniques that can ameliorate the problem of quantum state leakage while facilitating increased repetition rates clearly constitute concrete and tangible technological improvements in the field of quantum computing and / or quantum information processing.

[0038] Furthermore, various embodiments of the present invention may control tangible, hardware-based, and / or software-based devices based on the disclosed teachings. For example, embodiments of the present invention may measure / detect the state of tangible qubit devices, determine based on such measurement / detection whether at least one of the tangible qubit devices is currently leaky, postpone execution of a quantum circuit on such tangible qubit devices if at least one of the tangible qubit devices is leaky, and / or expedite execution of a quantum circuit on such tangible qubit devices if none of the tangible qubit devices are leaky. In other words, various embodiments of the present invention may control and improve the performance of real-world and tangible qubit devices. Accordingly, embodiments of the present invention constitute concrete and tangible technical improvements in the field of quantum computing and / or quantum information processing.

[0039] It should be understood that the figures and disclosure herein illustrate non-limiting examples of various embodiments of the present invention.

[0040] 1 illustrates a block diagram of an example, non-limiting system 100 that can facilitate strategic stopping for quantum state leakage mitigation in accordance with one or more embodiments described herein. As shown, in various embodiments, strategic stopping system 102 can be coupled to a set of qubits 104 via any suitable electrical connection (e.g., wired and / or wireless). The set of qubits 104 can comprise any suitable number of qubits (e.g., qubit 1, qubit 2, ... qubit n, for any suitable positive integer n, as shown). In various aspects, the set of qubits 104 can include any suitable combination of any suitable qubit types (e.g., superconducting qubits, spin-based qubits, quantum dots). In various cases, the qubits in the set of qubits 104 can have multiple states, i.e., a ground state and a first excited state (sometimes referred to as a computational basis state) and higher-order excited states (sometimes referred to as leaky states and / or leaky states). In various instances, it may be desirable to perform quantum computing and / or quantum information processing by executing quantum circuits on a set of qubits 104 and correspondingly measuring the resulting states of the set of qubits 104. In various instances, faster execution of such quantum circuits on a set of qubits 104 (e.g., faster and / or higher repetition rates) may be desirable. However, such faster execution may involve a loss of fidelity and / or precision due to quantum state leakage associated with the set of qubits 104 (e.g., if one or more qubits of the set of qubits 104 are in a leaky state, reset techniques may be ineffective and / or subsequent quantum circuit execution may be impaired). In various aspects, strategic stopping system 102 may facilitate such faster execution of quantum circuits on a set of qubits 104 without such a corresponding loss of fidelity and / or precision by implementing strategic stopping.

[0041] In various embodiments, the strategic shutdown system 102 may include a processor 106 (e.g., a computer processing unit, microprocessor) and a computer-readable memory 108 operatively connected to the processor 106. The memory 108 may store computer-executable instructions that, when executed by the processor 106, cause the processor 106 and / or other components of the strategic shutdown system 102 (e.g., the detection component 110, the shutdown component 112, the execution component 114) to perform one or more operations. In various embodiments, the memory 108 may store, and the processor 106 may execute, the computer-executable components (e.g., the detection component 110, the shutdown component 112, the execution component 114).

[0042] In various embodiments, strategic stopping system 102 may comprise an execution component 114. In various aspects, execution component 114 may execute, cause to be executed, and / or otherwise facilitate execution in any suitable manner of one or more quantum circuits on the set of qubits 104. In various instances, as described above, a quantum circuit may be an array of quantum gates (e.g., represented by unitary matrices) that can manipulate and / or transform the state of the set of qubits 104. Quantum circuits may be combined serially by matrix multiplication and / or in parallel by tensor products (e.g., Kronecker products). In some cases, execution component 114 may execute, cause to be executed, and / or otherwise facilitate execution of quantum circuits on the set of qubits 104 by driving the set of qubits 104 with controlled and / or regulated electromagnetic signals (e.g., execution component 114 may be integrated with any suitable quantum computing equipment, such as waveguides and / or signal generators / modulators, to generate and / or propagate such electromagnetic signals).

[0043] In various embodiments, strategic stopping system 102 may comprise detection component 110. In various aspects, detection component 110 may read, measure, detect, and / or otherwise sense the state of the set of qubits 104. In various cases, detection component 110 may implement and / or be electronically integrated with any suitable combination of quantum readout devices of any suitable type to facilitate such readout, measurement, detection, and / or otherwise sensing (e.g., detection component 110 may have a dedicated quantum readout device for each qubit in the set of qubits 104). For example, in various cases, detection component 110 may implement and / or be electronically integrated with any suitable microwave readout resonator capable of readout, measuring, detecting, and / or otherwise sensing the state of a superconducting qubit included in the set of qubits 104. As another example, in various cases, detection component 110 may implement and / or be electronically integrated with any suitable photonic sensor capable of reading, measuring, detecting, and / or otherwise sensing the state of a spin-based qubit included in the set of qubits 104. Those skilled in the art will appreciate that these are merely non-limiting examples of possible quantum readout devices that may be incorporated into various embodiments. In various cases, any other suitable quantum readout device and / or quantum readout technique may be implemented by detection component 110.

[0044] By reading, measuring, detecting, and / or otherwise sensing the state of the set of qubits 104, detection component 110 can determine whether there is quantum state leakage associated with the set of qubits 104. In various aspects, if detection component 110 determines that at least one qubit in the set of qubits 104 is in a leaky state (e.g., in a state other than the ground state or the first excited state), detection component 110 can conclude and / or infer that there is quantum state leakage associated with the set of qubits 104.

[0045] In some cases, as described above, detection component 110 may implement quantum readout devices and / or techniques that can distinguish between different levels of excited states. Such quantum readout devices and / or techniques may be capable of distinguishing between the ground state and any excited state, between a first excited state and a second excited state, between a second excited state and a third excited state, and / or between an xth excited state and a yth excited state, for any suitable positive integers x and y, where x≠y. In such cases, detection component 110 may conclude and / or infer that quantum state leakage associated with a set of qubits 104 exists when at least one qubit in the set of qubits 104 has a state that is neither the ground state nor the first excited state. Conversely, the detection component 110 may conclude and / or infer that there is no quantum state leakage associated with a set of qubits 104 when all qubits in the set of qubits 104 are in either the ground state or the first excited state (e.g., the set of qubits 104 may all be in the ground state, the set of qubits 104 may all be in the first excited state, and / or some of the set of qubits 104 may be in the ground state and the remaining set of qubits 104 may be in the first excited state).

[0046] In other cases, as described above, detection component 110 may implement quantum readout devices and / or techniques that can binary distinguish between ground states and excited states. Such quantum readout devices and / or techniques may be capable of distinguishing between ground states and any excited states, as will be understood by those skilled in the art, but may not be capable of distinguishing between first and second excited states, between second and third excited states, and / or between xth and yth excited states for any suitable positive integers x and y, where x≠y. In such cases, detection component 110 may, in various instances, conclude and / or infer that quantum state leakage associated with a set of qubits 104 exists when at least one qubit in the set of qubits 104 has a state that is not a ground state. In various other cases, if the quantum readout device and / or technique implemented by detection component 110 cannot distinguish between different levels of excited states, one or more reset operations (not shown in FIG. 1 ) may be performed on the set of qubits 104 prior to readout, measurement, detection, and / or otherwise sensing by detection component 110, and detection component 110 may conclude and / or infer that quantum state leakage associated with the set of qubits 104 exists when, after the one or more reset operations, at least one qubit in the set of qubits 104 is not in a ground state. Conversely, in various aspects, detection component 110 may conclude and / or infer that quantum state leakage associated with the set of qubits 104 does not exist when all qubits in the set of qubits 104 are in a ground state.

[0047] In various embodiments, strategic stopping system 102 may include stopping component 112. In various aspects, stopping component 112 may initiate an operation and / or prevent the initiation of an operation based on the determination of detection component 110. As explained above, execution component 114 may execute, cause execution, and / or otherwise facilitate the execution of a first quantum circuit on the set of qubits 104, and detection component 110 may read, measure, detect, and / or otherwise sense the resulting state of the set of qubits 104 after execution of the first quantum circuit. In other words, execution component 114 may perform a quantum computation on the set of qubits 104, and detection component 110 may read the result. In various aspects, it may be desirable for execution component 114 to execute, cause execution, and / or otherwise facilitate the execution of a second quantum circuit on the set of qubits 104. However, if quantum state leakage occurs during the execution of the first quantum circuit, such quantum state leakage may impair and / or contaminate the execution of the second quantum circuit. In various aspects, stopping component 112 can address and / or respond to such quantum state leakage. Specifically, if detection component 110 concludes and / or infers that there is quantum state leakage associated with a set of qubits 104, stopping component 112 generates a strategic time stop, during which such quantum state leakage may decay and / or relax back to a non-leaky state (e.g., a qubit in a leaky state may naturally dissipate over time back to the ground state and / or first excited state). Stopping component 112, in various aspects, can implement the strategic time stop by sending an electronic command instructing execution component 114 to wait from executing, causing execution, and / or otherwise facilitating execution of the second quantum circuit on the set of qubits 104 until the strategic time stop has elapsed.Because quantum state leakage may decay and / or mitigate during strategic time stopping, quantum state leakage is no longer present when the second quantum circuit is executed, meaning that execution of the second quantum circuit may not be impaired by quantum state leakage (e.g., loss of fidelity associated with execution of the second quantum circuit may be avoided by strategic time stopping). If detection component 110 concludes and / or infers that there is no quantum state leakage associated with the set of qubits 104, stopping component 112 may avoid generating a strategic time stopping. Thus, execution component 114 may execute, cause to execute, and / or otherwise facilitate execution of the second quantum circuit on the set of qubits 104 immediately after detection component 110 reads, measures, detects, and / or otherwise senses the state of the set of qubits 104 resulting from execution of the first quantum circuit. In this way, stopping component 112 may generate a strategic time stopping only when necessary (e.g., when quantum state leakage is detected, not when quantum state leakage is not detected). As a result, the quantum circuit may be able to be executed by the execution component 114 on a set of qubits 104 at a high average repetition rate without a corresponding loss of fidelity due to corruption of quantum state leakage.

[0048] In various embodiments, the duration of the strategic time stopping may be greater than and / or on the same order of magnitude as the coherence time associated with the set of qubits 104. For example, if the qubits in the set of qubits 104 have coherence times of T microseconds, for any suitable positive number T, then the duration of the strategic time stopping may be greater than and / or equal to T, and may be less than and / or equal to 10T. In some cases, each qubit in the set of qubits 104 may have its own corresponding coherence time (e.g., the qubits may have different coherence times), and the duration of the strategic time stopping may be greater than and / or on the same order of magnitude as the maximum coherence time of the set of qubits 104.

[0049] In various embodiments, if detection component 110 can distinguish between different levels of excited states, stopping component 112 can modify, adjust, and / or tune the duration of the strategic time stopping based on the highest excited state detected by detection component 110. For example, if the highest excited state detected by detection component 110 is the fourth excited state, stopping component 112 can cause the strategic time stopping to have a first duration, and if the highest excited state detected by detection component 110 is the fifth excited state, stopping component 112 can cause the strategic time stopping to have a second duration that is longer than the first duration (e.g., the fifth excited state may take longer to dissipate back to the ground state and / or the first excited state than the fourth excited state may take to dissipate back to the ground state and / or the first excited state). In this manner, stopping component 112 can tailor the duration of the strategic time stopping to the particular state of the set of qubits 104.

[0050] 2 illustrates a block diagram of an example, non-limiting system 200 including a quantum state leak that can facilitate strategic shutting down for quantum state leakage mitigation, in accordance with one or more embodiments described herein. As shown, system 200 may optionally include the same components as system 100 and may further include a quantum state leak 202.

[0051] In various embodiments, detection component 110 can use any suitable quantum readout device / technique (e.g., microwave readout resonator, photonic sensor) to read, measure, detect, and / or otherwise sense the state of the set of qubits 104. Specifically, the set of qubits 104 can include n qubits, and therefore detection component 110 can read, measure, detect, and / or otherwise sense n states. If detection component 110 can distinguish between different levels of excited states, then if detection component 110 determines that any of such n states are in a leaky state (e.g., any of such n states are not either the ground state or the first excited state), detection component 110 can conclude and / or infer that quantum state leakage 202 exists in the set of qubits 104. If detection component 110 can distinguish between different levels of excited states, and if detection component 110 determines that none of such n states are leaky states (e.g., none of such n states are either ground states or first excited states), detection component 110 can conclude and / or infer that quantum state leakage 202 is not present in the set of qubits 104. If detection component 110 can only binary distinguish between ground states and excited states, and if detection component 110 determines that any of such n states are non-ground states, detection component 110 can conclude and / or infer that quantum state leakage 202 is present in the set of qubits 104. If the detection component 110 can only binary distinguish between ground states and excited states, then if the detection component 110 determines that none of the n such states are non-ground states, the detection component 110 can conclude and / or infer that quantum state leakage 202 is not present in the set of qubits 104.

[0052] 3 illustrates a block diagram of an example, non-limiting qubit having various possible quantum states in accordance with one or more embodiments described herein. As illustrated, qubit 302 can have various possible states 304. Specifically, qubit 302 can have a ground state, a first excited state, a second excited state, ..., and an mth excited state, for any suitable positive integer m>1. In various aspects, the ground state and the first excited state are typically and / or often used to perform quantum computing and / or quantum information processing, and therefore these two states may be considered computational states 306 (e.g., the ground state may be denoted as |0〉 and the first excited state may be denoted as |1〉). In various instances, higher-order excited states (e.g., the second excited state, the mth excited state) are typically and / or often not used to perform quantum computing and / or quantum information processing, and therefore these states may be considered leaky states 308. If qubit 302 is in one of the leaky states 308, the execution of the quantum circuit on qubit 302 may be impaired and / or contaminated (e.g., may produce an incorrect result). Therefore, when executing a quantum circuit on qubit 302, it may be beneficial to ensure that qubit 302 is in one of the computation states 306 and not in one of the leaky states 308. As described herein, strategic stopping system 102 can ensure that this is the case.

[0053] 3 illustrates computational states 306 as including only the ground state and the first excited state, this is merely a non-limiting example. In some cases, computational states 306 may include the ground state, the first excited state, and any suitable number of higher excited states (e.g., the second excited state may in some cases be considered a computational state rather than a leaking state). In such cases, leaking states 308 may include higher excited states not included in computational states 306. As such, while the disclosure herein primarily discusses embodiments in which the leaking state is any state that is neither the ground state nor the first excited state, such discussion is non-limiting.

[0054] 4 illustrates a block diagram of an example, non-limiting system 400 including strategic time stopping that can facilitate strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein. As shown, system 400 may optionally include the same components as system 200 and may further include strategic time stopping 402.

[0055] In various aspects, if detection component 110 concludes and / or infers that quantum state leakage 202 is present in the set of qubits 104, stopping component 112 may generate strategic time stopping 402. On the other hand, if detection component 110 concludes and / or infers that quantum state leakage 202 is not present in the set of qubits 104, stopping component 112 may avoid generating strategic time stopping 402. In various aspects, strategic time stopping 402 may be a time span during which a quantum circuit is not executed on the set of qubits 104. Accordingly, quantum state leakage 202 may decay and / or relax during strategic time stopping 402. Once such decay and / or relaxation is complete, quantum state leakage 202 is no longer present in the set of qubits 104. In other words, any leaky state in the set of qubits 104 may dissipate and return to a non-leaky state during strategic time stopping 402. Note that such dissipation can occur naturally over time and does not require the set of qubits 104 to be exposed to various calibrated pulses (e.g., that are separate and / or different from the pulses used to run the quantum circuit or measure the quantum state) that could otherwise introduce additional noise and / or cost.

[0056] 5 shows a block diagram of a non-limiting example timeline demonstrating strategic stopping for quantum state leakage mitigation in accordance with one or more embodiments described herein. Specifically, FIG. 5 illustrates timeline 502 and timeline 516. Timeline 502 may represent quantum computing operations performed over time on a set of qubits 104 when strategic time stopping 402 is not implemented. Conversely, timeline 516 may represent quantum computing operations performed over time on a set of qubits 104 when strategic time stopping 402 is implemented. Consider timeline 502 first. As shown, a circuit execution 504 may be first performed on the set of qubits 104 (e.g., a first quantum circuit may be performed on the set of qubits 104), and a state measurement 506 may subsequently be performed on the set of qubits 104 to determine a result of circuit execution 504. Similarly, circuit execution 508 may be subsequently performed on the set of qubits 104 (e.g., a second quantum circuit may be performed on the set of qubits 104), and state measurement 510 may be subsequently performed on the set of qubits 104 to determine the result of circuit execution 508. Similarly, circuit execution 512 may be subsequently performed on the set of qubits 104 (e.g., a third quantum circuit may be performed on the set of qubits 104), and state measurement 514 may be subsequently performed on the set of qubits 104 to determine the result of circuit execution 512. In other words, timeline 502 shows that three quantum circuits are performed on the set of qubits 104, and each quantum circuit may be followed by a measurement operation. In various aspects, as shown, quantum state leakage 202 may occur (e.g., by chance) during circuit execution 508. In other words, at least one qubit of the set of qubits 104 may become leaky during circuit execution 508. Unfortunately, quantum state leakage 202 may persist from state measurement 510 through circuit execution 512 (e.g., in fact, quantum state leakage 202 may, in some cases, persist through several circuit execution and measurement iterations if left unaddressed).) As such, quantum state leakage 202 can adversely affect circuit execution 512 (e.g., and / or other subsequent circuit executions), which can result in a loss of fidelity.

[0057] In various aspects, this loss of fidelity may be avoided by implementing strategic time stopping 402. Consider timeline 516. Similar to timeline 502, in timeline 516, circuit execution 504 may be performed first, followed by state measurement 506, followed by circuit execution 508, followed by state measurement 510. However, instead of performing circuit execution 512 immediately after state measurement 510, strategic time stopping 402 may be inserted between state measurement 510 and circuit execution 512 in response to state measurement 510 detecting quantum state leakage 202. In response, quantum state leakage 202 may decay and / or relax back to a non-leaky state during strategic time stopping 402. Once strategic time stopping 402 has elapsed, circuit execution 512 may be performed, followed by state measurement 514. Because quantum state leakage 202 may decay and / or relax during strategic time stopping 402, quantum state leakage 202 no longer exists at the time of circuit execution 512, which means that circuit execution 512 may not be impaired and / or contaminated by quantum state leakage 202.

[0058] Note that no pause is inserted between state measurement 506 and circuit execution 508. This may be due to the fact that there is no quantum state leakage 202 occurring during circuit execution 504. In other words, strategic time pauses 402 can be inserted and / or implemented when needed (e.g., when a leaky state is detected) and not inserted and / or implemented when not needed (e.g., when a leaky state is not detected). As a result, the average repetition rate may increase without a corresponding loss of fidelity due to leakage.

[0059] Those skilled in the art will appreciate that FIG. 5 is illustrative and non-limiting and is not necessarily drawn to scale.

[0060] 6 illustrates a block diagram of an example, non-limiting system 600 including a decay lookup table that can facilitate strategic stopping for quantum state leakage mitigation, in accordance with one or more embodiments described herein. As shown, system 600 can optionally include the same components as system 400 and can further include a decay lookup table 602.

[0061] In various embodiments, if detection component 110 can distinguish between different levels of excited states, stopping component 112 can vary the duration of strategic time stopping 402 based on the highest excited state detected by detection component 110. In various cases, to facilitate such variation of the duration of strategic time stopping 402, stopping component 112 can have any suitable form of electronic access to decay lookup table 602. In various aspects, decay lookup table 602 can be centralized and / or distributed and can be any suitable data structure (e.g., a relational data structure, a graph data structure, a composite data structure) that can map and / or correlate different levels of excited states of a qubit to corresponding decay times. In other words, decay lookup table 602 can indicate how much time is required for a particular leaky state to naturally relax back to a non-leaking state (e.g., relax back to the ground state and / or first excited state). For example, decay lookup table 602 may indicate that a second excited state of a qubit in the set of qubits 104 may relax back to the first excited state in q microseconds for any suitable positive integer q, that a third excited state of a qubit in the set of qubits 104 may relax back to the first excited state in r microseconds for any suitable positive integer r, where r>q, and / or that a fourth excited state of a qubit in the set of qubits 104 may relax back to the first excited state in s microseconds for any suitable positive integer s, where s>r. Thus, if detection component 110 determines that at least one qubit in the set of qubits 104 is in the fourth excited state and that no qubit in the set of qubits 104 is in an excited state above the fourth excited state, stopping component 112 may cause strategic time stopping 402 to have a duration of s microseconds.If detection component 110 determines that at least one qubit in the set of qubits 104 is in a third excited state and that no qubit in the set of qubits 104 is in an excited state above the third excited state, stopping component 112 can cause strategic time stopping 402 to have a duration of r microseconds. If detection component 110 determines that at least one qubit in the set of qubits 104 is in a second excited state and that no qubit in the set of qubits 104 is in an excited state above the second excited state, stopping component 112 can cause strategic time stopping 402 to have a duration of q microseconds. In this manner, stopping component 112 can customize and / or adjust the duration of strategic time stopping 402 based on the magnitude of quantum state leakage 202.

[0062] In various aspects, the decay lookup table 602 may be obtained and / or generated in any suitable manner (e.g., it may be obtained through routine laboratory experiments in which a controlled qubit is forced into a leaky state and the time it takes for the controlled qubit to naturally decay back to the first excited state and / or back to the ground state is recorded).

[0063] 7 illustrates a block diagram of an example, non-limiting system 700 including a next quantum circuit that can facilitate strategic stopping for quantum state leakage mitigation, in accordance with one or more embodiments described herein. As shown, system 700 may optionally include the same components as system 600 and may further include a next quantum circuit 702.

[0064] In various embodiments, the execution component 114 may execute, cause to be executed, and / or otherwise expedite the execution of the next quantum circuit 702 on the set of qubits 104 after the strategic time stopping 402 has elapsed. In other words, the stopping component 112 may instruct and / or command the execution component 114 to postpone the execution of the next quantum circuit 702 until the strategic time stopping 402 has elapsed. As described above, the quantum state leakage 202 may decay and / or mitigate during the strategic time stopping 402. Accordingly, upon execution of the next quantum circuit 702, the quantum state leakage 202 may no longer be present, which means that the fidelity and / or precision associated with the execution of the next quantum circuit 702 may not be reduced by the quantum state leakage 202. In various aspects, if strategic time stopping 402 is not generated by stopping component 112, execution component 114 may execute, cause to be executed, and / or otherwise expedite the execution of the next quantum circuit 702 on the set of qubits 104 immediately after detection component 110 reads, measures, detects, and / or otherwise senses the state of the set of qubits 104. That is, stopping component 112 may instruct and / or command execution component 114 that there is no need to postpone the execution of the next quantum circuit 702. Again, this may result in an increase in the average repetition rate without a corresponding decrease in fidelity.

[0065] 8 illustrates a block diagram of an example, non-limiting system 800 including a stop-while quantum state measurement that can facilitate strategic stoppage for quantum state leakage mitigation, according to one or more embodiments described herein. As shown, system 800 can optionally include the same components as system 700 and can further include a stop-while quantum state measurement 802.

[0066] In various aspects, detection component 110 may perform one or more stop-while quantum state measurements 802. That is, detection component 110 may, in some cases, read, measure, detect, and / or otherwise sense the state of the set of qubits 104 during strategic time stop 402 (e.g., before strategic time stop 402 has elapsed). In various cases, if stop-while quantum state measurements 802 indicate that quantum state leakage 202 has already dissipated before strategic time stop 402 has elapsed, execution component 114 may cease postponing execution of the next quantum circuit 702 (e.g., if quantum state leakage 202 has already decayed, such as in a situation where the duration of strategic time stop 402 is longer than required, the next quantum circuit 702 may be executed on the set of qubits 104 before the end of strategic time stop 402). On the other hand, if the stopping quantum state measurement 802 indicates that the quantum state leakage 202 has not yet dissipated, the execution component 114 may continue to postpone execution of the next quantum circuit 702 (e.g., the next quantum circuit 702 should not yet be executed on the set of qubits 104 because the quantum state leakage 202 has not yet decayed). In various cases, any suitable number of stopping quantum state measurements 802 may be implemented during the strategic time stopping 402. In various cases where multiple stopping quantum state measurements 802 are implemented, they may be performed at any suitable regular and / or irregular intervals (e.g., at intervals separated by the coherence time of the set of qubits 104).

[0067] 9, 10, and 11 illustrate flow diagrams of non-limiting example computer-implemented methods 900, 1000, and 1100 that may facilitate strategic stopping for quantum state leakage mitigation, according to one or more embodiments described herein.

[0068] Consider Figure 9 and computer-implemented method 900. As shown, in various embodiments, operation 902 may include a device (e.g., 114) operably coupled to a processor executing a quantum circuit (e.g., 508) on a set of qubits (e.g., 104).

[0069] In various aspects, operation 904 may include a device (eg, 110) measuring the state of the set of qubits.

[0070] In various cases, operation 906 may include the device (e.g., 110) determining whether any qubits in the set of qubits are in a leaky state (e.g., 202 and / or 308). If not, the computer-implemented method 900 may continue back to operation 902. If so, the computer-implemented method 900 may proceed to operation 908.

[0071] In various cases, operation 908 may include the device (e.g., 112) pausing before performing any other circuitry (e.g., 512 and / or 702) on the set of qubits if the duration of the pause (e.g., 402) is greater than or on the order of a coherence time associated with the set of qubits. In various aspects, the computer-implemented method 900 may then continue back to operation 902.

[0072] In summary, computer-implemented method 900 may include executing a quantum circuit on a set of qubits, measuring the quantum states of the set of qubits, determining whether any leaked quantum states are present, and if so, postponing execution of the next quantum circuit until any leaked quantum states have decayed. If no leaked quantum states are present, the next quantum circuit may be executed immediately without waiting / postponing.

[0073] In some aspects, as shown, the computer-implemented method 900 may optionally proceed from operation 908 to callout A, as illustrated in FIG.

[0074] Consider Figure 10 and computer-implemented method 1000. As shown, in various aspects, callout A may proceed to operation 1002, which may include measuring the state of a set of qubits (e.g., 802) while a device (e.g., 110) is on and off.

[0075] In various cases, operation 1004 may include a device (e.g., 110) determining whether any qubits in the set of qubits are in a leaky state. If not, the computer-implemented method 1000 may proceed to operation 1006. If so, the computer-implemented method 1000 may proceed to operation 1008.

[0076] In various cases, operation 1006 may involve continuing back to operation 902 immediately; that is, without waiting for the stall to elapse.

[0077] In various embodiments, operation 1008 includes subsequently returning to operation 902 after the shutdown has elapsed, thereby allowing any detected leak condition to decay.

[0078] In summary, the computer-implemented method 1000 shows how quantum state measurement during pause 802 can be implemented (e.g., the execution component 114 does not need to postpone for the entire duration of the strategic time pause 402 if the quantum state leakage 202 has already decayed before the end of the strategic time pause 402).

[0079] 11 and computer-implemented method 1100. In various embodiments, operation 1102 may include a device (e.g., 110) operably coupled to a processor detecting quantum state leakage (e.g., 202) associated with one or more qubits (e.g., 104).

[0080] In various aspects, operation 1104 may include a device (e.g., 112) generating a time stop (e.g., 402) prior to execution of a quantum circuit (e.g., 702 and / or 512) on one or more qubits in response to detecting quantum state leakage. In some cases, generating the time stop may occur after execution of a previous quantum circuit (e.g., 508) on one or more qubits. In some cases, quantum state leakage may occur during execution of the previous quantum circuit. In some cases, quantum state leakage may decay during the time stop.

[0081] Although not shown in FIG. 11 , in some cases, the computer-implemented method 1100 may further include a device (e.g., 110) performing one or more quantum state measurements on one or more qubits during the time stop (e.g., 802), where the one or more quantum state measurements binary distinguish between a ground state and an excited state, and if the one or more quantum state measurements indicate that the one or more qubits are in a ground state, the device (e.g., 114) executing a quantum circuit on the one or more qubits.

[0082] Although not shown in FIG. 11 , in some cases, the computer-implemented method 1100 may further comprise a device (e.g., 110) performing one or more quantum state measurements on one or more qubits during the time stop (e.g., 802), where the one or more quantum state measurements distinguish between different levels of excited states, and the device (e.g., 114) executing a quantum circuit on the one or more qubits if the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of the ground state and the first excited state.

[0083] Although not shown in FIG. 11, in some cases, the computer-implemented method 1100 may further comprise the device (e.g., 112) varying the duration of the time stop based on the highest excitation state detected during the detecting.

[0084] By way of example and not limitation, the disclosure herein discusses embodiments in which execution component 114 executes and / or causes to be executed a quantum circuit on a set of qubits 104 and detection component 110 measures the state of the set of qubits 104. In some embodiments, execution component 114 may execute and / or cause to be executed a quantum circuit that operates on only a subset of the set of qubits 104. In such cases, detection component 110 may measure the state of such a subset of the set of qubits 104, rather than measuring the state of the entire set of qubits 104.

[0085] Various embodiments of the present invention may address the problem of quantum state leakage. Specifically, if a qubit is in a leaky state, it may impair and / or contaminate the execution of a subsequent quantum circuit that includes that qubit. In various aspects, embodiments of the present invention may solve this problem by inserting a time pause before the execution of a quantum circuit whenever a quantum state leak is detected. The time pause may allow the quantum state leak to naturally relax back to a non-leaky state, at which point the subsequent quantum circuit may be executed without loss of fidelity. Also, because such a time pause may not be inserted if no quantum state leak is detected, the average repetition rate of such a quantum circuit may be increased by various embodiments of the present invention. Accordingly, embodiments of the present invention may increase the repetition rate of quantum circuit execution without experiencing the corresponding loss of fidelity typically associated with quantum state leakage. Furthermore, various embodiments of the present invention may facilitate such benefits without implementing specially tailored leakage mitigation pulses that would otherwise add noise and cost to quantum computing.

[0086] To provide additional context for the various embodiments described herein, Figure 12 and the following discussion are intended to provide a brief, general description of a suitable computing environment 1200 in which various embodiments of the embodiments described herein may be implemented. While the embodiments have been described above in the general context of computer-executable instructions that may be executed on one or more computers, those skilled in the art will recognize that the embodiments may also be implemented in combination with other program modules and / or combinations of hardware and software.

[0087] Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Those skilled in the art will also appreciate that the methods of the present invention may be practiced with other computer system configurations, including single-processor or multi-processor computer systems, minicomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronic devices, etc., each of which may be operatively coupled to one or more associated devices.

[0088] The illustrated embodiments of the present specification may also be practiced in distributed computing environments where certain tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0089] A computing device typically includes various media, which may include computer-readable storage media, machine-readable storage media, and / or communication media, as the two terms are used interchangeably herein. A computer-readable storage medium or machine-readable storage medium may be any available storage medium that can be accessed by a computer and includes both volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, a computer-readable storage medium or machine-readable storage medium may be implemented in connection with any method or technology for storing information, such as computer-readable or machine-readable instructions, program modules, structured or unstructured data, etc.

[0090] Computer-readable storage media include, but are not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, Compact Disk Read Only Memory (CD ROM), Digital Versatile Disk (DVD), Blu-ray Disc (BD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, solid-state drives or other solid-state storage devices, or other tangible and / or non-transitory media that may be used to store the desired information. In this regard, the terms "tangible" or "non-transient" herein as applied to storage, memory, or computer-readable media should be understood to exclude as modifiers only self-propagating, transient signals, and not to disclaim any right to all standard storage, memory, or computer-readable media that are not solely self-propagating, transient signals.

[0091] The computer-readable storage medium may be accessed by one or more local or remote computing devices for various operations on the information stored by the medium, for example, via access requests, queries, or other data retrieval protocols.

[0092] Communication media typically embodies computer-readable instructions, data structures, program modules, or other structured or unstructured data in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery or transport medium. The term "modulated data signal" or signal refers to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal or signals. By way of example, and not limitation, communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, radio frequency, infrared and other wireless media.

[0093] 12, an exemplary environment 1200 for implementing various embodiments of the aspects described herein includes a computer 1202, the computer 1202 including a processing unit 1204, a system memory 1206, and a system bus 1208. The system bus 1208 couples system components including, but not limited to, the system memory 1206 to the processing unit 1204. The processing unit 1204 can be any of a variety of commercially available processors. Dual microprocessors and other multi-processor architectures can also be utilized as the processing unit 1204.

[0094] The system bus 1208 may be any of several types of bus structures that may be further interconnected into a memory bus, a peripheral bus, and a local bus (with or without a memory controller) using any of a variety of commercially available bus architectures. The system memory 1206 includes ROM 1210 and RAM 1212. The basic input / output system (BIOS) may be stored in non-volatile memory such as ROM, erasable programmable read-only memory (EPROM), or EEPROM, and contains the basic routines that help to transfer information between elements within the computer 1202, such as during start-up. The RAM 1212 may also include high-speed RAM, such as static RAM, for caching data.

[0095] The computer 1202 further includes an internal hard disk drive (HDD) 1214 (e.g., EIDE, SATA), one or more external storage devices 1216 (e.g., a magnetic floppy disk drive (FDD) 1216, a memory stick or flash drive reader, a memory card reader, etc.), and a drive 1220, such as a solid-state drive, optical disk drive, etc., that can read from or write to a disk 1222, such as a CD-ROM disk, DVD, BD, etc. Alternatively, where a solid-state drive is involved, the disk 1222 is not included unless it is separate. While the internal HDD 1214 is shown as located within the computer 1202, the internal HDD 1214 could also be configured for external use in a suitable chassis (not shown). Additionally, although not shown in the environment 1200, a solid-state drive (SSD) could be used in addition to or in place of the HDD 1214. HDD 1214, external storage device 1216, and drive 1220 may be connected to system bus 1208 by HDD interface 1224, external storage interface 1226, and drive interface 1228, respectively. Interface 1224 for external drive implementations may include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are within the contemplation of the embodiments described herein.

[0096] The drives and their associated computer-readable storage media provide non-volatile storage of data, data structures, computer-executable instructions, etc. For computer 1202, the drives and storage media correspond to the storage of any data in a suitable digital format. While the above description of computer-readable storage media refers to each type of storage device, those skilled in the art will understand that other types of computer-readable storage media, whether currently existing or developed in the future, may also be used in the exemplary operating environment, and further, any such storage media may include computer-executable instructions for performing the methods described herein.

[0097] A number of program modules may be stored in the drives and RAM 1212, including an operating system 1230, one or more application programs 1232, other program modules 1234, and program data 1236. All or portions of the operating system, applications, modules, and / or data may also be cached in RAM 1212. The systems and methods described herein may be implemented using various commercially available operating systems or combinations of operating systems.

[0098] Computer 1202 may optionally include emulation technology. For example, a hypervisor (not shown) or other intermediary may emulate a hardware environment for operating system 1230, and the emulated hardware may optionally differ from the hardware shown in FIG. 12. In one such embodiment, operating system 1230 may comprise one virtual machine (VM) of multiple VMs hosted on computer 1202. Additionally, operating system 1230 may provide a runtime environment, such as the Java™ Runtime Environment or the .NET Framework, for application 1232. A runtime environment is a consistent execution environment that allows application 1232 to run on any operating system that includes the runtime environment. Similarly, operating system 1230 may support containers, and application 1232 may be in the form of a container, which is a lightweight, standalone, executable software package that includes, for example, code, runtime, system tools, system libraries, and settings for the application.

[0099] Additionally, computer 1202 may be enabled with a security module such as a Trusted Processing Module (TPM). For example, with a TPM, a boot component hashes the boot component within the next hour and waits until the result matches a protected value before loading the next boot component. This process may be performed at any layer in the code execution stack of computer 1202, such as at the application execution level or the operating system (OS) kernel level, thereby enabling security at any level of code execution.

[0100] A user may enter commands and information into the computer 1202 through one or more wired / wireless input devices, such as a keyboard 1238, a touch screen 1240, and a pointing device such as a mouse 1242. Other input devices (not shown) may include a microphone, an infrared (IR) remote control, a radio frequency (RF) remote control, or other remote control, a joystick, a virtual reality controller and / or virtual reality headset, a game pad, a stylus pen, an image input device such as a camera, a gesture sensor input device, a vision movement sensor input device, an emotion or face detection device, a biometric input device such as a fingerprint or iris scanner, etc. These and other input devices are often connected to the processing unit 1204 through an input device interface 1244, which may be coupled to the system bus 1208, but may also be connected by other interfaces, such as a parallel port, an IEEE 1394 serial port, a game port, a USB port, an IR interface, a Bluetooth interface, etc.

[0101] A monitor 1246 or other type of display device may also be connected to the system bus 1208 via an interface, such as a video adapter 1248. In addition to the monitor 1246, computers typically include other peripheral output devices (not shown), such as speakers, printers, etc.

[0102] The computer 1202 may operate in a networked environment using logical connections via wired and / or wireless communications to one or more remote computers, such as a remote computer 1250. The remote computer 1250 may be a workstation, a server computer, a router, a personal computer, a portable computer, a microprocessor-based entertainment device, a peer device or other common network node, and typically includes many or all of the elements described relative to the computer 1202, although for simplicity, only the memory / storage device 1252 is illustrated. The logical connections depicted include wired / wireless connectivity to a local area network (LAN) 1254 and / or larger networks, such as a wide area network (WAN) 1256. Such LAN and WAN networking environments are commonplace in offices and companies and facilitate enterprise-wide computer networks, such as intranets, all of which may connect to a global communications network, e.g., the Internet.

[0103] When used in a LAN networking environment, the computer 1202 may be connected to the local network 1254 through a wired and / or wireless communication network interface or adapter 1258. The adapter 1258 may facilitate wired or wireless communication to the LAN 1254, which may also include a wireless access point (AP) disposed thereon for communicating with the adapter 1258 in a wireless mode.

[0104] When used in a WAN networking environment, the computer 1202 may include a modem 1260 or may be connected to a communications server on the WAN 1256 via other means for establishing communications over the WAN 1256, such as via the Internet. The modem 1260, which may be internal or external and a wired or wireless device, may be connected to the system bus 1208 via the input device interface 1244. In a networked environment, program modules depicted relative to the computer 1202, or portions thereof, may be stored in the remote memory / storage device 1252. It will be appreciated that the network connections shown are examples and other means of establishing a communications link between computers may be used.

[0105] When used in either a LAN or WAN networking environment, computer 1202 may access cloud storage systems or other network-based storage systems, including, but not limited to, networked virtual machines, that provide one or more aspects of information storage or processing, in addition to or in place of external storage device 1216, as described above. Generally, the connection between computer 1202 and the cloud storage system may be established over LAN 1254 or WAN 1256, for example, by adapter 1258 or modem 1260, respectively. Upon connecting computer 1202 to an associated cloud storage system, external storage interface 1226, with the aid of adapter 1258 and / or modem 1260, may manage the storage provided by the cloud storage system as it manages other types of external storage. For example, external storage interface 1226 may be configured to provide access to cloud storage sources as if the sources were physically connected to computer 1202.

[0106] The computer 1202 may be operable to communicate with any wireless device or entity operably arranged in wireless communication, such as, for example, a printer, a scanner, a desktop and / or portable computer, a portable data assistant, a communications satellite, any appliance or location associated with a radio-detectable tag (e.g., a kiosk, a newsstand, a store shelf, etc.), and a telephone. This may include Wireless Fidelity (Wi-Fi®) and Bluetooth® wireless technologies. Accordingly, communication may be in a predefined structure, similar to a traditional network, or ad-hoc communication between at least two devices.

[0107] 13 , an exemplary cloud computing environment 1300 is illustrated. As shown, the cloud computing environment 1300 includes one or more cloud computing nodes 1302 with which local computing devices used by cloud consumers, such as, for example, a personal digital assistant (PDA) or mobile phone 1304, a desktop computer 1306, a laptop computer 1308, and / or an automobile computer system 1310, may communicate. The nodes 1302 may communicate with each other. They may be physically or virtually grouped (not shown) in one or more networks, such as a private cloud, a community cloud, a public cloud, or a hybrid cloud, or a combination thereof, as described above. This enables the cloud computing environment 1300 to provide infrastructure, platform, and / or software as a service without the cloud consumer having to maintain resources on their local computing devices. It will be understood that the types of computing devices 1304-1310 illustrated in FIG. 13 are intended to be exemplary only, and that computing node 1302 and cloud computing environment 1300 can communicate with any type of computerized device through any type of network and / or network-addressable connection (e.g., using a web browser).

[0108] Referring now to Figure 14, a set of functional abstraction layers provided by cloud computing environment 1300 (Figure 13) is shown. Repetitive descriptions of similar elements utilized in other embodiments described herein will be omitted for the sake of brevity. It should be understood in advance that the components, layers, and functions shown in Figure 14 are intended to be exemplary only, and embodiments of the present invention are not limited thereto. As shown, the following layers and corresponding functions are provided:

[0109] Hardware and software layer 1402 comprises hardware and software components. Examples of hardware components include mainframe 1404, RISC (reduced instruction set computer) architecture-based server 1406, server 1408, blade server 1410, storage device 1412, and network and networking components 1414. In some embodiments, software components include network application server software 1416 and database software 1418.

[0110] The virtualization layer 1415 provides an abstraction layer over which the following examples of virtual entities can be provided: virtual servers 1422; virtual storage 1424; virtual networks 1426, including virtual private networks; virtual applications and operating systems 1428; and virtual clients 1430.

[0111] In one example, management layer 1432 may provide the functionality described below. Resource provisioning 1434 provides dynamic procurement of computing and other resources utilized to execute tasks within the cloud computing environment. Metering and pricing 1436 provides cost tracking as resources are utilized within the cloud computing environment and billing or invoicing for the consumption of these resources. In one example, these resources may include application software licenses. Security provides identity verification of cloud consumers and tasks, as well as protection of data and other resources. User portal 1438 provides consumers and system administrators with access to the cloud computing environment. Service level management 1440 provides allocation and management of cloud computing resources so that required service levels are met. Service level agreement (SLA) planning and fulfillment 1442 provides advance arrangement and procurement of cloud computing resources that anticipate future requirements according to SLAs.

[0112] Workload tier 1444 provides examples of functionality for which a cloud computing environment may be utilized. Examples of workloads and functionality that may be provided from this tier include mapping and navigation 1446; software development and lifecycle management 1448; virtual classroom instructional delivery 1450; data analytics processing 1452; transaction processing 1454; and differential private federated learning processing 1456. Various embodiments of the present invention may utilize the cloud computing environment described with reference to Figures 13 and 14 to perform one or more differential private federated learning processes according to various embodiments described herein.

[0113] The present invention may be a system, method, apparatus and / or computer program product at any possible level of technical detail of integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to perform aspects of the present invention. A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above. A non-exhaustive list of more specific examples of computer-readable storage media may also include the following: portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or raised structures in grooves with instructions recorded on them, and any suitable combination of the above. As used herein, computer-readable storage media should not be construed as ephemeral signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses through a fiber optic cable), or electrical signals transmitted through wires.

[0114] The computer-readable program instructions described herein may be downloaded to each computing / processing device from a computer-readable storage medium, or may be downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device. The computer-readable program instructions for carrying out operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk®, C++, or the like, or conventional procedural programming languages ​​such as the “C” programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer, or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider).In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuitry to perform aspects of the present invention.

[0115] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to create a machine, whereby the instructions, executing on the processor of the computer or other programmable data processing apparatus, create means for implementing the function / acts specified in the block or blocks of the flowchart illustrations and / or block diagrams. These computer-readable program instructions can also be stored on a computer-readable storage medium that can instruct a computer, programmable data processing apparatus, and / or other device to function in a particular manner, whereby the computer-readable storage medium having instructions stored thereon comprises a product containing instructions that implement an aspect of the function / act specified in the block or blocks of the flowchart illustrations and / or block diagrams. The computer-readable program instructions may be loaded into a computer, other programmable data processing apparatus, or other device to generate a computer-implemented process, causing a series of operable operations to be performed on the computer, other programmable apparatus, or other device, such that the instructions, which execute on the computer, other programmable apparatus, or other device, implement the function / operation specified in the block or blocks of the flowcharts and / or block diagrams.

[0116] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, depending on the functionality involved, or the blocks may even be executed in the reverse order. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified functions or operations or executes a combination of dedicated hardware and computer instructions.

[0117] Although the subject matter has been described above in the general context of computer-executable instructions for a computer program product executing on a computer and / or multiple computers, those skilled in the art will recognize that the present disclosure can also be implemented in combination with other program modules. Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks and / or implement particular abstract data types. Those skilled in the art will also recognize that the computer-implemented methods of the present invention can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputing devices, mainframe computers, computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronic devices, etc. The illustrated aspects can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, some, if not all, aspects of the present disclosure can be practiced on stand-alone computers. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0118] As used herein, terms such as “component,” “system,” “platform,” and “interface” may refer to and / or include computer-related entities or entities associated with operating machines having one or more specific functionalities. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. By way of example, both an application running on a server and the server may be a component. One or more components may reside within a process and / or thread of execution, and components may be localized on one computer and / or distributed among two or more computers. In another example, each component may execute from various computer-readable media having various data structures stored thereon. Components may communicate via local and / or remote processes, such as according to signals comprising one or more data packets (e.g., data from one component interacting with another component in a local system, a distributed system, and / or a network such as the Internet with other systems via signals). As another example, a component may be a device having inherent functionality provided by mechanical parts operated by electrical or electronic circuitry operated by a software or firmware application executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware application. As yet another example, a component may be a device that provides inherent functionality without mechanical parts through electronic components that may include a processor or other means for executing software or firmware that at least partially provides the functionality of the electronic component.In some aspects, the component may emulate an electronic component via a virtual machine, for example, in a cloud computing system.

[0119] Additionally, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise specified or clear from the context, "X utilizes A or B" is intended to mean any of the natural inclusive permutations. That is, if X utilizes A; X utilizes B; or X utilizes both A and B, then "X utilizes A or B" is satisfied under any of the aforementioned plural cases. Furthermore, the articles "a" and "an" as used in this specification and the accompanying drawings should generally be construed to mean "one or more" unless otherwise specified or clear from the context that the singular is intended. As used herein, the terms "example" and / or "exemplary" are used to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. Additionally, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, and is not intended to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0120] The term "processor" as used herein may refer to virtually any computing processing unit or device, including, but not limited to, a single-core processor; a single processor with software multithreading execution capabilities; a multi-core processor; a multi-core processor with software multithreading execution capabilities; a multi-core processor with hardware multithreading technology; a parallel platform; and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Furthermore, a processor may utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space utilization or enhance the performance of user equipment. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as "store," "storage," "data store," "data storage," "database," and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a "memory" or a "memory component" entity embodied in a component that includes memory. It should be understood that memory and / or memory components described herein may be either volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory may include RAM, which may act as external cache memory, for example. By way of example, and not limitation, RAM is available in many forms, including synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Additionally, the disclosed memory components of systems or computer-implemented methods herein are intended to include, but are not limited to, these and any other suitable types of memory.

[0121] The foregoing includes merely exemplary systems and computer-implemented methods. Of course, for purposes of describing the present disclosure, it is of course not possible to describe every conceivable combination of components or computer-implemented methods, but one of ordinary skill in the art may recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that terms such as "including," "having," "comprising," and the like are used in the detailed description, claims, appendices, and drawings, such terms are intended to be inclusive in the same manner as the term "comprising" is interpreted when used as a transitional phrase in the claims.

[0122] The description of various embodiments is presented for illustrative purposes and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements over the art found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein. (Other possible items) [Item 1] a processor executing computer-executable components stored in a computer-readable memory, the computer-executable components comprising: a detection component that detects quantum state leakage associated with one or more qubits; and a stopping component that, in response to detecting the quantum state leakage, generates a time stop prior to execution of a quantum circuit on the one or more qubits. A system comprising: [Item 2] Item 10. The system of item 1, wherein the stopping component generates the time stopping after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurs during the execution of the previous quantum circuit, and where the quantum state leakage decays during the time stopping. [Item 3] the detection component performs one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements binary distinguish between a ground state and an excited state, and further: an execution component that executes the quantum circuit on the one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a basis state. 3. The system according to item 1 or 2, comprising: [Item 4] the detection component performs one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements distinguish between different levels of excited states, and further: an execution component that executes the quantum circuit on one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of the ground state and a first excited state. 4. The system according to any one of items 1 to 3, comprising: [Item 5] 5. The system of any one of claims 1 to 4, wherein the stopping component varies the duration of the time stop based on the highest excitation state detected by the detection component. [Item 6] 6. The system of any one of items 1 to 5, wherein the duration of the time stop is greater than a coherence time of the one or more qubits. [Item 7] 7. The system of any one of items 1 to 6, wherein the duration of the time stop is of the same order of magnitude as a coherence time of the one or more qubits. [Item 8] a device operably coupled to the processor detecting quantum state leakage associated with one or more qubits; and generating a time pause prior to execution of a quantum circuit on the one or more qubits, the device responding to detecting the quantum state leakage. A computer-implemented method comprising: [Item 9] Item 9. The computer-implemented method of item 8, wherein the generating the time stopping occurs after execution of a previous quantum circuit on the one or more qubits, wherein the quantum state leakage occurred during the execution of the previous quantum circuit, and wherein the quantum state leakage decays during the time stopping. [Item 10] the device performing one or more quantum state measurements on the one or more qubits during the time pause, wherein the one or more quantum state measurements binary distinguish between a ground state and an excited state; and the device executing the quantum circuit on the one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a basis state. 10. The computer-implemented method of claim 8 or 9, further comprising: [Item 11] the device performing one or more quantum state measurements on the one or more qubits during the time pause, wherein the one or more quantum state measurements distinguish between different levels of excited states; and the device executing the quantum circuit on the one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of a ground state and a first excited state. 11. The computer-implemented method of any one of items 8 to 10, further comprising: [Item 12] 12. The computer-implemented method of claim 8, further comprising: the device varying a duration of the time pause based on a highest excitation state detected during the detecting step. [Item 13] 13. The computer-implemented method of any one of items 8 to 12, wherein the duration of the time stop is greater than a coherence time of the one or more qubits. [Item 14] Item 14. The computer-implemented method of item 13, wherein the duration of the time stopping is on the same order of magnitude as the coherence time of the one or more qubits. [Item 15] 1. A computer program product for facilitating strategic stopping for quantum state leakage mitigation, the computer program product having a computer readable memory embodied with program instructions that cause a processor to: the processor detecting quantum state leakage associated with one or more qubits; and generating a time pause prior to execution of a quantum circuit on the one or more qubits in response to detecting the quantum state leakage. a computer program product executable by said processor to cause said processor to perform [Item 16] Item 16. The computer program product of item 15, wherein the processor generates the time stopping after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurred during the execution of the previous quantum circuit, and where the quantum state leakage decays during the time stopping. [Item 17] The program instructions direct the processor to: the processor performing one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements binary distinguish between a ground state and an excited state; and if the one or more quantum state measurements indicate that the one or more qubits are in a basis state, then the processor executes the quantum circuit on the one or more qubits. 17. The computer program product according to item 15 or 16, further executable to cause [Item 18] The program instructions direct the processor to: the processor performing one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements distinguish between different levels of excited states; and the processor executing the quantum circuit on the one or more qubits if the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of the ground state and a first excited state. 18. The computer program product of any one of items 15 to 17, further executable to cause [Item 19] The program instructions direct the processor to: the processor varying the duration of the time pause based on the highest excitation state detected by the processor. 19. The computer program product of any one of items 15 to 18, further executable to cause [Item 20] 20. The computer program product of any one of items 15 to 19, wherein a duration of the time stop is greater than a coherence time of the one or more qubits, and wherein the duration of the time stop is of the same order of magnitude as the coherence time of the one or more qubits.

Claims

1. a processor for executing computer-executable components stored in a computer-readable memory, the computer-executable components comprising: a detection component that detects quantum state leakage associated with one or more qubits; a stopping component that generates a time stop prior to execution of a quantum circuit on the one or more qubits in response to detecting the quantum state leakage; an execution component that initiates execution of the quantum circuit on the one or more qubits during the time pause in response to the one or more quantum state measurements indicating that the one or more qubits are in a basis state; The system, wherein the detection component performs one or more quantum state measurements on the one or more qubits during the time stop, wherein the one or more quantum state measurements binary distinguish between a ground state and an excited state.

2. 2. The system of claim 1 , wherein the stopping component generates the time stopping after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurs during the execution of the previous quantum circuit, and where the quantum state leakage decays during the time stopping.

3. A method for implementing a method for implementing a computer-executable program, comprising: a processor for executing computer-executable components stored in computer-readable memory, the computer-executable components comprising: a detection component that detects quantum state leakage associated with one or more qubits; a stopping component that generates a time stop prior to execution of a quantum circuit on the one or more qubits in response to detecting the quantum state leakage; an execution component that executes the quantum circuit on the one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of the ground state and a first excited state; The system, wherein the detection component performs one or more quantum state measurements on the one or more qubits during the time stop, wherein the one or more quantum state measurements distinguish between different levels of excited states.

4. The system of claim 1 , wherein the stopping component varies the duration of the time stop based on a maximum excitation state detected by the detection component.

5. The system of claim 1 , wherein the duration of the time stop is greater than a coherence time of the one or more qubits.

6. 6. The system of claim 1, wherein the duration of the time stop is of the same order of magnitude as a coherence time of the one or more qubits.

7. detecting, by a device operably coupled to the processor, quantum state leakage associated with one or more qubits; generating a time pause prior to execution of a quantum circuit on the one or more qubits, in response to detecting the quantum state leakage; the device performing one or more quantum state measurements on the one or more qubits during the time pause, wherein the one or more quantum state measurements binary distinguish between a ground state and an excited state; and the device initiating execution of the quantum circuit on the one or more qubits during the time pause in response to the one or more quantum state measurements indicating that the one or more qubits are in a ground state. A computer-implemented method comprising:

8. 8. The computer-implemented method of claim 7, wherein the generating the time stopping occurs after execution of a previous quantum circuit on the one or more qubits, wherein the quantum state leakage occurs during the execution of the previous quantum circuit, and wherein the quantum state leakage decays during the time stopping.

9. A device operably coupled to a processor, the device detecting quantum state leakage associated with one or more qubits; generating a time pause prior to execution of a quantum circuit on the one or more qubits, in response to detecting the quantum state leakage; the device performing one or more quantum state measurements on the one or more qubits during the time pause, wherein the one or more quantum state measurements distinguish between different levels of excited states; and the device executing the quantum circuit on the one or more qubits when the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of a ground state and a first excited state. A computer-implemented method comprising:

10. 10. The computer-implemented method of claim 7, further comprising the step of: the device varying a duration of the time pause based on a highest excitation state detected during the detecting step.

11. 11. The computer-implemented method of claim 7, wherein the duration of the time stop is greater than a coherence time of the one or more qubits.

12. 12. The computer-implemented method of claim 11, wherein the duration of the time stopping is on the same order of magnitude as the coherence time of the one or more qubits.

13. 1. A computer program for facilitating strategic stopping for quantum state leakage mitigation, the computer program having program instructions that direct a processor to: the processor detecting quantum state leakage associated with one or more qubits; generating a time pause prior to execution of a quantum circuit on the one or more qubits in response to the processor detecting the quantum state leakage; the processor performing one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements binary distinguish between a ground state and an excited state; and In response to the one or more quantum state measurements indicating that the one or more qubits are in a basis state, the processor begins execution of the quantum circuit on the one or more qubits during the time pause. a computer program executable by the processor to cause the processor to perform the steps of:

14. 14. The computer program product of claim 13, wherein the processor generates the time stopping after execution of a previous quantum circuit on the one or more qubits, where the quantum state leakage occurs during the execution of the previous quantum circuit, and where the quantum state leakage decays during the time stopping.

15. A computer program for facilitating strategic stopping for quantum state leakage mitigation, the computer program having program instructions that direct a processor to: the processor detecting quantum state leakage associated with one or more qubits; generating a time pause prior to execution of a quantum circuit on the one or more qubits in response to the processor detecting the quantum state leakage; the processor performing one or more quantum state measurements on the one or more qubits during the time pause, where the one or more quantum state measurements distinguish between different levels of excited states; and the processor executing the quantum circuit on the one or more qubits if the one or more quantum state measurements indicate that the one or more qubits are in a ground state, a first excited state, or a combination of a ground state and a first excited state. a computer program executable by the processor to cause the processor to perform the steps of:

16. The program instructions direct the processor to: the processor varying the duration of the time pause based on the highest excitation state detected by the processor.

16. A computer program according to any one of claims 13 to 15, further executable to cause:

17. 17. The computer program of claim 13, wherein a duration of the time stop is greater than a coherence time of the one or more qubits, and wherein the duration of the time stop is of the same order of magnitude as the coherence time of the one or more qubits.

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