Wireless communication device and wireless communication system

Abstract

To make it possible to synchronize clock signals between devices that perform wireless communication even under an environment where phase changes occur due to fluctuations in wireless transmission path characteristics.SOLUTION: A wireless communication system is made up of two wireless communication devices. One of the devices wirelessly transmits a signal obtained by up-converting a clock signal. The other device generates a clock signal based on the received signal and feeds back a signal obtained by up-converting the generated clock signal to the one device. The one device generates a clock signal based on the signal that is fed back, detects phase changes due to variations in transmission line characteristics based on the generated clock signal, and adjusts the phase of the reference clock signal based on the detected phase changes.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a wireless communication device and a wireless communication system. [Background technology]

[0002] A technique is known in which a device equipped with a reference clock signal source (hereinafter referred to as a clock source device) wirelessly transmits a signal synchronized with a reference clock signal, and a device that receives the transmitted signal (hereinafter referred to as a clock recovery device) recovers a clock signal based on the received signal. Patent Document 1 discloses a technique in which control information obtained from the synchronization state of the clock signal recovered by the clock recovery device is fed back to the clock source device, and the clock source device adjusts the phase of the transmitted signal based on the control information. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-116982 Summary of the Invention [Problem to be solved by the invention]

[0004] In an environment where the position of the communicating antenna fluctuates or objects near the wireless transmission path move, the phase of the signal changes due to the effects of Doppler shift and multipath caused by changes in the distance of the wireless transmission path. Hereinafter, this phase change will be referred to as the phase change due to fluctuations in the wireless transmission path characteristics.

[0005] The method described in Patent Document 1 can synchronize a signal received by a clock recovery device with a clock signal recovered from that signal. Because the signal received by the clock recovery device is synchronized with a reference clock signal, if there is no phase change due to fluctuations in wireless transmission path characteristics, the reference clock signal of the clock source device, the signal received by the clock recovery device, and the recovered clock signal are synchronized. However, if there is a phase change due to fluctuations in wireless transmission path characteristics, there is a problem in that the reference clock signal of the clock source device and the clock signal recovered by the clock recovery device are not synchronized.

[0006] SUMMARY OF THE INVENTION It is therefore an object of the present invention to synchronize clock signals between devices performing wireless communication even in an environment in which phase changes occur due to fluctuations in wireless transmission path characteristics. [Means for solving the problem]

[0007] In order to solve the above problem, a wireless communication system according to the present invention is a wireless communication system having a first wireless communication device and a second wireless communication device, wherein the first wireless communication device includes a first transmitting circuit unit, a first receiving circuit unit, and a phase adjusting unit. and, a first antenna portion; , a second antenna portion; The second wireless communication device includes a second receiving circuit unit, a second transmitting circuit unit, and a 3 The antenna part and , a fourth antenna part; and the first transmitting circuit unit and the second receiving circuit unit have a first band-pass filter that passes a first frequency and does not pass a second frequency, and the second transmitting circuit unit and the first receiving circuit unit have a second band-pass filter that passes the second frequency and does not pass the first frequency; The first transmitting circuit unit transmits a first signal generated based on a first clock signal from the first antenna unit. At the first frequency The second receiving circuit unit transmits the 3 Antenna part at the first frequency by a second clock signal is generated based on the received first signal, and the second transmission circuit unit transmits the second signal generated based on the second clock signal to the 4 from the antenna unit to the first wireless communication device At the second frequency The first receiving circuit unit transmits the 2 Antenna part at the second frequency byA wireless communication system characterized in that a third clock signal is generated based on the received second signal, and the phase adjustment unit detects a phase change due to fluctuations in transmission path characteristics based on the third clock signal, and controls the phase of the first clock signal based on the detected phase change. [Effects of the Invention]

[0008] According to the present invention, clock signals between devices performing wireless communication can be synchronized even in an environment in which phase changes occur due to fluctuations in wireless transmission path characteristics. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing a configuration of a wireless communication system according to a first embodiment; [Figure 2] FIG. 1 is a diagram showing a configuration of a clock source device according to a first embodiment; [Figure 3] FIG. 1 shows a configuration of a clock recovery device according to a first embodiment. [Figure 4] FIG. 1 is a diagram showing the configuration of a phase adjustment unit in the first embodiment; [Figure 5] FIG. 1 is a diagram showing the phase relationship of each clock signal in the first embodiment. [Figure 6] FIG. 1 is a diagram showing a configuration of a transmission circuit unit in a first embodiment; [Figure 7] FIG. 1 is a diagram showing a configuration of a receiving circuit unit in a first embodiment; [Figure 8] FIG. 10 is a diagram showing the configuration of a clock source device according to a second embodiment; [Figure 9] 10 is a flowchart showing the flow of operations in the second embodiment. [Figure 10] Time chart of each component block in the second embodiment DETAILED DESCRIPTION OF THE INVENTION

[0010] Each embodiment will be described below with reference to the drawings. Note that the following embodiments do not necessarily limit the present invention. Furthermore, not all of the combinations of features described in each embodiment are necessarily essential to the solution of the present invention.

[0011] [First embodiment] The overall configuration of the wireless communication system in this embodiment will be described below. FIG. 1 shows the configuration of the wireless communication system in this embodiment. Clock source device 100 is one of two devices that synchronize clock signals. Clock source device 100 has a reference clock signal source 101 that generates a reference clock signal Sr, a processing unit 102 that performs various processes on the clock signal, and an antenna unit 103 that transmits and receives signals wirelessly. Clock recovery device 104 is the other of the two devices that synchronize clock signals. Clock recovery device 104 has an antenna unit 105 that transmits and receives signals wirelessly, and a processing unit 106 that recovers a clock signal by processing a received signal.

[0012] In the clock source device 100, a reference clock signal Sr is generated by a reference clock signal source 101, and after processing by a processing unit 102, the signal is wirelessly transmitted by an antenna unit 103. In the clock recovery device 104, an antenna unit 105 receives the signal transmitted by the antenna unit 103, and a processing unit 106 processes the signal to recover a clock signal Srx, and also feeds back the signal from the antenna unit 105 to the antenna unit 103. Based on the phase of the signal received by the antenna unit 103, the clock source device 100 processes the signal to be transmitted again by the processing unit 102, and transmits the processed signal from the antenna unit 103. In this way, the wireless communication system in this embodiment repeatedly performs feedback between devices by transmitting signals.

[0013] Next, the configurations and functions of the clock source device 100 and the clock recovery device 104 will be described in more detail. Figure 2 shows the configuration of the processing unit 102 and the antenna unit 103 connected to the processing unit 102. The processing unit 102 has a phase adjustment unit 201, a transmission circuit unit 202, and a reception circuit unit 203, and the antenna unit 103 has a transmission antenna 103A and a reception antenna 103B. The phase adjustment unit 201 generates a clock signal Stx by adjusting the phase of the reference clock signal Sr input from the reference clock signal source 101 based on the clock signal Sf input from the reception circuit unit 203. The transmission circuit unit 202 upconverts the clock signal Stx generated by the phase adjustment unit 201 and transmits it as a radio signal from the transmission antenna 103A to a radio transmission path. The reception circuit unit 203 downconverts the radio signal received by the reception antenna 103B and inputs the downconverted signal to the phase adjustment unit 201 as the clock signal Sf. In an environment where fluctuations in wireless transmission path characteristics occur, the phase adjustment unit 201 detects a phase change due to the fluctuations in wireless transmission path characteristics from the fed-back wireless signal. Based on the phase change detection result, the phase adjustment unit 201 generates a clock signal Stx obtained by adjusting the phase of the reference clock signal Sr.

[0014] 3 shows the configuration of the processing unit 106 and the antenna unit 105 connected to the processing unit 106. The processing unit 106 has a receiving circuit unit 301 and a transmitting circuit unit 302, and the antenna unit 105 has a receiving antenna 105A and a transmitting antenna 105B. The receiving circuit unit 301 down-converts a radio signal received by the receiving antenna 105A to recover a clock signal Srx and inputs the clock signal Srx to the transmitting circuit unit 302. The transmitting circuit unit 302 up-converts the clock signal Srx input from the receiving circuit unit 301 and transmits it from the transmitting antenna 105B to a radio transmission path. As described above, in the wireless communication system of this embodiment, the clock source device adjusts the phase of the clock signal, and the clock recovery device recovers a clock signal from a received signal without adjusting the phase of the clock signal and feeds back the received signal to the clock source device.

[0015] Next, we will explain how the clock source device processes the fed-back received signal and how it adjusts the phase of the clock signal Stx to be transmitted. Figure 4 shows the circuit configuration of the phase adjustment unit 201 shown in Figure 2. The phase adjustment unit 201 includes phase comparators 401 and 402, a loop filter 403, and a voltage-controlled oscillator 404. The phase comparator 401 compares the phase of the reference clock signal Sr with the phase of the output signal (Stx) of the voltage-controlled oscillator 404, and outputs a detection result (phase difference signal) corresponding to the phase difference. The phase comparator 402 compares the phase of the reference clock signal Sr with the phase of the clock signal Sf obtained from the radio signal fed back from the clock recovery device 104, and outputs a detection result (phase difference signal) corresponding to the phase difference. The loop filter 403 is configured as a differential integration circuit that receives the detection results output from the phase comparators 401 and 402 as inputs. The loop filter 403 generates a signal corresponding to the difference between the two input detection results, and outputs a DC component from which harmonic components have been removed. The voltage controlled oscillator 404 generates, as the clock signal Stx, a signal having a phase corresponding to the output of the loop filter 403. The phase adjustment unit 201 is a feedback control circuit that makes the phases of the clock signals compared by the two phase comparators equal.

[0016] The phase relationship of the clock signals compared in phase adjustment unit 201 is shown in Figure 5. Figure 5 shows the phase relationship of the clock signals when reference clock signal Sr and clock signal Srx recovered by the clock recovery device are synchronized. Here, the wireless transmission path characteristics are assumed to be symmetrical, and the amount of phase change due to fluctuations in the wireless transmission path characteristics is assumed to be Δθ. Because the transmitted wireless signal travels back and forth along the transmission path when fed back, the phase difference between clock signal Stx and clock signal Sf is 2Δθ. Furthermore, Δθ1 represents the phase difference between reference clock signal Sr and clock signal Stx, and Δθ2 represents the phase difference between clock signal Sf and reference clock signal Sr. In phase adjustment unit 201, phase comparator 401 detects phase difference Δθ1, phase comparator 402 detects phase difference Δθ2, and adjusts the phase of clock signal Stx so that Δθ1 = Δθ2. When Δθ1=Δθ2 (=Δθ), the phase of the reference clock signal Sr and the phase of the clock signal Srx become equal, and the clock signals can be synchronized between the devices.

[0017] In other words, the phase adjustment unit 201 detects the amount of phase change due to fluctuations in the wireless transmission path characteristics from the fed-back wireless signal, and generates a clock signal Stx by adding a phase change opposite to the detected phase change to the clock signal Sr. As a result, the clock signal Srx, which is the transmitted wireless signal to which the phase change due to fluctuations in the wireless transmission path characteristics has been added, is synchronized with the reference clock signal Sr.

[0018] Fig. 6 shows the configuration of the transmission circuit section 202 shown in Fig. 2. Although only the transmission circuit section 202 is shown in Fig. 6, the transmission circuit section 302 shown in Fig. 3 also has the same configuration.

[0019] 6, PLL circuit 600 is a PLL (Phase Locked Loop) circuit having a phase comparator 601, a loop filter 602, a voltage controlled oscillator 603, and a frequency divider 604. PLL circuit 600 upconverts an input signal by changing the frequency division number of frequency divider 604. Bandpass filter 605 is an ideal bandpass filter that attenuates unnecessary signals and passes only the frequency of output signal a of PLL circuit 600, and sends signal a of the desired frequency to the antenna.

[0020] FIG. 7 shows the configuration of the receiving circuit unit 301 shown in FIG. 2. While FIG. 7 only shows the receiving circuit unit 301, the receiving circuit unit 203 shown in FIG. 3 also has the same configuration. The receiving circuit unit 301 has a PLL circuit 700, a frequency divider 705, and a band-pass filter 706. The PLL circuit 700, which includes a phase comparator 701, a loop filter 702, a voltage-controlled oscillator 703, and a frequency divider 704, has the function of reducing phase noise in an input signal. The band-pass filter 706 has the same function as the band-pass filter 605 and passes only a signal a of a desired frequency. The receiving circuit unit 301 down-converts the signal a that has passed through the band-pass filter 706 using the frequency divider 705, and outputs a clock signal Srx via the PLL circuit 700 while also sending it to the transmitting circuit unit 302.

[0021] Here, different frequencies must be used for communication between antennas 103A and 105A and communication between antennas 103B and 105B to prevent interference. A signal of frequency f1 is used for communication between antennas 103A and 105A, and a signal of frequency f2 is used for communication between antennas 103B and 105B. For communication between antennas 103A and 105A, transmitting circuit unit 202 uses frequency divider 604 with a division number such that the frequency of output signal a from PLL circuit 600 becomes f1, and bandpass filter 605 that passes only frequency f1. Receiving circuit unit 301 also uses bandpass filter 706 that passes only signal a of frequency f1. Similarly, for communication between antennas 103B and 105B, a frequency divider 604 and bandpass filters 605 and 706 are used to enable communication at frequency f2, thereby separating the two wireless transmission paths between antennas 103A and 105A and between antennas 103B and 105B.

[0022] Although unmodulated communication is performed in this embodiment, the present invention is not limited to this, and modulation methods such as AM modulation may also be used.

[0023] With the above configuration, it is possible to provide a system that can wirelessly synchronize the clock signals of two devices even in an environment where phase changes occur due to fluctuations in the characteristics of the wireless transmission path.

[0024] [Second embodiment] The overall configuration of the wireless communication system in this embodiment will be described below. The configuration of the wireless communication system in this embodiment is the same as that of the first embodiment, except that a selector switch (SW) for inputting a reference clock signal is added to the processing unit 102 in the first embodiment. Therefore, the configuration that differs from the first embodiment will be mainly described.

[0025] The PLL circuits 600 and 700 of the transmitting circuit units 202 and 302 and the receiving circuit units 203 and 301 used in the first embodiment require a certain amount of time after startup before they can output a signal with a stable phase. This required time is called the pull-in time. Similarly, the phase adjustment unit 201 also requires a pull-in time until the clock signals achieve the phase relationship shown in FIG. 5 and output a signal with a stable phase. During the pull-in time, the fed-back clock signal Sf contains not only phase changes due to fluctuations in wireless transmission path characteristics but also phase changes in the output of the PLL circuit. Therefore, in this embodiment, a configuration will be described in which the phase adjustment unit 201 detects only phase changes due to fluctuations in wireless transmission path characteristics and can shorten the pull-in time until it outputs a clock signal with the phase relationship shown in FIG. 5.

[0026] 8 shows a configuration in which an SW801 and a control unit 802 are added to the clock source device 100. The SW801 is a switch that switches the input of the reference clock signal Sr between the transmission circuit unit 202 side and the phase adjustment unit 201 side. The control unit 802 controls the timing at which the SW801 is switched.

[0027] Next, the flow of operations from system startup to activation of the phase adjustment unit 201 in this embodiment will be described using FIG. 9. First, immediately after system startup, the control unit 802 controls the SW801 to input the reference clock signal Sr to the transmission circuit unit 202 (S901). That is, at this time, the phase adjustment unit 201 does not operate, and a radio signal having a phase equal to the reference clock signal Sr is transmitted. In this state, the control unit 802 waits for a certain period of time until the phases of the outputs of the PLL circuits used in the transmission circuit units 202 and 302 and the reception circuit units 203 and 301 stabilize (S902). The control unit 802 determines whether the phase has stabilized (S903) and waits until the phase fluctuation of the clock signal Sf obtained from the fed-back radio signal stabilizes, that is, until the output voltage of the loop filter in the PLL circuit converges within a set value. At this time, the clock signal Sf contains only phase variations due to fluctuations in the wireless transmission path characteristics.

[0028] When the control unit 802 determines that the signal phase has stabilized, the SW801 is switched to the phase adjustment unit 201 side (S904), the phase adjustment unit 201 operates, and the wireless clock synchronization system described in the first embodiment begins to operate.

[0029] A timing chart of each component block in this embodiment is shown in Figure 10. The horizontal axis in Figure 10 represents time, and indicates the pull-in time until the phase of the output of each circuit unit stabilizes. t0 is the startup time, t1, t2, t3, and t4 represent the pull-in time from startup of each transmission / reception circuit unit, respectively, and t5 represents the time at which pull-in by the phase adjustment unit 201 in this embodiment ends. If SW801 is not provided and all circuit units, including the phase adjustment unit 201, are started up simultaneously, the pull-in time of each circuit unit increases, resulting in an increase in the pull-in time of the entire system.

[0030] 9, when SW801 is connected to the transmitting circuit unit 202 side of the clock source device 100, the output phases become stable in the order of the transmitting circuit unit 202, the receiving circuit unit 301, the transmitting circuit unit 302, and the receiving circuit unit 203. Thereafter, by connecting SW801 to the phase adjusting unit 201 side and starting the operation of the phase adjusting unit 201 from t4, the operation of the entire system can be stabilized and the total pull-in time from t0 to t5 can be shortened compared to the first embodiment. [Explanation of symbols]

[0031] 100 Clock Source Device 103 Antenna section 104 Clock Recovery Device 105 Antenna part 201 Phase adjustment unit 202 Transmission circuit section 203 Receiving circuit section 301 Receiving circuit section 302 Transmission circuit section

Claims

1. A wireless communication system having a first wireless communication device and a second wireless communication device, the first wireless communication device includes a first transmitting circuit unit, a first receiving circuit unit, a phase adjusting unit, a first antenna unit, and a second antenna unit; the second wireless communication device has a second receiving circuit unit, a second transmitting circuit unit, a third antenna unit, and a fourth antenna unit; the first transmitting circuit unit and the second receiving circuit unit each have a first band-pass filter that passes a first frequency and does not pass a second frequency; the second transmitting circuit unit and the first receiving circuit unit each have a second band-pass filter that passes the second frequency and does not pass the first frequency; the first transmission circuit unit wirelessly transmits a first signal generated based on a first clock signal from the first antenna unit at a first frequency; the second receiving circuit unit generates a second clock signal based on the first signal received by the third antenna unit at the first frequency; the second transmission circuit unit wirelessly transmits a second signal generated based on the second clock signal from the fourth antenna unit to the first wireless communication device at a second frequency; the first receiving circuit unit generates a third clock signal based on the second signal received at the second frequency by the second antenna unit; The phase adjustment unit detects a phase change due to a fluctuation in transmission path characteristics based on the third clock signal, and controls the phase of the first clock signal based on the detected phase change.

2. the first wireless communication device further comprises a reference clock signal source that outputs a reference clock signal; The phase adjustment unit a voltage controlled oscillator that operates at a frequency based on the voltage; a first phase comparator that outputs a first phase difference signal based on a phase difference between the reference clock signal and an output signal of the voltage controlled oscillator; a second phase comparator that outputs a second phase difference signal based on a phase difference between the reference clock signal and the third clock signal; 2. The wireless communication system according to claim 1, further comprising a loop filter that generates a voltage for the voltage-controlled oscillator based on the first phase difference signal and the second phase difference signal.

3. 3. The wireless communication system according to claim 2, wherein the loop filter is configured by a differential integrating circuit that receives the first phase difference signal and the second phase difference signal as inputs.

4. The wireless communication system according to claim 2 or 3, characterized in that the first wireless communication device further has a switch that switches so that the reference clock signal is output to either the first transmission circuit unit or the phase adjustment unit.

5. The wireless communication system according to claim 4, characterized in that the first wireless communication device further has a control unit that determines a state in which the output voltage of the loop filter has converged within a set value as a stable state, and controls the switch based on the result of the determination.

6. The wireless communication system according to any one of claims 1 to 5, characterized in that the activation of the phase adjustment unit is delayed relative to the activation of the first transmitting circuit unit, the first receiving circuit unit, the second transmitting circuit unit, and the second receiving circuit unit.

7. The first transmission circuit unit further includes a first frequency divider that generates the first frequency; the second transmission circuit unit further includes a second frequency divider that generates the second frequency; 7. The wireless communication system according to claim 1, wherein communication is performed without modulation.

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