Vertical cavity light emitting device and its manufacturing method

Abstract

To provide a vertical resonator type light-emitting element in which a threshold current is low and an element breakdown is less likely to occur, and a manufacturing method of the same.SOLUTION: A vertical resonator type light-emitting element includes: a substrate; a first multilayer film reflecting mirror formed on the substrate; a semiconductor structure layer comprising a nitride semiconductor which includes a first semiconductor layer that is formed on the first multilayer film reflecting mirror and has a first conductivity type, a second semiconductor layer that is formed on the first semiconductor layer and has the first conductivity type, a light-emitting layer that is formed on the second semiconductor layer so as to expose a region including an outer edge of a top surface of the second semiconductor layer, and a third semiconductor layer that is formed on the light-emitting layer and has a second conductivity type opposite to the first conductivity type; an electrode that is formed on the top surface of the second semiconductor; an electrode layer that is electrically in contact with the third semiconductor layer in one region of a top surface of the third semiconductor layer; and a second multilayer film reflecting mirror that constitutes a resonator with the first multilayer film reflecting mirror. The second semiconductor layer has a larger resistance than the first semiconductor layer.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a vertical cavity light emitting device and a method for manufacturing the same. [Background technology]

[0002] As an example of a vertical cavity light emitting device, Patent Document 1 discloses a vertical cavity surface emitting laser (VCSEL) having a semiconductor layer and two multilayer film reflectors facing each other with the semiconductor layer sandwiched therebetween. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 3763737 Summary of the Invention [Problem to be solved by the invention]

[0004] One of the challenges facing the VCSEL disclosed in Patent Document 1 is to direct as much of the current flowing into the VCSEL as possible to the region of the active layer that contributes to the gain of laser light, thereby reducing the threshold current required for laser light oscillation as much as possible. Another challenge is to prevent element destruction due to excessive current concentration in the semiconductor layer.

[0005] The present invention has been made in view of the above-mentioned points, and has as its object to provide a vertical cavity light emitting device having a low threshold current and being less susceptible to element breakdown, and a method for manufacturing the same. [Means for solving the problem]

[0006] A vertical cavity light emitting device according to the present invention comprises a semiconductor structure layer made of nitride semiconductors including: a substrate; a first multilayer reflector formed on the substrate; a first semiconductor layer having a first conductivity type formed on the first multilayer reflector; a second semiconductor layer having the first conductivity type formed on the first semiconductor layer; a light emitting layer formed on the second semiconductor layer so as to expose a region including an outer edge of an upper surface of the second semiconductor layer; and a third semiconductor layer formed on the light emitting layer and having a second conductivity type opposite to the first conductivity type; an electrode formed on an upper surface of the second semiconductor layer; an electrode layer in electrical contact with the third semiconductor layer in a region of an upper surface of the third semiconductor layer; and a second multilayer reflector that forms a resonator between itself and the first multilayer reflector, wherein the second semiconductor layer has a higher resistance than the first semiconductor layer.

[0007] A method for manufacturing a vertical cavity light emitting device according to the present invention includes a first multilayer reflector forming step of forming a first multilayer reflector on a substrate; a semiconductor layer lamination step of laminating, in this order, a GaN layer having a first conductivity type, an AlGaN layer having the first conductivity type, a light emitting layer, and a nitride semiconductor layer having a second conductivity type opposite to the first conductivity type on the first multilayer reflector; and a step of forming a mask on a region on an upper surface of the nitride semiconductor layer, and measuring the intensity of reflected light when a laser beam is irradiated onto a region on the upper surface other than the first region, while etching the other region by a dry etching method. the etching step of etching the AlGaN layer to expose a region including an outer edge of the upper surface of the AlGaN layer, and stopping the etching based on a change in the intensity of the reflected light; an electrode formation step of forming an electrode on the upper surface of the AlGaN layer; an electrode layer formation step of forming an electrode layer in electrical contact with the nitride semiconductor layer in one region of the upper surface of the nitride semiconductor layer; and a second multilayer reflector formation step of forming a second multilayer reflector that constitutes a resonator between itself and the first multilayer reflector. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a perspective view of a vertical cavity surface emitting laser according to a first embodiment. [Figure 2] 1 is a top view of a vertical cavity surface emitting laser according to a first embodiment. [Figure 3] 1 is a cross-sectional view of a vertical cavity surface emitting laser according to a first embodiment. [Figure 4] 3 is a flowchart of a method for manufacturing a vertical cavity surface emitting laser according to the first embodiment. [Figure 5] 2A to 2C are diagrams illustrating a part of a manufacturing process of the vertical cavity surface emitting laser according to the first embodiment. [Figure 6] 2A to 2C are diagrams illustrating a part of a manufacturing process of the vertical cavity surface emitting laser according to the first embodiment. [Figure 7] 2A to 2C are diagrams illustrating a part of a manufacturing process of the vertical cavity surface emitting laser according to the first embodiment. [Figure 8] 2A to 2C are diagrams illustrating a part of a manufacturing process of the vertical cavity surface emitting laser according to the first embodiment. [Figure 9] FIG. 10 is a top view of a vertical cavity surface emitting laser according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. [Example]

[0010] FIG. 1 is a perspective view of a vertical cavity surface emitting laser (hereinafter simply referred to as a surface emitting laser) 10 according to a first embodiment.

[0011] The substrate 11 is a flat substrate with a rectangular top surface. In the drawings of the present application, the case where the top surface of the substrate 11 has a square shape is shown as an example. The substrate 11 is a growth substrate on whose top surface a semiconductor crystal can be grown. In this example, the substrate 11 is made of gallium nitride (GaN).

[0012] The first multilayer reflector 13 is a semiconductor multilayer reflector in which low-refractive index semiconductor films and high-refractive index semiconductor films having a refractive index higher than that of the low-refractive index semiconductor films are alternately stacked on the substrate 11. The first multilayer reflector 13 is formed so as to cover the upper surface of the substrate 11. Therefore, the first multilayer reflector 13 has the same upper surface shape as the substrate 11, i.e., a rectangular shape. In this embodiment, the first multilayer reflector 13 is a so-called distributed Bragg reflector (DBR) made of a semiconductor material.

[0013] In this embodiment, the first multilayer reflector 13 is formed by alternately stacking low-refractive-index semiconductor films having a composition of aluminum indium nitride (AlInN) and high-refractive-index semiconductor films having a composition of GaN. For example, a buffer layer (not shown) having a GaN composition is provided on the upper surface of the substrate 11, and the first multilayer reflector 13 is formed by alternately depositing the above-mentioned high-refractive-index semiconductor films and low-refractive-index semiconductor films on the buffer layer.

[0014] The semiconductor structure layer EM is a laminated structure made up of multiple semiconductor layers formed on the first multilayer film reflector 13. In this embodiment, the semiconductor structure layer EM is made up of a first semiconductor layer 15, a second semiconductor layer 16, a third semiconductor layer 17, an active layer 18, and a fourth semiconductor layer 19.

[0015] The first semiconductor layer 15 is formed on the first multilayer reflector 13 and is a nitride semiconductor layer having a first conductivity type, that is, n-type. The first semiconductor layer 15 is formed so as to cover the upper surface of the first multilayer reflector 13. Therefore, the first semiconductor layer 15 has the same upper surface shape as the first multilayer reflector 13, i.e., a rectangular upper surface shape. In this embodiment, the first semiconductor layer 15 has a composition of GaN and is doped with silicon (Si) as an n-type impurity.

[0016] The second semiconductor layer 16 is an n-type nitride semiconductor layer formed on the first semiconductor layer 15. The second semiconductor layer 16 is formed so as to cover the upper surface of the first semiconductor layer 15. Therefore, the second semiconductor layer 16 has the same upper surface shape as the first semiconductor layer 15, i.e., a rectangular shape.

[0017] In this embodiment, the second semiconductor layer 16 has a composition of aluminum gallium nitride (AlGaN) and is doped with Si as an n-type impurity. Due to its composition, the second semiconductor layer 16 has a larger band gap energy than the first semiconductor layer 15.

[0018] In this example, the second semiconductor layer 16 is formed to have a thickness thinner than that of the first semiconductor layer 15. Specifically, in this example, the first semiconductor layer 15 has a thickness of 1400 nm, and the second semiconductor layer 16 has a thickness of 10 nm.

[0019] The second semiconductor layer 16 is configured to have a higher resistance than the first semiconductor layer 15. In the surface-emitting laser 10, the second semiconductor layer 16 is formed to have a higher resistance value and a thinner layer thickness than the first semiconductor layer 15. Therefore, the sheet resistance of the second semiconductor layer 16 is higher than that of the first semiconductor layer 15.

[0020] The third semiconductor layer 17 is an n-type nitride semiconductor layer formed approximately in the center of the upper surface 16T of the second semiconductor layer 16. The third semiconductor layer 17 has a circular upper surface shape and is formed so as to expose a region including the outer edge of the upper surface 16T of the second semiconductor layer 16. In this embodiment, the third semiconductor layer 17 has a composition of GaN and is doped with Si as an n-type impurity.

[0021] The active layer 18 is a semiconductor layer formed so as to cover the upper surface of the third semiconductor layer 17. Therefore, the active layer 18 has the same upper surface shape as the third semiconductor layer 17, that is, a circular shape.

[0022] In this embodiment, the active layer 18 has a quantum well structure including a well layer having a composition of indium gallium nitride (InGaN) and a barrier layer having a composition of GaN. The active layer 18 is a layer that generates light by recombination of electrons and holes within the active layer 18. In other words, the active layer 18 is a light-emitting layer that causes light to be emitted from the active layer 18.

[0023] The fourth semiconductor layer 19 is formed on the active layer 18 and is a nitride semiconductor layer having a second conductivity type, that is, p-type. The fourth semiconductor layer 19 is formed so as to cover the upper surface of the active layer 18. Therefore, the fourth semiconductor layer 19 has the same upper surface shape as the active layer 18, that is, a circular upper surface shape. In this embodiment, the fourth semiconductor layer 19 has a composition of GaN and is doped with magnesium (Mg) as a p-type impurity.

[0024] In this embodiment, a p-type AlGaN layer (not shown) serving as a carrier block layer is formed between the active layer 18 and the fourth semiconductor layer 19, and a p-type GaN layer (not shown) serving as a contact layer is formed on the fourth semiconductor layer 19.

[0025] In this embodiment, the semiconductor structure layer EM has a cylindrical portion extending upward from the upper surface 16T of the second semiconductor layer 16, with the third semiconductor layer 17, the active layer 18, and the fourth semiconductor layer 19 stacked in this order on the upper surface 16T of the second semiconductor layer 16. In other words, the semiconductor structure layer EM has a mesa-shaped structure (hereinafter also referred to as a mesa structure) including the third semiconductor layer 17 protruding from the upper surface 16T of the second semiconductor layer 16, and the active layer 18 and the fourth semiconductor layer 19 are stacked on the mesa structure.

[0026] The n-electrode NE is a ring-shaped metal electrode formed on the upper surface 16T of the second semiconductor layer 16 and electrically connected to the second semiconductor layer 16. The n-electrode NE is formed on the upper surface 16T of the second semiconductor layer 16 at a distance from the third semiconductor layer 17 so as to surround the third semiconductor layer 17. In this embodiment, the n-electrode NE is formed by forming titanium (Ti) and aluminum (Al) in this order on the upper surface 16T of the second semiconductor layer 16.

[0027] The insulating layer 21 is a light-transmitting insulating layer made of an insulator and formed on the fourth semiconductor layer 19. The insulating layer 21 has a circular opening at the center thereof that exposes the fourth semiconductor layer 19 (not shown in FIG. 1). In this embodiment, the insulating layer 21 is made of silicon dioxide (SiO2).

[0028] The translucent electrode layer 23 is a translucent conductive film formed on the insulating layer 21 so as to cover the opening. The translucent electrode layer 23 has a circular upper surface. In this embodiment, the translucent electrode layer 23 is made of indium tin oxide (ITO).

[0029] The p-electrode PE is a ring-shaped metal electrode that is formed along the outer edge of the upper surface 23T of the translucent electrode layer 23 and is electrically connected to the translucent electrode layer 23. In this embodiment, the p-electrode PE is made of gold (Au).

[0030] The second multilayer reflector 25 is a dielectric multilayer reflector in which low-refractive index dielectric films and high-refractive index dielectric films having a refractive index higher than that of the low-refractive index dielectric films are alternately stacked on the upper surface 23T of the translucent electrode layer 23. The second multilayer reflector 25 has a circular upper surface shape that is smaller than the upper surface of the translucent electrode layer 23.

[0031] In this embodiment, the second multilayer reflector 25 is a so-called distributed Bragg reflector (DBR) made of a dielectric material. The second multilayer reflector 25 is formed apart from the p-electrode PE.

[0032] In this embodiment, the second multilayer reflector 25 is formed by alternately laminating low-refractive-index dielectric films made of SiO2 and high-refractive-index dielectric films made of niobium oxide (Nb2O5). Note that the second multilayer reflector 25 may use tantalum pentoxide (Ta2O5) as the low-refractive-index dielectric film and Al2O3 as the high-refractive-index dielectric film.

[0033] In this embodiment, the first multilayer film reflector 13 and the second multilayer film reflector 25 are arranged to sandwich the above-mentioned semiconductor structure layer EM in the vertical direction in the figure, and are configured as a resonator for oscillating light emitted from the active layer 18 of the semiconductor structure layer EM.

[0034] In the surface-emitting laser 10, when a voltage is applied between the n-electrode NE and the p-electrode PE, a current flows through the active layer 18 via the current confinement layer, and when this current reaches a certain current value at which the intensity of the output light increases rapidly, i.e., a threshold current, stimulated emission light is emitted from the active layer 18. The light emitted from the active layer 18 is repeatedly reflected between the first multilayer film reflecting mirror 13 and the second multilayer film reflecting mirror 25, and reaches a resonance state (laser oscillation).

[0035] In this embodiment, the first multilayer reflector 13 has a reflectance slightly lower than that of the second multilayer reflector 25. Therefore, part of the light that resonates between the first multilayer reflector 13 and the second multilayer reflector 25 passes through the first multilayer reflector 13 and the substrate 11 and is extracted to the outside. In other words, the light that resonates between the first multilayer reflector 13 and the second multilayer reflector 25 is emitted downward in the figure.

[0036] In this embodiment, an anti-reflection film (not shown) made of a laminate of NbO and SiO is formed on the lower surface of the substrate 11. The anti-reflection film is a so-called AR coating that suppresses the light emitted from the substrate 11 from being reflected by the lower surface of the substrate 11.

[0037] 2 is a top view of the surface-emitting laser 10. In Fig. 2, an axis passing through the center of the surface-emitting laser 10 in the depth direction in the top view is shown as a central axis CA. In this embodiment, the central axis CA corresponds to the optical axis of the laser light emitted from the surface-emitting laser 10.

[0038] As described above, the surface-emitting laser 10 has a semiconductor structure layer EM including the first semiconductor layer 15 and the second semiconductor layer 16, each having a rectangular top surface shape, and the third semiconductor layer 17, the active layer 18, and the fourth semiconductor layer 19, each having a circular top surface shape formed on the top surface 16T of the second semiconductor layer 16.

[0039] As described above, the surface-emitting laser 10 also has an insulating layer 21 formed on the fourth semiconductor layer 19, a translucent electrode layer 23 formed on the insulating layer 21, and a second multilayer film reflector 25 formed on the upper surface 23T of the translucent electrode layer 23.

[0040] As described above, the insulating layer 21 has a circular opening 21O at the center of the insulating layer 21, which exposes the fourth semiconductor layer 19. In other words, the insulating layer 21 is an annular insulating layer formed on the fourth semiconductor layer 19. As shown in FIG. 2 , the opening 21O is covered by the second multilayer film reflector 25 in top view.

[0041] As described above, the surface-emitting laser 10 has an n-electrode NE formed on the upper surface 16T of the second semiconductor layer 16 and a p-electrode PE formed on the upper surface 23T of the translucent electrode layer 23. In top view, the n-electrode NE and the p-electrode PE have annular shapes that are concentric with each other about the central axis CA, and the n-electrode NE is configured to have a larger diameter than the p-electrode PE.

[0042] Fig. 3 is a cross-sectional view of the surface-emitting laser 10 taken along line 3-3 in Fig. 2. As described above, the surface-emitting laser 10 has a first multilayer reflector 13 formed on a substrate 11, a semiconductor structure layer EM formed on the first multilayer reflector 13, and a second multilayer reflector 25 that forms a resonator between itself and the first multilayer reflector 13, with the semiconductor structure layer EM sandwiched therebetween.

[0043] In this embodiment, the fourth semiconductor layer 19 has a protruding portion 19P having a circular upper surface shape protruding from the center of the fourth semiconductor layer 19. An upper surface 19PT of the protruding portion 19P is in contact with the lower surface of the translucent electrode layer 23.

[0044] The insulating layer 21 has an opening 21O that exposes the upper surface of the protruding portion 19P on the upper surface of the fourth semiconductor layer 19. In other words, the insulating layer 21 is formed in a ring shape so as to surround the protruding portion 19P. In this embodiment, the thickness of the insulating layer 21 and the thickness of the protruding portion 19P are approximately the same.

[0045] The translucent electrode layer 23 is formed so as to cover the upper surface of the insulating layer 21 and the upper surfaces of the protrusions 19P exposed from the openings 21O of the insulating layer 21. That is, the translucent electrode layer 23 is in electrical contact with the fourth semiconductor layer 19 via the upper surfaces 19PT of the protrusions 19P. In other words, the translucent electrode layer 23 is electrically insulated from the fourth semiconductor layer 19 in the regions that are not in contact with the upper surfaces of the protrusions 19P.

[0046] In this embodiment, the insulating layer 21 surrounding the protruding portion 19P of the fourth semiconductor layer 19 serves as a so-called current confinement layer that limits the range of current supply to the active layer 18. That is, the current flowing from the p-electrode PE to the translucent electrode layer 23 flows into the active layer 18 via the top surface 19PT of the protruding portion 19P that is in electrical contact with the translucent electrode layer 23.

[0047] [Current path in semiconductor structure layers] The path of the current flowing in the semiconductor structure layer EM will be described in detail below with reference to FIG.

[0048] In the surface-emitting laser 10, as described above, the second semiconductor layer 16 is formed to have a higher resistance value and a thinner layer thickness than the first semiconductor layer 15. Therefore, the sheet resistance of the second semiconductor layer 16 is higher than that of the first semiconductor layer 15.

[0049] According to this embodiment, since the surface-emitting laser 10 has the above-mentioned configuration, the current that reaches the upper surface 19PT of the protrusion 19P of the fourth semiconductor layer 19 from the p-electrode PE through the transparent electrode layer 23 travels through the first semiconductor layer 15 via the shortest path from the upper surface 19PT to the first semiconductor layer 15, and flows to the n-electrode NE.

[0050] Specifically, the current that reaches the upper surface 19PT of the protrusion 19P travels in the thickness direction through each of the fourth semiconductor layer 19, the active layer 18, the third semiconductor layer 17, and the second semiconductor layer 16, and flows to the first semiconductor layer 15. The current that reaches the first semiconductor layer 15 diffuses in the in-plane direction within the first semiconductor layer 15 and flows to the n-electrode NE.

[0051] In other words, the flow of current in the semiconductor structure layer EM is dominated by a vertical vector in the fourth semiconductor layer 19, the active layer 18, the third semiconductor layer 17, and the second semiconductor layer 16, and is dominated by a horizontal vector in the first semiconductor layer 15. Therefore, the current flowing in from the top surface 19PT mainly flows directly downward from the top surface 19PT to the first semiconductor layer 15, and then flows horizontally after entering the first semiconductor layer 15.

[0052] For example, the current that reaches the upper surface 19PT of the protrusion 19P from the p-electrode PE flows mainly through the central regions of the fourth semiconductor layer 19, the active layer 18, the third semiconductor layer 17, and the second semiconductor layer 16 to the first semiconductor layer 15, as shown by the current path CP1 in Figure 3.

[0053] According to this embodiment, it is possible to prevent current from concentrating in the region RA (the region enclosed by the dashed line in the drawing), which is the region from the upper surface 19PT to the vicinity of the rising portion of the mesa structure at the lower end of the third semiconductor layer 17. Therefore, according to this embodiment, it is possible to prevent element breakdown and the like caused by current concentration in the region RA.

[0054] Furthermore, according to this embodiment, the current flowing from the upper surface 19PT flows in the thickness direction through the region LA (the region indicated by the two-dot chain line in the drawing) directly below the protruding portion 19P of the fourth semiconductor layer 19 in the active layer 18. The region LA is a region where the injected current (carriers) contributes to the gain of the laser light.

[0055] Therefore, according to this embodiment, for example, it is possible to prevent current from flowing into an area around the above-mentioned area LA that does not contribute to the gain of the laser light, i.e., an area where optical loss occurs. Therefore, according to this embodiment, it is possible to prevent current from unnecessarily flowing into an area where optical loss occurs, and therefore it is possible to reduce the threshold current required for laser light oscillation.

[0056] As described above, according to this embodiment, it is possible to prevent element breakdown due to current concentration in the region RA or the like, and also to reduce the threshold current required for laser light oscillation.

[0057] Here, a specific configuration of each layer in the semiconductor structure layer EM that is preferable for generating a current flow that brings about the above-mentioned element breakdown prevention effect or threshold current reduction effect in the surface-emitting laser 10 will be described.

[0058] In this embodiment, the first semiconductor layer 15 preferably has a thickness 10 times or more than that of the second semiconductor layer 16 in order to provide a path for current to flow in the in-plane direction within the first semiconductor layer 15. Specifically, the first semiconductor layer 15 preferably has a thickness of 500 nm or more and 1600 nm or less.

[0059] In this embodiment, the second semiconductor layer 16 preferably has a thickness of 7 nm or more and 20 nm or less. This is because if the thickness of the second semiconductor layer 16 is less than 7 nm, the distance between the third semiconductor layer 17 and the first semiconductor layer 15 becomes short, making it difficult to prevent current concentration in the region RA. Also, if the thickness of the second semiconductor layer 16 exceeds 20 nm, there is a risk of an increase in the voltage applied to the element.

[0060] In this example, the first semiconductor layer 15 made of GaN contains 2×10 18 ~5×10 18 atoms / cm 3 It is preferable to dope the silicon with a concentration of 2×10 18 atoms / cm 3 If the thickness is less than 5×10, it becomes difficult for current to flow in the first semiconductor layer 15. 18 atoms / cm 3 If the thickness exceeds 100 nm, the internal loss of light due to light absorption may increase.

[0061] In this embodiment, the second semiconductor layer 16 made of AlGaN preferably has an Al content of 8% or more and 35% or less. This is because if the Al content is less than 8%, it becomes difficult to prevent current concentration in the region RA described above, and if the Al content exceeds 35%, the contact resistance between the second semiconductor layer 16 and the n-electrode NE formed on the upper surface 16T of the second semiconductor layer 16 increases.

[0062] In this embodiment, the second semiconductor layer 16 made of AlGaN contains 3×10 18 ~8×10 19 atoms / cm 3 It is preferable to dope the silicon with a concentration of 3×10 18 atoms / cm 3If the thickness is less than 8×10, the contact resistance between the n-electrode NE formed on the upper surface 16T of the second semiconductor layer 16 and the second semiconductor layer 16 increases. 19 atoms / cm 3 If the thickness exceeds this value, the crystallinity of the AlGaN layer may deteriorate.

[0063] In this embodiment, the second semiconductor layer 16 is preferably formed in a portion where the optical field strength inside the resonator is small, i.e., in a node portion of the optical field distribution, in order to reduce the internal loss of light due to absorption of the laser light. Also, the active layer 18 is preferably formed so that the center in the thickness direction is in an antinode portion of the optical field distribution.

[0064] Specifically, the second semiconductor layer 16 is preferably formed so that the center of the second semiconductor layer 16 in the thickness direction is located at a position that is a distance a from the center of the active layer 18 in the thickness direction. Here, the distance a can be expressed as a=(2m+1)×0.25λ / n, where m is an arbitrary integer, λ is the oscillation wavelength of the laser light, and n is the refractive index of GaN at the oscillation wavelength.

[0065] In this embodiment, the fourth semiconductor layer 19, which is a contact layer, is a p-type GaN layer, but it may be a p-type InGaN layer.

[0066] [Manufacturing method of surface-emitting laser] A method for manufacturing the surface-emitting laser 10 will be described below with reference to Fig. 4. Fig. 4 is a flowchart showing an exemplary manufacturing process for the surface-emitting laser 10. In this embodiment, each semiconductor layer in the semiconductor structure layer EM is formed using metal organic chemical vapor deposition (MOCVD).

[0067] First, in the process of forming the first multilayer reflector 13, Group III raw materials trimethylaluminum (TMA), trimethylindium (TMIn), and ammonia gas are introduced into an MOCVD apparatus to form AlInN on a substrate 11 made of GaN. Next, Group III raw material trimethylgallium (TMGa) is introduced instead of TMA and TMIn to form GaN. This process is repeated 41 times to form 41 pairs of first multilayer reflectors 13 made of AlInN / GaN (Step S101).

[0068] At this time, AlInN and GaN are formed in layers on the (0001) crystal plane of the substrate 11, and each layer is formed so that its thickness is ¼ of the optical layer thickness for the desired wavelength.

[0069] Next, as a semiconductor layer stacking process, a first semiconductor layer 15 which is a first n-type GaN layer, a second semiconductor layer 16 which is an n-type AlGaN layer, a second n-type GaN layer, an active layer, and a p-type GaN layer are stacked in this order on the first multilayer reflector 13 (step S102).

[0070] As a specific lamination process, first, a doping gas SiH4 containing TMGa and Si is introduced to form a layer having a thickness of 1400 nm and a Si doping amount of 3×10 18 atoms / cm 3 A first semiconductor layer 15 (first n-type GaN layer) is formed.

[0071] Subsequently, TMA was supplied onto the first n-type GaN layer to form a layer having a thickness of 10 nm and a Si doping amount of 1×10 19 atoms / cm 3 The second semiconductor layer 16 (n-type AlGaN layer) is formed so that the Al composition is 20%.

[0072] Next, a layer having a thickness of 100 nm and a Si doping amount of 3×10 18 atoms / cm 3The second n-type GaN layer is formed to reduce the lattice mismatch between the second semiconductor layer 16 and an undoped InGaN layer formed on the second n-type GaN layer.

[0073] Next, TMG and trimethylindium (TMI) are supplied onto the second n-type GaN layer to form an undoped InGaN layer with an In composition of 5%. The undoped InGaN layer is formed to relieve the strain of the active layer to be formed on top of it. The InGaN layer has a doping density of 1×10 17 ~1×10 18 atoms / cm 3 The layer may be doped with Si in the range of 0.1 to 1.0 and used as a layer for promoting carrier injection into the active layer.

[0074] Next, an undoped GaN barrier layer having a thickness of 4 nm and an undoped InGaN well layer having a thickness of 3 nm are stacked five times on the undoped InGaN layer, and then an undoped GaN barrier layer having a thickness of 5 nm is stacked to form an active layer.

[0075] Thereafter, a 20 nm thick Mg-doped p-type AlGaN carrier blocking layer (Al composition ratio 20%), a p-type GaN layer, and a p-type GaN contact layer are formed in this order on the active layer, completing the semiconductor layer stacking process.

[0076] Next, the semiconductor layer deposited in step S102 is etched using a dry etching method (step S103). The etching process will now be described in detail with reference to FIGS.

[0077] 5 is a cross-sectional view of the surface-emitting laser 10 during manufacture after each semiconductor layer is stacked on the first multilayer reflector 13 in step S102. The surface-emitting laser 10 during manufacture has a first semiconductor layer 15, a second semiconductor layer 16, a second n-type GaN layer 17M, an active layer 18M, and a p-type GaN layer 19M stacked in this order on the first multilayer reflector 13.

[0078] 6 is a cross-sectional view of the surface-emitting laser 10 during manufacture after forming a protrusion 19P (current confinement layer in this embodiment) in the p-type GaN layer 19M. The protrusion 19P is formed by removing a part of the p-type GaN layer 19M using a known photolithography technique after step S102. In this embodiment, the protrusion 19P is formed by forming a mask with a diameter of 5.5 μm in a region approximately in the center of the upper surface of the p-type GaN layer 19M, and then etching the region excluding the region where the mask is formed using an etching device.

[0079] 7 is a cross-sectional view of the surface-emitting laser 10 during manufacture when etching is started on the upper surface of the p-type GaN layer 19M after the protrusion 19P has been formed. As shown in Fig. 7, a mask MS is formed on the upper surface of the p-type GaN layer 19M. The mask MS is formed by applying a resist to the upper surface of the p-type GaN layer 19M and then removing a part of the resist so that a concentric circle with a diameter larger than the portion corresponding to the protrusion 19P remains.

[0080] The endpoint detection device 26 is a device for detecting a desired etching depth (endpoint) during etching of a semiconductor layer. The endpoint detection device 26 is incorporated into, for example, an etching device. The endpoint detection device 26 includes a light projecting / receiving unit 27 and a control unit 28.

[0081] The light-emitting / receiving unit 27 is a unit that includes a light-emitting unit that emits laser light and a light-receiving unit that receives reflected light when the laser light is irradiated onto an object. The control unit 28 is connected to the light-emitting / receiving unit 27 and controls, for example, the position of the light-emitting / receiving unit 27 and the irradiation intensity of the laser light from the light-emitting / receiving unit 27.

[0082] Using the light projecting and receiving unit 27 of the endpoint detection device 26, a laser beam is irradiated onto the region on the top surface of the p-type GaN layer 19M excluding the region where the mask MS is formed, i.e., the region where the top surface of the p-type GaN layer 19M is exposed, and etching of that region is started. In Fig. 7, the light irradiated onto the top surface of the p-type GaN layer 19M from the light projecting and receiving unit 27 is shown as laser beam L1, and the light reflected from the laser beam L1 is shown as reflected beam L2.

[0083] 8 is a cross-sectional view of the surface-emitting laser 10 in the process of being manufactured after the region including the outer edge of the upper surface of the second semiconductor layer 16 has been exposed by the above-mentioned etching process. The surface-emitting laser 10 in the process of being manufactured shown in FIG. 8 is configured by removing the p-type GaN layer 19M, the active layer 18M, and the second n-type GaN layer 17M by etching, excluding the region where the above-mentioned mask is formed, while measuring the intensity of the reflected light L2 of the laser light L1 irradiated from the light-emitting / receiving unit 27. At this time, it can be determined based on the intensity of the reflected light L2 that the second semiconductor layer 16 has been exposed by the etching process.

[0084] Specifically, by using the light projecting / receiving unit 27 of the endpoint detection device 26 to detect the difference between the intensity of reflected light L2 when laser light L1 is irradiated onto the second n-type GaN layer 17M formed on the second semiconductor layer 16 and the intensity of reflected light L2 when laser light L1 is irradiated onto the second semiconductor layer 16, it can be determined that the second semiconductor layer 16 has been exposed.

[0085] After the second semiconductor layer 16 is exposed by the above-described etching process, the mask MS is removed, thereby forming the semiconductor structure layer EM having the above-described mesa structure.

[0086] In this way, by using the endpoint detection device 26 to perform an etching process based on the intensity of the reflected light L2 of the laser light L1 irradiated onto the semiconductor layer, it is possible to form a second semiconductor layer 16 having an exposed region including the outer edge of its upper surface and a semiconductor structure layer EM having a mesa structure formed on the second semiconductor layer 16.

[0087] 4 again, after step S103, a 10-nm-thick Ti layer and a 500-nm-thick Al layer are stacked in this order on the upper surface of the second semiconductor layer 16 exposed by step S103 to form a ring-shaped n-electrode NE (step S104).

[0088] Next, in the step of forming the insulating layer 21, a dielectric film made of SiO2 is provided around the protruding portion 19P (current confinement layer) of the fourth semiconductor layer 19 formed in step S103 so as to surround the protruding portion 19P of the fourth semiconductor layer 19 (step S105). By step S105, the upper surface of the protruding portion 19P is exposed from the opening 21O of the insulating layer 21.

[0089] Next, a translucent electrode layer 23 made of ITO is formed on the protrusion 19P and the insulating layer 21 so as to cover the upper surface of the protrusion 19P exposed in step S105 and the upper surface of the insulating layer 21 (step S106).

[0090] Next, ten pairs of Nb2O5 / SiO2 second multilayer reflectors 25 are formed by repeatedly laminating Nb2O5 and SiO2 ten times on the translucent electrode layer 23 so as to cover the region above the protrusion 19P on the upper surface of the translucent electrode layer 23 (step S107). At this time, the Nb2O5 and SiO2 layers are formed so that their respective layer thicknesses are ¼ of the optical layer thickness for the desired wavelength.

[0091] Next, Au is formed along the outer edge of the upper surface of the translucent electrode layer 23 to form a ring-shaped p-electrode PE (step S108).

[0092] Finally, an anti-reflection film (not shown) is formed on the back surface of the substrate 11 (the surface opposite to the surface on which the first multilayer film reflector 13 is formed), thereby manufacturing the surface-emitting laser 10 shown in Fig. 3. Note that the manufacturing process described above is merely exemplary, and the elements to be doped into the semiconductor and the dimensions of each component can be changed as appropriate. [Example]

[0093] Next, a surface-emitting laser 20 according to Example 2 will be described with reference to Fig. 9. The surface-emitting laser 20 differs from Example 1 in the configuration of the semiconductor structure layer EM, but has the same configuration as Example 1 in other respects.

[0094] Fig. 9 is a cross-sectional view of the surface-emitting laser 20 taken along line 3-3 in Fig. 2, similar to the cross-sectional view shown in Fig. 3. The fifth semiconductor layer 29 is an undoped nitride semiconductor layer formed in contact with the lower surface of the second semiconductor layer 16 made of AlGaN.

[0095] The fifth semiconductor layer 29 is formed so as to cover the upper surface of the first semiconductor layer 15. Therefore, the fifth semiconductor layer 29 has the same upper surface shape as the first semiconductor layer 15, i.e., a rectangular shape. In this example, the fifth semiconductor layer 29 has a composition of GaN.

[0096] In this embodiment, the interface between the fifth semiconductor layer 29 made of undoped GaN and the second semiconductor layer 16 made of AlGaN is filled with electrons, and the interface has a higher conductivity than other regions.

[0097] Specifically, in this embodiment, in the region on the fifth semiconductor layer 29 side of the interface between the fifth semiconductor layer 29 and the second semiconductor layer 16, a layer of free electrons with high in-plane mobility is spread out, i.e., a two-dimensional electron gas layer is formed.

[0098] According to this embodiment, the current that reaches the upper surface 19PT of the protrusion 19P advances in the thickness direction through each of the fourth semiconductor layer 19, the active layer 18, the third semiconductor layer 17, and the second semiconductor layer 16, and flows to the fifth semiconductor layer 29. The current that reaches the fifth semiconductor layer 29 diffuses in the in-plane direction through the two-dimensional electron gas layer in the fifth semiconductor layer 29, and flows to the n-electrode NE.

[0099] For example, the current that reaches the upper surface 19PT of the protrusion 19P from the p-electrode PE flows through the centers of the fourth semiconductor layer 19, the active layer 18, the third semiconductor layer 17, and the second semiconductor layer 16 to the fifth semiconductor layer 29, as shown by the current path CP2 in Figure 9, and then travels again in the thickness direction of the second semiconductor layer 16 to flow to the n-electrode NE.

[0100] As described above, according to this embodiment, the current flows along the above-described path, and therefore the current does not behave as if it were taking the shortest path from the upper surface 19PT to the n-electrode, for example, the current does not travel along a path that concentrates from the upper surface 19PT to the region RA near the lower end of the third semiconductor layer 17. In other words, according to this embodiment, the current can be prevented from concentrating near the rising portion of the mesa structure. Therefore, according to this embodiment, it is possible to prevent element breakdown and the like caused by the current concentration in the region RA.

[0101] Furthermore, according to this embodiment, the current flowing from the upper surface 19PT flows in the thickness direction through the region LA (the region where the current contributes to the gain of the laser light) directly below the protrusion 19P of the fourth semiconductor layer 19 in the active layer 18, as in the first embodiment.

[0102] Therefore, according to this embodiment, for example, it is possible to prevent current from flowing into an area around the above-mentioned area LA that does not contribute to the gain of the laser light, i.e., an area that will result in optical loss. Therefore, according to this embodiment, it is possible to prevent current from unnecessarily flowing into an area that will result in optical loss, and it is possible to reduce the threshold current required for laser light oscillation.

[0103] Thus, according to this embodiment, similarly to the first embodiment, it is possible to reduce the threshold current required for laser light oscillation within the semiconductor structure layer EM of the surface-emitting laser 10 while the current flows through a region that contributes to the gain of the laser light within the semiconductor layer.

[0104] The fifth semiconductor layer 29 preferably has a thickness of 10 to 50 nm from the viewpoint of generating two-dimensional electron gas between the fifth semiconductor layer 29 and the second semiconductor layer 16. That is, the fifth semiconductor layer 29 is configured to have a thickness thinner than that of the first semiconductor layer 15.

[0105] In this embodiment, since the fifth semiconductor layer 29 serves as a path for diffusing current in the in-plane direction, the first semiconductor layer formed below the fifth semiconductor layer 29 may be doped with Si at a concentration different from that in Example 1. For example, the concentration of Si doped into the first semiconductor layer may be 5×10, which is a concentration at which the operating voltage does not become unstable. 17 ~3×10 18 atoms / cm 3 may be in the range of

[0106] It should be noted that the various numerical values, dimensions, materials, etc. in the above-described embodiments and modifications are merely illustrative and can be selected appropriately depending on the application and the surface-emitting laser to be manufactured. For example, although the above-described embodiments have been described with reference to a vertical-cavity surface-emitting laser, the application of the above-described configuration of the present invention is not limited to surface-emitting lasers, but can also be applied to other vertical-cavity light-emitting devices such as vertical-cavity light-emitting diodes.

[0107] In addition, in the above-described examples and modified examples, ordinal numbers such as "first" and "second" are used for convenience and may not indicate the stacking order of components, etc. Therefore, for example, "first" can be appropriately replaced with "second" in the description. [Explanation of symbols]

[0108] 10, 20 Surface-emitting laser 11 Circuit Board 13 First multilayer mirror 15 First semiconductor layer 16 Second semiconductor layer 17 Third Semiconductor Layer 18 Active layer 19 Fourth Semiconductor Layer 21 Insulating layer 23 Transparent electrode layer 25 Second multilayer mirror 26 Endpoint detection device 27 Light emitter / receiver section 28 Control Unit 29 Fifth Semiconductor Layer EM semiconductor structure layer NE n electrode PE p electrode

Claims

1. A substrate; a first multilayer film reflector formed on the substrate; a semiconductor structure layer made of nitride semiconductors, including: a first semiconductor layer having a first conductivity type formed on the first multilayer film reflector; a second semiconductor layer having the first conductivity type formed on the first semiconductor layer; a light emitting layer formed on the second semiconductor layer so as to expose a region including an outer edge of an upper surface of the second semiconductor layer; and a third semiconductor layer formed on the light emitting layer and having a second conductivity type opposite to the first conductivity type; an electrode formed on an upper surface of the second semiconductor layer; an electrode layer in electrical contact with the third semiconductor layer in a region of the top surface of the third semiconductor layer; a second multilayer film reflector that forms a resonator between itself and the first multilayer film reflector, the first semiconductor layer has a composition of GaN; The vertical cavity light emitting device is characterized in that the second semiconductor layer has a composition of AlGaN, is thinner than the first semiconductor layer, and has a higher resistance than the first semiconductor layer.

2. 2. The vertical cavity light emitting device according to claim 1, further comprising a fourth semiconductor layer having a composition of undoped GaN formed in contact with the lower surface of said second semiconductor layer.

3. 3. The vertical cavity light emitting device according to claim 2, wherein the thickness of the fourth semiconductor layer is 10 nm to 50 nm.

4. 4. The vertical cavity light emitting device according to claim 1, wherein the thickness of the second semiconductor layer is 7 nm to 20 nm.

5. 5. The vertical cavity light emitting device according to claim 1, wherein the Al content of the second semiconductor layer is 8% or more and 35% or less.

6. 6. The vertical cavity light emitting device according to claim 1, wherein a distance a between a center of the second semiconductor layer in a thickness direction and a center of the light emitting layer in a thickness direction is expressed as a=(2m+1)×0.25λ / n, where λ is an oscillation wavelength of laser light in the vertical cavity light emitting device, n is a refractive index of GaN when the oscillation wavelength is λ, and m is an arbitrary integer.

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