Reconnection control device and power system

Abstract

The reconnection controller (104) controls a switch (109) disposed between at least one DER system (101) having a droop characteristic and a power grid (107). The reconnection control device (104) includes a first detection unit (105) that detects a first phase, a first frequency, and a first amplitude of a voltage on the DER system (101) side of the switch (109); a second detection unit (106) that detects a second phase, a second frequency, and a second amplitude of a voltage on the power grid (107) side of the switch (109); and a reconnection control unit (103) that reconnects the DER system (101) to the power grid (107) by outputting a power reference signal and a voltage reference signal to the DER system (101) so as to align the first phase with the second phase, align the first frequency with the second frequency, and align the first amplitude with the second amplitude, and by closing the switch (109) based on a difference between the first phase and the second phase and a difference between the first absolute value and the second absolute value.

Description

[Technical Field]

[0001] The present disclosure relates to an apparatus for reconnecting an independently operating distributed energy resource to a utility power grid after a fault has been cleared. [Background technology]

[0002] In recent years, distributed energy resources (DERs) have been promoted as a means of decarbonization. DERs equipped with storage batteries can combine energy generation and storage to operate independently from the utility grid (hereinafter referred to as the "grid") during power outages, such as power outages, accidents, faults, and natural disasters. DERs typically include an inverter connected to a DC power source, such as solar or a battery, including a power conditioner and control circuit and a synchronous generator. Due to the increasing amount of renewable energy integrated into the grid through static inverters, the inertial characteristics of the grid are reduced, thus affecting the overall stability of the grid. To restore grid inertia, grid-forming inverter technologies such as virtual synchronous generators have been proposed. Virtual synchronous generators provide the static inverter characteristics of synchronous generators by using storage batteries to supply or absorb inertial power, thereby ensuring grid stability.

[0003] A DER power supply system having one or more DERs and one or more grid-forming energy sources operates independently by disconnecting from the power grid by opening a switch. Hereinafter, such a DER power supply system will be referred to as a "DER system." The DER system needs to be reconnected to the power grid when a fault is resolved or power is restored (hereinafter, referred to as "power restored") and normal grid-connected operation is desired. To ensure safe reconnection, it is desirable to synchronize the frequency, phase, and amplitude of the DER system's voltage with the frequency, phase, and amplitude of the power grid's voltage.

[0004] To solve this problem, various methods for frequency and voltage synchronization have been proposed. JP 2022-037475 A discloses a method for synchronizing the voltage frequency and amplitude of an independently operating DER system with the voltage frequency and amplitude of the power grid before reconnection. Citation List [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2022-037475 Summary of the Invention [Problem to be solved by the invention]

[0006] A microgrid system (DER system) described in JP 2022-037475 A is electrically isolated from the power grid via a switch. When disconnected, the frequency and amplitude of the DER system's voltage differ from those of the power grid. This patent describes a method for synchronizing the frequency and amplitude of the DER system's voltage to those of the power grid. This method involves a measuring device located on the switch measuring the active power, reactive power, frequency, and amplitude of the voltage of both the power grid and the DER system. Through this measurement, the reactive power and active power of the DER system are adjusted to those of the power grid, respectively, and the frequency and amplitude of the DER system's voltage are adjusted to those of the power grid, respectively.

[0007] However, the above concept has the following problems. It does not describe a method for adjusting the voltage phase of a DER system to the voltage phase of a power grid. In order to safely reconnect a DER system to a power grid, the voltage phase of the DER system needs to be aligned with the voltage phase of the power grid. Patent document JP 2022-037475 does not provide a method for controlling the voltage phase of a DER system so that the voltage phase of the DER system is aligned with the voltage phase of the power grid for safe reconnection.

[0008] The present invention has been made to solve the above problems, and its purpose is to propose a method for synchronizing the amplitude, phase, and frequency of the output voltage of a DER system with the amplitude, phase, and frequency of the output voltage of the power grid before reconnection, and initiating a switch closing sequence when the required conditions are met. The voltage phase and frequency are adjusted by adjusting the power reference of one or more DER units that have power grid formation or droop characteristics. [Means for solving the problem]

[0009] To solve the above problem, the reconnection control device of the present invention includes two detectors, one on each side of a reconnection switch, that measure the phase, frequency, and amplitude of the DER system's output voltage and the phase, frequency, and amplitude of the grid-side voltage. Information from these detectors is received by a reconnection control unit, which includes a power control unit, a voltage regulation unit, and a switching unit. The switching unit closes the switch when the phase, frequency, and amplitude of the DER system's output voltage match those of the grid. The power control unit receives the phase and frequency information from both sides of the switch and outputs a command signal to adjust the phase and frequency of the DER system by changing the power reference, and a switch signal to the switching unit. The power control unit first calculates the power reference through phase matching control, performed by the phase control unit, by generating a power reference signal to change the frequency of the DER system's output voltage, thereby achieving accelerated phase matching. When the phase difference is within a given threshold, referred to herein as a first threshold, control is transferred to frequency matching control, which generates a power reference to match the frequency of the DER system's output voltage to the frequency of the grid voltage. When the frequencies are matched, the phase difference is reduced, and when the phase difference is within a given threshold (hereinafter referred to as the second threshold), the power control unit sends a signal (FP signal) to the switching unit to close the switch. The voltage control unit controls the amplitude of the DER's output voltage to match the amplitude of the power grid voltage, and sends a signal (V signal) to the switching unit when the voltages match. When the switching unit receives the FP signal and the V signal, the switch is closed. [Effects of the Invention]

[0010] According to the present disclosure, reconnection of a DER system including one or more units with grid-shaping characteristics to a power grid after a fault-related disconnection or abnormal situation occurs after aligning the phase, frequency, and amplitude of the DER system's output voltage with the phase, frequency, and amplitude of the power grid's voltage, ensuring safe reconnection and not affecting the output power supplied by the DER system to loads. Because the phase, frequency, and amplitude of the DER system's output voltage are aligned with the frequency and amplitude of the power grid's output voltage, reconnection to the power grid after power restoration is seamless, thereby eliminating system disturbances. The voltage supplied to residential / commercial loads remains uninterrupted, thereby maintaining voltage quality and frequency. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a block diagram showing the entire system according to a first embodiment. [Figure 2] FIG. 1 is a block diagram illustrating an example of a residential / commercial load served by a DER system. [Figure 3] FIG. 2 is a block diagram of the exemplary DER system shown in FIG. 1 for a first embodiment. [Figure 4] FIG. 4 is a block diagram illustrating the inverter control unit shown in FIG. 3 with reference to the first embodiment. [Figure 5] FIG. 5 is a block diagram showing the configuration of a VSG control unit shown in FIG. [Figure 6] 2 is a block diagram illustrating the configuration of a detection unit 1 shown in FIG. [Figure 7] 2 is a block diagram illustrating the configuration of a detection unit 2 shown in FIG. 1. FIG. [Figure 8] 2 is a block diagram showing the configuration of a reconnection unit shown in FIG. 1. FIG. [Figure 9] 9 is a block diagram showing the configuration of a power control unit shown in FIG. 8. FIG. [Figure 10] FIG. 10 is a block diagram showing the configuration of a frequency control unit in FIG. [Figure 11] FIG. 10 is a block diagram showing the configuration of a phase control section shown in FIG. [Figure 12] 10 is a block diagram showing the configuration of a power reference calculation unit shown in FIG. 9. FIG. [Figure 13] 9 is a block diagram showing the configuration of a voltage adjusting unit shown in FIG. 8. FIG. [Figure 14] FIG. 6 is a block diagram showing the operation of a governor unit 502 shown in FIG. 5. [Figure 15] 6 is a block diagram for explaining the operation of the main VSG control unit shown in FIG. 5. FIG. [Figure 16] 1 is a graph illustrating the droop characteristics of a DER system 101 in terms of the power output (in watts) of the DER system 101 and the deviation of the frequency of the DER system 101 from a reference frequency (dF=Fref-Fder). [Figure 17A] 1 is a simulation graph illustrating the frequency of the DER system 101 and the power grid 107 when the switch 109 is closed when there is a significant difference between the phase and frequency of the DER system 101 according to the first embodiment. [Figure 17B] 1 is a simulation graph illustrating the voltages of the DER system 101 and the power grid 107 when the switch 109 is closed when there is a significant difference between the phase and frequency of the DER system 101 and the phase and frequency of the power grid 107 according to the first embodiment. [Figure 18A] 1 is a simulation graph illustrating the frequency of the DER system 101 and the power grid 107 when the switch 109 is closed when there is little difference between the phase and frequency of the DER system 101 in the first embodiment. [Figure 18B] 1 is a simulation graph illustrating the voltages of the DER system 101 and the power grid 107 when the switch 109 is closed when there is little difference between the phase and frequency of the DER system 101 and the phase and frequency of the power grid 107 in the first embodiment. [Figure 19] 9 is a flowchart illustrating the operation of a power control unit 801 shown in FIG. 8. [Figure 20]1 is a voltage graph of the output voltage of the DER system 101 and the power grid 107 for applying phase and frequency control through the reconnection control device 104 of the first embodiment. [Figure 21] 4 is a graph illustrating droop characteristics with respect to phase and frequency control by the reconnection control device 104 according to the first embodiment. [Figure 22] 9 is a flowchart illustrating the operation of the voltage adjusting unit 802 described in FIG. 8. [Figure 23] 9 is a flowchart illustrating the operation of the switching unit 802 described in FIG. 8. [Figure 24] FIG. 10 is a block diagram showing the entire system according to the second embodiment. [Figure 25] FIG. 25 is a block diagram showing the configuration of the reconnection unit shown in FIG. 24. [Figure 26] FIG. 26 is a block diagram showing the configuration of a power control unit shown in FIG. 25. [Figure 27] FIG. 27 is a block diagram showing the configuration of a phase control section shown in FIG. 26. [Figure 28] FIG. 27 is a block diagram showing the configuration of a frequency control unit in FIG. 26. [Figure 29] FIG. 27 is a block diagram showing the configuration of a power reference calculation unit shown in FIG. 26. [Figure 30] 26 is a graph showing the steady-state relationship between dF (Fref-Fder) and dP (Pref-Pout) given for a plurality of DER systems 101a to 101n given in FIG. 25 in the second embodiment. [Figure 31] 1 is a graph illustrating the steady-state relationship between dF(Fref-Fder) and dP(Pref-Pout) for multiple DER systems 101a-101n when operating at a frequency different from that provided by a frequency reference signal (Fref). [Figure 32] 1 is a graph showing droop characteristics of DER systems 101a to 101n with respect to power output (watts) and frequency deviation from a reference frequency. [Figure 33]10 is a graph showing droop characteristics of DER systems 101a to 101n with respect to power output (watts) and frequency deviation from a reference frequency when the frequency of the DER system is changed by changing a power reference signal (Pref). DETAILED DESCRIPTION OF THE INVENTION

[0012] Description of the embodiment

[0013] First embodiment

[0014] First, a description will be given of a configuration example of a DER system to which a device for safe reconnection according to the first embodiment is applied. Note that although a three-phase system is exemplified in the first embodiment, the DER system may also be a single-phase system.

[0015] composition

[0016] FIG. 1 is a block diagram illustrating a complete configuration of a first embodiment. A distributed energy resource system (DER system) 101 is shown in FIG. 1 , typically connected to a power grid 107 and supplying power to residential and commercial loads 110. The DER system 101 is connected to the power grid 107 via a switch 109. The DER system 101 is configured with energy generation / energy storage so that the DER system 101 can independently supply power to the residential and / or commercial loads 110 in the event of a power outage or malfunction in the operation of the power grid 107. The DER system 101 is connected to a distribution grid 112 via a distribution impedance 111. The distribution grid 112 connects the power grid 107 or the DER system 101 to the residential and / or commercial loads 110. Hereinafter, the residential and / or commercial loads 110 are referred to as "residential / commercial loads." The DER system 101 receives control information from a central energy management system (CEMS) 116, which is a higher-level DER system controller that provides control information to the DER system 101. In a first embodiment, the CEMS 116 is considered to be physically located at the same site as the reconnection controller 104 .

[0017] Once the malfunction / fault in the power grid 107 is resolved, the independently functioning DER system 101 is preferably reconnected to the power grid 107 via the switch 109. During reconnection, the reconnection controller 104 detects the phase, frequency, and amplitude of the voltage at point 113 on the DER system side of the switch 109 and the phase, frequency, and amplitude of the voltage at point 114 on the power grid side of the switch 109. The reconnection controller 104 provides a signal to close the switch 109 when the phase, frequency, and amplitude of the voltage on both sides of the switch 109 are within predetermined thresholds. The reconnection controller 104 also receives control information from the CEMS 116 via the receiver 102.

[0018] During normal operating conditions, the power grid 107 is connected to the residential / commercial loads 110 and the DER system 101 through a distribution transformer 108 via a switch 109. When the switch 109 is open, the DER system 101 operates in an isolated mode of operation, and when the switch 109 is closed, the DER system 101 is connected to the power grid 107 and performs grid-tied operation.

[0019] In an islanded operation mode, the DER system 101 supplies power to the residential / commercial loads 110 via the distribution grid 112. The DER system 101 is connected to the distribution grid 112 through a distribution impedance 111 consisting of a reactive component and a resistive component. Islanded operation is desirable during power outages caused by a power outage, a natural disaster, or a fault in the power grid 107. FIG. 2 shows a schematic representation of the residential / commercial loads 110. The residential / commercial loads 110 comprise a first transformer 201 and a second transformer 202. The residential / commercial loads 110 are connected to the DER system 101 via the first transformer 201 and the second transformer 202. During islanded operation, the residential loads 110 supplied by the DER system 101 may include hospitals and schools 204, street lights 205, and even apartment buildings 203. The DER system 101 may also supply power to a commercial load 206.

[0020] The DER system 101 according to the first embodiment includes one DER unit that actively controls the amplitude and frequency of the output voltage through power grid formation control, i.e., power grid formation control. The DER system 101 receives control information from the CEMS 116.

[0021] The DER system 101 can be composed of one or more DERs with power grid formation control and one or more DERs with power grid tracking control, but in the first embodiment, a description of multiple DERs will be omitted.

[0022] 3 shows the overall configuration of a DER system 101 of the first embodiment, which is composed of a single DER. The DER system 101 includes a DC power-supply-equipped DER 301, an inverter 302, a third transformer 303, an inverter control unit 304, and a current and voltage detector 305.

[0023] The DER with DC power source 301 includes a DER such as a solar energy or battery storage system that supplies a DC voltage. The DC power source DER 301 is connected to an inverter 302, which is a power electronics inverter circuit that converts the DC voltage to a desired AC voltage. The inverter 302 includes semiconductor switches such as field effect transistors (FETs) and is controlled by gate pulse signals. The AC voltage output from the inverter 302 is stepped up by a third transformer 303 to match the AC voltage of the power distribution system 112. Thus, the inverter 302 is connected to the power distribution system 112 via the third transformer 303.

[0024] The inverter control unit 304 receives the inverter AC current value detected by the current and voltage detector 305 and the voltage value (Vinv, Inv) of the inverter 302. The current detected by the current and voltage detector 305 is called the "inverter current (Iinv)," and the voltage detected by the current and voltage detector 305 is called the "inverter voltage (Vinv)."

[0025] The inverter control unit 304 also receives a power reference signal (Pref) and a voltage reference signal (Vref) from the reconnection control device 104, and receives a frequency reference signal (Fref) from the CEMS 116. In the first embodiment, the DER system 101 receives the value of the frequency reference signal (Fref), which is normally set to the operating frequency of the power grid 107. The inverter control unit 304 controls the phase, frequency, and amplitude of the voltage of the inverter 302 via gate pulse signals based on the frequency reference signal (Fref), the power reference signal (Pref), and the voltage reference signal (Vref).

[0026] The inverter control unit 304 according to the first embodiment is shown in Fig. 4. The inverter control unit 304 includes an AC frequency detection unit 401, a voltage command calculation unit 402, a power calculation unit 403, a VSG control unit 404, and a gate pulse generation unit 406.

[0027] The AC frequency detection unit 401 receives the inverter voltage (Vinv) and detects its frequency. The frequency of the inverter voltage (Vinv) detected by the AC frequency detection unit 401 is referred to as the "inverter frequency (Finv)." The inverter frequency (Finv) is sent to the voltage command calculation unit 402, the power calculation unit 403, and the VSG control unit 404.

[0028] The power calculation unit 403 receives the inverter current (Iinv), the inverter voltage (Vinv), and the inverter frequency (Finv), and calculates the power output (Pout) of the inverter 302. The power output (Pout) calculated by the power calculation unit 403 is provided to the VSG control unit 404.

[0029] The VSG control unit 404 receives the power output (Pout) from the power calculation unit 403 and receives the inverter frequency (Finv) from the AC frequency detection unit 401. The VSG control unit 404 also receives a frequency reference signal (Fref) from the CEMS 116 and a power reference signal (Pref) from the reconnection control device 104. The VSG control unit 404 calculates a phase command value (θc) and a frequency command value (Fc) to be sent to the voltage command calculation unit 402 based on the inverter frequency (Finv), the frequency reference signal (Fref), the power output (Pout), and the power reference signal (Pref).

[0030] The voltage command calculation unit 402 is a voltage controller that receives the inverter voltage (Vinv) from the current and voltage detector 305, the inverter frequency (Finv) from the AC frequency detection unit 401, the phase command value (θc) and the frequency command value (Fc) from the VSG control unit 404, and the voltage reference signal (Vref) from the reconnection control device 104. The voltage command calculation unit 402 calculates a sinusoidal voltage command value (Vc) to be provided to the gate pulse generation unit 406. The amplitude of the voltage command value (Vc) is based on a controller, which may be a PI controller that controls the amplitude of the inverter voltage (Vinv) so as to match the amplitude of the inverter voltage (Vinv) with the voltage reference signal (Vref), and the phase and frequency of the voltage command value (Vc) are given by the phase command value (θc) and the frequency command value (Fc).

[0031] The gate pulse generating unit 406 calculates a gate pulse signal to be sent to the inverter 302 based on the voltage command value (Vc).

[0032] 5 shows a schematic configuration of the VSG control unit 404. The VSG control unit 404 includes a subtractor 501, a governor control unit 502, an adder circuit 503, a subtractor 504, and a main VSG control unit 505.

[0033] A subtractor 501 calculates the difference between the inverter frequency (Finv) and the frequency reference signal (Fref). The output of the subtractor 501 is provided to a governor control unit 502. The governor control unit 502 functions as a governor and generates an offset value to be added to the power reference signal (Pref) based on the output of the subtractor 501. The offset value is added to the power reference signal (Pref) by an adder circuit 503 generating a corrected power reference signal (MPref). A subtractor 504 calculates the difference (dP) between the inverter output power (Pout) received from the power calculation unit 403 and the corrected power reference signal (MPref) from the adder circuit 503, and sends the difference (dP) to a main VSG control unit 505. The main VSG control unit 505 calculates a phase command value (θc) and a frequency command value (Fc) based on the principle of a virtual synchronous generator so that the difference between the frequency reference signal (Fref) and the frequency command value (Fc) depends on the difference (dP) between the modified power reference signal (MPref) and the inverter output power (Pout). The phase command value (θc) is calculated based on the frequency command value (Fc). Detailed operations of the governor control unit 502 and the main VSG control unit 505 will be described later.

[0034] 1 , the reconnection control device 104 receives information on the phase, frequency, and amplitude of the AC voltage at a point 113 on the DER system side of the switch 109, and information on the phase, frequency, and amplitude of the voltage at a point 114 on the power grid side of the switch 109. The reconnection control device 104 also receives reception information from the receiving unit 102 as a “signal from CEMS” 116. The reconnection control device 104 outputs a power reference signal (Pref) and a voltage reference signal (Vref) to the DER system 101.

[0035] The reconnection control device 104 includes a reconnection control unit 103, a first detection unit 105, and a second detection unit 106. The first detection unit 105 receives an AC voltage on the DER system side of the switch 109 at point 113, and outputs phase, frequency, and amplitude information of the AC output voltage of the DER system 101. The second detection unit 106 receives an AC voltage on the power grid side of the switch 109 at point 114, and outputs phase, frequency, and amplitude information of the AC voltage of the power grid 107. The reconnection unit 103 receives reception information from the receiving unit 102, receives phase, frequency, and amplitude information from the first detection unit 105, and receives phase, frequency, and amplitude information from the second detection unit 106. The reconnection 103 outputs a voltage reference signal (Vref) and a power reference signal (Pref) to the DER system 101.

[0036] The phase information detected by the first detection unit 105 will be referred to as the phase of the DER system, the frequency information detected by the first detection unit 105 will be referred to as the frequency of the DER system, and the amplitude information detected by the first detection unit 105 will be referred to as the voltage amplitude of the DER system.

[0037] The phase information detected by the second detection unit 106 will be referred to as the "phase of the power grid," the frequency information detected by the second detection unit 106 will be referred to as the "frequency of the power grid," and the amplitude information detected by the second detection unit 106 will be referred to as the "voltage amplitude of the power grid."

[0038] 6 shows a schematic configuration of first detection unit 105. First detection unit 105 includes a voltmeter 601, a phase detector 602, and a frequency detector 603.

[0039] A voltmeter 601 measures the AC output voltage on the DER system side of switch 109 at point 113. The voltmeter 601 outputs the voltage amplitude (Vder) of the DER system. A phase detector 602 detects the phase of the AC voltage detected by the voltmeter 601. The phase detector 602 outputs the phase (θder) of the DER system. The phase detector 602 also detects the zero-crossing points of the AC voltage measured by the voltmeter 601 and outputs the result to a frequency detector 603.

[0040] The frequency detector 603 receives the zero-crossing point information from the phase detector 602 and calculates the frequency by calculating the time between two zero-crossing points. The output of the frequency detector 603 is the frequency (Fder) of the DER system.

[0041] 7 shows a schematic configuration of the second detection unit 106. The second detection unit 106 includes a voltmeter 701, a phase detector 702, and a frequency detector 703.

[0042] The schematic configuration of the second detection unit 106 is similar to that of the first detection unit 105 .

[0043] A voltmeter 701 measures the AC output voltage on the power grid side of switch 109 at point 114. The voltmeter 701 outputs the voltage amplitude (Vgrid) of the power grid. A phase detector 702 detects the phase of the AC voltage detected by voltmeter 701. The phase detector 702 outputs the phase (θgrid) of the DER system. The phase detector 702 also detects the zero-crossing points of the AC voltage measured by voltmeter 701 and outputs the detected zero-crossing points to a frequency detector 703.

[0044] The frequency detector 703 receives the zero crossing point information from the phase detector 702 and calculates the frequency by calculating the time between two zero crossing points. The output of the frequency detector 703 is the frequency of the DER system (Fgrid).

[0045] A schematic configuration of the reconnection unit 103 is shown in Figure 8. The reconnection control unit 103 includes a power control unit 801, a voltage adjustment unit 802, and a switching unit 803. The power control unit 801 receives as input the phase and frequency (Fder, θder) of the DER system 101 detected by the first detection unit 105 and the phase and frequency (Fgrid, θgrid) of the power grid 107 detected by the second detection unit 106. The power control unit 801 also receives as input reception information of the allowable threshold from the receiving unit 102. Based on the input, the power control unit 801 calculates a power reference signal (Pref) to be transmitted to the DER system 101. The power control unit 801 also calculates an FP signal to be transmitted to the switching unit 803.

[0046] The voltage adjustment unit 802 receives the voltage amplitude (Vder) of the DER system 101 detected by the first detection unit 105 and the voltage amplitude (Vgrid) of the power grid 107 detected by the second detection unit 106, and calculates a voltage reference signal (Vref) to be sent to the DER system 101. The voltage adjustment unit 802 also receives reception information on the allowable threshold and the original voltage reference (Vref_orig) from the receiving unit 102. The voltage adjustment unit 802 also calculates a voltage signal to be sent to the switching unit 803.

[0047] The switching unit 803 receives the FP signal from the power control unit 801 and the voltage signal from the voltage adjustment unit 802. After receiving both signals, the switching unit 803 transmits a switch signal that closes the switch 109.

[0048] 9 shows a schematic configuration of the power control unit 801. The power control unit 801 includes a threshold calculation unit 904, a phase control unit 902, a frequency control unit 903, and a power reference calculation unit 901.

[0049] The threshold calculation unit 904 receives the phase and frequency (Fder, θder) of the DER system 101 from the first detection unit 105, and receives the phase and frequency (Fgrid, θgrid) of the power grid 107 from the second detection unit 106. The threshold calculation unit 904 also receives received information from the receiving unit 102. The threshold calculation unit 904 calculates a safe frequency range (Fmax-Fmin) and outputs it to the power reference calculation unit 901. Fmax means the maximum controllable frequency, and Fmin means the minimum controllable frequency. The threshold calculation unit 904 also calculates control parameters based on the received information from the receiving unit 102 and sends them to the phase control unit 902 and the frequency control unit 903. The threshold calculation unit 904 calculates a phase / frequency control command signal to be sent to the power reference calculation unit 901 based on the difference between the phase (θder) of the DER system 101 and the phase (θgrid) of the power grid 107. The threshold calculation unit 904 calculates the FP signal to be sent to the switching unit 803 based on the difference between the phase and frequency (θder, Fder) of the DER system 101 and the phase and frequency (θgrid, Fgrid) of the power grid 107.

[0050] The phase control unit 902 receives control parameters from the threshold unit 904, receives the phase (θder) of the DER system 101 from the first detection unit 105, and receives the phase (θgrid) of the power grid 107 from the second detection unit 106. The phase control unit 902 calculates a phase power reference (dPref_phase) based on the received information and sends it to the power reference calculation unit 901.

[0051] The frequency control unit 903 receives control parameters from the threshold unit 904, receives the frequency (Fder) of the DER system 101 from the first detection unit 105, and receives the frequency (Fgrid) of the power grid 107 from the second detection unit 106. The frequency control unit 903 calculates a frequency power reference (dPref_frequency) based on the received information and sends it to the power reference calculation unit 901.

[0052] The power reference calculation unit 901 receives the original power reference (Pref_orig) from the receiving unit 102, the frequency safety range (Fmax-Fmin) and the phase / frequency control command from the threshold calculation unit 904, the phase power reference (dPref_phase) from the phase control unit 902, and the frequency power reference (dPref_freq) from the frequency control unit 903. Based on the inputs, the power reference calculation unit 901 calculates a power reference signal (Pref) to be transmitted to the DER system 101.

[0053] 10 shows a schematic configuration of the phase control section 902. The phase control section 902 includes a subtractor 1001, a first PI block 1002, and a proportional gain circuit 1003.

[0054] The inputs to the phase control unit 902 are the phase of the DER system 101 and the phase of the power grid 107 (θder, θgrid). A subtractor 1001 calculates the difference between the phase of the power grid 107 and the phase of the DER system 101 (θder-θgrid). The result of the subtractor 1001 is provided to a first PI block 1002, which is a PI controller unit. The first PI block 1002 performs PI control based on the control parameters received from the threshold calculation unit 904, and generates a result that is provided to a proportional gain circuit 1003. The proportional gain circuit 1003 multiplies the output of the first PI block 1002 by a gain (K_phase). The output of the proportional gain circuit 1003 is provided to the phase reference calculation unit 901 as a phase power reference (dPref_phase).

[0055] 11 shows a schematic configuration of frequency control section 903. Frequency control section 903 includes a subtractor 1101, a second PI block 1102, and a proportional gain circuit 1103.

[0056] The inputs to the frequency control unit 903 are the frequency of the DER system 101 and the frequency of the power grid 107 (Fder, Fgrid). A subtractor 1101 calculates the difference between the frequency of the power grid 107 and the frequency of the DER system 101 (Fder-Fgrid). The result of the subtractor 1101 is provided to a second PI block 1102, which is a PI controller unit. The second PI block 1102 performs PI control based on the control parameters received from the threshold calculation unit 904, and generates a result that is provided to a proportional gain circuit 1103. The proportional gain circuit 1103 multiplies the output of the second PI block 1102 by a gain K_freq. The output of the proportional gain circuit 1103 is provided to the frequency reference calculation unit 901 as a frequency power reference (dPref_freq).

[0057] 12 shows a schematic configuration of the power reference calculation unit 901. The power reference calculation unit 901 includes a Pref control unit 1201 and an adder circuit 1202. The Pref control unit 1201 receives a phase power reference (dPref_phase) from a phase control unit 903, and a frequency power reference (dPref_freq) from a frequency control unit 904. The Pref control unit 1201 also receives a phase / frequency control command and a frequency safety range (Fmax-Fmin) from the threshold calculation unit 904.

[0058] The Pref control unit 1201 calculates and outputs a power reference correction value (dPref) based on the phase power reference (dPref_phase) and the frequency power reference (dPref_freq) in accordance with the phase / frequency control command. The Pref control unit 1201 also limits the power reference correction value (dPref) so that the frequency of the DER system 101 falls within the safe frequency range (Fmax-Fmin) given by the threshold calculation unit 904. The adder circuit 1202 adds the power reference correction value (dPref) to the original power reference (Pref_orig) to calculate a power reference signal (Pref), which is transmitted to the DER system 101.

[0059] The voltage adjusting unit 802 is given by Fig. 13. The voltage adjusting unit 802 comprises a subtractor 1303, a third PI block 1301, an adder circuit 1303, and a voltage signal unit 1302.

[0060] First, a subtractor 1303 calculates the difference between the voltage amplitude (Vder) of the DER system 101 detected by the first detector 105 and the second detector 106, respectively, and the voltage amplitude (Vgrid) of the power grid 107. This difference is provided to a third PI block 1301, which is a PI controller, to calculate a voltage command value (dVref). The voltage command value (dVref) is added to the original voltage reference (Vref_orig) received from the receiver 102 by an adder circuit 1303. The output of the adder circuit 1303 is a voltage reference signal (Vref) sent to the DER system 101. A voltage signal unit 1302 receives the difference between the voltage amplitude (Vder) of the DER system 101 and the voltage amplitude (Vgrid) of the power grid 107 from the subtractor 1303, and a third voltage threshold value V1 from the receiver 102. If the difference is less than the third threshold, the voltage signal unit 1302 sends a voltage signal to the switching unit 803 .

[0061] The switching unit 803 receives from the power control unit 801 an FP signal indicating that the difference between the phase and frequency (θder, Vder) of the voltage of the DER system 101 and the phase and frequency (θgrid, Vgrid) of the voltage of the power grid 107 is within a predetermined threshold, and from the voltage adjustment unit 802 a voltage signal indicating that the difference between the amplitude (Vder) of the voltage of the DER system 101 detected by the first detection unit 105 and the amplitude (Vgrid) of the voltage of the power grid 107 detected by the second detection unit 106 is within a predetermined threshold range. The switching unit 803 also receives reception information from the CEMS 116 via the receiving unit 102. This information may consist of a reconnection signal if it is desired that the DER system 101 be reconnected to the power grid 107.

[0062] When the switching unit 803 receives both the FP signal and the voltage signal, it closes the switch 109 .

[0063] operation

[0064] Virtual Synchronous Generator Technology Overview:

[0065] In the first embodiment, the DER system 101 is a virtual synchronous generator. The virtual synchronous generator technology will be briefly described below.

[0066] Synchronous generators are typically used for thermal power generation and have the following characteristics: adjusting output power according to frequency (governor control), maintaining angular velocity (inertial behavior), synchronizing with the grid voltage (voltage synchronization), adjusting the voltage of the power grid (AVR control: automatic voltage regulation control), and continuing operation when the AC grid voltage drops momentarily in the event of a fault or accident.

[0067] The virtual synchronous generator control technology allows the inverter to simulate the function of a synchronous generator by controlling the transient response of the power electronics inverter. Specifically, the governor simulates a calculation system to mimic the dynamic characteristics of a synchronous generator based on the oscillation equation and AVR control, and controls the inertial force.

[0068] In the first embodiment, the DER system 101 includes an inverter control unit 304 having a VSG control unit 404. The VSG control unit 404 performs a governor control operation and an operation of imitating inertial behavior according to an oscillation equation. The governor control operation and the operation of imitating inertial behavior according to an oscillation equation will be specifically described below.

[0069] First, let's briefly explain how governors work. Power plant governors control the output of generators by controlling the output of guide vanes in gas turbines or steam turbines in thermal or nuclear power plants, or in hydroelectric turbines in hydroelectric power plants. When power demand exceeds the power supplied by the AC power system, the frequency of the AC power system voltage drops. In thermal and hydroelectric power generators that are capable of output control, the governor has a droop characteristic that increases the power generated when the frequency of the system voltage drops. On the other hand, when the power supply exceeds the power demand and the frequency of the system voltage rises, the generator reduces the power generated.

[0070] In the first embodiment, the operation of the governor is estimated by equation (1), which is a model with a first-order lag.

number

[0071] Here, the proportional gain is (-1 / Kg) where Kg and Tg are the time constants of the first-order lag.

[0072] Due to inertial behavior, a synchronous generator has a rotor with an inertia constant of M. For example, if the power generated by a DC power supply-equipped DER301 suddenly drops due to a sudden change in solar radiation, governor control cannot instantly cover the power shortage. A synchronous generator converts the rotational energy stored in the rotor into power and outputs it to the AC system. At this time, if the angular velocity (rotational speed) of the rotor decreases, the energy supplied by governor control increases, balancing the required power and the supplied power. Equation (2) shows the oscillation equation that gives the relationship between the output frequency and output power of a synchronous generator in relation to the input.

number

[0073] Here, Pin is the input power to the synchronous generator, Pout is the output power of the synchronous generator, M is the inertia constant, ω is the angular velocity, and Dg is the damping coefficient.

[0074] In the first embodiment, the governor control unit 502 realizes governor control using equation (1), and the main VSG control unit 505 in the VSG control unit 404 of the inverter control unit 304 of the DER system 101 realizes inertial behavior based on the oscillation equation given by equation (2).

[0075] The operation of governor unit 502 is shown in Figure 14. Block 1401 is a governor equation block, which realizes the governor equation given by equation (1) by inputting the output (Finv-Fref) of subtractor 501. The output of the governor equation is provided to limiter circuit 1502, which limits the governor output to a certain range so that it does not exceed that range.

[0076] The operation of main VSG control unit 505 will be described with reference to Fig. 15. Main VSG control unit 505 includes adder circuit 1501, integrator block 1502, proportional gain block 1503, adder circuit 1505, proportional gain block 1506, and integrator circuit 1507.

[0077] The output (dP) of the subtractor 504 is provided to an adder circuit 1501. The adder circuit 1501 adds the output (dP) of the subtractor 504 and the output of a proportional gain block 1503. The output of the adder circuit 1501 is provided to an integrator block 1502. The integrator block 1502 is an integrator with a gain of (1 / M). The output (dFvsg) of the integrator 1502 is provided to a proportional gain block 1503 with a gain of Dg.

[0078] It can be seen that variation of the oscillation equation given by equation (2) is realized to obtain dFvsg in relation to dP. The output of the integrator 1502 is provided to an adder circuit 1505, which adds dFvsg to a frequency reference signal (Fref) obtained from the CEMS 116 via the receiver 102. The output of the adder circuit 1505 is a frequency command value (Fc). The frequency command value (Fc) is provided to the voltage command calculation unit 402. The output of the adder circuit 1505 is also provided to a proportional gain block 1506, which multiplies the output of the adder circuit 1505 (Fc) by 2π and converts it to radians. The output of the proportional gain block 1506 is provided to an integrator circuit 1507, which calculates a phase command value (θc) and provides it to the voltage command calculation unit 402.

[0079] In this way, the governor control unit 502 realizes governor control, the main VSG control unit 505 realizes inertial behavior using an oscillation equation, and simulates the synchronous generator characteristics of the inverter 302 via the inverter control unit 304.

[0080] Next, the steady-state relationship between dF (Fref - Finv) and dP (Pref - Pout) will be described using FIG. 16. These characteristics are called "droop" characteristics and represent the relationship between dP and dF. The horizontal axis represents dF, which is the deviation of the inverter frequency (Finv) from the frequency reference signal (Fref) obtained from the CEMS 116 via the receiver 102, and the vertical axis represents dP, which is the deviation of the inverter 302 output power (Pout) calculated by the power calculation unit 403 from the power reference signal (Pref) calculated by the reconnection control device 104. Therefore, the deviation (dF) of the inverter frequency (Finv) from the frequency reference signal (Fref) is linearly proportional to the deviation (dP) of the output power (Pout) from the power reference signal (Pref). The slope of this linear graph depends on the nominal capacity of the DER system 101, the governor gain Kg, and the damping coefficient Dg of the VSG control. The steady-state relationship between dP and dF is given by equation (3).

number

[0081] By changing the power reference signal (Pref) of the DER system 101, dP can be changed and therefore the inverter frequency (Finv) can be changed with a (dF-dP) characteristic as given by Figure 16. This principle is realized so that the operation of the reconnection controller 104 achieves phase and frequency alignment control.

[0082] When DER system 101, which has the droop characteristics described in FIG. 16 and performs VSG control via inverter control unit 304, is reconnected to power grid 107 via switch 109, it is desirable that the phase, frequency, and amplitude of the voltage on the DER system side of switch 109 at point 113 match the phase, frequency, and amplitude of the voltage on the power grid side of switch 109 at point 114.

[0083] FIG. 16 illustrates the droop characteristics of the DER system 101 with respect to the power output (in watts) of the DER system 101 and the deviation of the DER system 101's frequency from the reference frequency (dF=Fref-Fder). According to the steady-state equation, when Fder=Fref, the output power of the DER system 101 is given by Pref. Pbase indicates the nominal capacity of the DER system 101. Note that Fmax is the maximum deviation from the reference frequency such that the output power of the DER system 101 does not exceed the nominal capacity, and Fmax is the corresponding frequency, hereafter referred to as the "maximum controllable frequency." Note that dFgrid is the deviation of the power grid 107's frequency from the reference frequency (Fref). In the example given by FIG. 16, the power grid's frequency (Fgrid) is lower than the maximum controllable frequency (Fmax) of the DER system 101. If the frequency of the DER system 101 exceeds the maximum controllable frequency (Fmax) during reconnection, the frequency of the DER system 101 cannot be controlled, and reconnection becomes unstable.

[0084] As an example of simulation results, FIGS. 17A, 17B, 18A, and 18B show the simulation results when the DER system 101 is connected to the power grid 107 under different phase conditions. For the simulation results of FIGS. 17A, 17B, 18A, and 18B, the simulation conditions are as follows: the frequency of the power grid 107 is 60.1 Hz, and the frequency of the DER system 101 before reconnection is the reference frequency 60 Hz (Fder = Fref). The maximum controllable frequency (Fmax) corresponding to the nominal capacity of the DER system 101 is 60.15 Hz. The frequency of the power grid (Fgrid) is lower than the maximum controllable frequency (Fmax). Therefore, the frequency of the power grid (Fgrid) is within the tolerance for reconnection.

[0085] FIGS. 17A and 17B show the simulation results when the difference between the phase of the DER system 101 and the phase of the power grid 107 (θder - θgrid) exceeds the tolerance limit. The switch 109 is switched on in 4.5 seconds. The phase difference at this time is about 160 degrees.

[0086] FIG. 17A is a graph of the frequency of the DER system 10 at point 113, the frequency of the power grid 107 at point 114, and the maximum controllable frequency (Fmax) of the DER system 101 with respect to the time when the switch 109 is closed. From FIG. 17A, after the reconnection time at 4.5 seconds, the frequency of the DER system 101 becomes higher than the maximum controllable frequency (Fmax). This is caused by the transient resulting from the large phase difference between the phase of the DER system 101 and the power grid / 07. Therefore, even if the frequency of the power grid / 07 at the time of reconnection is within the allowable frequency range (Fgrid < Fmax), the transient caused by the phase difference causes the frequency of the DER system 101 (Fder) to be outside the controllable range. The phase difference at the time of reconnection causes a large disturbance to the frequency when the switch 109 is closed, shifting the frequency significantly with respect to the power grid frequency and making the reconnection unstable.

[0087] FIG. 17B is a graph showing the waveforms of the three-phase voltage (Vder) at point 113 (lower graph) and the three-phase voltage (Vgrid) at point 114 (upper graph) when switch 109 is closed. FIG. 17A shows that the voltages of DER system 101 and grid 107 become distorted sine waves after reconnection because the phase of DER system 101 at point 113 does not align with the phase of grid 107 at point 114 during reconnection. If the DER system frequency (Fder) exceeds the controllable range, the voltage output of the DER system will diverge over time. Therefore, the conditions shown in FIGS. 17A and 17B are undesirable.

[0088] 18A and 18B show the simulation results when the phase difference (θder-θgrid) between the DER system 101 and the power grid 107 is within the allowable range. The switch 109 is turned on at 1.63 seconds. The phase difference at this time is approximately 5 degrees.

[0089] FIG. 18A is a graph of the frequency of the DER system 101 at point 113, the frequency of the power grid 107 at point 114, and the maximum controllable frequency (Fmax) of the DER system 101 versus the time that the switch 109 is closed.

[0090] From FIG. 18A, it can be seen that during reconnection, there is no transient overshoot, and the frequency of the DER system 101 does not exceed the maximum controllable frequency (Fmax) and smoothly converges to the frequency of the power grid 107 (Fgrid).

[0091] 18B is a graph showing waveforms of the three-phase voltage (Vder) at point 113 (lower graph) and the three-phase voltage (Vgrid) at point 114 (upper graph) when switch 109 is closed. FIG. 18A shows that after reconnection, the voltages of the DER system 101 and the power grid 107 are maintained at their nominal values ​​before reconnection, ensuring a smooth reconnection.

[0092] When operating independently, the phase, frequency, and amplitude of the voltage of the DER system 101 do not necessarily match the phase, frequency, and amplitude of the voltage of the DER system 107, and if the DER system 101 is reconnected to the power grid 107 under these mismatched conditions, the voltage of the DER system 101 may diverge, causing a harmful condition. To avoid this, the reconnection controller 104 performs phase, frequency, and amplitude matching control.

[0093] Next, the operation of the reconnection control device 104 according to the first embodiment will be described in detail. The reconnection control device 104 is a device that helps to align the phase, frequency, and amplitude of the voltage on both sides of the switch 109. The reconnection control device 104 begins operation upon receiving a "reconnection signal" from the CEMS 116 indicating that it is desirable to reconnect the DER system 101 to the power grid 107 via the switch 109.

[0094] Referring to FIG. 1 , the reconnection control device 104 detects the phase, frequency, and amplitude of the voltage on the DER system side of the switch 109, as well as the phase, frequency, and amplitude of the voltage on the power grid side of the switch 109, and then sends a power reference signal (Pref) and a voltage reference signal (Vref) to the DER system 101 so that the phase, frequency, and amplitude of the voltage of the DER system 101 match the phase, frequency, and amplitude of the voltage of the power grid 107.

[0095] The reconnection control device 104 includes two detection units 105 and 106 that detect the phase, frequency, and amplitude of the voltage on both sides of the switch 109, and a reconnection control unit 103 that performs phase and frequency matching control operations. The operation of the reconnection control device 104 mainly relates to the operation of the reconnection unit 103.

[0096] The details of reconnection unit 103 are shown in Fig. 8. It can be seen from Fig. 8 that reconnection control unit 103 performs phase and frequency matching control via power control unit 801, and performs amplitude matching control via voltage adjustment unit 802. Switching unit 803 switches switch 109 based on signals received from power control unit 801 and voltage adjustment unit 802. The operation of reconnection unit 103 will be briefly described below by explaining the operating conditions and operation sequences of power control unit 801, voltage adjustment unit 802, and switching unit 803.

[0097] The operation of the power control unit 801 will be explained using the flowchart in Fig. 19 and based on the detailed configuration of the power control unit 801 in Fig. 9. When it is desirable to reconnect the DER system 101 to the power grid 107, the CEMS 116 transmits a reconnection signal to the threshold calculation unit 904 via the receiving unit 102. As shown in Fig. 19, in step (hereinafter abbreviated as S) 01, the threshold calculation unit 904 checks whether a reconnection signal indicating that it is desirable to reconnect the DER system 101 to the power grid 107 has been received from the CEMS 116 via the receiving unit 102. If the reconnection signal has not been received (NO in S01), the process waits until it is received and returns to Start.

[0098] When a reconnection signal is received (YES in S01), the threshold calculation unit 904 must first confirm the correct relationship between the frequency difference (Fder-Fgrid) and the phase difference (θder-θgrid) in order to perform phase and frequency matching control. If the voltage of the power grid 107 measured by the second detection unit 106 is in a leading phase compared to the output voltage of the DER system 101 measured by the first detection unit 105, it is determined that θgrid>θder. Conversely, if the voltage of the DER system 101 measured by the first detection unit 105 is in a leading phase compared to the output voltage of the power grid 107 measured by the second detection unit 106, it is determined that θder>θgrid.

[0099] To perform phase and frequency control, if the frequency of the power grid 107 is greater than the frequency of the DER system 101 (Fgrid>Fder), the phase of the power grid 107 should also be greater than the phase of the DER system 101 (θgrid>θder). Conversely, if the frequency of the DER system 101 is greater than the frequency of the power grid 107 (Fder>Fgrid), the phase of the DER system 101 should also be greater than the phase of the power grid 107 (θder>θgrid). If the frequency of the power grid 107 is greater than the frequency of the DER system 101 (Fgrid>Fder) and the phase of the power grid 107 is not greater than the phase of the DER system 101 (θgrid<θder), it is desirable to wait until the phase of the power grid 107 exceeds the phase of the DER system 101. Similarly, if the frequency of the DER system 101 is greater than the frequency of the power grid 107 (Fder>Fgrid) and the phase of the DER system 101 is not greater than the phase of the power grid 107 (θder<θgrid), it is desirable to wait until the phase of the DER system 101 exceeds the phase of the power grid 107.

[0100] To examine the relationship between the phase difference and the frequency difference, the threshold calculation unit 904 performs the following operation. In S02, the threshold calculation unit 904 checks whether the frequency (Fder) of the DER system 101 received via the first detection unit 105 at point 113 is equal to the frequency (Fgrid) of the power grid 101 detected by the second detection unit 106 at point 114. If the frequency (Fder) of the DER system 101 and the frequency (Fgrid) of the power grid 107 are not equal (NO in S02), the process proceeds to S03. If the frequency (Fder) of the DER system 101 and the frequency (Fgrid) of the power grid 107 are equal (YES in S02), the phase difference does not change over time, so there is no need to check the phase difference, and the process proceeds directly to S06.

[0101] The reconnection control device 104 performs reconnection control under the condition that Fder-Fgrid>0 and θder-θgrid>0 or Fder-Fgrid<0 and θder-θgrid<0. If these conditions are not met, the threshold calculation unit 904 waits until the conditions are met before proceeding to the control algorithm. In S03, the threshold calculation unit 904 checks the difference (Fder-Fgrid) between the frequency of the DER system 101 and the frequency of the power grid 107 to check whether (Fder-Fgrid) is less than zero. If (Fder-Fgrid) is less than zero (YES in S03), in S04, the threshold calculation unit 904 checks the difference (θder-θgrid) between the phase of the DER system 101 and the phase of the power grid 107 to check whether (θder-θgrid) is less than zero. If (θder-θgrid) is less than zero (YES in S04), the process proceeds to step S06. If (θder-θgrid) is greater than zero (NO in S04), the system waits until this condition is met.

[0102] On the other hand, if (Fder-Fgrid) is greater than or equal to zero (NO in S03), the threshold calculation unit 904 checks the difference (θder-θgrid) between the phase of the DER system 101 and the phase of the power grid 107, and checks whether (θder-θgrid) is greater than zero (S05). If (θder-θgrid) is greater than zero (YES in S05), the process proceeds to step S06. If (θder-θgrid) is less than zero (NO in S05), the system waits until this condition is met.

[0103] In S06, the threshold calculation unit 904 checks the absolute value of the difference between the phase of the DER system 101 and the phase of the power grid 107, and checks whether it is less than the first threshold T1 received from the CEMS 116 via the receiving unit 102. If the absolute value difference between the phase of the DER system 101 and the phase of the power grid 107 is equal to or greater than the first threshold T1 (NO in S06), the threshold calculation unit 904 sends a phase control command to the power reference calculation unit 901 as a "phase / frequency control command."

[0104] The power reference calculation unit 901 receives a phase control command as a "phase / frequency control command" from the threshold calculation unit 904. The power reference calculation unit 901 calculates a power reference signal (Pref) to be transmitted to the DER system 101 based on the phase power reference (dPref_phase) acquired from the phase control unit 902, and performs phase control to align the phase (θder) of the DER system 101 with the phase (θgrid) of the power grid 107.

[0105] As shown in Fig. 12 (configuration of the power reference calculation unit 901), the power reference correction value (dPref) is added to the original power reference (Pref_orig) received from the CEMS 116 to generate the power reference (Pref). The power reference (Pref) is transmitted to the DER system 101 to change the frequency (Fder) of the DER system 101. In this way, phase matching control is performed by generating a power reference signal (Pref) corresponding to the difference (θder-θgrid) between the phase of the DER system 101 and the phase of the power grid 107.

[0106] The phase power reference (dPref_phase) is generated in the phase control unit 902. The operation of the phase control unit 902 can be understood using FIG. 10. The phase control unit 902 receives the phase (θder) of the DER system 10 at point 113 from the first detection unit 105 and the phase (θgrid) of the power grid 107 at point 114 from the second detection unit 106. A subtractor 1001 calculates the difference between the phase (θder) of the DER system 101 and the phase (θgrid) of the power grid 107, and the output of the subtractor 1001 is sent to a first PI block 1002. The first PI block 1002 is a PI controller that calculates an error signal so that the difference between the phase (θder) of the DER system 101 and the phase (θgrid) of the power grid 107 is reduced to zero. The first PI block 1002 receives control parameters from the CEMS 116 via a threshold calculation unit 904. The error signal produced by the first PI block 1002 is scaled by a proportionality constant (K_phase) in a proportional gain circuit 1003 to produce a phase power reference (dPref_phase).

[0107] After executing S08, the process returns to S06 and continues until the phase difference |θder-θgrid| is within the first threshold T1. If the phase difference |θder-θgrid| is within the first threshold T1 (YES in S06), the threshold calculation circuit 904 transmits a frequency control command as a "phase / frequency control command" to the power standard calculation unit 901 (S07).

[0108] Similar to the phase control, when the power reference calculation unit 901 receives a frequency control command as a "phase / frequency control command," the power reference calculation unit 901 substitutes the frequency power reference (dPref_freq) for the power reference correction value (dPref) to perform frequency control to align the frequency (Fder) of the DER system 101 with the frequency (Fgrid) of the power grid 107. As shown in FIG. 12 (configuration of the power reference calculation unit 901), a power reference signal (Pref) is generated by adding the power reference correction value (dPref) to the original power reference (Pref_orig) received from the CEMS 116. The power reference signal (Pref) is transmitted to the DER system 101 to change the frequency (Fder) of the DER system 101. In this way, frequency alignment control is performed by generating a power reference signal (Pref) corresponding to the difference (θder-θgrid) between the phase of the DER system 101 and the phase of the power grid 107.

[0109] The frequency power reference (dPref_freq) is generated in the frequency control unit 903. The operation of the frequency control unit 903 can be understood with reference to FIG. 11. The frequency control unit inputs the frequency (Fder) of the DER system 101 at point 113 from the first detector 105 and the frequency (Fgrid) of the power grid 107 at point 114 from the second detector 106. The subtractor 1101 calculates the difference between the frequency (Fder) of the DER system 101 and the frequency (Fgrid) of the power grid 107, and the output of the subtractor 1101 is sent to the second PI block 1102. The second PI block 1102 is a PI controller that calculates an error signal so that the difference between the frequency (Fder) of the DER system 101 and the frequency (Fgrid) of the power grid 107 is reduced to zero. The second PI block 1102 receives control parameters from the CEMS 116 via the threshold calculation unit 904. The error signal generated by the second PI block 1102 is scaled by the proportional gain circuit 1103 with the proportional constant (K_freq) to generate the frequency power reference (dPref_freq).

[0110] After the execution of S07, the threshold calculation unit 904 again confirms in S09 that |θder - θgrid| is within the first threshold T1. If |θder - θgrid| is within the first threshold T1 (YES in S09), the threshold calculation unit 904 checks whether the phase difference |θder - θgrid| is within the second threshold T2 (S10). Here, the condition is T2 < T1. In frequency control, the difference (|Fder - Fgrid|) between the frequency of the DER system 101 and the frequency of the power grid 107 decreases, and |Fder - θgrid| < T2. If the phase difference |θder - θgrid| is not within the first threshold T1 (NO in S09), it indicates that a cycle has elapsed, and the process returns to S01 to resume the phase and frequency alignment process.

[0111] If the phase difference |θder-θgrid| is not within the second threshold T2 (NO in S10), the process returns to S07 to continue frequency control. If the phase difference |θder-θgrid| is within the second threshold T2 (YES in S10), the threshold calculation unit 904 sends an FP signal to the switching unit 803. Upon receiving the FP signal from the power control unit 801 and the voltage signal from the voltage adjustment unit 802, the switching unit 803 controls the switch 109 to reconnect the DER system 101 to the power grid 107 and closes the switch 109.

[0112] After transmitting the FP signal, the threshold calculation unit 904 checks for a reconnection completion signal from the CEMS 116 via the receiving unit 102 (S12). If a reconnection completion signal has been received (YES in S12), the process ends. If a reconnection completion signal has not been received (NO in S12), the process starts again from S01.

[0113] The operation of the power reference calculation unit 901 includes calculating a power reference signal (Pref) from the phase power reference (dPref_phase) received from the phase control unit 902 and the frequency power reference (dPref_freq) received from the frequency control unit 903. The Pref control unit 1201 of the power reference calculation unit 901 receives a "phase / frequency control command" from the threshold calculation unit 904. When the Pref control unit 1201 receives the "phase control command", it substitutes the value of the phase power reference (dPref_phase) into the power reference correction value (dPref). Conversely, when the threshold calculation unit 904 transmits a "frequency control command", the Pref control unit 1201 substitutes the value of the frequency power reference (dPref_freq) into the power reference correction value (dPref). The adder circuit 1202 adds the power reference correction value (dPref) to the original power reference (Pref_orig) received from the CEMS 116 via the receiver 102, and outputs a power reference signal (Pref).

[0114] FIG. 20 provides a control image for an example of the phase and frequency matching operation performed by the power control unit 801. FIG. 20 shows waveforms of the voltage (dotted line) of one of the phases of the DER system 101 measured by the first detector 105 at point 113 and the voltage (black line) of the a-phase of the power grid 107 measured by the second detector 106 at point 114. In FIG. 20, the initial condition (at time (hereinafter abbreviated as T) 01) is that the frequency of the DER system 101 is higher than the frequency of the power grid 107 (Fder > Fgrid), and the phase of the DER system 101 is 180 degrees, but the phase of the power grid 107 is approximately 150 degrees. Therefore, at time T01, the phase of the DER system 101 leads the phase of the power grid 107 (θder > θgrid). Analyzing FIG. 20 together with the flowchart of FIG. 19, since a reconnection signal is received at T02, the operation sequence of FIG. 19 is as follows.

[0115] In S02: Since Fder-Fgrid≠0 in T02, the answer in S02 is NO. The operation proceeds to S03.

[0116] In S03: Since Fder>Fgrid in T02, the answer in S03 is NO. The operation proceeds to S05.

[0117] In S05: Since θder>θgrid in T02, the answer is YES in S05. The operation proceeds to S06.

[0118] In S06: In T02, |θder-θgrid|>T1, so the answer in S06 is NO. The operation proceeds to S08.

[0119] In S08: The threshold control unit 904 sends a phase control command to the power reference calculation unit 901. As described above, the power reference calculation unit 901 then modifies the power reference signal (Pref) so that the frequency (Fder) of the DER system 101 decreases. Thus, the phase (θder) of the DER system 101 aligns with the phase (θgrid) of the power grid 107. Until T03 (|θder - θgrid| > T1), the operation remains at S08 until T03. At T03, the difference between the phase of the DER system 101 and the phase of the power grid 107 is (|θder - θgrid| < T1). Therefore, since it is YES in S06, the operation sequence proceeds to S07.

[0120] In S07: The threshold control unit 904 sends a frequency control command to the power reference calculation unit 901. Next, the power reference calculation unit 901 modifies the power reference signal (Pref) so that the frequency (Fder) of the DER system 101 increases. Thus, the frequency (Fder) of the DER system 101 aligns with the frequency (Fgrid) of the power grid 107. Since (|θder - θgrid| > T2 and |θder - θgrid| < T1), it is YES in S09 but NO in S10, and the operation remains at S08 until T04. When the frequency control is turned on, at T04, the difference between the phase of the DER system 101 and the phase of the power grid 107 is (|θder - θgrid| < T2 and |θder - θgrid| < T1). Therefore, it is YES in S09 and YES in S10, and the operation proceeds to S11 at T04.

[0121] In S11, the threshold calculation unit 904 sends the FP signal to the switching unit 803. The operation proceeds to S12. Next, the operation of the power reference calculation unit 901 for droop characteristics is shown in FIG. 21. The power reference calculation unit 901 calculates a power reference signal (Pref) to be transmitted to the DER system 101 based on the phase and frequency power command values ​​calculated by the phase control unit 902 and the frequency control unit 903. The effect of changes in the power reference signal on frequency is explained in FIG. 21. An operating point 2202 indicates the operating point of the DER system 101 during standalone operation. At the operating point 2202, the DER system 101 normally operates at a frequency given by the frequency reference signal (Fref) through the receiving unit 102 via the CEMS 116, and therefore, in a normal scenario, the deviation from the frequency reference is zero. When it is desired to reconnect to the power grid 107, the reconnection controller 104 performs phase and frequency alignment control to align the phase and frequency of the voltage of the DER system 101 with the phase and frequency of the voltage of the power grid 107 by changing the power reference signal (Pref) to the DER system 101. When the power reference signal (Pref) is changed, dP changes, thus moving the operating point from 2202 to 2201.

[0122] Next, returning to the configuration of reconnection control unit 103 shown in FIG. 8, the operation of voltage adjustment unit 802 will be described.

[0123] The main function of the voltage regulator 802 is to match the voltage amplitude of the DER system 101 to the voltage amplitude of the power grid 107 .

[0124] The operation of the voltage adjusting unit 802 is given by the flowchart of Figure 22 and will be explained based on the detailed configuration of the voltage adjusting unit 802 as given by Figure 13. The voltage adjusting unit 802 receives the voltage amplitude (Vder) of the DER system 101 at point 113 via the first detector 105 and the voltage amplitude (Vgrid) of the power grid 107 at point 114 via the second detector 106. Based on the voltage amplitude (Vder) of the DER system 101 and the voltage amplitude (Vgrid) of the power grid 107, the voltage adjusting unit 802 calculates a voltage reference signal (Vref) to be provided to the DER system 101 in order to match the voltage amplitude (Vder) of the DER system 101 to the voltage amplitude (Vgrid) of the power grid 107.

[0125] As shown in the flowchart of Fig. 22, in step (hereinafter abbreviated as S) 20, the voltage signal unit 1302 checks whether or not a reconnection signal has been received from the CEMS 116 via the receiving unit 102. When the reconnection signal has been received, the voltage signal unit 1302 checks whether or not the absolute value of the difference between the voltage amplitude (Vder) of the DER system 101 received from the first detecting unit 105 and the voltage amplitude (Vgrid) of the power grid 107 received from the second detecting unit 106 is within the third threshold (V1) given by the CEMS 116 in S14 (|Vder-Vgrid| <V1)かどうかをチェックする。

[0126] When the voltage difference is not within the third threshold value (V1) (NO in S21), the voltage adjustment unit 802 performs voltage amplitude control in S22. To perform voltage amplitude control, the subtractor 1303 calculates the difference between the amplitude (Vder) of the voltage of the DER system 101 and the amplitude (Vgrid) of the voltage of the power grid 107, and sends the result to the third PI block 1301. The third PI block 1301 is a PI controller that calculates a voltage command value (dVref) so that the difference between the amplitude of the voltage of the DER system 101 and the amplitude of the voltage of the power grid 107 is reduced to zero. The voltage command value (dVref) is added to the original voltage reference (Vref_orig) received from the CEMS 116 via the receiving unit 102 to obtain a voltage reference signal (Vref). The voltage reference signal (Vref) is sent to the DER system 101 in S23. Based on the voltage reference signal (Vref), the DER system 101 adjusts the amplitude (Vder) of its own voltage to match the amplitude (Vgrid) of the voltage of the power grid 107. As long as (|Vder - Vgrid| > V1) (NO in S21), voltage adjustment control is performed in the voltage adjustment unit 802. At a certain moment, when the absolute difference between the amplitude of the voltage of the DER system 101 and the amplitude of the voltage of the power grid 107 (|Vder - Vgrid| < V1) (YES in S21), the operation proceeds to S24.

[0127] In S24, the voltage signal unit 1302 of the voltage adjustment unit 802 sends a voltage signal to the switching unit 803. The switching unit 803 controls the switch 109 to reconnect the DER system 101 to the power grid 107. When the switching unit 803 receives an F-P signal from the power control unit 801 and a voltage signal from the voltage adjustment unit 802, it closes the switch 109.

[0128] After transmitting the voltage signal to the switching unit 803, the voltage signal unit 1302 checks for a reconnection end signal from the CEMS 116. If the reconnection end signal is received (YES in S25), the process ends. If the reconnection end signal has not been received (NO in S25), the process starts again from S13.

[0129] Next, the operation of the switching unit 803 will be briefly described. The switching unit 803 will be briefly described. A flowchart of the operation of the switching unit 803 is shown in FIG. 23. In S30, the switching unit 803 checks for a reconnection signal from the CEMS 116. After receiving the reconnection signal (YES in S30), the switching unit 803 receives an FP signal from the power control unit 801 and a voltage signal from the voltage adjustment unit 802. If the reconnection signal has not been received (NO in S30), the switching unit 803 waits for the reconnection signal. In S31, the switching unit 803 checks whether or not it has received both the FP signal and the voltage signal. If it has received both the FP signal and the voltage signal (YES in S31), the switching unit 803 transmits a switch signal to the switch 109. If it has not received both the FP signal and the voltage signal (NO in S31), the switching unit 803 waits by executing S31 again. After receiving the switch signal, switch 109 is closed, causing DER system 101 to reconnect to power grid 107 by matching the phase, frequency, and amplitude of the voltage at point 113 to the phase, frequency, and amplitude of the voltage at point 114 (S32). Second embodiment

[0130] composition

[0131] In a first embodiment, the DER system 101 comprises a single DER unit having a DER, which performs grid-forming VSG control and actively controls the frequency and amplitude of the output voltage.

[0132] When it is desired to reconnect the DER system 101 to the power grid 107 through the switch 109, the DER system 101 receives a power reference signal (Pref) and a voltage reference signal (Vref) from the reconnection controller 104. The power reference signal (Pref) and the voltage reference signal (Vref) align the phase, frequency, and amplitude of the voltage of the DER system 101 to the phase, frequency, and amplitude of the voltage of the power grid 107. After aligning the phase, frequency, and amplitude of the voltage on both sides of the switch 109, a safe reconnection is performed.

[0133] 24 is a block diagram showing the complete configuration of the second embodiment. The second embodiment differs from the first embodiment in that it takes into account multiple DER systems 101a to 101n that are reconnected to the power grid 107 via a switch 109. The second embodiment will be described below, focusing on the differences from the first embodiment.

[0134] Similar to the first embodiment, the DER systems 101a-101n are typically connected to a power grid 107 and supply power to residential and commercial loads 110. In the event of a power outage or malfunction in the operation of the power grid 107, the DER systems 101a-101n independently supply power to the residential and / or commercial loads 110. The multiple DER systems 101a-101n are connected to a distribution grid 112 via multiple transformers 111a-111n. The distribution grid 112 is connected to the power grid 107. Once the malfunction / fault in the power grid 107 is resolved, the independently functioning DER systems 101a-101n are preferably reconnected to the power grid 107 via a switch 109. The reconnection controller 1040 detects the phase, frequency, and amplitude of the voltage at point 113 on the DER systems 101a-101n side of the switch 109 and the phase, frequency, and amplitude of the voltage at point 114 on the power grid 107 side of the switch 109. To align the phase, frequency, and amplitude of the voltage on both sides of the switch 109, the reconnection unit 1040 transmits a voltage reference signal (Vref) and multiple power reference signals (Pref1-Prefn) to the DER systems 101a-101n, respectively. During reconnection, the reconnection controller 1040 provides a signal to close the switch 109 when the phase, frequency, and amplitude of the voltage of the DER systems 101a-101n through the distribution system 112 align with the phase, frequency, and amplitude of the voltage of the power grid 107.

[0135] The structure of the DER systems 101a to 101n is similar to that of the DER system 101 described in the first embodiment in Fig. 3. The description will not be repeated here.

[0136] The reconnection control device 1040 receives information on the phase, frequency, and amplitude of the voltage on the DER system side of the switch 109 via the first detection unit 105, and receives information on the phase, frequency, and amplitude of the voltage on the power grid side of the switch 109 via the second detection unit 106. The reconnection control device 1040 outputs a voltage reference signal (Vref) and multiple power reference signals (Prefa to Prefn) to the DER systems 101a to 101n, respectively. The reconnection control device 1040 also receives reception information from the receiving unit 102 as a "signal from CEMS" 116.

[0137] The reconnection control device 104 includes a reconnection control unit 1030, a first detection unit 105, and a second detection unit .

[0138] The reconnection control unit 1030 includes a power control unit 8010, a voltage adjustment unit 802, and a switching unit 803. The structure of the reconnection unit 1020 of the second embodiment is shown in Fig. 25. The power control unit 8010 receives as input the phase and frequency of the DER systems 101a to 101n detected by the first detection unit 105, and the phase and frequency of the power grid 107 detected by the second detection unit 106.

[0139] The power control unit 8010 also receives input of information on the allowable threshold from the receiving unit 102. Based on the input, the power control unit 8010 calculates a plurality of power reference signals (Prefa to Prefn) to be transmitted to the DER systems 101a to 101n, respectively. The power control unit 8010 also calculates an FP signal to be transmitted to the switching unit 803.

[0140] The voltage adjustment unit 802 receives the voltage amplitude of the DER systems 101a to 101n detected by the first detection unit 105 and the voltage amplitude of the power grid 107 detected by the second detection unit 106, and calculates a voltage reference signal (Vref) to be sent to the DER systems 101a to 101n. The voltage adjustment unit 802 also receives information on the allowable threshold and the original voltage reference (Vref_orig) from the receiving unit 102. The voltage adjustment unit 802 also calculates a voltage signal to be sent to the switching unit 803.

[0141] 26 shows a schematic configuration of the power control unit 8010. The power control unit 8010 includes a threshold calculation unit 9040, a phase control unit 9020, a frequency control unit 9030, and a power reference calculation unit 9010.

[0142] The threshold calculation unit 9040 receives the phase and frequency of the DER systems 101a to 101n from the first detection unit 105, and receives the phase and frequency of the power grid 107 from the second detection unit 106. The threshold calculation unit 9040 also receives received information from the receiving unit 102. The information received from the receiving unit 102 includes control parameters, thresholds, nominal capacities of the DER systems 101a to 101n, and information from the CEMS 116 about the control parameters of the DER systems 101a to 101n.

[0143] The threshold calculation unit 9040 calculates the frequency safety range (Fmax-Fmin) and outputs it to the power reference calculation unit 9010. The threshold calculation unit 9040 also calculates control parameters based on the information received from the receiving unit 102 and sends them to the phase control unit 9020 and the frequency control unit 9030.

[0144] Based on the difference between the phase of the voltage of the DER systems 101a-101n at point 113 and the phase of the power grid 107 at point 114, the threshold calculation unit 9040 calculates a phase / frequency control command signal to be sent to the power reference calculation unit 9010. Based on the difference between the phase and frequency of the DER systems 101a-101n at point 113 and the phase and frequency of the power grid 107 at point 114, the threshold calculation unit 9040 calculates an FP signal to be sent to the switching unit 803.

[0145] The phase control unit 9020 receives control parameters from the threshold unit 9040, receives the phase (θder) of the DER systems 101a to 101n at point 113 from the first detection unit 1105, and receives the phase (θgrid) of the power grid 107 at point 114 from the second detection unit 106. Based on the received information, the phase control unit 9020 calculates multiple phase power references (dPref_phasea to dPref_phasen) and sends them to the power reference calculation unit 9010.

[0146] The frequency control unit 9030 receives control parameters from the threshold unit 9040, receives the frequency (Fder) of the DER systems 101a to 101n at point 113 from the first detection unit 105, and receives the frequency (Fgrid) of the power grid 107 at point 114 from the second detection unit 106. The frequency control unit 9030 calculates multiple frequency power references (dPref_frequencya to dPref_frequencyn) based on the received information and sends them to the power reference calculation unit 9010.

[0147] The power reference calculation unit 9010 receives a plurality of original power references (Pref_origa to Pref_orign) from the receiving unit 102, a safe frequency range (Fmax-Fmin) and a phase / frequency control command from the threshold calculation unit 9040, a plurality of phase power references (dPref_phasea to dPref_phasen) from the phase control unit 9020, and a plurality of frequency power references (dPref_freqa to dPref_freqn) from the frequency control unit 9030. Based on the inputs, the power reference calculation unit 9010 calculates a plurality of power reference signals (Prefa to Prefn) to be transmitted to the DER systems 101a to 101n, respectively.

[0148] A schematic configuration of the phase control unit 9020 is shown in Figure 27. The inputs to the phase control unit 9020 are the phase (θder) of the DER systems 101a-101n at point 113 and the phase (θgrid) of the power grid 107 at point 114. A subtractor 2801 calculates the difference (θder-θgrid) between the phase of the power grid 107 at point 114 and the phase of the DER systems 101a-101n at point 113. The result of the subtractor 2801 is provided to a fourth PI block 2802, which is a PI controller. The fourth PI block 2802 implements PI control based on the control parameters received from the threshold calculation unit 9040, and generates results that are provided to the plurality of proportional gain circuits 1003a-1003n. The plurality of proportional gain circuits 1003a-1003n calculate phase power references (dPref_phasea-dPref_phasen) to be sent to the power reference calculation unit 9010. The plurality of proportional gain circuits 1003a-1003n correspond to the respective DER systems 101a-101n and calculate the phase power references (dPref_phasea-dPref_phasen) based on the control parameters and nominal capacities (Pbasea-Pbasen) of the DER systems 101a-101n, respectively, and a common gain constant Kph. The control parameters include damping coefficients (Dga-Dgn) and governor gains (Kga-Kgn) for the respective DER systems 101a-101n.

[0149] A schematic configuration of the frequency control unit 9030 is shown in Figure 28. The inputs to the frequency control unit 9030 are the frequency (Fder) of the DER systems 101a-101n at point 113 and the frequency (Fgrid) of the power grid 107 at point 114. A subtractor 2901 calculates the difference between the frequency of the power grid 107 at point 114 and the frequency of the DER systems 101a-101n at point 113 (Fder-Fgrid). The result of the subtractor 2901 is provided to a fifth PI block 2902, which is a PI controller. The fifth PI block 2902 realizes PI control based on the control parameters received from the threshold calculation unit 9040, and generates results that are provided to multiple proportional gain circuits 1103a-1103n. The plurality of proportional gain circuits 1103a to 1103n calculate frequency power references (dPref_freqa to dPref_freqn) to be sent to the power reference calculation unit 9010. The plurality of proportional gain circuits 1003a to 1003n correspond to the respective DER systems 101a to 101n, and calculate the frequency power references (dPref_freqa to dPref_freqn) based on the control parameters and nominal capacities (Pbasea to Pbasen) of the respective DER systems 101a to 101n. The control parameters include the damping coefficients (Dga to Dgn) and governor gains (Kga to Kgn) of the respective DER systems 101a to 101n.

[0150] 29 shows a schematic configuration of the power reference calculation unit 9010. The power reference calculation unit 9010 includes a Pref control unit 3001 and a plurality of addition circuits 1202a to 1202n. The Pref control unit 3001 receives a plurality of phase power references (dPref_phasea to dPref_phasen) from the phase control unit 9030, and receives a plurality of frequency power references (dPref_freqa to dPref_freqn) from the frequency control unit 9030. The Pref control unit 3001 also receives a phase / frequency control command and a safe frequency range (Fmax-Fmin) from the threshold calculation unit 9040.

[0151] The Pref control unit 3001 calculates and outputs multiple power reference correction values ​​(dPrefa to dPrefn) based on multiple phase power references (dPref_phasea to dPref_phasen) and multiple frequency power references (dPref_freqa to dPref_freqn) in accordance with a phase / frequency control command. The Pref control unit 3001 also limits the power reference correction values ​​(dPrefa to dPrefn) so that the frequency (Fder) of the DER systems 101a to 101n at point 113 is maintained within a safe frequency range (Fmax to Fmin) provided by a threshold calculation unit 9040. Multiple adder circuits 1202a to 1202n add their respective power reference correction values ​​(dPrefa to dPrefn) to corresponding original power references (Pref_origa to Pref_orign) to calculate corresponding multiple power reference signals (Prefa to Prefn) to be transmitted to the DER systems 101a to 101n, respectively. For example, corresponding to the DER system 101a, the power reference correction value dPrefa is calculated using a phase / frequency power reference (dPref_phasea / dPref_freqa) based on the phase / frequency command by the threshold command unit 9040, and is added to the original power reference (Prefa_orig) by the adder circuit 1202a to obtain a power reference signal (Prefa) to be transmitted to the DER system 101a. A similar structure is assumed for the other multiple DER units 101b to 101n.

[0152] operation

[0153] Similar to the first embodiment, the DER systems 101a to 101n of the second embodiment are virtual synchronous generators with governor control. The detailed structure of the DER systems 101a to 101n is shown in FIG. 4. Here, the VSG control unit 404 performs governor control operations and operations to mimic inertial behavior according to an oscillation equation. Each of the DER systems 101a to 101n is considered to have a nominal capacity given by Pbasea to Pbasen, respectively. Each of the DER systems 101a to 101n has damping coefficients Dga to Dgn and governor gains Kga to Kgn, respectively. Therefore, the nominal capacity and control parameters of each DER system are unique.

[0154] In the case of multiple DER systems 101a to 101n connected to the same power distribution system 112 and supplying a common load (household / commercial load) 110, the output frequency of each DER system 101a to 101n will converge to a common frequency (Fder). The output power of each DER system 101a to 101n calculated by the power calculation unit 403 is defined as "Pouta to Poutn".

[0155] The steady-state relationship between dF (Fref - Fder) and dP (Pref - Pout) for multiple DER systems 101a to 101n is given by Figure 30. The example in Figure 30 shows the droop characteristics (dP - dF) of three DER systems: DER system 101a, DER system 101b, and DER system 101n. The horizontal axis represents dF, which is the deviation of the inverter frequency (Fder) from the frequency reference signal (Fref) obtained from the CEMS 116 via the receiver 102, and the vertical axis represents dP, which is the deviation of the output power of each DER system 101a to 101n calculated by the corresponding power calculator 403 from the corresponding power reference signal (Pref1a to Prefn) calculated by the reconnection control device 1040. The slope of the linear graph for each DER system 101a-101n depends on the nominal capacity (Pbasea-Pbasen) and governor gain (Kga-Kgn) as well as the damping coefficients Dga-Dgn of the VSG control. Because the DER systems 101a-101n operate at a common frequency (Fder), when Fder is equal to the frequency reference signal (Fref) obtained from the CEMS 116, the DER systems 101a-101n output power equal to the power corresponding to the power reference signal (Prefa-Prefn). Therefore, when Fder = Fref, Pouti = Prefi, where "i" is indexed from a-n. The steady-state relationship between dP and dF given by Equation (3) is given by Equation (4).

number

[0156] Here, "i" indexes from a to n to the corresponding DER systems 101a to 101n.

[0157] In order to change the frequency of the DER systems 101a to 101n from the frequency reference signal (Fref) to a different frequency (e.g., F1 in Figure 31), it is necessary to change the power reference signals (Prefa to Prefn) so that the deviation of the output power of the DER systems 101a to 101n from the reference power signals (Prefa to Prefn), i.e., dPa to dPn, must satisfy equations (5) and (6).

number

[0158] Thus, to change the frequency (Fder) of the DER systems 101a-101n at point 113, the reconnection control unit 1040 calculates the power reference signal (Prefa-Prefn) to be transmitted to the DER systems 101a-101n. A steady-state relationship between dF (Fref-Fder) and dP (Pref-Pout) is given for multiple DER systems 101a-101n when operating at a frequency different from the frequency given by the frequency reference signal (Fref). Similar to Figure 30, Figure 31 shows the droop characteristics (dP-dF) of three DER systems: DER system 101a, DER system 101b, and DER system 101n. In this case, since the operating frequency is shifted from the reference frequency given by the frequency reference signal (Fref), the deviations (dPa to dPn) of the output power of the DER systems 101a to 101n from the power reference signals (Prefa to Prefn) vary according to the steady-state characteristics given by equations (4) and (5).

[0159] When DER systems 101a-101n having droop characteristics as shown in Figure 31 that realize VSG control are reconnected to the power grid 107 via switch 109, it is desirable to match the phase, frequency, and amplitude of the voltage at point 113 on the DER system side with the phase, frequency, and amplitude of the voltage at point 114 on the power grid side. The operating frequencies of all DER systems 101a-101n at point 113 can be changed by changing the power reference signals (Pref1-Prefn) via the reconnection control device 1040.

[0160] 32 illustrates the droop characteristics of multiple DER systems 101a-101n with respect to the power output (in watts) of the DER systems 101a-101n and the deviation of the frequency of the DER systems 101a-101n at point 113 from a reference frequency provided by a frequency reference signal (Fref) by the CEMS 116 (dF=Fref-Fder). Prior to reconnection to the power grid 107, the DER systems 101a-101n are operating at a reference frequency (Fder=Fref, and therefore dFder=0) at point 113, and the power output of the DER systems 101a-101n is given by Pouta-Poutn. The deviation of the power grid frequency (Fgrid) from the reference frequency (Fref) provided by the CEMS 116 is given by dFgrid (dFgrid=Fref-Fgrid). To reconnect to the power grid 107, it is desirable to change the frequency of the DER systems 101a-101n at point 113 by changing Pref to match the frequency of the power grid 107 (Fgrid). If switch 109 were closed without frequency adjustment by changing the power reference signals (Prefa-Prefn), the output power of each DER system 101a-101n would increase to accommodate the change in frequency because the capacity of the power grid 107 is much higher than the total capacity of all DER systems 101a-101n. This may cause one or more DER systems 101a-101n to exceed their nominal capacity, depending on the nominal capacity (Pbasea-Pbasen) and the control parameters of the VSG control (Dga-Dgn, Kga-Kgn), i.e., the slope of the droop characteristic as shown in FIG. 32.

[0161] FIG. 33 shows a graph of the droop characteristics (dP-dF) of the same three DER systems 101a, 101b, and 101n. In this case, the power reference signals calculated by the reconnection control device 1040 and sent to the corresponding DER systems are modified based on the nominal capacities (Pbasea-Pbasen) and the control parameters (Dga-Dgn, Kga-Kgn) of the VSG control. The power reference signals are calculated so that the frequency of the DER systems 101a-101n at point 113 matches the frequency of the power grid 107 and the power output (Pouta-Poutn) of the DER systems 101a-101n remains unchanged. Therefore, by knowing the nominal capacity information and the control parameters for the VSG control, it is possible to match the frequency of the DER systems 101a-101n at point 113 without changing the output power of each of the DER systems 101a-101n.

[0162] Next, the operation of the reconnection control device of the second embodiment will be described. The reconnection control device includes two detection units, a first detection unit 105 and a second detection unit 106, which measure the phase, frequency, and amplitude of the voltage at point 113 and the phase, frequency, and amplitude of the voltage at point 114, and a reconnection control unit 1030. The operation of the reconnection control device 1040 mainly relates to the operation of the reconnection control unit 1030.

[0163] Details of the reconnection control unit 1030 are provided in FIG. 8. It can be seen from FIG. 25 that the reconnection control unit 1030 performs phase and frequency matching control via the power control unit 8010 and amplitude matching control via the voltage adjustment unit 802. The switching unit 803 is responsible for switching the switch 109 based on signals received from the power control unit 8010 and the voltage adjustment unit 802. For the second embodiment, the operation of the reconnection unit 1030 will be briefly described by explaining the operating conditions and operation sequence of the power control unit 8010. The operation sequence of the power control unit 8010 in the second embodiment is the same as that in the first embodiment, and only differences from the first embodiment will be described here. The overall operation of the power control unit 1030 is the same as that in the first embodiment and can be explained by the flowchart shown in FIG. 19. The difference from the first embodiment is the actual processing of phase and frequency control by the phase control unit 9020 and the frequency control unit 9030. This will be described below.

[0164] The power reference calculation unit 9010 receives a phase control command as a "phase / frequency control command" from the threshold calculation unit 9040. The power reference calculation unit 9010 calculates power reference signals (Prefa to Prefn) to be transmitted to the DER systems 101a to 101n based on multiple phase power references (dPref_phasea to dPref_phasen) obtained from the phase control unit 9020, and performs phase control across all of the DER systems 101a to 101n to align the phase (θder) of the DER systems 101a to 101n at point 113 with the phase (θgrid) of the power grid 107 at point 114.

[0165] As shown in Figure 29 (configuration of the power reference calculation unit 9010 for the second embodiment), the power reference correction values ​​(dPrefa to dPrefn) corresponding to multiple DER systems 101a to 101n are added to the original power references (Pref_origa to Pref_orign) of the same DER units via adder circuits 1202a to 1202n, respectively, as received from the CEMS 116, to generate power references (Prefa to Prefn).

[0166] The multiple power references (Prefa to Prefn) are transmitted to the corresponding DER systems 101a to 101n to change the frequency (Fder) of the DER systems 101a to 101n at point 113. Thus, phase matching control is performed by generating power references (Prefa to Prefn) corresponding to the difference (θder-θgrid) between the phase of the DER systems at point 113 and the phase of the power grid 107 at point 114.

[0167] The phase power references (dPref_phasea to dPref_phasen) are generated in a phase control unit 9020. The operation of the phase control unit 9020 can be understood using FIG. 27. The phase control unit 9020 receives the phase (θder) of the DER systems 101a to 101n at point 113 from the first detection unit 105, and receives the phase (θgrid) of the power grid 107 at point 114 from the second detection unit 106. A subtractor 2701 calculates the difference between the phase (θder) of the DER system 101 and the phase (θgrid) of the power grid 107, and the output of the subtractor 2801 is sent to a fourth PI block 2802.

[0168] The fourth PI block 2802 is a PI controller that calculates an error signal so that the difference between the phase (θder) of the DER systems 101a-101n and the phase (θgrid) of the power grid 107 is reduced to zero. The fourth PI block 2802 receives control parameters from the CEMS 116 via a threshold calculation unit 9040. The error signal generated by the fourth PI block 2802 is provided to a plurality of proportional gain units 1003a-1003n corresponding to the DER systems 101a-101n, respectively. The error signal obtained from the fourth PI block 2802 is scaled by the plurality of proportional gain units 1003a-1003n corresponding to Equation (5) and another proportionality constant (Kph) to scale the effect of frequency changes and control the phase of the DER systems 101a-101n at point 113. By scaling the error signal from the fourth PI block 2802 through proportional gain blocks 1003a-1003n, it is possible to change the phase of the DER systems 101a-101n at point 113 so that all DER systems 101a-101n change frequency simultaneously without changing their output power (Pouta-Poutn), thus ensuring that all DER systems 101a-101n do not attempt to output more power than their nominal capacities (Pbasea-Pbasen). Thus, by implementing proportional changes in the power reference signal based on the nominal capacities (Pbasea-Pbasen) and control parameters given by FIG. 27 and equation (5), output power is maintained while performing phase control through phase control unit 9020.

[0169] Similar to phase control, when the power reference calculation unit 9010 receives a frequency control command from the threshold calculation unit 9040, it substitutes the frequency power references (dPref_freqa to dPref_freqn) into the power reference correction values ​​(dPrefa to dPrefn) respectively in order to align the frequency (Fder) of the DER systems 101a to 101n at point 113 with the frequency of the power grid 107 at point 114.

[0170] 29 (configuration of the power reference calculation unit 9010 for the second embodiment), the power reference correction values ​​(dPrefa to dPrefn) corresponding to multiple DER systems 101a to 101n are received from the CEMS 116 and added to the original power references (Pref_origa to Pref_orign) of the same DER units through adder circuits 1202a to 1202n, respectively, to generate the power references (Prefa to Prefn). In the case of frequency control, the power references (Prefa to Prefn) are transmitted to the corresponding DER systems 101a to 101n so that the frequency (Fder) of the DER systems 101a to 101n at point 113 matches the frequency (Fgrid) of the power grid at point 114.

[0171] The frequency power references (dPref_freqa to dPref_freqn) are generated in a frequency control unit 9030. The operation of the frequency control unit 9030 can be understood using FIG. 28. The frequency control unit 9030 receives the frequency (Fder) of the DER systems 101a to 101n at point 113 from the first detection unit 105, and receives the frequency (Fgrid) of the power grid 107 at point 114 from the second detection unit 106. A subtractor 2901 calculates the difference between the frequency (Fder) of the DER system 101 and the frequency (Fgrid) of the power grid 107, and the output of the subtractor 2901 is sent to a fifth PI block 2902.

[0172] The fifth PI block 2902 is a PI controller that calculates an error signal such that the difference between the frequency (Fder) of the DER systems 101a-101n and the frequency (Fgrid) of the power grid 107 is reduced to zero. The fifth PI block 2902 receives control parameters from the CEMS 116 via a threshold calculation unit 9040. The error signal generated by the fifth PI block 2902 is provided to a plurality of proportional gain units 1103a-1103n corresponding to the DER systems 101a-101n, respectively. The error signal obtained from the fifth PI block 2902 is scaled by the proportional gain units 1003a-1003n corresponding to equation (5). By scaling the error signal from the fifth PI block 2902 through proportional gain blocks 1103a-1103n, it is possible to change the frequency of the DER systems 101a-101n at point 113 so that all of the DER systems 101a-101n simultaneously change frequency without changing their output power (Pouta-Poutn), thus ensuring that all of the DER systems 101a-101n do not attempt to output power beyond their nominal capacities (Pbasea-Pbasen). Thus, by implementing proportional changes in the power reference signal based on the nominal capacities (Pbasea-Pbasen) and control parameters given by FIG. 28 and equation (5), output power is maintained while providing frequency control through frequency control unit 9030.

[0173] The DER system 101 in the first embodiment is considered to be a DER 301 having a DC power source with an inverter 302 controlled by an inverter controller 304 performing VSG control. Although not described in the first embodiment, the DER system 101 may be any inverter-based resource (IBR), i.e., with a grid-forming control that operates with a (dF-dP) droop characteristic and can change the inverter frequency (Fder) by changing a power reference signal (Pref), or even a conventional synchronous generator. Similarly, in the second embodiment, the DER systems 101a-101n are all described as DERs having a DC power source 301 with an inverter 302 controlled by an inverter controller 304 performing VSG control. However, without loss of generality, the multiple DER systems 101a-101n may not be similar and may include one or more other IBRs with other grid-forming control that operates with a (dF-dP) droop characteristic and can change the inverter frequency (Fder) by changing a power reference signal (Pref), or even a conventional synchronous generator.

[0174] In the first and second embodiments, the DER system 101 has been described as a DER 301 having a DC power supply with an inverter 302 controlled by an inverter control unit 304 performing VSG control. The VSG control unit 404 described in the first and second embodiments performs not only VSG control but also governor control. Although not mentioned in the first and second embodiments, the VSG control unit 404 may perform only VSG control (without governor control).

[0175] In the first and second embodiments, the DER system 101 supplies power to the residential / commercial loads 110 in the event of a failure or blackout of the power grid 107. Although not described in the first and second embodiments, the loads that the DER system 101 supplies in the stand-alone operation mode may be only some or all of the loads considered to be the residential / commercial loads 110s. Thus, the DER system 101 may supply power to only some of the loads that are considered to be important in the event of stand-alone operation.

[0176] The first embodiment considers a single DER system 101 with grid-forming control capability (i.e., a single master DER system), i.e., VSG control, but it can be a single or multiple DER systems with grid-following control (single or multiple slave DER systems). Similarly, the second embodiment considers multiple DER systems with grid-forming control capability (multiple master DER systems), but similar operation can be described for multiple grid-forming inverters and single or multiple grid-following inverters (multiple master DER systems, single or multiple slave DER systems).

[0177] Furthermore, in the first and second embodiments, the voltage adjustment unit 802 calculates the difference between the amplitude of the voltage at point 113 and the amplitude of the voltage at point 114, and then calculates the voltage reference signal (Vref) using a PI controller. Note that the method for controlling the amplitude of the voltage of the DER system at point 113 is not limited to the method described in the first and second embodiments, and can also be performed by a reactive power reference command using QV control, utilizing the (dQ-dV) droop characteristic.

[0178] In the first and second embodiments, for ease of understanding, the control circuit of the DER system 101 has been described as being configured with hardware (H / W) as shown in Figures 1 to 15. However, similar control functions can be achieved by implementing the functions of each block or some of the blocks described in each block using software (S / W) implemented in a central processing unit (CPU). Alternatively, similar control functions can be achieved by dividing the functions of at least some of the blocks into software and hardware.

[0179] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0180] 101, 101a to 101n: DER system; 102: receiving unit; 103: reconnection control unit; 104: reconnection control device; 105: first detection unit; 106: second detection unit; 107: power grid; 108: first distribution transformer; 109: switch; 110: residential / commercial load; 111: distribution impedance; 112: power distribution system; 113: DER system side of switch; 114: power grid system side of switch; 116: CEMS; 201: first transformer; 202: second transformer; 203: multifamily building load; 204: hospital; 205: lighting load; 206: commercial load; 301: DER with DC power supply; 302: Inverter; 303: Third transformer; 304: Inverter control unit (inverter controller); 305: Current and voltage detector; 401: AC frequency detection unit (AC frequency detector); 402: Voltage command calculation unit (voltage command calculator); 403: Power calculation unit (power calculator); 404: VSG control unit (VSG controller); 406: Gate pulse generation unit (gate pulse generator); 501: Subtractor; 502: Governor control unit (governor controller); 503: Addition circuit; 504: Subtractor; 505: Main VSG control unit (main VSG controller); 601: voltmeter; 602: phase detector; 603: frequency detector; 701: voltmeter; 702: phase detector; 703: frequency detector; 801: power control unit (power controller); 802: voltage adjustment unit (voltage regulator); 803: switch unit (switch); 901: power reference calculation unit (power reference calculator); 902: phase control unit (phase controller); 903: frequency control unit (frequency controller); 904: threshold calculation unit (threshold calculator); 1001: subtractor; 1002: first PI block; 1003: proportional gain K_phase; 1101: subtractor; 1 102: second PI block; 1103: proportional gain K_freq; 1201: Pref control section (Pref control section); 1202: summing circuit; 1301: third PI block; 1302: voltage signal section; 1303: summing circuit; 1401: governor equation block; 1402: limiter; 1501: subtractor; 1502: integrator with gain 1 / M; 1503: proportional gain Dg; 1504: dFvsg; 1505: summing circuit; 1506: proportional gain 2π; 1507: integrator; 101a to 101n: multiple DER systems; 111a to 111n: multiple distribution impedances;1040: Reconnection control device; 1030: Reconnection control unit (reconnection controller); 8010: Power control unit (power controller); 9010: Power reference calculation unit (power reference calculator); 9020: Phase control unit (phase controller); 9030: Frequency control unit (frequency controller); 9040: Threshold calculation unit (threshold calculator); 2801: Subtractor; 2802: Fourth PI block; 1003a to 1003n: Proportional gain corresponding to the DER system; 2901: Subtractor; 2902: Fifth PI block; 1103a to 1103n: Proportional gain corresponding to the DER system.

Claims

1. a reconnection control device for controlling a switch disposed between at least one DER system and a power grid, the reconnection control device comprising: the DER system has a droop characteristic that enables a phase and frequency of an output voltage of the DER system to be controlled based on a power reference signal received from the reconnection controller; The reconnection control device a first detector configured to detect a first phase and a first frequency of a voltage on the DER system side of the switch; a second detector configured to detect a second phase and a second frequency of the voltage on the grid side of the switch; a reconnection control unit that outputs the power reference signal to the DER system to control the DER system and outputs a switch signal to the switch to reconnect the DER system and the power grid; The reconnection control unit controlling the DER system so that the first phase matches the second phase and the first frequency matches the second frequency; a reconnection control device that transmits the switch signal when an absolute difference between the first phase detected by the first detection unit and the second phase detected by the second detection unit is within a certain threshold.

2. 2. The reconnection control device of claim 1, wherein the DER system has a power-frequency droop characteristic such that the frequency of the output voltage of the DER system depends on the difference between the power output of the DER system and the power reference signal provided by the reconnection control unit.

3. The DER system further controls an amplitude of an output voltage of the DER system based on a voltage reference signal received from the reconnection control device; The first detector further detects a first amplitude of a voltage on the DER system side of the switch; The second detector further detects a second amplitude of a voltage on the grid side of the switch; the reconnection control unit further controls the DER system by outputting the voltage reference signal to the DER system, and reconnects the DER system and the power grid by outputting the switch signal to the switch; The reconnection control unit controlling the DER system so that the first amplitude matches the second amplitude; 2. The reconnection control device according to claim 1, wherein the switch signal is transmitted when an absolute difference between the first amplitude detected by the first detection unit and the second amplitude detected by the second detection unit is within a specific threshold.

4. The reconnection control unit a power control unit that calculates the power reference signal based on the first phase, the second phase, the first frequency, and the second frequency, and outputs the power reference signal to the DER system; The reconnection control device according to claim 3 , further comprising: a voltage adjustment unit that calculates the voltage reference signal based on the first amplitude and the second amplitude, and outputs the voltage reference signal to the DER system.

5. the reconnection control unit further includes a switching unit, the power control unit outputs a first signal based on an absolute difference between the first phase and the second phase; the voltage adjusting unit outputs a second signal based on an absolute difference between the first amplitude and the second amplitude; The reconnection control device according to claim 4 , wherein the switching unit outputs the switch signal to the switch based on the first signal and the second signal to close the switch.

6. The power control unit a phase control unit that generates a phase power reference based on a difference between the first phase and the second phase and controls the first phase; a frequency control unit that generates a frequency power reference based on a difference between the first frequency and the second frequency and controls the first frequency; The reconnection control device according to claim 5 , further comprising: a power reference calculation unit that generates the power reference signal based on the phase power reference and the frequency power reference.

7. 7. The reconnection control device according to claim 6, wherein the power reference calculation unit calculates the power reference signal after a first condition or a second condition is satisfied, wherein the first condition is that the first frequency is less than the second frequency and the first phase is less than the second phase, and the second condition is that the first frequency is equal to or greater than the second frequency and the first phase is greater than the second phase.

8. 8. The reconnection control device according to claim 7, wherein the power reference calculation unit calculates the power reference signal based on the phase power reference so as to align the first phase with the second phase when an absolute difference between the first phase and the second phase is equal to or greater than a first threshold.

9. 9. The reconnection control device according to claim 8, wherein the power reference calculation unit calculates the power reference signal based on the frequency power reference so as to align the first frequency with the second frequency when the absolute difference between the first phase and the second phase is less than the first threshold.

10. 10. The reconnection control device according to claim 9, wherein the power reference calculation unit outputs the first signal when the absolute difference between the first phase and the second phase is less than a second threshold that is less than the first threshold.

11. 8. The reconnection control device according to claim 7, wherein the voltage adjustment unit calculates the voltage reference signal based on the difference between the first amplitude and the second amplitude so as to align the first amplitude with the second amplitude when the absolute difference between the first amplitude and the second amplitude is equal to or greater than a third threshold.

12. The reconnection control device according to claim 11 , wherein the voltage adjusting unit outputs the second signal when the absolute difference between the first amplitude and the second amplitude is less than the third threshold value.

13. the at least one DER system comprises a plurality of DER systems; The reconnection control device according to claim 1 , wherein the reconnection control unit outputs a plurality of power reference signals to the plurality of DER systems, respectively.

14. the at least one DER system comprises a plurality of DER systems; the phase control unit generates a plurality of phase power references based on the difference between the first phase and the second phase and capacities of a plurality of DER systems to control the first phase; 7. The reconnection control device according to claim 6, wherein the frequency control unit generates a plurality of frequency power references based on the difference between the first frequency and the second frequency and capacities of a plurality of DER systems to control the first frequency.

15. An electric power system, The reconnection control device according to any one of claims 1 to 14, which is accompanied by at least one DER system, a switch, and a power grid; The DER system comprises: a DC power supply; an inverter connected to the DC power supply; an inverter control unit that controls the inverter based on the power reference signal and an output of the inverter, The inverter control unit a first subtractor that calculates a difference between the frequency of the output voltage of the inverter and a frequency reference signal; a governor control unit that receives an output of the first subtractor and realizes governor control; an adder circuit that adds the power reference signal and the output of the governor control unit; a second subtractor that calculates the difference between the output of the adder circuit and the output power of the inverter; a main VSG control unit that realizes inertial behavior through oscillation equations to simulate the synchronous generator characteristics of the inverter.

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