Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device and an electronic apparatus that can prevent a situation where the influence of a surge and noise extends to a temperature detection element through a wiring board connected with an electro-optical panel.SOLUTION: In an electro-optical device, a first substrate 10 used for an electro-optical panel 100p is provided with a temperature detection element 11, and a wiring board 70 connected with the first substrate 10 is provided with third wiring 71 electrically connected with first wiring La of the first substrate 10 and fourth wiring 72 electrically connected with second wiring Lc of the first substrate 10. The wiring board 70 is provided with an electrostatic protection circuit 80. The electrostatic protection circuit 80 includes a first electrostatic protection circuit 81 provided inside a drive IC 75, and a second electrostatic protection circuit 82 formed of a capacitive element mounted on the wiring board 70. Consequently, even when static electricity enters the third wiring 71 and the fourth wiring 72 from a side of a connector 61, a surge can be dissipated through the electrostatic protection circuit 80.SELECTED DRAWING: Figure 9

Description

[Technical Field]

[0001] The present invention relates to an electro-optical device provided with a temperature detection element, and an electronic device. [Background technology]

[0002] In electro-optical devices such as liquid crystal devices, a technology has been proposed in which a temperature detection element is provided outside the display area of ​​the electro-optical panel, and driving conditions are corrected based on the detection results of the temperature detection element (see Patent Document 1). In the electro-optical device described in Patent Document 1, a wiring board on which a driving IC is mounted is connected to the electro-optical panel, and the temperature detection element is electrically connected to the driving IC. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-6333 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in a configuration in which the temperature detection element is electrically connected to a drive IC mounted on a wiring board, if static electricity enters the drive IC, a surge caused by static electricity can enter the temperature detection element, and the temperature detection element can easily be affected by surges and noise via the wiring board connected to the electro-optical panel. [Means for solving the problem]

[0005] In order to solve the above problems, one aspect of the electro-optical device to which the present invention is applied is as follows: an electro-optical panel provided with a temperature detection element, a first wiring electrically connected to the temperature detection element, and a second wiring electrically connected to the temperature detection element; a wiring substrate provided with a third wiring electrically connected to the first wiring, a fourth wiring electrically connected to the second wiring, and an electrostatic protection circuit; The present invention is characterized by having the following.

[0006] Another aspect of the electro-optical device to which the present invention is applied is an electro-optical panel provided with a temperature detection element, a first wiring electrically connected to the temperature detection element, and a second wiring electrically connected to the temperature detection element; a wiring substrate provided with a third wiring electrically connected to the first wiring, a fourth wiring electrically connected to the second wiring, and a driving IC; Equipped with The third wiring and the fourth wiring do not overlap the driving IC in a plan view.

[0007] The electro-optical device according to the present invention is used in electronic equipment. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing an example of the configuration of an electro-optical device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is an explanatory diagram schematically showing a cross section of the electro-optical device shown in FIG. [Figure 3] FIG. 2 is a circuit block diagram showing the electrical configuration of the first substrate and the like shown in FIG. [Figure 4] FIG. 4 is an explanatory diagram of a first electrostatic protection circuit of the drive IC shown in FIG. 3. [Figure 5] FIG. 4 is an explanatory diagram of the temperature detection circuit shown in FIG. 3. [Figure 6] FIG. 6 is an explanatory diagram showing a planar configuration of the temperature detection circuit and the like shown in FIG. 5. [Figure 7] FIG. 6 is a plan view schematically showing the planar configuration of the temperature detection element shown in FIG. 5. [Figure 8] FIG. 8 is a cross-sectional view schematically showing a cross section of the temperature detection element shown in FIG. [Figure 9] FIG. 4 is an explanatory diagram of an electro-optical device according to a second embodiment of the present invention. [Figure 10] FIG. 10 is an explanatory diagram of an electro-optical device according to a third embodiment of the present invention. [Figure 11] FIG. 10 is an explanatory diagram of an electro-optical device according to a fourth embodiment of the present invention. [Figure 12] FIG. 10 is an explanatory diagram of an electro-optical device according to a fifth embodiment of the present invention. [Figure 13] 1 is a block diagram showing an example of the configuration of a projection display device to which the present invention is applied. [Figure 14] FIG. 14 is an explanatory diagram of the light path shift element shown in FIG. 13. DETAILED DESCRIPTION OF THE INVENTION

[0009] An embodiment of the present invention will be described with reference to the drawings. In the drawings referred to in the following description, each layer and each component is shown at a different scale so that they can be recognized. Furthermore, a plan view refers to a view from the normal direction to the first substrate 10 or the second substrate 20. In the following description, one of two directions that intersect in the plane of the first substrate 10 will be referred to as a first direction Y, and the other will be referred to as a second direction X.

[0010] 1. Embodiment 1-1. Overall configuration of the electro-optical device 100 FIG. 1 is a plan view illustrating an example of the configuration of an electro-optical device 100 according to a first embodiment of the present invention. FIG. 2 is an explanatory diagram schematically illustrating a cross section of the electro-optical device 100 illustrated in FIG. 1. The electro-optical device 100 illustrated in FIGS. 1 and 2 is a liquid crystal device and includes an electro-optical panel 100p. In the electro-optical device 100, a first substrate 10 and a second substrate 20 are bonded together with a predetermined gap therebetween by a sealant 107. The sealant 107 is provided in a frame shape along the outer edge of the second substrate 20. The sealant 107 is an adhesive made of a photocurable resin, a thermosetting resin, or the like, and contains a gap material 107a such as glass fiber or glass beads to maintain a predetermined distance between the two substrates. In the electro-optical device 100, an electro-optical layer 50 made of a liquid crystal layer is provided between the first substrate 10 and the second substrate 20 within a region surrounded by the sealant 107. The sealant 107 has a discontinuous portion 107c formed therein to serve as a liquid crystal injection port, and this discontinuous portion 107c is sealed with a sealing material 108 after the liquid crystal material is injected. Note that if the liquid crystal material is injected using a dropping method, the discontinuous portion 107c is not formed. The first substrate 10 and the second substrate 20 are both rectangular, and a display area 10a is provided as a rectangular area approximately in the center of the electro-optical device 100. Corresponding to this shape, the sealant 107 is also provided in a substantially rectangular shape, and the outside of the display area 10a is a rectangular frame-shaped peripheral area 10c.

[0011] In the following description, the side of the first substrate 10 extending in the first direction Y is referred to as the first side 10w1, and the side adjacent to the first side 10w1 and extending in the second direction X is referred to as the second side 10w2. Also, the side of the first substrate 10 extending in the first direction Y so as to face the first side 10w1 in the second direction X is referred to as the third side 10w3, and the side extending in the second direction X so as to face the second side 10w2 in the first direction Y is referred to as the fourth side 10w4.

[0012] In the peripheral region 10c of the first substrate 10, a scanning line driving circuit 104 is provided between the first side 10w1 of the first substrate 10 and the display region 10a, and between the third side 10w3 of the first substrate 10 and the display region 10a. A data line driving circuit 101 is provided between the second side 10w2 of the first substrate 10 and the display region 10a, and an inspection circuit 105 is provided between the fourth side 10w4 of the first substrate 10 and the second side 10a2 of the display region 10a. In the first substrate 10, a plurality of mounting terminals 102 are arranged along the second side 10w2 between the second side 10w2 and the data line driving circuit 101.

[0013] The first substrate 10 has a light-transmitting substrate body 10w such as a quartz substrate or a glass substrate, and on one surface 10s of the first substrate 10 facing the second substrate 20, a plurality of pixel transistors and pixel electrodes 9a electrically connected to each of the plurality of pixel transistors are formed in a matrix in a display region 10a. A first alignment film 16 is formed on the upper layer side of the pixel electrodes 9a. On the one surface 10s side of the first substrate 10, a rectangular frame-shaped region 10b extending along the outer edge of the display region 10a between the sealing material 107 and the sealing material 107 has dummy pixel electrodes 9b formed simultaneously with the pixel electrodes 9a in portions extending along each side of the display region 10a.

[0014] The second substrate 20 has a translucent substrate body 20w such as a quartz substrate or a glass substrate. A common electrode 21 is formed on one surface 20s of the second substrate 20, facing the first substrate 10. A second alignment film 26 is laminated on the surface of the common electrode 21. The common electrode 21 is formed on substantially the entire surface of the one surface 20s of the second substrate 20. In the frame region 10b on the one surface 20s of the second substrate 20, a display edge light-shielding region 29 made of a light-shielding layer is formed below the common electrode 21, and the inner edge of the display edge light-shielding region 29 defines the display region 10a. A translucent planarization film 22 is formed between the display edge light-shielding region 29 and the common electrode 21. The light-shielding layer constituting the display edge light-shielding region 29 may be formed as a black matrix portion that overlaps, in plan view, with the inter-pixel region 10f sandwiched between adjacent pixel electrodes 9a. The display edge light-shielding region 29 overlaps with the dummy pixel electrodes 9b in plan view. The display edge light-shielding region 29 is made of a light-shielding metal film or black resin.

[0015] The first alignment film 16 and the second alignment film 26 are made of SiO X The electro-optical device 100 is an inorganic alignment film made of an obliquely evaporated film of TiO2, MgO, Al2O3, etc. (x≦2), and is made of a columnar structure layer in which pillar-shaped bodies called columns are formed obliquely with respect to the first substrate 10 and the second substrate 20. Therefore, the first alignment film 16 and the second alignment film 26 align the nematic liquid crystal molecules with negative dielectric anisotropy used in the electro-optical layer 50 at an oblique angle with respect to the first substrate 10 and the second substrate 20, imparting a pretilt to the liquid crystal molecules. In this way, the electro-optical device 100 is configured as a normally black VA (Vertical Alignment) mode liquid crystal device.

[0016] On the first substrate 10, outside the sealing material 107, an inter-substrate conduction electrode 14t is formed at a position overlapping the vicinity of four corner portions 24t of the second substrate 20. A common potential wiring 6g is electrically connected to the inter-substrate conduction electrode 14t, and the common potential wiring 6g is electrically connected to a terminal 102g for applying a common potential among the terminals 102. An inter-substrate conductive material 109 containing conductive particles is disposed between the inter-substrate conduction electrode 14t and the common electrode 21, and the common electrode 21 of the second substrate 20 is electrically connected to the first substrate 10 side via the inter-substrate conduction electrode 14t and the inter-substrate conductive material 109. Therefore, a common potential LCCOM is applied to the common electrode 21 from the first substrate 10 side.

[0017] The electro-optical device 100 of this embodiment is a transmissive liquid crystal device. Therefore, the pixel electrodes 9a and the common electrode 21 are formed of a light-transmitting conductive film such as an ITO (Indium Tin Oxide) film or an IZO (Indium Zinc Oxide) film. In such a transmissive liquid crystal device, for example, light from a light source incident from the second substrate 20 side is modulated while being emitted from the first substrate 10 to display an image.

[0018] 1-2. Electrical configuration of the electro-optical device 100 3 is a circuit block diagram showing the electrical configuration of the first substrate 10 etc. shown in FIG. 3. As shown in FIG. 3, in the electro-optical device 100, the first substrate 10 used in the electro-optical panel 100p has a display area 10a in its central area where a plurality of pixel circuits 100a are arranged in a matrix. Inside the display area 10a, a scanning line driving circuit 104 is connected to the first substrate 100p in the second direction X. A plurality of scanning lines 3a extending from a data line driving circuit 101 and a plurality of data lines 6a extending in the first direction Y are provided, and pixel circuits 100a are configured corresponding to the intersections of the scanning lines 3a and the data lines 6a. The plurality of data lines 6a are electrically connected to an inspection circuit 105. The inspection circuit 105 is a transistor array, and one source and drain of each transistor is electrically connected to the data line 6a, the other source and drain are electrically connected to an inspection line (not shown), and the gate is electrically connected to a control signal wiring.

[0019] Each of the plurality of pixel circuits 100a includes a pixel transistor 30, which is formed of a field-effect transistor or the like, and a pixel electrode 9a electrically connected to the pixel transistor 30. A data line 6a is electrically connected to the source of the pixel transistor 30, a scanning line 3a is electrically connected to the gate of the pixel transistor 30, and a pixel electrode 9a is electrically connected to the drain of the pixel transistor 30. An image signal is supplied to the data line 6a, and a scanning signal is supplied to the scanning line 3a.

[0020] In each pixel circuit 100a, the pixel electrode 9a faces the common electrode 21 of the second substrate 20 described with reference to FIG. 2 via the electro-optical layer 50, forming a liquid crystal capacitance 50a. To prevent fluctuations in the image signal stored in the liquid crystal capacitance, a storage capacitance 55 is added to each pixel circuit 100a in parallel with the liquid crystal capacitance 50a. In this embodiment, to form the storage capacitance 55, a capacitance line 8a extending across the multiple pixel circuits 100a is formed on the first substrate 10, and a common potential LCCOM is supplied to the capacitance line 8a. The capacitance line 8a is arranged to overlap at least one of the scanning line 3a and the data line 6a. FIG. 3 illustrates an example in which the capacitance line 8a overlaps both the scanning line 3a and the data line 6a. Although not shown, the capacitance line 8a is electrically connected to the common potential wiring 6g described with reference to FIG. 1.

[0021] 1-3. Configuration of wiring board 70 etc. FIG. 4 is an explanatory diagram of the first electrostatic protection circuit 81 of the driving IC 75 shown in FIG. 3. As shown in FIG. 3, the wiring substrate 70 is connected to the terminals 102 of the first substrate 10. The multiple terminals 102 are arranged in the following order from the first side 10w1 of the first substrate 10 toward the third side 10w3: terminals 102g, 102t, 102s, the first terminal 102a, the second terminal 102c, terminals 102e, 102f, and 102h. The terminal 102g is a terminal 102 for supplying a common potential LCCOM. The terminal 102t is a terminal for supplying a high-level constant potential VDDY to the scanning line driving circuit 104. The terminal 102s is a terminal for supplying a low-level constant potential VSSY to the scanning line driving circuit 104. The terminals 102e and 102f are terminals for testing, and the terminal 102h is a terminal for applying a constant potential to the dummy pixel electrode 9b.

[0022] A driving IC 75 that outputs image signals VID and the like to the electro-optical panel 100p is mounted on the wiring board 70. The wiring board 70 is electrically connected to a higher-level circuit 60 via a connector 61. The higher-level circuit 60 is provided with an image control circuit 65 that outputs image data DV and the like to the driving IC 75. The higher-level circuit 60 is provided in a higher-level device relative to the electro-optical device 100 in an electronic device described below. The wiring board 70 may be formed by connecting multiple substrates.

[0023] On the first substrate 10, outside the display area 10a, a temperature detection circuit 1 including a temperature detection element 11 is configured. Therefore, the multiple terminals 102 include a first terminal 102a electrically connected to a first wiring La extending from the temperature detection circuit 1, and a second terminal 102c electrically connected to a second wiring Lc extending from the temperature detection circuit 1.

[0024] The upper circuit 60 is provided with a temperature detection drive circuit 66 that drives the temperature detection circuit 1. Therefore, the wiring board 70 has a first terminal 102a electrically connected to the first wiring La. A third wiring 71 is provided which is electrically connected to the second wiring Lc via the second terminal 102c, and a fourth wiring 72 is provided which is electrically connected to the second wiring Lc via the second terminal 102c.

[0025] The wiring board 70 is provided with an electrostatic protection circuit 80. As the electrostatic protection circuit 80, a first electrostatic protection circuit 81 provided inside the driving IC 75 is used, and as will be described in the second embodiment, a second electrostatic protection circuit 82 provided outside the driving IC 75 on the wiring board 70 is also used.

[0026] In this embodiment, the electrostatic protection circuit 80 is a first electrostatic protection circuit 81 provided inside the drive IC 75, and is electrically connected to at least one of the third wiring 71 and the fourth wiring 72. In this embodiment, both the third wiring 71 and the fourth wiring 72 are electrically connected to the first electrostatic protection circuit 81.

[0027] More specifically, the driving IC 75 overlaps with the third wiring 71 in a plan view, and the third wiring 71 is electrically connected to a terminal of the driving IC 75. Furthermore, the driving IC 75 does not overlap with the fourth wiring 72 in a plan view, but the driving IC 75 overlaps with a wiring 721 branching from the fourth wiring 72 in a plan view. Therefore, the fourth wiring 72 is electrically connected to a terminal of the driving IC 75 via the wiring 721.

[0028] 4, a first electrostatic protection circuit 81 is connected to a plurality of terminals 751 of the driving IC 75. In this embodiment, the first electrostatic protection circuit 81 includes a wiring 752 to which a ground potential GND is applied, a wiring 753 to which a constant potential Vcc is applied, a diode Da connected in the reverse direction between the wiring 752 and the wiring 753, and a diode Db connected in the reverse direction between the wiring 752 and the diode Da, and is electrically connected to the terminal 751 at a connection point Dc between the diode Da and the diode Db.

[0029] The driving IC 75 is provided with a power clamp circuit 755, and the first electrostatic protection circuit 81 is electrically connected to the power clamp circuit 755. Basically, like the first electrostatic protection circuit 81, the power clamp circuit 755 also uses a diode to limit the range of the output voltage between the ground potential GND and the constant potential Vcc.

[0030] 3, in the electro-optical panel 100p, a first resistor R1 is provided on the first wiring La, and a second resistor R2 is provided on the second wiring Lc as a protective resistor. Here, the resistance value of the first resistor R1 is greater than the resistance value of the third wiring 71, and the resistance value of the second resistor R2 is greater than the resistance value of the fourth wiring 72.

[0031] According to the electro-optical device 100 configured in this manner, even if static electricity infiltrates the third wiring 71 and the fourth wiring 72 from the connector 61 side when the electro-optical device 100 is handled with the wiring board 70 connected to the electro-optical panel 100p, the surge caused by the static electricity can be released via the electrostatic protection circuit 80 provided on the wiring board 70. More specifically, the surge caused by the static electricity infiltrating the third wiring 71 and the fourth wiring 72 can be released via the first electrostatic protection circuit 81 provided as the electrostatic protection circuit 80 in the drive IC 75. Therefore, the temperature detection element 11 provided on the electro-optical panel 100p can be protected.

[0032] 1-4. Configuration of temperature detection circuit 1, etc. FIG. 5 is an explanatory diagram of the temperature detection circuit 1 shown in FIG. 3. As shown in FIG. 5, the temperature detection circuit 1 includes a temperature detection element 11. The temperature detection element 11 includes, for example, a plurality of diodes D connected in series. FIG. 5 illustrates an example in which five diodes D are electrically connected in series. Hereinafter, the five diodes D will be referred to as a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, and a fifth diode D5. A first wiring La extending from the first terminal 102a is electrically connected to the anode 11a of the fifth diode D5 of the temperature detection element 11. A second wiring Lc extending from the second terminal 102c is electrically connected to the cathode 11c of the first diode D1 of the temperature detection element 11.

[0033] Therefore, when detecting the temperature of the electro-optical device 100 mounted in an electronic device, a minute forward drive current IF of approximately 10 nA to several μA is supplied from the temperature detection drive circuit 66 to the five temperature detection elements 11 of the temperature detection circuit 1 via the first terminal 102a and the second terminal 102c via the wiring board 70 connected to the first substrate 10. The forward voltage of the temperature detection elements 11 varies with temperature in a substantially linear manner. Therefore, the temperature of the electro-optical panel 100p can be detected by detecting the voltage between the first terminal 102a and the second terminal 102c. Since the temperature detection elements 11 are disposed near the display area 10a, the temperature detection elements 11 can accurately detect the temperature of the display area 10a. Therefore, by correcting the image signal based on the temperature detected by the temperature detection circuit 1, the electro-optical device 100 can be driven under appropriate conditions corresponding to the temperature of the display area 10a, thereby displaying high-quality images.

[0034] The temperature detection drive circuit 66 includes a constant current circuit 661 and a stabilizing capacitor 662 between the constant current circuit 661 and ground. The stabilizing capacitor 662 is electrically connected to a wiring electrically connected to the first terminal 102a and a wiring electrically connected to the second terminal 102c, and stabilizes the measured value of the output voltage VF. The capacitance of the stabilizing capacitor 662 is, for example, 0.1 μF.

[0035] In the temperature detection circuit 1, the first wiring La and the second wiring Lc are provided with a first resistor R1 and a second resistor R2 as protective resistors. The temperature detection circuit 1 also has a third electrostatic discharge protection circuit 12 for protecting the temperature detection element 11. The third electrostatic discharge protection circuit 12 includes a transistor Tr connected between the first wiring La and the second wiring Lc, and the transistor Tr is electrically connected in parallel to the temperature detection element 11. One source / drain of the transistor Tr is electrically connected between the first terminal 102a of the first wiring La and the temperature detection element 11, and the other source / drain of the transistor Tr is electrically connected between the second terminal 102c of the second wiring Lc and the temperature detection element 11. In this embodiment, the transistor Tr is an N-channel thin-film transistor, similar to the pixel transistor 30.

[0036] The third electrostatic discharge protection circuit 12 includes a first capacitance element C1 and a second capacitance element C2 electrically connected in series between a first wiring La and a second wiring Lc. More specifically, one end of the first capacitance element C1 is electrically connected to the first wiring La, one end of the second capacitance element C2 is electrically connected to the second wiring Lc, and the other end of the first capacitance element C1 and the other end of the second capacitance element C2 are electrically connected.

[0037] In the third ESD protection circuit 12, a connection node Cn between the first capacitance element C1 and the second capacitance element C2 is electrically connected to the gate of the transistor Tr. The third ESD protection circuit 12 has a third resistance unit R3 electrically connected in parallel to the first capacitance element C1. More specifically, a gate wiring Lg extending from the gate of the transistor Tr is electrically connected to the connection node Cn between the first capacitance element C1 and the second capacitance element C2, and is electrically connected to the second wiring Lc via the third resistance unit R3.

[0038] In the temperature detection circuit 1, the first resistor R1 is inserted in the first wiring La between the first terminal 102a and the connection position of the first wiring La and the first capacitance element C1, and the second resistor R2 is inserted in the second wiring Lc between the second terminal 102c and the connection position of the second wiring Lc and the second capacitance element C2. It is inserted between the connector and the connecting position.

[0039] In this embodiment, the sizes of the circuit elements used in the temperature detection circuit 1 are as follows, for example: However, these are not limited to the following conditions. Transistor Tr: Channel width W = 800 μm, channel length L = 5 μm The capacitance of the first capacitance element C1=5 pF The capacitance of the second capacitance element C2=5 pF Resistance of the first resistor R1 = 10 kΩ Resistance of the second resistor R2 = 10 kΩ Resistance value of the third resistor R3 = 500kΩ

[0040] In the electro-optical device 100 configured as described above, when a surge current caused by static electricity intrudes from the first terminal 102a, the third electrostatic protection circuit 12 protects the temperature detection element 11 from static electricity. More specifically, in the third electrostatic protection circuit 12, in a static state, the gate-source voltage of the transistor Tr is 0V, and the transistor Tr is off. In contrast, when a surge current caused by static electricity intrudes from the first terminal 102a, the first resistor R1 suppresses voltage fluctuations, while the gate potential of the transistor Tr, which is the potential of the connection node Cn between the first capacitance element C1 and the second capacitance element C2, rises. As a result, the transistor Tr turns on, and the surge current flows to the second terminal 102c via the transistor Tr and the second wiring Lc. At this time, the first resistor R1 attenuates the surge current intruding from the first terminal 102a, and the second resistor R2 attenuates the surge current intruding from the second terminal 102c. The period during which the transistor Tr is on is determined by the first capacitance element C1, the second capacitance element C2, the third resistance element R3, and the gate capacitance of the transistor Tr. After discharging, the gate potential of the transistor Tr returns to the off potential via the third resistance element R3. Therefore, the surge current flowing through the temperature detection element 11 is suppressed by the third electrostatic protection circuit 12, thereby protecting the temperature detection element 11. The first resistance element R1 and the second resistance element R2 generate a voltage drop due to the drive current IF of the temperature detection element 11. However, because the drive current IF is extremely small, the effect of the voltage drop due to the first resistance element R1 and the second resistance element R2 can be almost ignored.

[0041] 1-5. Layout of temperature detection circuit 1, etc. Fig. 6 is an explanatory diagram showing the planar configuration of the temperature detection circuit 1 etc. shown in Fig. 5. Fig. 6 illustrates an example in which five diodes D are electrically connected in series in the temperature detection element 11. As shown in Fig. 6, the first substrate 10 has a scanning line driving circuit 104 arranged along the first direction Y between the display area 10a and the first side 10w1, and an inter-substrate conduction electrode 14t that connects the first substrate 10 and the second substrate 20 to each other is provided between the scanning line driving circuit 104 and the second side 10w2.

[0042] The first substrate 10 also has a data line driving circuit 101 arranged along the second direction X between the display region 10a and the second side 10w2, and the multiple data lines 6a extend from the data line driving circuit 101 in the first direction Y and are electrically connected to the pixel circuits 100a in the display region 10a described with reference to Fig. 3. Therefore, between the data line driving circuit 101 and the display region 10a, a wiring region 103 is formed in which the multiple data lines 6a extend from the data line driving circuit 101 to the display region 10a.

[0043] In this embodiment, the data line driving circuit 101 is provided with a selection circuit 101a constituting a demultiplexer at the end closest to the display area 10a, and the data lines 6a extend from the selection circuit 101a toward the display area 10a in the first direction Y. The selection circuit 101a includes a transistor 30e that controls the electrical connection between the data lines 6a and the image signal wiring 6j. In this embodiment, the demultiplexer is provided with, for example, eight selection circuits 101 3 via the terminal 102 and the image signal wiring 6j. At this time, the transistor 30e of the selection circuit 101a supplies the image signal VID to each data line 6a in a time-division manner based on the selection signals SEL1, SEL2, ..., SEL8 supplied from the drive IC 75 via the control signal wiring 6i.

[0044] The temperature detection element 11 is disposed in the first direction Y relative to the scanning line driving circuit 104. More specifically, the temperature detection element 11 is disposed adjacent to the scanning line driving circuit 104 in the first direction Y between the scanning line driving circuit 104 and the second side 10w2. The temperature detection element 11 is also disposed adjacent to the data line driving circuit 101 or the wiring region 103 in the second direction X. In this embodiment, the temperature detection element 11 is disposed adjacent to the wiring region 103 on the first side 10w1 in the direction along the second direction X. Here, the multiple diodes D constituting the temperature detection element 11 are arranged in a fixed direction. In this embodiment, the multiple diodes D constituting the temperature detection element 11 are arranged in the second direction X. Therefore, the dimension L11 of the temperature detection element 11 in the first direction Y is smaller than the dimension L103 of the wiring region 103 in the first direction Y.

[0045] According to this configuration, the temperature detection element 11 can be disposed near the display region 10a. Therefore, the temperature of the electro-optical layer 50 in the display region 10a can be detected appropriately. Furthermore, the temperature detection element 11 and the wiring L0 (the first wiring La and the second wiring Lc) electrically connected to the temperature detection element 11 can be separated from the scanning line 3a, thereby reducing the influence of noise from the scanning line 3a on the wiring L0. Therefore, the detection accuracy of the temperature detection element 11 is high.

[0046] In this embodiment, as will be described below, the first wiring La and the second wiring Lc are routed together as wiring L0 electrically connected to the third ESD protection circuit 12, and the first resistance unit R1 and the second resistance unit R2 are arranged together as resistance unit R0 electrically connected to the wiring L0. Note that, in electrically connecting the first wiring La to the first terminal 102a and the second wiring Lc to the second terminal 102c, the first wiring La and the second wiring Lc are made to cross each other while ensuring insulation by utilizing a multilayer wiring structure.

[0047] The entire third electrostatic protection circuit 12 is arranged collectively. Therefore, the first capacitance element C1 and the second capacitance element C2 are arranged collectively as the capacitance element C0 of the third electrostatic protection circuit 12, and the capacitance element C0, the transistor Tr, and the third resistance unit R3 are arranged collectively.

[0048] More specifically, the third electrostatic protection circuit 12 is disposed between the inter-substrate conduction electrode 14t and the second side 10w2. In this embodiment, when viewed in the first direction Y, the third electrostatic protection circuit 12 is disposed at a position shifted from the inter-substrate conduction electrode 14t toward the opposite side from the first side 10w1 in the second direction X, but when viewed in the second direction X, the third electrostatic protection circuit 12 is provided between the inter-substrate conduction electrode 14t and the second side 10w2. In this embodiment, the capacitance element C0 (first capacitance element C1, second capacitance element C2), the transistor Tr, and the third resistance unit R3 constituting the third electrostatic protection circuit 12 are disposed in order from the inter-substrate conduction electrode 14t side toward the second side 10w2 side. In the capacitance element C0, the first capacitance element C1 and the second capacitance element C2 are arranged side by side in the second direction X.

[0049] In this embodiment, the first capacitance element C1 is arranged on the first side 10w1 side with respect to the second capacitance element C2. Therefore, the third ESD protection circuit 12 can be arranged in a narrow range in the second direction X, and the presence of the third ESD protection circuit 12 does not significantly affect the wiring layout.

[0050] In a transistor Tr, a plurality of unit transistor elements Tr0 are formed using an integrally formed semiconductor layer, and the transistor Tr is configured by electrically connecting a plurality of unit transistor elements Tr0 in parallel. Note that while Fig. 6 shows an example in which a total of four unit transistor elements Tr0 are electrically connected in parallel, the number of unit transistor elements Tr0 electrically connected in parallel is not limited to four.

[0051] In the wiring L0 electrically connected to the third ESD protection circuit 12, a resistance portion R0 is also provided between the inter-substrate conduction electrode 14t and the second side 10w2. More specifically, the resistance portion R0 is disposed between the third ESD protection circuit 12 and the first side 10w1. In this embodiment, the wiring L0 includes a first wiring La and a second wiring Lc electrically connected to the temperature detection element 11, and the resistance portion R0 includes a first resistance portion R1 electrically connected to the first wiring La and a second resistance portion R2 electrically connected to the second wiring Lc, and the first resistance portion R1 and the second resistance portion R2 are disposed to be aligned in the first direction Y between the third ESD protection circuit 12 and the first side 10w1.

[0052] In this way, the third electrostatic protection circuit 12 is disposed between the inter-substrate conduction electrode 14t and the second side, and the resistor portion R0 is disposed in the wiring L0 between the third electrostatic protection circuit 12 and the first side 10w1. Therefore, the resistor portion R0 can be disposed in a narrow range in the second direction X, so the presence of the resistor portion R0 does not significantly affect the wiring layout. Furthermore, the resistor portion R0 can be disposed in an empty space near the first side 10w1 in the region that separates the resistor portion R0 from the terminal 102, so the presence of the resistor portion R0 does not significantly affect the wiring layout. Therefore, it is possible to avoid an increase in the size of the electro-optical device 100.

[0053] In the electro-optical device 100 configured in this manner, the first substrate 10 includes a first constant potential wiring 6h extending in the first direction Y at a position adjacent to the temperature detection element 11 on the opposite side of the first side 10w1. The first constant potential wiring 6h is, for example, a constant potential wiring for sharing a common potential LCCOM with the dummy pixel electrode 9b shown in FIG. 2. The first substrate 10 also includes inspection wirings 6e and 6f extending in the first direction Y between the first constant potential wiring 6h and the temperature detection element 11 and reaching the inspection circuit 105. In this embodiment, the first constant potential wiring 6h extends in the second direction X between the data line driving circuit 101 and the third electrostatic protection circuit 12 and between the wiring region 103 and the temperature detection element 11.

[0054] The first substrate 10 includes a second constant potential wiring 6s extending in the second direction X between the temperature detection element 11 and the scanning line drive circuit 104. The second constant potential wiring 6s is a constant potential wiring that supplies a low-level constant potential VSSY to the scanning line drive circuit 104, and extends from the terminal 102s between the first resistor portion R1 and the first side 10w1, then extends in the second direction X between the temperature detection element 11 and the scanning line drive circuit 104, and further extends in the first direction Y toward the scanning line drive circuit 104. Therefore, the first constant potential wiring 6h and the second constant potential wiring 6s can be used as a shield, so that the temperature detection element 11 is less susceptible to noise from signal lines such as the data line 6a.

[0055] On the first side 10w1 side of the second constant potential wiring 6s, there are provided a constant potential wiring 6t that supplies a high-level constant potential VDDY to the scanning line driving circuit 104 and a common potential wiring 6g that supplies a common potential LCCOM to the inter-substrate conduction electrode 14t. The common potential wiring 6g is electrically connected to the capacitance line 8a by a multilayer wiring structure. The capacitance line 8a is also used as a relatively wide wiring outside the display region 10a for shading and shielding.

[0056] 1-6. Configuration example of temperature detection element 11 FIG. 7 is a plan view schematically showing the planar configuration of the temperature detection element 11 shown in FIG. 7A and 7B are cross-sectional views schematically illustrating the cross section of the temperature detection element 11 shown in FIG. 8. FIG. 8 corresponds to the A1-A1′ cross section of FIG. 7. FIGS. 7 and 8 illustrate a case in which six diodes D are electrically connected in series in the temperature detection element 11. In FIGS. 7A and 7B, one of the N-type and P-type regions provided in the semiconductor layer 31h constituting the temperature detection element 11 corresponds to a first impurity region of a first conductivity type, and the other corresponds to a second impurity region of a second conductivity type. In this embodiment, the N-type region corresponds to the first impurity region, and the P-type region corresponds to the second impurity region, of the N-type and P-type regions provided in the semiconductor layer 31h. In addition, in FIG. 8, upper layers of the temperature detection element 11 formed on the first substrate 10 are omitted to the extent that they do not interfere with explanation.

[0057] 5, a plurality of semiconductor layers 31h separated from one another in an island shape are arranged in a fixed direction, and each of the plurality of semiconductor layers 31h is used to form a diode D, as shown in FIGS. 7 and 8. In this embodiment, six semiconductor layers 31h1 to 31h6 are arranged in a fixed direction in the second direction X, and six diodes D are formed using each of the six semiconductor layers 31h.

[0058] More specifically, each of the six semiconductor layers 31h has an N-type region and a P-type region arranged side by side along the second direction X. In this embodiment, the N-type region includes a high-concentration N-type region 31n1 and a low-concentration N-type region 31n2, and the P-type region includes a high-concentration P-type region 31p1 and a low-concentration P-type region 31p2, and the connection between the low-concentration N-type region 31n2 and the low-concentration P-type region 31p2 forms a PN junction surface. Note that the configuration of the junction is not limited to this configuration.

[0059] In this way, since the plurality of semiconductor layers 31h are arranged side by side in the second direction X, there are fewer space constraints even when increasing the number of diodes D electrically connected in series. Furthermore, since the plurality of semiconductor layers 31h are arranged side by side in the second direction X, the dimension L11 of the temperature detection element 11 in the first direction Y can be made smaller than the dimension L103 of the wiring region 103 in the first direction Y. Therefore, the entire temperature detection element 11 can be disposed near the display region 10a.

[0060] A relay electrode 6b that electrically connects the diode D is formed on the upper layer of the insulating film 45. In this embodiment, the five relay electrodes 6b1 to 6b5 are electrically connected to the high-concentration P-type region 31p1 of the semiconductor layer 31h and the high-concentration N-type region 31n1 of the adjacent semiconductor layer 31h via contact holes 45p and 45n that penetrate the gate insulating film 32 and the insulating films 42, 43, 44, and 45. In addition, the first wiring La and the second wiring Lc are electrically connected to two of the semiconductor layers 31h located at both ends via contact holes 45p and 45n that penetrate the gate insulating film 32 and the insulating films 42, 43, 44, and 45.

[0061] In this embodiment, the first wiring La has a first connection portion La1 extending in the first direction Y and a first extension portion La2 extending in the second direction X from an end of the first connection portion La1, and the first connection portion La1 is electrically connected to one electrode of the temperature detection element 11. The second line Lc has a second connection portion Lc1 extending in the first direction Y and a second extension portion Lc2 extending from the second connection portion Lc1 in the second direction X, and the second connection portion Lc1 is electrically connected to the other electrode of the temperature detection element 11. In this embodiment, one electrode of the temperature detection element 11 is the anode 11a, and the other electrode of the temperature detection element 11 is the cathode 11c.

[0062] The first wiring La, the second wiring Lc, and the relay electrode 6b are wirings formed in the same layer as the data line 6a, similar to the first constant potential wiring 6h, the second constant potential wiring 6s, the constant potential wiring 6t, the common potential wiring 6g, the control signal wiring 6i, and the image signal wiring 6j shown in FIG. 6, and are low-resistance wirings mainly made of aluminum.

[0063] In the temperature detection element 11, the semiconductor layers 31h include an N-type region and a P-type region between the first connection portion La1 and one of the relay electrodes 6b adjacent to the first connection portion La1, and an N-type region and a P-type region between the second connection portion Lc1 and one of the relay electrodes 6b adjacent to the second connection portion Lc1. The semiconductor layers 31h also include an N-type region and a P-type region between two adjacent relay electrodes 6b among the relay electrodes 6b. That is, the width of the relay electrodes 6b in the second direction X is narrow. Therefore, the parasitic capacitance between the relay electrodes 6b and the noise source is small.

[0064] 2. Embodiment 2 9 is an explanatory diagram of an electro-optical device 100 according to a second embodiment of the present invention. The basic configuration of this embodiment is similar to that of the first embodiment, so the same reference numerals are used to designate common parts, and their description will be omitted. As shown in FIG. 9, in this embodiment, as in the first embodiment, an electrostatic protection circuit 80 is provided on the wiring substrate 70. In this embodiment, the electrostatic protection circuit 80 includes a first electrostatic protection circuit 81 provided inside the driving IC 75 and a second electrostatic protection circuit 82 provided outside the driving IC 75 on the wiring substrate 70.

[0065] The first electrostatic protection circuit 81 has the same configuration as in the first embodiment, as described with reference to Fig. 4. In this embodiment, the second electrostatic protection circuit 82 is a capacitance element provided on the wiring substrate 70, and both the third wiring 71 and the fourth wiring 72 are electrically connected to the second electrostatic protection circuit 82. More specifically, the capacitance element used in the second electrostatic protection circuit 82 is disposed between the third wiring 71 and the fourth wiring 72 on the connector 61 side of the driving IC 75. Furthermore, one end of the capacitance element used in the second electrostatic protection circuit 82 is electrically connected to the third wiring 71, and the other end of the capacitance element is electrically connected to the fourth wiring 72.

[0066] Furthermore, in the electro-optical panel 100p, the resistance value of the first resistor R1 connected to the first wiring La is greater than the resistance value of the third wiring 71, and the resistance value of the second resistor R2 connected to the second wiring Lc is greater than the resistance value of the fourth wiring 72.

[0067] According to the electro-optical device 100 configured in this manner, when the electro-optical device 100 is handled with the wiring board 70 connected to the electro-optical panel 100p, if static electricity enters the third wiring 71 and the fourth wiring 72 from the connector 61 side, the surge caused by the static electricity can be mitigated by the first electrostatic protection circuit 81 and the second electrostatic protection circuit 82 provided on the wiring board 70. Therefore, the temperature detection element 11 provided on the electro-optical panel 100p can be protected.

[0068] 3. Embodiment 3 FIG. 10 is an explanatory diagram of an electro-optical device 100 according to a third embodiment of the present invention. Because the basic configuration of this embodiment is similar to that of the first embodiment, the same reference numerals are used to designate common components, and their description will be omitted. As shown in FIG. 10 , in this embodiment, as in the first embodiment, an electrostatic protection circuit 80 is provided on the wiring substrate 70. In this embodiment, the driving IC 75 does not overlap either the third wiring 71 or the fourth wiring 72 in a plan view. Therefore, the electrostatic protection circuit 80 is a second electrostatic protection circuit 82 provided outside the driving IC 75 on the wiring substrate 70. As in the second embodiment, the second electrostatic protection circuit 82 is a capacitive element provided on the wiring substrate 70. One end of the capacitive element is electrically connected to the third wiring 71, and the other end of the capacitive element is electrically connected to the fourth wiring 72.

[0069] Furthermore, in the electro-optical panel 100p, the resistance value of the first resistor R1 connected to the first wiring La is greater than the resistance value of the third wiring 71, and the resistance value of the second resistor R2 connected to the second wiring Lc is greater than the resistance value of the fourth wiring 72.

[0070] According to the electro-optical device 100 configured in this manner, when the electro-optical device 100 is handled with the wiring board 70 connected to the electro-optical panel 100p, if static electricity enters the third wiring 71 and the fourth wiring 72 from the connector 61 side, the surge caused by the static electricity can be mitigated by the second electrostatic protection circuit 82 provided on the wiring board 70. Therefore, the temperature detection element 11 provided on the electro-optical panel 100p can be protected.

[0071] Furthermore, since the driving IC 75 does not overlap either the third wiring 71 or the fourth wiring 72 in plan view, the driving IC 75, which is a high-speed signal source, is unlikely to become a noise source for the third wiring 71 and the fourth wiring 72.

[0072] 4. Embodiment 4 11 is an explanatory diagram of an electro-optical device 100 according to a fourth embodiment of the present invention. Because the basic configuration of this embodiment is similar to that of the first embodiment, the same reference numerals are used to designate common parts, and their description will be omitted. In FIG. 14, in this embodiment, an electrostatic protection circuit 80 is not provided on a wiring substrate 70. However, because the driving IC 75 does not overlap either the third wiring 71 or the fourth wiring 72 in a planar view, the driving IC 75, which is a high-speed signal source, is unlikely to become a noise source for the third wiring 71 and the fourth wiring 72.

[0073] 5. Embodiment 5 12 is an explanatory diagram of an electro-optical device 100 according to a fifth embodiment of the present invention. Since the basic configuration of this embodiment is similar to that of the first embodiment, the same reference numerals are used for common parts and their description will be omitted. In the first embodiment, in the data line driving circuit 101, the control signal lines 6i extending in the second direction X are arranged in parallel in the first direction Y. However, as shown in FIG. 12, the present invention may be applied to an electro-optical device 100 in which the image signal lines 6j extending in the second direction X are arranged in parallel in the first direction Y.

[0074] 6. Another embodiment of the electro-optical device The electro-optical device 100 of the present invention is not limited to a liquid crystal device, and the present invention may be applied to electro-optical devices 100 other than liquid crystal devices, such as organic electroluminescence devices.

[0075] 7.Examples of electronic device configurations Fig. 13 is a block diagram showing an example of the configuration of a projection type display device 1000 to which the present invention is applied. Fig. 14 is an explanatory diagram of the light path shift element 110 shown in Fig. 13. Note that polarizing plates and the like are omitted from Fig. 13. The projection type display device 1000 shown in Fig. 13 is an example of an electronic device to which the present invention is applied, and includes an illumination device 190, a separation optical system 170, three electro-optical devices 100R, 100G, and 100B, and a projection optical system 160. Each of the electro-optical devices 100R, 100G, and 100B is formed by the electro-optical device 100 described with reference to Figs. 1 to 12.

[0076] The illumination device 190 is a white light source, and for example, a laser light source or a halogen lamp is used. The separation optical system 170 includes three mirrors 171, 172, and 175 and dichroic mirrors 173 and 174. The separation optical system 170 separates the white light emitted from the illumination device 190 into three primary colors: red (R), green (G), and blue (B). Specifically, the dichroic mirror 174 transmits light in the red (R) wavelength range and reflects light in the green (G) and blue (B) wavelength ranges. The dichroic mirror 173 transmits light in the blue (B) wavelength range and reflects light in the green (G) wavelength range. The light corresponding to red (R), green (G), and blue (B) is guided to the electro-optical devices 100R, 100G, and 100B, respectively.

[0077] The dichroic prism 161 is provided with a light source 162 for receiving the light beams 161a, 161b, and 161c of the electro-optical devices 100R, 100G, and 100B. The light modulated by the dichroic prism 161 enters from three directions. The dichroic prism 161 constitutes a synthesis optical system in which red (R), green (G), and blue (B) images are synthesized. Therefore, the projection lens system 162 enlarges and projects the synthesized image emitted from the optical path shift element 110 onto a projection target such as a screen 180, thereby displaying a color image on the projection target such as the screen 180.

[0078] In this case, the control unit 150 can correct the image signals supplied to the electro-optical devices 100R, 100G, and 100B based on the temperature detection results of the temperature detection circuit 1. This allows high-quality projection images to be displayed even when the ambient temperature fluctuates. Furthermore, if a light path shift element 110 (shown by a dashed line) is provided in the projection optical system 160 on the side from which light is emitted from the dichroic prism 161, shifting the position at which the projected pixel is viewed every predetermined period to enhance resolution, it becomes necessary to drive the liquid crystal layer at high speed. Even in this case, the electro-optical layer 50 can be driven at high speed by correcting the image signals supplied to the electro-optical devices 100R, 100G, and 100B based on the temperature detection results of the temperature detection circuit 1 or by adjusting the temperature of the electro-optical panel 100p of the electro-optical devices 100R, 100G, and 100B.

[0079] As shown in Fig. 14, the light path shift element 110 is an optical element that shifts light emitted from the dichroic prism 161 in a predetermined direction. Fig. 14 illustrates an example in which the position of a projection pixel Pi, at which light emitted from each pixel circuit 100a of the electro-optical panel 100p is visible, is shifted by the light path shift element 110 by a distance equivalent to 0.5 pixel pitches (=P / 2) to one side X1 in the X direction and a distance equivalent to 0.5 pixel pitches (=P / 2) to one side Y1 in the Y direction. The light path shift element 110 includes a light-transmitting plate, and the actuator, under the command of the control unit 150, swings the light-transmitting plate around an axis extending in the first direction and / or around an axis extending in the second direction, thereby shifting the light path of the light emitted from each pixel circuit 100a of the electro-optical panel 100p to light path LA and light path LB.

[0080] 8. Other embodiments of electronic devices The projection display device may be configured to use an LED light source or the like that emits light of each color as the light source unit, and supply each color light emitted from the LED light source to a separate liquid crystal device.

[0081] The electronic device equipped with the electro-optical device 100 according to the present invention is not limited to the projection display device 1000 of the above embodiment. For example, the present invention may be used in electronic devices such as a HUD (head-up display), an HMD (head-mounted display), a personal computer, a digital still camera, and an LCD television. [Explanation of symbols]

[0082] 1...temperature detection circuit, 3a...scanning line, 6a...data line, 6b...relay electrode, 6g...common potential wiring, 6h...first constant potential wiring, 6s...second constant potential wiring, 6t...constant potential wiring, 8a...capacitance line, 9a...pixel electrode, 10...first substrate, 10a...display area, 11...temperature detection element, 11a...anode, 11c...cathode, 12...third electrostatic protection circuit, 14t...electrode for conduction between substrates, 20...second substrate, 21...common electrode, 29...display edge light-shielding area, 30...pixel transistor, 31h, 31h1 to 31h6...semiconductor layer, 50...electro-optical layer, 60...higher-level circuit, 61...connector 100a...pixel circuit, 101a...data line driving circuit, 101a...selection circuit, 102a...first terminal, 102c...second terminal, 103...wiring area, 104...scanning line driving circuit, 110...light path shift element, 150...control unit, 160...projection optical system, 1 61... dichroic prism, 162... projection lens system, 170... separation optical system, 171, 172, 175... mirror, 173, 174... dichroic mirror, 180... screen, 190... lighting device, 661... constant current circuit, 755... power clamp circuit, 1000... projection display device, D, Da, Db... diode, C1... first capacitance element, C2... second capacitance element, R1... first resistance section, R2... second resistance section, R3... third resistance section, IF... drive current, La... first wiring, La0... short circuit section, La1... first connection section, Lc... second wiring, Lc1... second connection section, Tr, 30e... transistor, Tr0... unit transistor element

Claims

1. a temperature detection element; a first wiring electrically connected to the temperature detection element; an electro-optical panel provided with a second wiring electrically connected to the element; a third wiring electrically connected to the first wiring; and a second wiring electrically connected to the second wiring. and a fourth wiring electrically connected to at least one of the third wiring and the fourth wiring. a wiring substrate provided with a first electrostatic protection circuit and a driving IC provided with a driving circuit; and the first electrostatic protection circuit is provided inside the driving IC, At least one of the third wiring and the fourth wiring is electrically connected to the first electrostatic protection circuit. electrically connected, the first wiring has a first resistor portion, the second wiring has a second resistor portion, a resistance value of the first resistor portion is greater than a resistance value of the third wiring; a resistance value of the second resistor portion being greater than a resistance value of the fourth wiring; optical equipment.

2. 2. The electro-optical device according to claim 1, The first electrostatic protection circuit is connected to a power clamp circuit provided inside the driving IC. Electro-optical device characterized in that the electrodes are electrically connected.

3. 3. The electro-optical device according to claim 1, At least one of the third wiring and the fourth wiring is 1. An electro-optical device, comprising: a first electrode and a second electrode;

4. In the electro-optical device according to any one of claims 1 to 3, the electro-optical panel is provided with a second electrostatic protection circuit; The second electrostatic protection circuit is electrically connected in series between the first resistor unit and the second resistor unit. a first capacitance element and a second capacitance element connected to the temperature detecting element, one of the source and drain of which is connected to the temperature detecting element; One end of the resistor is electrically connected to the first resistor portion, and the other source / drain is connected to the temperature detection The other end of the element is electrically connected to the second resistance portion, and the first capacitance element and the second capacitance element a transistor whose gate is electrically connected to a connection node between the first capacitance element and the second capacitance element; and a third resistor portion electrically connected to the column.

5. In the electro-optical device according to claim 4, The electro-optical panel has a first side extending in a first direction and a second side intersecting the first direction. The device comprises a first substrate having a second side extending in two directions, and a second substrate facing the first substrate. picture, The first substrate includes a scanning line driving circuit and a scanning line driving circuit arranged along the first direction. an inter-substrate electrode disposed between the circuit and the second side, electrically connecting the first substrate and the second substrate; a conduction electrode; The second electrostatic protection circuit is disposed between the inter-substrate conduction electrode and the second side. Electro-optical device characterized by:

6. A temperature detection element, a first wiring electrically connected to the temperature detection element, and the temperature detection element an electro-optical panel provided with a second wiring electrically connected to the element; a third wiring electrically connected to the first wiring; and a second wiring electrically connected to the second wiring. and a fourth wiring electrically connected to at least one of the third wiring and the fourth wiring. a wiring board provided with an electrostatic protection circuit and a driving IC provided with a driving circuit; and the electrostatic protection circuit includes a first electrostatic protection circuit and a second electrostatic protection circuit, The first electrostatic protection circuit is provided inside the driving IC and is connected to the third wiring and the electrically connected to at least one of the fourth wirings, The second electrostatic protection circuit is provided on the wiring board and includes the third wiring and the fourth wiring. Electro-optical device, characterized in that:

7. 7. The electro-optical device according to claim 6, the first wiring has a first resistor portion, the second wiring has a second resistor portion, a resistance value of the first resistor portion is higher than a resistance value of the third wiring; a resistance value of the second resistor portion being higher than a resistance value of the fourth wiring; academic equipment.

8. The electro-optical device according to claim 7, the electro-optical panel is provided with a third electrostatic protection circuit; The third electrostatic protection circuit is electrically connected in series between the first resistor unit and the second resistor unit. a first capacitance element and a second capacitance element connected to the temperature detecting element, one of the source and drain of which is connected to the temperature detecting element; One end of the resistor is electrically connected to the first resistor portion, and the other source / drain is connected to the temperature detection The other end of the element is electrically connected to the second resistance portion, and the first capacitance element and the second capacitance element a transistor whose gate is electrically connected to a connection node between the first capacitance element and the second capacitance element; and a third resistor portion electrically connected to the column.

9. 9. The electro-optical device according to claim 6, The first electrostatic protection circuit is connected to a power clamp circuit provided inside the driving IC. Electro-optical device characterized in that the electrodes are electrically connected.

10. 10. The electro-optical device according to claim 6, At least one of the third wiring and the fourth wiring is, in plan view, Electro-optical device characterized in that the electro-optical device is provided so as to overlap an IC for a light source.

11. 11. The electro-optical device according to claim 6, the second electrostatic protection circuit is a capacitance element provided on the wiring substrate, one end of the capacitance element is electrically connected to the third wiring, the other end of the capacitance element is electrically connected to the fourth wiring academic equipment.

12. 12. The electro-optical device according to claim 11, The electro-optical panel has a first side extending in a first direction and a second side intersecting the first direction. The device comprises a first substrate having a second side extending in two directions, and a second substrate facing the first substrate. picture, The first substrate includes a scanning line driving circuit and a scanning line driving circuit arranged along the first direction. an inter-substrate electrode disposed between the circuit and the second side, electrically connecting the first substrate and the second substrate; a conduction electrode; The third electrostatic protection circuit is disposed between the inter-substrate conduction electrode and the second side. Electro-optical device characterized by:

13. 13. The electro-optical device according to claim 1, The temperature detection element has a plurality of semiconductor layers arranged in a certain direction. An electro-optical device characterized by:

14. An electro-optical device comprising the electro-optical device according to any one of claims 1 to 13. Child equipment.

Images