Electronic Components

Abstract

The present disclosure provides an electronic component in which the effect of parasitic inductance is reduced. A filter device (100) as an example of the electronic component according to the present disclosure is provided with an insulator (3), an inductor L, a capacitor C, external electrodes (4a), and external electrodes (4b). When viewed in plan from the side of one of major surfaces, the capacitor C is provided in a position inside the insulator (3) that overlaps part of conductor patterns (1a, 1b). The external electrodes (4b) are electrically connected to the capacitor C, and are respectively provided on opposite side surfaces of the insulator (3). The capacitor C includes an electrode pattern (5a) electrically connected to the inductor L, and an electrode pattern (5b) electrically connected to each of the external electrodes (4b) by means of at least one wiring pattern (51a, 51b). The at least one wiring pattern (51a, 51b) is parallel to part of the conductor patterns (1a, 1b).

Description

[Technical Field]

[0001] The present disclosure relates to electronic components. [Background technology]

[0002] There is known an electronic component that is a filter device in which an inductor (coil) and a capacitor (condenser) are provided inside an insulator formed by stacking multiple insulating layers. As an example of a filter device, Japanese Patent Application Laid-Open Publication No. 2013-21449 (Patent Document 1) describes a filter device in which an inductor and a capacitor are built into an insulator on which external electrodes are formed. In this filter device, when the insulator is viewed from above, the inductor is stacked on top of the capacitor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-21449 Summary of the Invention [Problem to be solved by the invention]

[0004] When realizing a filter device using a small component, it is necessary to form the inductor's conductor pattern over the entire outer frame of the insulator to ensure the designed inductance value, so external electrodes are formed on the side of the insulator and the inductor pattern and capacitor pattern are connected to the external electrodes on the side with a wiring pattern. In this case, parasitic inductance (equivalent series inductance (ESL)) occurs in the wiring pattern connecting the capacitor and external electrode. In a filter device, the generated parasitic inductance can cause the filter characteristics to deviate from the designed values.

[0005] Therefore, an object of the present disclosure is to provide an electronic component that can reduce the influence of parasitic inductance. [Means for solving the problem]

[0006] An electronic component according to an embodiment of the present disclosure includes an insulator, a first inductor, a second inductor, a capacitor, a first external electrode, and a second external electrode. The insulator has a pair of opposing main surfaces and a side surface connecting the main surfaces. The first inductor is formed within the insulator by at least one first conductor pattern. The second inductor is formed within the insulator by at least one second conductor pattern. can The capacitor is provided in the insulator at a position overlapping a part of the first conductor pattern when viewed from one of the main surfaces. The first external electrode is electrically connected to the first inductor. The second external electrode is electrically connected to the capacitor and is provided on each of the opposing side surfaces of the insulator. The first inductor and the capacitor form an LC series circuit, and the second inductor is connected in parallel to the LC series circuit and is magnetically coupled to the first inductor. The capacitor includes a first electrode pattern electrically connected to the first inductor and a second electrode pattern electrically connected to each second external electrode by at least one wiring pattern, the at least one wiring pattern being parallel to a portion of the first conductor pattern. [Effects of the Invention]

[0007] According to one embodiment of the present disclosure, the capacitor is provided at a position within the insulator that overlaps with a portion of the first conductor pattern, and the second electrode pattern of the capacitor is electrically connected to each second external electrode by at least one wiring pattern, thereby reducing the effect of parasitic inductance. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a perspective view of a filter device according to a first embodiment. [Figure 2] 1 is a circuit diagram of a filter device according to a first embodiment. [Figure 3] 1 is an exploded plan view showing the configuration of a filter device according to a first embodiment. [Figure 4]10 is an exploded plan view of the filter device according to the first embodiment when stacking is misaligned in one direction. FIG. [Figure 5] 10 is an exploded plan view of the filter device according to the first embodiment when stacking is misaligned in the other direction. FIG. [Figure 6] FIG. 10 is an exploded plan view showing the configuration of a modified example of the filter device according to the first embodiment. [Figure 7] 10 is an exploded plan view showing the configuration of another modified example of the filter device according to the first embodiment. FIG. [Figure 8] FIG. 10 is a perspective view of a filter device according to a second embodiment. [Figure 9] FIG. 10 is a circuit diagram of a filter device according to a second embodiment. [Figure 10] FIG. 10 is an exploded plan view showing the configuration of a filter device according to a second embodiment. [Figure 11] 10 is an exploded plan view showing the configuration of a modified example of the filter device according to the second embodiment. FIG. [Figure 12] FIG. 10 is a cross-sectional view showing the configuration of another modified example of the filter device according to the second embodiment. [Figure 13] FIG. 10 is an exploded plan view showing the configuration of a filter device according to a first modified example. [Figure 14] FIG. 10 is an exploded plan view showing the configuration of a filter device according to a second modification. [Figure 15] FIG. 11 is an exploded plan view showing the configuration of a filter device according to a third modification. DETAILED DESCRIPTION OF THE INVENTION

[0009] A filter device will be described in detail below as an example of an electronic component according to an embodiment, with reference to the drawings. Note that identical or corresponding parts in the drawings are designated by the same reference numerals, and their description will not be repeated. Furthermore, the electronic component according to the embodiment is not limited to a filter device.

[0010] (Embodiment 1) [Filter device structure] First, a filter device according to embodiment 1 will be described with reference to the drawings. Fig. 1 is a perspective view of a filter device 100 according to embodiment 1. In Fig. 1, the short side direction of the filter device 100 is the X direction, the long side direction is the Y direction, and the height direction is the Z direction.

[0011] The filter device 100 is a rectangular parallelepiped chip component in which one inductor and one capacitor are stacked in the Z direction. As shown in FIG. 1, the filter device 100 is composed of an insulator 3 in which multiple insulating substrates (insulator layers) are stacked, on which a conductor pattern of an inductor L and an electrode pattern of a capacitor C are formed. The stacking direction of the insulating substrates is the Z direction, and the direction of the arrow indicates the upward direction. The insulating substrates are made of materials such as an insulating material containing borosilicate glass as a main component, or insulating resins such as alumina, zirconia, and polyimide resin. Furthermore, the interfaces between the multiple insulating substrates in the insulator 3 may not be clear due to processes such as baking and hardening.

[0012] In addition, the filter device 100 has an external electrode 4a (first external electrode) and an external electrode 4b (second external electrode) formed on the insulator 3 at two locations in the Y direction as shown in Fig. 1. The insulator 3 has a pair of main surfaces facing each other, and the lower main surface in Fig. 1 is the mounting surface, which faces the circuit board. In the first embodiment, the lower main surface in Fig. 1 is also referred to as the bottom surface, and the upper main surface in Fig. 1 is also referred to as the top surface.

[0013] The external electrodes 4a and 4b have electrode patterns formed not only on the bottom surface of the insulator 3, but also on the side surfaces connecting the main surfaces of the insulator 3. When the insulator 3 is viewed from the short side (XZ plane), the external electrodes 4a and 4b have a U-shape. Therefore, the external electrodes 4a provided on each of the opposing side surfaces of the insulator 3 are at the same potential due to the electrode patterns provided on the bottom surface of the insulator 3. Similarly, the external electrodes 4b provided on each of the opposing side surfaces of the insulator 3 are at the same potential due to the electrode patterns provided on the bottom surface of the insulator 3.

[0014] It has been explained that the external electrode 4a and the external electrode 4b both have electrode patterns provided on the opposing side surfaces of the insulator 3. However, as long as at least the external electrode 4b is configured to have an electrode pattern on the opposing side surface of the insulator 3, the external electrode 4a does not have to have an electrode pattern on both opposing side surfaces of the insulator 3, and in that case, the external electrode 4a may be formed on a side surface on the shorter side rather than on the same surface as the external electrode 4b.

[0015] The conductor pattern 1a (first conductor pattern) and the external electrode 4a of the inductor L are electrically connected via the wiring pattern 11a on the side surface of the insulator 3. On the other hand, the electrode pattern 5b (second electrode pattern) and the external electrode 4b of the capacitor C are electrically connected via the wiring patterns 51a (see FIG. 3) and 51b on the side surface of the insulator 3.

[0016] Inductor L has multiple conductor patterns 1a, 1b stacked parallel to the main surface of insulator 3, with each conductor pattern 1a, 1b electrically connected by via conductors 31, 32, etc. Capacitor C has multiple electrode patterns 5a, 5b stacked below inductor L with an insulating layer interposed between them. Capacitor C is located within insulator 3 at a position overlapping with portions of conductor patterns 1a, 1b when viewed from one of the main surfaces (top surface). Inductor L and capacitor C are connected in series within insulator 3 to form an LC series circuit.

[0017] 2 is a circuit diagram of a filter device 100 according to the first embodiment. The filter device 100 includes a first terminal P1, an inductor L connected to the first terminal P1, a capacitor C connected in series with the inductor L, and a second terminal P2 connected to the capacitor C. The first terminal P1 corresponds to the external electrode 4a shown in FIG. 1, and the second terminal P2 corresponds to the external electrode 4b shown in FIG. 1.

[0018] 2, parasitic inductances ESL1 and ESL2 are illustrated between the capacitor C and the second terminal P2. The parasitic inductances ESL1 and ESL2 are generated in the wiring patterns 51a and 51b that connect the electrode pattern 5b of the capacitor C to the external electrode 4b.

[0019] [Exploded view of the filter device] Next, the configuration of each layer will be described using an exploded plan view. Fig. 3 is an exploded plan view showing the configuration of the filter device 100 according to embodiment 1. First, as shown in Fig. 3, the conductor patterns 1a and 1b, the wiring patterns 11a, 51a, and 51b, and the electrode patterns 5a and 5b are each formed on insulating substrates 3a to 3d by a printing method.

[0020] Conductor pattern 1a, which constitutes part of inductor L, is formed on insulating substrate 3a. Conductor pattern 1a is formed clockwise from the upper left side of insulating substrate 3a in the figure, covering approximately three-quarters of the circumference. The starting end of conductor pattern 1a is electrically connected to external electrode 4a via wiring pattern 11a. Near the end of conductor pattern 1a, connecting portion 31a, which connects to via conductor 31, and connecting portion 32a, which connects to via conductor 32, are provided.

[0021] Conductor pattern 1b, which constitutes part of inductor L, is formed on insulating substrate 3b. Conductor pattern 1b is formed clockwise from the bottom side of insulating substrate 3b in the figure, making approximately three-quarters of a turn. Near the starting end of conductor pattern 1b, connection portion 31b that connects to via conductor 31 and connection portion 32b that connects to via conductor 32 are provided. Near the end of conductor pattern 1b, connection portion 33b that connects to via conductor 33 is provided. Inductor L, conductor patterns 1a and 1b are connected in series to form a coil with approximately 1.5 turns.

[0022] An electrode pattern 5a (first electrode pattern) that constitutes one electrode of the capacitor C is formed on the insulating substrate 3c. The electrode pattern 5a is provided in a position within the insulator 3 that overlaps with a portion of the conductor patterns 1a and 1b when viewed from above. In other words, the electrode pattern 5a is provided in a position that overlaps as little as possible with the opening of the inductor L that is formed by the conductor patterns 1a and 1b. The electrode pattern 5a has a connection portion 33c that connects to the via conductor 33.

[0023] An electrode pattern 5b that constitutes the other electrode of the capacitor C is formed on the insulating substrate 3d. The electrode pattern 5b is provided in a position within the insulator 3 that faces the electrode pattern 5a when viewed from above. The electrode pattern 5b is electrically connected to the external electrode 4b via wiring patterns 51a and 51b. Although the wiring patterns 51a and 51b are each illustrated as a single wire, they may each be composed of multiple wires.

[0024] As shown in Fig. 1, the external electrodes 4b are provided on opposite side surfaces of the insulator 3. The wiring patterns 51a and 51b electrically connect each external electrode 4b to the electrode pattern 5b. Because each external electrode 4b has the same potential, the wiring patterns 51a and 51b are connected in parallel between the second terminal P2 (external electrode 4b) and the capacitor C (electrode pattern 5b), as shown in the circuit diagram of Fig. 2. As a result, the parasitic inductances ESL1 and ESL2 generated by the wiring patterns 51a and 51b are connected in parallel, which effectively reduces the value of the parasitic inductance.

[0025] Furthermore, in a plan view from the top surface, a portion of the conductor pattern 1b overlapping the capacitor C has a portion parallel to one side (short side) of the insulator 3 opposite to the external electrode 4b. In FIG. 3, the portion of the conductor pattern 1b formed in the X direction on the right side of the drawing is parallel to one side (short side) of the insulator 3 opposite to the external electrode 4b. Therefore, the conductor pattern 1b includes a portion that is oriented in the same direction as the wiring patterns 51a and 51b, so that the wiring patterns 51a and 51b and the conductor pattern 1b are coupled to each other in both constructive and destructive directions. This facilitates adjustment of the filter characteristic values ​​of the filter device 100. The conductor pattern 1b may be coupled to not only the conductor pattern 1b but also the conductor pattern 1a with the wiring patterns 51a and 51b, or may be coupled only to the conductor pattern 1a if the conductor pattern 1b and the wiring patterns 51a and 51b are not coupled to each other in a positional relationship.

[0026] Furthermore, by arranging the electrode patterns 5a and 5b in positions that do not overlap as much as possible with the opening of the inductor L formed by the conductor patterns 1a and 1b, the magnetic field generated by the inductor L is not disturbed, and the filter device 100 can be realized with small components.

[0027] Furthermore, wiring patterns 51a and 51b are drawn out from two directions of electrode pattern 5b as shown in Fig. 3 to connect to external electrodes 4b provided on the opposing side surfaces of insulator 3. Therefore, even if insulating substrates are stacked with wiring patterns 51a and 51b misaligned in the direction of the short side of insulator 3 (stacking misalignment), fluctuations in parasitic inductance can be suppressed. As a result, variations in the characteristics of the filter device can be suppressed.

[0028] A specific description will be given with reference to the drawings. Fig. 4 is an exploded plan view of filter device 100 according to embodiment 1 when stacking misalignment occurs in one direction. Fig. 5 is an exploded plan view of filter device 100 according to embodiment 1 when stacking misalignment occurs in the other direction. Figs. 4 and 5 are the same as the exploded plan view shown in Fig. 3 except that electrode pattern 5b formed on insulating substrate 3d is misaligned. Therefore, the same components are designated by the same reference numerals and detailed description thereof will not be repeated.

[0029] 4, the position of the electrode pattern 5b formed on the insulating substrate 3d is shifted in the positive X direction (the direction of the arrow). As a result, the distance between the external electrode 4b on the upper side of the figure and the electrode pattern 5b is reduced, and the length of the wiring pattern 51a is shortened. Conversely, the distance between the external electrode 4b on the lower side of the figure and the electrode pattern 5b is increased, and the length of the wiring pattern 51b is increased.

[0030] 5, the position of the electrode pattern 5b formed on the insulating substrate 3d is shifted in the negative X direction (the opposite direction of the arrow). As a result, the distance between the external electrode 4b on the lower side in the figure and the electrode pattern 5b is reduced, and the length of the wiring pattern 51b is reduced. Conversely, the distance between the external electrode 4b on the upper side in the figure and the electrode pattern 5b is increased, and the length of the wiring pattern 51a is increased.

[0031] As an example, let us assume that the parasitic inductance ESL1 generated in wiring pattern 51a is 0.10 nH, the parasitic inductance ESL2 generated in wiring pattern 51b is 0.15 nH, and the total of the parallel-connected parasitic inductances ESL1 and ESL2 is 0.06 nH. In this case, if the increase or decrease in parasitic inductance due to stack misalignment is, for example, ±0.05 nH, the filter device 100 shown in FIG. 4 has a parasitic inductance ESL1 of 0.05 nH and a parasitic inductance ESL2 of 0.20 nH, and the total of the parallel-connected parasitic inductances ESL1 and ESL2 is 0.04 nH.

[0032] 5 has a parasitic inductance ESL1 of 0.15 nH and a parasitic inductance ESL2 of 0.10 nH, and the total of the parallel-connected parasitic inductances ESL1 and ESL2 is 0.06 nH. That is, in the filter device 100, when the parasitic inductance increases or decreases by ±0.05 nH due to stack misalignment, the total of the parallel-connected parasitic inductances ESL1 and ESL2 fluctuates between 0.04 nH and 0.06 nH.

[0033] On the other hand, when the external electrode 4b and the electrode pattern 5b are electrically connected only by the wiring pattern 51b without providing the wiring pattern 51a, the parasitic inductance ESL2 varies between 0.10 nH and 0.20 nH. Therefore, by connecting the wiring patterns 51a and 51b in parallel, the filter device 100 can reduce the variation in parasitic inductance due to processing variations in stack misalignment.

[0034] Next, a filter device capable of adjusting the inductance value by drawing out a wiring pattern from one direction of the electrode pattern 5b of the capacitor will be described. Fig. 6 is an exploded plan view showing the configuration of a modified example of the filter device according to the first embodiment. The filter device 100A shown in Fig. 6 has a configuration in which the external electrode 4b and the electrode pattern 5b are electrically connected only by the wiring pattern 51b without providing the wiring pattern 51a. Note that Fig. 6 is the same as the exploded plan view shown in Fig. 3 except that the wiring pattern 51a of the insulating substrate 3d is not provided. Therefore, the same components are designated by the same reference numerals and detailed description thereof will not be repeated.

[0035] In the wiring pattern 51b of the insulating substrate 3d, a current I2 flows that is substantially parallel to and in the same direction as the current I1 that flows in the conductor pattern 1b of the insulating substrate 3b toward the connection portion 33b. Therefore, the filter device 100A shown in Fig. 6 has the wiring pattern 51b through which the current flows in the same direction as the conductor pattern 1b, and therefore the self-induction of the inductor L is not hindered, and the total reactance can be increased.

[0036] 7 is an exploded plan view showing the configuration of another modified example of the filter device according to embodiment 1. In filter device 100B shown in FIG. 7, external electrode 4b and electrode pattern 5b are electrically connected only by wiring pattern 51a, without wiring pattern 51b being provided. Note that FIG. 7 is the same as the exploded plan view shown in FIG. 3 except that wiring pattern 51b of insulating substrate 3d is not provided. Therefore, the same components are designated by the same reference numerals and detailed description thereof will not be repeated.

[0037] In wiring pattern 51a of insulating substrate 3d, current I3 flows in a direction substantially parallel to and opposite to current I1 flowing in conductor pattern 1b of insulating substrate 3b toward connection portion 33b. Therefore, filter device 100B shown in Fig. 7 has wiring pattern 51a through which current flows in the opposite direction to conductor pattern 1b, thereby preventing self-induction of inductor L and reducing the total reactance.

[0038] As explained in the filter device 100A shown in FIG. 6 and the filter device 100B shown in FIG. 7, the inductance value of the inductor L can be adjusted by using only one wiring pattern, 51a or 51b, to electrically connect the external electrode 4b and the electrode pattern 5b, instead of two wiring patterns, 51a and 51b.

[0039] As described above, the filter device 100 according to the first embodiment includes an insulator 3, an inductor L, a capacitor C, and external electrodes 4a and 4b. The insulator 3 has a pair of opposing main surfaces and side surfaces connecting the main surfaces. The inductor L is formed by at least one conductor pattern 1a, 1b within the insulator 3. The capacitor C is provided in a position within the insulator 3 that overlaps with portions of the conductor patterns 1a, 1b when viewed from above from one of the main surfaces. The external electrode 4a is electrically connected to the inductor L. The external electrode 4b is electrically connected to the capacitor C and is provided on each of the opposing side surfaces of the insulator 3. The capacitor C includes an electrode pattern 5a electrically connected to the inductor L and an electrode pattern 5b electrically connected to each of the external electrodes 4b by at least one wiring pattern 51a, 51b. At least one wiring pattern 51a, 51b is parallel to portions of the conductor patterns 1a, 1b.

[0040] As a result, in the filter device 100 of embodiment 1, the electrode pattern 5b of the capacitor C is electrically connected to each external electrode 4b by at least one wiring pattern 51a, 51b, thereby reducing the effect of parasitic inductance occurring in the filter device 100.

[0041] To realize a filter device using small components, the inductor's conductor pattern must be formed to fill the entire outer frame of the insulator to ensure the designed inductance value, so the inductor must be stacked on top of the capacitor. However, if the inductor's conductor pattern is formed to fill the entire outer frame of the insulator, when viewed from the top surface of the insulator, depending on the shape of the capacitor and its relative positioning, eddy currents may be generated in the capacitor's electrodes, resulting in an insufficient Q value. However, in the filter device 100, the overlapping portions of the inductor L and capacitor C are limited to a portion of the conductor patterns 1a and 1b, thereby preventing eddy currents from being generated in the electrode patterns 5a and 5b and reducing the Q value.

[0042] The electrode pattern 5b of the capacitor C and each of the external electrodes 4b are preferably electrically connected by two wiring patterns 51a, 51b arranged in a straight line. Furthermore, when viewed from one of the main surfaces (top surface), portions of the conductor patterns 1a, 1b that overlap the capacitor C are preferably parallel to one side of the insulator 3 that faces the external electrode 4b. Furthermore, when viewed from one of the main surfaces (top surface), the wiring patterns 51a, 51b preferably partially overlap with the conductor patterns 1a, 1b. This facilitates adjustment of the filter design of the filter device 100.

[0043] The external electrodes 4b are at the same potential, so that the wiring patterns 51a and 51b, which generate the parasitic inductances ESL1 and ESL2, are connected in parallel.

[0044] The inductor L and the capacitor C constitute an LC series circuit. This results in a filter device 100 having an LC series circuit. In a filter using an LC series circuit, the series resonance frequency is used as the passband, and therefore, parasitic inductance can cause the resonance frequency to shift, which can lead to degradation of performance as a pass filter. Therefore, suppressing variations in parasitic inductance due to the wiring pattern of the capacitor C is particularly important in an LC series circuit.

[0045] (Embodiment 2) In the first embodiment, the filter device 100 has been described as a rectangular parallelepiped chip component in which the inductor L and the capacitor C are stacked in the Z direction. In the second embodiment, a filter device in which an inductor is further added will be described.

[0046] [Filter device structure] First, a filter device 200 according to a second embodiment will be described with reference to the drawings. Fig. 8 is a perspective view of the filter device 200 according to the second embodiment. In Fig. 8, the short side direction of the filter device 200 is the X direction, the long side direction is the Y direction, and the height direction is the Z direction. In the filter device 200 shown in Fig. 8, the same components as those in the filter device 100 shown in Fig. 1 are designated by the same reference numerals, and detailed description thereof will not be repeated.

[0047] The filter device 200 is a rectangular parallelepiped chip component in which two inductors and one capacitor are stacked in the Z direction. The filter device 200 has a pair of main surfaces facing each other, and the lower main surface in FIG. 8 is the mounting surface, which faces the circuit board. In the second embodiment, the lower main surface in FIG. 8 is also referred to as the bottom surface, and the upper main surface in FIG. 8 is also referred to as the top surface.

[0048] 8, the filter device 200 is composed of an insulator 3 in which a plurality of insulating substrates (insulator layers) are stacked, on which a first conductor pattern of a first inductor L1, a second conductor pattern of a second inductor L2, and an electrode pattern of a capacitor C are formed. The stacking direction of the insulating substrates is the Z direction, and the direction of the arrow indicates the upward direction. In the filter device 200, the capacitor C, the first inductor L1, and the second inductor L2 are stacked in this order in the Z direction.

[0049] As shown in FIG. 8, the filter device 200 has an external electrode 4a (first external electrode) and an external electrode 4b (second external electrode) formed on the insulator 3 at two locations in the Y direction. The first conductor patterns 1E and 1F of the first inductor L1 and the external electrode 4a are electrically connected to the side surface of the insulator 3 via wiring patterns 11E and 11F. Similarly, the second conductor patterns 2A and 2B of the second inductor L2 and the external electrode 4b are electrically connected to the side surface of the insulator 3 via wiring patterns 12A and 12B. The second conductor patterns 2C and 2D of the second inductor L2 and the external electrode 4a are electrically connected to the side surface of the insulator 3 via wiring patterns 12C and 12D. The electrode pattern 5b (second electrode pattern) of the capacitor C and the external electrode 4b are electrically connected to the side surface of the insulator 3 via wiring patterns 51a (see FIG. 10) and 51b.

[0050] The first inductor L1 has a plurality of first conductor patterns 1E-1H stacked parallel to the main surface of the insulator 3, and the first conductor patterns 1E-1H are electrically connected to each other by via conductors 31, 32, etc. The second inductor L2 has a plurality of second conductor patterns 2A-2D stacked parallel to the main surface of the insulator 3, and the second conductor patterns 2A-2D are electrically connected to each other by via conductors 34. The capacitor C has a plurality of electrode patterns 5a, 5b stacked below the first inductor L1 with an insulating layer interposed between them. The capacitor C is provided in the insulator 3 at a position overlapping with parts of the first conductor patterns 1G, 1H when viewed from one of the main surfaces (top surface). The filter device 200 configures a circuit in which the first inductor L1 and the capacitor C are connected in series within the insulator 3, and the second inductor L2 is connected in parallel to the first inductor L1 and the capacitor C.

[0051] FIG. 9 is a circuit diagram of a filter device 200 according to a second embodiment. The filter device 200 includes a first terminal P1, a first inductor L1 connected to the first terminal P1, a capacitor C connected in series with the first inductor L1, and a second terminal P2 connected to the capacitor C. The filter device 200 also includes a second inductor L2 connected in parallel to the first inductor L1 and capacitor C connected in series. The first inductor L1 and the second inductor L2 are magnetically coupled to each other (coupling coefficient k). As a result, a mutual inductance M occurs between the first inductor L1 and the second inductor L2. In FIG. 9, taking into account the generated mutual inductance M, an equivalent circuit is illustrated in which a mutual inductance +M is added to each of the first inductor L1 and the second inductor L2, and a mutual inductance −M is added to the first terminal P1. Of course, the filter device 200 is not limited to a configuration in which the first inductor L1 and the second inductor L2 are magnetically coupled to each other, and may be a configuration in which the first inductor L1 and the second inductor L2 are not magnetically coupled to each other.

[0052] The first terminal P1 corresponds to the external electrode 4a shown in Fig. 8, and the second terminal P2 corresponds to the external electrode 4b shown in Fig. 8. In the circuit diagram of the filter device 200 shown in Fig. 9, parasitic inductances ESL1 and ESL2 are illustrated between the capacitor C and the second terminal P2. The parasitic inductances ESL1 and ESL2 are generated in the wiring patterns 51a and 51b that connect the electrode pattern 5b of the capacitor C to the external electrode 4b.

[0053] [Exploded view of the filter device] Next, the configuration of each layer will be described using an exploded plan view. Fig. 10 is an exploded plan view showing the configuration of a filter device 200 pertaining to embodiment 2. First, as shown in Fig. 10, first conductor patterns 1E to 1H, second conductor patterns 2A to 2D, wiring patterns 12A to 12D, 11E, 11F, 51a, 51b, and electrode patterns 5a, 5b are each formed on insulating substrates 3A to 3J by a printing method.

[0054] A second conductor pattern 2A constituting a part of the second inductor L2 is formed on the insulating substrate 3A. The second conductor pattern 2A is formed so as to make approximately one full turn clockwise from the upper right side of the insulating substrate 3A in the figure. The starting end of the second conductor pattern 2A is electrically connected to the external electrode 4b via the wiring pattern 12A. A connecting portion 34A that connects to the via conductor 34 is provided at the end of the second conductor pattern 2A.

[0055] A second conductor pattern 2B that forms part of the second inductor L2 is formed on the insulating substrate 3B. The second conductor pattern 2B is formed so as to make approximately one full turn clockwise from the upper right side of the insulating substrate 3B in the figure. The starting end of the second conductor pattern 2B is electrically connected to the external electrode 4b via the wiring pattern 12B. A connecting portion 34B that connects to the via conductor 34 is provided at the end of the second conductor pattern 2B.

[0056] A second conductor pattern 2C that constitutes a part of the second inductor L2 is formed on the insulating substrate 3C. The second conductor pattern 2C is formed so as to make approximately one full turn clockwise from the top of the insulating substrate 3C in the figure. A connecting portion 34C that connects to the via conductor 34 is provided at the starting end of the second conductor pattern 2C. An end of the second conductor pattern 2C is electrically connected to the external electrode 4a via a wiring pattern 12C.

[0057] A second conductor pattern 2D that forms part of the second inductor L2 is formed on the insulating substrate 3D. The second conductor pattern 2D is formed so as to make approximately one full turn clockwise from the top of the insulating substrate 3D in the figure. A connecting portion 34D that connects to the via conductor 34 is provided at the starting end of the second conductor pattern 2D. An end of the second conductor pattern 2D is electrically connected to the external electrode 4a via a wiring pattern 12D.

[0058] The second inductor L2 has the second conductor patterns 2A and 2B connected in parallel and the second conductor patterns 2C and 2D connected in parallel, respectively, and the parallel-connected second conductor patterns 2A and 2B and the parallel-connected second conductor patterns 2C and 2D connected in series to form a coil with approximately two turns.

[0059] A first conductor pattern 1E constituting a part of the first inductor L1 is formed on the insulating substrate 3E. The first conductor pattern 1E is formed clockwise from the upper left side of the insulating substrate 3E so as to surround approximately three-quarters of the way around. The starting end of the first conductor pattern 1E is electrically connected to the external electrode 4a via the wiring pattern 11E. A connection portion 31E connected to the via conductor 31 and a connection portion 32E connected to the via conductor 32 are provided near the ending end of the first conductor pattern 1E.

[0060] A first conductor pattern 1F constituting a part of the first inductor L1 is formed on the insulating substrate 3F. The first conductor pattern 1F is formed clockwise from the upper left side of the insulating substrate 3F so as to surround approximately three-quarters of the circumference. The starting end of the first conductor pattern 1F is electrically connected to the external electrode 4a via the wiring pattern 11F. A connection portion 31F connected to the via conductor 31 and a connection portion 32F connected to the via conductor 32 are provided near the end of the first conductor pattern 1F.

[0061] A first conductor pattern 1G constituting a part of the first inductor L1 is formed on the insulating substrate 3G. The first conductor pattern 1G is formed clockwise from the bottom side of the insulating substrate 3G so as to surround approximately three-quarters of the way around. Near the starting end of the first conductor pattern 1G, a connection portion 31G that connects to the via conductor 31 and a connection portion 32G that connects to the via conductor 32 are provided. Near the end of the first conductor pattern 1G, a connection portion 33G that connects to the via conductor 33 is provided.

[0062] A first conductor pattern 1H constituting a part of the first inductor L1 is formed on the insulating substrate 3H. The first conductor pattern 1H is formed clockwise from the bottom side of the insulating substrate 3H in the figure, making approximately three-quarters of a turn. Near the starting end of the first conductor pattern 1H, a connection portion 31H that connects to the via conductor 31 and a connection portion 32H that connects to the via conductor 32 are provided. Near the ending end of the first conductor pattern 1H, a connection portion 33H that connects to the via conductor 33 is provided.

[0063] The first inductor L1 has first conductor patterns 1E and 1F connected in parallel, and first conductor patterns 1G and 1H connected in parallel, respectively, and the parallel-connected first conductor patterns 1E and 1F and the parallel-connected first conductor patterns 1G and 1H connected in series to form a coil of approximately 1.5 turns.

[0064] An electrode pattern 5a (first electrode pattern) that constitutes one electrode of the capacitor C is formed on the insulating substrate 3I. The electrode pattern 5a is provided in a position within the insulator 3 that overlaps with a portion of the first conductor patterns 1G and 1H in a plan view from the top surface side. In other words, the electrode pattern 5a is provided in a position that overlaps as little as possible with the opening of the first inductor L1 that is formed by the first conductor patterns 1G and 1H. The electrode pattern 5a has a connection portion 33I that connects to the via conductor 33.

[0065] An electrode pattern 5b that constitutes the other electrode of the capacitor C is formed on the insulating substrate 3J. The electrode pattern 5b is provided in a position within the insulator 3 that faces the electrode pattern 5a when viewed from above. The electrode pattern 5b is electrically connected to the external electrode 4b via wiring patterns 51a and 51b. Although the wiring patterns 51a and 51b are each illustrated as a single wire, they may each be composed of multiple wires.

[0066] As shown in FIG. 8, the external electrodes 4b are provided on opposite side surfaces of the insulator 3. The wiring patterns 51a and 51b electrically connect each external electrode 4b to the electrode pattern 5b. When each external electrode 4b is electrically connected by a pattern formed on the bottom surface, the external electrodes 4b are at the same potential. That is, the wiring patterns 51a and 51b are connected in parallel between the second terminal P2 (external electrode 4b) and the capacitor C (electrode pattern 5b) as shown in the circuit diagram of FIG. 9. As a result, the parasitic inductances ESL1 and ESL2 generated by the wiring patterns 51a and 51b are connected in parallel, which effectively reduces the value of the parasitic inductance. Furthermore, the filter device 200 has the same effects as the filter device 100 described in the first embodiment.

[0067] Next, a description will be given of a modified example of the filter device 200 in which the shape of the external electrodes is changed. The external electrodes 4a and 4b shown in Fig. 8 are U-shaped when viewed from the side surface (XZ plane) of the short side of the insulator 3, and no electrodes are provided on the side surface (XZ plane) of the short side of the insulator 3. However, the shape of the external electrodes is not limited to this, and they may be dog-bone-shaped external electrodes in which electrodes are also provided on the side surface (XZ plane) of the short side of the insulator 3.

[0068] Fig. 11 is an exploded plan view showing the configuration of a modified example of the filter device according to Embodiment 2. In a filter device 200A shown in Fig. 11, dogbone-shaped external electrodes 4c, 4d are used, and wiring patterns 22A-22D, 21E, and 21F are used to connect the external electrodes 4c, 4d to the first conductor patterns 1E, 1F and the second conductor patterns 2A-2D. Note that Fig. 11 is the same as the exploded plan view shown in Fig. 10 except for the changes in the external electrodes 4c, 4d and the wiring patterns 22A-22D, 21E, and 21F. Therefore, the same components are designated by the same reference numerals and detailed description thereof will not be repeated.

[0069] The second conductor pattern 2A of the insulating substrate 3A is electrically connected to the external electrode 4d via the wiring pattern 22A on the short side of the insulating substrate 3A on the right side in the figure. Similarly, the second conductor pattern 2B of the insulating substrate 3B is electrically connected to the external electrode 4d via the wiring pattern 22B on the short side of the insulating substrate 3B on the right side in the figure.

[0070] The second conductor pattern 2C of the insulating substrate 3C is electrically connected to the external electrode 4c via the wiring pattern 22C on the short side of the insulating substrate 3C on the left side in the figure. Similarly, the second conductor pattern 2D of the insulating substrate 3D is electrically connected to the external electrode 4c via the wiring pattern 22D on the short side of the insulating substrate 3D on the left side in the figure.

[0071] The first conductor pattern 1E of the insulating substrate 3E is electrically connected to the external electrode 4c via the wiring pattern 21E on the short side of the insulating substrate 3E on the left side in the figure. Similarly, the first conductor pattern 1F of the insulating substrate 3F is electrically connected to the external electrode 4c via the wiring pattern 21F on the short side of the insulating substrate 3F on the left side in the figure.

[0072] The first conductor pattern 1G of the insulating substrate 3G is electrically connected to the first conductor patterns 1E and 1F through the via conductors 31 and 32. Similarly, the first conductor pattern 1H of the insulating substrate 3H is electrically connected to the first conductor patterns 1E, 1F, and 1G through the via conductors 31 and 32.

[0073] The electrode pattern 5a (first electrode pattern) of the insulating substrate 3I constitutes one electrode of the capacitor C and has a connection portion 33I that connects to the via conductor 33.

[0074] The electrode pattern 5b (second electrode pattern) of the insulating substrate 3J constitutes the other electrode of the capacitor C, and is electrically connected to the opposing side of the external electrode 4d via wiring patterns 51a and 51b in parallel with parts of the first conductor patterns 1G and 1H. Furthermore, the insulating substrate 3J may have a wiring pattern 51c that is connected to the external electrode 4d in a direction different from that of the wiring patterns 51a and 51b.

[0075] The dog-bone-shaped external electrodes 4c and 4d described in the filter device 200A can also be applied to the filter devices 100, 100A, and 100B according to the first embodiment.

[0076] As described above, the filter device 200 according to the second embodiment further includes the second inductor L2 configured by at least one second conductor pattern within the insulator 3. This makes it possible to realize a filter device having two inductors and one capacitor within the insulator 3. In such a filter device, by suppressing the fluctuation in the parasitic inductance of the wiring pattern of the capacitor, the fluctuation in the LC series resonance frequency can be reduced and the pass characteristics of the filter device can be ensured, and at the same time, the fluctuation in the LC parallel resonance frequency can also be reduced, making it possible to satisfy the attenuation characteristics of the filter device.

[0077] The second inductor L2 is preferably connected in parallel to the first inductor L1. Also, the second inductor L2 is preferably magnetically coupled to the first inductor L1. In the filter device 200A, an example has been shown in which two conductor patterns are connected in parallel, but one conductor pattern may be connected in parallel, or three or more conductor patterns may be connected in parallel.

[0078] 10, a filter device 200 has been described that functions as a bandpass filter that passes Wi-Fi (registered trademark) signals in the 5 GHz band and blocks fifth-generation n78 (3.7 GHz band) and n79 (4.5 GHz band) signals. In the following modified example, a filter device that functions as a bandpass filter that passes Wi-Fi (registered trademark) signals in the 2.4 GHz band and blocks GPS band (1.1 to 1.6 GHz) signals will be described. FIG. 12 is a cross-sectional view showing the configuration of another modified example of the filter device according to the second embodiment. In the filter device 200B shown in FIG. 12, a capacitor C1, a first inductor L1, and a second inductor L2 are laminated in this order in the Z direction, and the first inductor L1 and the second inductor L2 are magnetically coupled.

[0079] Specifically, the second inductor L2 has three layers of second conductor patterns 2 stacked parallel to the main surface of the insulator 3, and each of the second conductor patterns 2 is electrically connected by a via conductor 30. The first inductor L1 has four layers of first conductor patterns 1 stacked parallel to the main surface of the insulator 3, and each of the first conductor patterns 1 is electrically connected by a via conductor 30. The capacitor C1 has multiple electrode patterns 5 stacked below the first inductor L1 with an insulating layer interposed between them.

[0080] The filter device 200B shown in FIG. 12 handles signals in a lower frequency band than the filter device 200 shown in FIG. 10, and therefore the capacitor C1 is larger. As the capacitor C1 becomes larger, the area of ​​the electrode pattern 5 also increases. When viewed from the top, the electrode pattern 5 overlaps more than half of the openings of the first inductor L1 and the second inductor L2. Therefore, in the filter device 200B, a connection layer S is provided between the first inductor L1 and the capacitor C1 to ensure a distance between the first inductor L1 and the capacitor C1 in the stacking direction. For example, the distance between the first inductor L1 and the capacitor C1 in the stacking direction is set longer than the distance between the first inductor L1 and the second inductor L2 in the stacking direction. The connection layer S is composed of multiple conductive patterns S1 and via conductors S2. Providing the connection layer S in this manner facilitates the passage of magnetic fields generated by the first inductor L1 and the second inductor L2, thereby suppressing a decrease in inductance value and a deterioration in the Q factor. In the filter device 200B, the stacking order of the first inductor L1 and the second inductor L2 may be reversed. The configuration of the connection layer S can also be applied to other embodiments.

[0081] [Variations] The conductive patterns of the inductor L, first inductor L1, and second inductor L2 described so far are rectangular. When realizing a filter device using a small component, a rectangular conductor pattern is adopted because a high inductance value can be ensured by forming the conductor pattern over the entire outer frame of the insulator 3. However, the shape of the conductive pattern is not limited to a rectangular shape, and may be a polygonal shape such as an octagon, or a curved shape such as an ellipse.

[0082] Fig. 13 is an exploded plan view showing the configuration of a filter device 100C according to Modification 1. The filter device 100C is a rectangular parallelepiped chip component in which one inductor and one capacitor are stacked in the Z direction. As shown in Fig. 13, the filter device 100C is made up of an insulator 3 in which a plurality of insulating substrates 3a to 3d, on which a conductor pattern of an inductor L and an electrode pattern of a capacitor C are formed, are stacked. In Fig. 13, the same components as those in the exploded plan view shown in Fig. 3 are designated by the same reference numerals, and detailed description thereof will not be repeated.

[0083] A conductor pattern 1a that forms part of the inductor L is formed on the insulating substrate 3a. The conductor pattern 1a is octagonal rather than rectangular. A part of the conductor pattern 1a that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 13, the direction Da of the part of the conductor pattern 1a and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0084] A conductor pattern 1b that forms part of the inductor L is formed on the insulating substrate 3b. The conductor pattern 1b is octagonal rather than rectangular. A part of the conductor pattern 1b that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 13, the direction Db of the part of the conductor pattern 1b and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0085] Next, Fig. 14 is an exploded plan view showing the configuration of a filter device 100D according to Modification 2. The filter device 100D is a rectangular parallelepiped chip component in which one inductor and one capacitor are stacked in the Z direction. As shown in Fig. 14, the filter device 100D is composed of an insulator 3 in which a plurality of insulating substrates 3a to 3d, on which a conductor pattern of an inductor L and an electrode pattern of a capacitor C are formed, are stacked. In Fig. 14, the same components as those in the exploded plan view shown in Fig. 3 are designated by the same reference numerals, and detailed description thereof will not be repeated.

[0086] A conductor pattern 1a that forms part of the inductor L is formed on the insulating substrate 3a. The conductor pattern 1a is hexagonal rather than rectangular. A part of the conductor pattern 1a that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 14, the direction Da of the part of the conductor pattern 1a and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0087] A conductor pattern 1b that forms part of the inductor L is formed on the insulating substrate 3b. The conductor pattern 1b is hexagonal rather than rectangular. A part of the conductor pattern 1b that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 14, the direction Db of the part of the conductor pattern 1b and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0088] 15 is an exploded plan view showing the configuration of a filter device 100E according to Modification 3. The filter device 100E is a rectangular parallelepiped chip component in which one inductor and one capacitor are stacked in the Z direction. As shown in FIG. 14, the filter device 100E is formed of an insulator 3 in which a plurality of insulating substrates 3a to 3d, on which a conductor pattern of an inductor L and an electrode pattern of a capacitor C are formed, are stacked. In FIG. 15, the same components as those in the exploded plan view shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will not be repeated.

[0089] A conductor pattern 1a that forms part of the inductor L is formed on the insulating substrate 3a. The conductor pattern 1a is elliptical rather than rectangular. A part of the conductor pattern 1a that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 15, the direction Da of the part of the conductor pattern 1a and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0090] A conductor pattern 1b that forms part of the inductor L is formed on the insulating substrate 3b. The conductor pattern 1b is elliptical rather than rectangular. A part of the conductor pattern 1b that overlaps with the capacitor C has a portion that is parallel to one side (short side) of the insulator 3 that faces the external electrode 4b. Therefore, as shown in FIG. 15, the direction Db of the part of the conductor pattern 1b and the wiring direction Dd of the wiring patterns 51a and 51b on the insulating substrate 3d are approximately parallel to each other.

[0091] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0092] 3 insulator, 4a to 4d external electrodes, 10 circuit board, 100, 100A to E, 200, 200A filter device, C capacitor, L1 first coil, L2 second coil.

Claims

1. an insulator having a pair of opposing main surfaces and a side surface connecting the main surfaces; a first inductor formed by at least one first conductor pattern within the insulator; a second inductor formed by at least one second conductor pattern within the insulator; a capacitor provided in the insulator at a position overlapping a portion of the first conductor pattern when viewed from one of the principal surfaces; a first external electrode electrically connected to the first inductor; a second external electrode electrically connected to the capacitor and provided on each of the opposing side surfaces of the insulator; the first inductor and the capacitor form an LC series circuit; the second inductor is connected in parallel to the LC series circuit and is magnetically coupled to the first inductor; The capacitor is a first electrode pattern electrically connected to the first inductor; a second electrode pattern electrically connected to each of the second external electrodes by at least one wiring pattern; At least one of the wiring patterns is parallel to a portion of the first conductor pattern.

2. 2. The electronic component according to claim 1, wherein the second electrode pattern of the capacitor and each of the second external electrodes are electrically connected by two of the wiring patterns arranged in a straight line.

3. 3. The electronic component according to claim 1, wherein, when viewed in a plan view from one of the principal surfaces, a portion of the first conductor pattern that overlaps with the capacitor is parallel to one side of the insulator that faces the second external electrode.

4. 3 . The electronic component according to claim 1 , wherein the wiring pattern partially overlaps with the first conductor pattern when viewed from one of the main surfaces.

5. 3. The electronic component according to claim 1, wherein each of the second external electrodes has the same potential.

6. 3. The electronic component according to claim 1, wherein the capacitor, the first inductor, and the second inductor are stacked in this order in a direction perpendicular to the main surface.

7. the second external electrode is formed on a first side surface and a second side surface that are opposed to each other among the side surfaces, and on a third side surface that is sandwiched between the first side surface and the second side surface, The electronic component according to claim 1 , wherein one of the two or more formed wiring patterns is electrically connected to the second external electrode on the third side surface.

8. The electronic component according to claim 7 , wherein a distance between the capacitor and the first inductor in a stacking direction is longer than a distance between the first inductor and the second inductor in the stacking direction.

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