quantum error correction

Abstract

To provide a quantum error correction method.SOLUTION: A quantum error correction method including correcting a stream of syndrome measurements produced by a quantum computer comprises receiving a layered representation of error propagation through quantum error detection circuits, where the layered representation comprises a plurality of line circuit layers that each represent a probability of local detection events in a quantum computer associated with one or more potential error processes in the execution of a quantum algorithm. During execution of the quantum algorithm, the method comprises: receiving one or more syndrome measurements from quantum error detection circuits; converting the syndrome measurements into detection events written to an array that represents a patch of quantum error correction circuits at a sequence of steps in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events according to the stored line circuit layers; and causing correction of the syndrome measurements based on the determined errors.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE The present disclosure relates to methods for quantum error correction, and in particular to methods for determining and correcting errors in arrangements of qubits that execute quantum algorithms in a quantum computer. [Background technology]

[0002] A quantum computer is a computing device that uses quantum superposition and entanglement to solve certain classes of problems faster than classical computers. The building block of a quantum computer is the qubit, a two-level system whose state can be in a superposition of two states, rather than only one of those two states as in the case of a classical bit.

[0003] Quantum algorithms are algorithms that run on quantum computers. During the execution of these algorithms on quantum computers, errors can be introduced from several sources, including decoherence and noise. Due to the so-called "no cloning theorem," classical error detection and correction techniques that involve making multiple copies of a state are inappropriate. Instead, quantum error detection and correction techniques involve entangling a qubit with several other qubits and performing measurements on a subset of the entangled qubits to identify when an error has occurred. Summary of the Invention [Means for solving the problem]

[0004] According to a first aspect, a method of correcting a stream of syndrome measurements generated by a quantum computer is described, the method comprising the steps of receiving a hierarchical representation of error propagation through a quantum error detection circuit in the quantum computer, the hierarchical representation including a plurality of wire circuit layers, each wire circuit layer representing a probability of a local detection event in the quantum computer associated with one or more potential error processes in an execution of a quantum algorithm; and during the execution of the quantum algorithm, receiving one or more syndrome measurements from a quantum error detection circuit in the quantum computer, converting the syndrome measurements into detection events that are written to an array, the array representing patches of the quantum error correction circuit at successive steps in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events relying on the stored wire circuit layers; and providing corrections to the syndrome measurements based on the determined errors.

[0005] The method may further include constructing a hierarchical representation of error propagation through the quantum error correction circuit prior to execution of the quantum algorithm.

[0006] Constructing a hierarchical representation of error propagation through the quantum error detection circuit may include determining, for one or more quantum gates in the quantum circuit, one or more potential detection events associated with each potential error process occurring at the quantum gate; associating one or more lines with each potential error process, each line connecting a potential detection event associated with the potential error process to another potential detection event associated with the same potential error process or to a boundary of the quantum circuit; and merging similar lines to form one or more merged lines, wherein a plurality of unique line circuit layers are constructed from the plurality of merged lines.

[0007] Each line may be associated with a weight that indicates the probability of the associated potential error process. The weights may be discretized.

[0008] Merging similar lines may include joining lines that have the same start and end points, the same direction and length, and / or at least one common potential error associated with each of the lines.

[0009] Potentially erroneous processes that are not common to the similar lines that form the merged line may be removed from association with said merged line.

[0010] The detected events may be written to the array in a circular manner.

[0011] The array may include multiple layers, the number of layers being a power of two.

[0012] The array may be stored in a processor cache during execution of the quantum algorithm.

[0013] The array may represent a local patch of quantum error correction circuitry in a quantum computer.

[0014] Determining errors in the execution of the quantum computing algorithm may include using an exact match process.

[0015] Determining errors in the execution of the quantum computing algorithm includes pairing detected events in arrays connected by one or more lines in one or more of the line circuit layers using a minimum weight perfect match process.

[0016] Determining errors in the execution of the quantum computing algorithm may include matching one or more detected events with boundaries of the sequence using a minimum weight perfect match.

[0017] The step of determining an error in the execution of the quantum computing algorithm may include at least one of the steps of searching the array around the selected detection event to find an untouched detection event and pairing the selected detection event with the untouched detection event, and / or searching the array around the selected detection event to find a previously searched region associated with a different detection event and pairing the selected detection event with the different detection event.

[0018] Searching the array around a selected detected event may be guided by a line circuit layer.

[0019] The hierarchical representation may be constructed by a separate computer.

[0020] According to further aspects, a system is also described that includes a quantum computer for executing a quantum algorithm, the quantum computer comprising a plurality of quantum error detection circuits, and one or more classical processing cores, the set of one or more classical processing cores configured to perform any of the methods described herein.

[0021] The system may further comprise one or more additional classical processing cores configured to construct a hierarchical representation of error propagation through quantum error detection circuitry in the quantum computer.

[0022] According to a further aspect, a computer program product is also described that, when executed by a processing core, causes the processing core to perform any of the methods described herein. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a diagram illustrating an example of a schematic of a quantum computing system. [Figure 2] FIG. 1 is a flow diagram of an overview of a method for quantum error correction. [Figure 3] FIG. 10 is a diagram showing an example of a three-dimensional data structure representing multiple syndrome measurements. [Figure 4]FIG. 1 is a flow diagram of an example of a method for generating a hierarchical representation of potential errors of a quantum algorithm. [Figure 5] FIG. 1 shows an example of a list of potential errors and associated detection events that may occur in a quantum gate. [Figure 6] 1 is a flowchart of an example of a method for determining errors in the execution of a quantum algorithm from detected events. DETAILED DESCRIPTION OF THE INVENTION

[0024] FIG. 1 illustrates a schematic example of one embodiment of a quantum computer 100 .

[0025] Quantum computer 100 comprises a quantum computing layer 102, a control layer 104, and a classical processing layer 106.

[0026] Quantum computing layer 102 comprises an array of quantum elements or qubits 108 configured to perform quantum computing algorithms. Quantum elements or qubits 108 comprise a coexisting system of data qubits and syndrome qubits (also referred to herein as measurement qubits). Quantum computing layer 102 further comprises a plurality of quantum gates (not shown) for performing operations on qubits 108. In some embodiments, the quantum computing layer is in the form of a two-dimensional array of quantum elements 108.

[0027] The quantum devices or qubits 108 may be, for example, superconducting qubits. The quantum computing layer 102 is kept at a temperature low enough to maintain coherence between qubits throughout the execution of a quantum algorithm (e.g., below 20 mK). To facilitate high coherence, the qubits may be fabricated cleanly. The qubit configuration may also be chosen to enhance coherence. In embodiments in which superconducting qubits are used, the temperature is kept below the superconducting critical temperature. To improve coherence, the temperature may be kept well below the superconducting critical temperature. In this specification, the terms "qubit" and "quantum device" will be used interchangeably.

[0028] A control layer 104 comprising a plurality of control elements 110 is interposed between the quantum computing layer 102 and the classical processing layer 106. The control elements 110 receive raw measurement data from the qubits 108 in the quantum computing layer 102 and convert them to binary measurement data for use in the classical processing layer 106. The control elements 110, in some embodiments, can also issue instructions to the quantum elements 108, for example, instructing a quantum gate (not shown) to perform a qubit rotation. In some embodiments, each control element 110 is connected to approximately six quantum elements 108. The control elements 110, in some embodiments, are field programmable gate arrays (FPGAs).

[0029] The classical processing layer 106 comprises an array of processing cores 112. The classical processing layer 106 is coupled to the quantum computing layer 102 via the control layer 104. The processing cores 112 in the classical computing layer 106 are associated with localized patches 114 of qubits 108. The localized patches 114 comprise multiple qubits 108 grouped together. In some embodiments, the patch size is approximately 100 qubits. Each processor core comprises a central processing unit (“CPU” or “processor”) and on-chip cache memory in the form of L1 and L2 caches (referred to herein as “processor cache”). The processing cores 112 in the classical processing layer 106 are coupled to adjacent processing cores 112 in the classical processing layer 106, allowing the processing cores 112 to exchange data with their neighboring cores. In some embodiments, the processing cores 112 form a two-dimensional array of processing cores 112 within the classical processing layer 106.

[0030] Classical processing cores 112 are provided with dedicated assembly instructions that, when executed by a processor in a processor core, cause the processor to access the processor cache of an adjacent core, which can lead to low latency communication between adjacent cores since no complex memory controller is required.

[0031] In use, quantum computing layer 102 executes a quantum computing algorithm, such as Shor's algorithm or the Deutsch-Josa algorithm. Syndrome qubits in quantum computing layer 102 interact with their neighboring data qubits to generate raw measurement data. The raw measurement data is sent to control elements 110 in control layer 104. Control elements 110 convert the raw measurement data to binary measurement data and stream the binary measurement data to processing cores 112 in classical processing layer 106.

[0032] Classical processing layer 106 converts the binary measurement data from control layer 104 into parities of the measured quantum states of qubits 108 in quantum computing layer 102. These parities are then processed by classical processing layer 106 to determine any quantum errors and / or required corrected parities for quantum elements 108 in quantum computing layer 102. The determined corrections can then be further processed to determine and apply the required corrective action. In some embodiments, this further processing can occur in an additional classical processing layer (not shown).

[0033] Figure 2 shows a flow diagram of an example method for correcting errors in a quantum computer. In what follows, the method will be described with respect to the quantum computer in Figure 1. In general, however, it can be done by any quantum computing system that provides syndrome measurements from qubits to one or more classical processing cores.

[0034] The method (also referred to herein as a quantum error correction method) corrects a stream of measurement data obtained from syndrome qubits in a quantum computer. In some embodiments, the method is used to correct errors in a two-dimensional array of qubits, such as the quantum computing layer described above with respect to FIG. 1. In other embodiments, the method is applicable to a one-dimensional array of qubits.

[0035] At operation 115, classical processing core 112 in classical processing layer 106 receives a hierarchical representation of error propagation through quantum error detection circuitry in quantum computer 100, where the hierarchical representation includes multiple line circuit layers, each line circuit layer representing the probability of a local detection event in the quantum computer associated with one or more potential error processes in the execution of the quantum algorithm.

[0036] In some embodiments, the hierarchical representation includes one or more layers (also referred to herein as line circuit layers). Each line circuit layer represents one or more potential detection events that may occur during a single error detection at a stage of the quantum algorithm. For example, a layer may include a representation of all detection events that may occur at a syndrome qubit during a single error detection during execution of the quantum algorithm.

[0037] Resulting from each of one or more potential detection events in a stratum is a set of weighted lines connecting that detection event to one or more other potential detection events. The other potential detection events may occur in the same false detection round as the detection event from which the line originates, and therefore may be in the same stratum. The other detection events may also occur in other false detection rounds.

[0038] The weight of each line represents the probability of detection events at each end of the line occurring together as a result of an error. In some embodiments, the lines are weighted so that high probability lines have lower weights than low probability lines. For example, the lines can be weighted according to: w i =-Clnp i , During the ceremony lol i is the weight of the i-th line, and p i is the probability associated with the i-th line, and C is a constant.

[0039] The hierarchical representation is predetermined based on knowledge of the quantum algorithm and possible errors that may occur during its execution. By predetermined, it is meant that the hierarchical representation is determined before execution of the quantum algorithm begins. In some embodiments, the hierarchical representation is constructed by a computing system separate from the quantum computing system. For example, the hierarchical representation may be constructed by a remote computing system based on knowledge of the quantum algorithm that will be run on the quantum computing system. The hierarchical representation can be transmitted from the remote computing system to the quantum computing system prior to execution of the quantum algorithm.

[0040] In some embodiments, the hierarchical representation is chosen so that the representation for each local patch of quantum devices in the quantum computing layer fits into the processor cache of the corresponding processor core in the first classical computing layer. This can reduce or even eliminate the number of computationally slow RAM lookups performed by the processor cores in the classical computing layer, speeding up error correction. The construction of the hierarchical representation will be described in more detail below with respect to FIG. 4.

[0041] At operation 116, the quantum computer begins executing a quantum algorithm. The quantum algorithm is executed on the quantum computer. In some embodiments, the quantum computer executed the quantum algorithm on a quantum computing layer, as described with respect to FIG. 1. The quantum computer executes the quantum algorithm with a surface code used for error correction. The surface code can be visualized as a large checkerboard. Each square represents a qubit. The white squares correspond to qubits used to store data and are called data qubits. The black squares correspond to qubits used to check for errors in their four neighboring data qubits and are called measurement or syndrome qubits. Computation is achieved by turning regions of the surface code on and off. Physically, this involves causing measurement qubits to stop interacting with data qubits in specific regions of the quantum computing layer.

[0042] During execution of a quantum algorithm, syndrome qubits make measurements on adjacent data qubits to generate syndrome measurements. These measurements can be transmitted to a classical processing layer for processing to determine whether any errors occurred in the execution of the quantum computing algorithm. In some embodiments, the syndrome measurements are transmitted to the classical processing layer via a control layer.

[0043] Multiple measurements are taken sequentially in time. The results of this method can be visualized as operating in a two-dimensional (for one-dimensional arrays of qubits) or three-dimensional (for two-dimensional arrays of qubits) data structure, sometimes called space-time or volume.

[0044] In operation 118, classical processing core 112 receives one or more syndrome measurements from a quantum error detection circuit in the quantum computer.

[0045] In some embodiments, the syndrome measurements pass through a control layer in the quantum computing system, which converts the raw syndrome measurement data into binary measurement data that can be processed by the classical processing cores, and this binary syndrome measurement data is transmitted from the control layer to the classical processing cores for further processing.

[0046] In some embodiments, the classical processing core receives the syndrome measurement data in its raw form.

[0047] In operation 120, classical processing cores 112 convert the syndrome measurements into an array of detected events that are written to an array in each processing core, which array represents a patch of quantum error correction circuitry at a succession of steps in the quantum algorithm.

[0048] The array in each processor core is constructed from the hierarchical representation by constructing an array from layers representing steps of the quantum algorithm. As new rounds of error detection are performed, each processor core adds layers to the array representing that round. Within the array, a particular layer may be repeated multiple times, either consecutively or not, depending on the quantum algorithm being performed.

[0049] In some embodiments, the arrays are written circularly to processor caches of processing cores 112. Each processor cache stores an array representing a local patch of qubits associated with that processing core 112.

[0050] In some embodiments, a detection event is determined to have occurred when a change in the syndrome measurement is detected compared to a previous syndrome measurement. The change in the value of the syndrome measurement indicates the end of an error chain. The determined detection event is written to an array.

[0051] In operation 122, classical processing core 112 determines one or more errors in the execution of the quantum algorithm from the detected events using the exact match and the stored line circuit layer.

[0052] Errors in the execution of the quantum computing algorithm are determined by matching pairs of detected events in the sequence, or by matching detected events to abstract boundaries of the sequence. Pairs are matched to find the most likely matches.

[0053] Pairing of detected events is performed by processing cores in the classical processing layer: each processing core attempts to match detected events in its sequence with detected events in the same sequence, with detected events in the sequences of adjacent processing cores, and / or with the abstract boundary of the quantum circuit.

[0054] In operation 124, corrections are made to the syndrome measurements based on the determined errors.

[0055] Figure 3 illustrates an example of a three-dimensional data structure representing multiple syndrome measurements. The three-dimensional data structure is in the form of an array 126. Array 126 comprises multiple wiring layers 128 (not all layers are labeled in Figure 3). Each layer 128 represents one syndrome measurement on a local patch of qubits made during execution of a quantum algorithm.

[0056] Array 126 is constructed from line circuit layers 128 in a hierarchical representation. Each layer 128 comprises a plurality of points 130 (not all points are labeled in FIG. 3 ) and a plurality of lines 132 (not all lines are labeled in FIG. 3 ). Each point in the array corresponds to a potential error detection event in a syndrome qubit during execution of a quantum algorithm. One or more lines 132 emanate from each point 130 in the array. The lines 132 connect pairs of points in the array that correspond to detection events resulting from known potential errors in the execution of the quantum algorithm.

[0057] During execution of a quantum algorithm, an array 126 is constructed in a classical processing core that represents a local patch of quantum devices. The array 126 is constructed from a hierarchical representation. In some embodiments, such as the illustrated embodiment, the array 126 is written cyclically to a processor cache of the processor core. A break in the array indicates the layer that represents the error detection measurement for the current round.

[0058] As measurement data streams into the processor core, detected events 134 (only some of which are labeled in the figure) are identified and written to an array. The processor core attempts to pair these detected events 134 with the lines 132 that originate from them. In an embodiment in which the lines 132 are weighted so that higher probabilities of a line 132 occurring have lower weights, detected events 134 are paired using minimum-weight exact matches.

[0059] 4 shows a flow diagram of an example of a method for generating a hierarchical representation of the potential errors of a quantum algorithm. Prior to execution of a quantum algorithm, the data structures required for the algorithm are constructed.

[0060] In operation 136, the quantum circuit used to execute the quantum algorithm is input. An input file describing the quantum circuit used to implement quantum error detection is read into the classical computer, or is first generated and then read. The input file describes the gate operations performed by the qubits in the quantum computer to generate each round of syndrome measurements and / or to execute the quantum algorithm.

[0061] In operation 138, potential error detection events in the quantum circuit are determined. For each gate in the circuit, one or more possible error processes are simulated. In some embodiments, all potential errors in the gate are simulated. For single-qubit gates, single-qubit errors are simulated, and for two-qubit gates, two-qubit errors are simulated.

[0062] The resulting detection events at one or more of the syndrome qubits are then determined. A detection event is a point in space and time at which the stream of measurements from a syndrome qubit changes value. The result is a list of all gate error processes.

[0063] Each potential error is associated with a list of detection events that result from it. In some embodiments, each error will have between 0 and 4 detection events associated with it. Figure 5 illustrates an example of a list of detection events associated with potential errors that may occur in quantum gate 140.

[0064] During the execution of a quantum algorithm, several errors 142 may occur in quantum gates 140 in the quantum circuit. These errors are simulated by a classical computer, and for each error the resulting detection events 144 in the syndrome qubits in the quantum circuit are determined.

[0065] 4, the error list is broken down into shorter error lists in operation 146. For each error with three or more associated detected events, this involves building a detected event list from other lists of detected events associated with other errors that have only two associated detected events.

[0066] At operation 148, a "prior line" is associated with each list of errors. For each error associated with two detected events, a "prior line" is associated that connects the two detected events. For each error associated with a detected event, a prior line is associated that leads to an abstract boundary in space-time.

[0067] Each of these types of priors is assigned the total probability of its generation error occurring. Errors associated with three or more detection events are associated with a list of priors that collectively encompass those detection events. In some embodiments, multiple different lists of priors can exactly encompass a list of detection events, and all lists are found. If there are N lists, each prior in each list is assigned 1 / N of its generation error probability.

[0068] At operation 150, priors are merged. For example, if two priors begin and end at the same location in space-time, they are replaced with a single prior having the original two total probabilities. This process continues until no priors can be merged. In addition to the total probabilities, the merged prior maintains a list of all errors that would produce a detected event at their endpoints.

[0069] In operation 152, the priors are converted into lines. Every prior that does not end on an abstract boundary potentially has two lines associated with it. A prior connects two specific locations in spacetime. In contrast, lines are vectors. For example, a single time-axis parallel prior can result in two lines, one pointing to the future and one pointing to the past. However, a prior that ends on an abstract boundary can potentially only result in a single line. Each line keeps a list of all errors leading up to the prior, but the error locations are made relative rather than absolute. Each error is propagated back to the beginning of the circuit with which it is associated, forming a circuit-independent list of errors for each original error.

[0070] In some embodiments, a prior line is converted to a line if the new line is oriented in a different direction or has a different length than any previous line, if the new line is oriented in the same direction and has the same length as a previous line but has a different total probability, or if the new line is oriented in the same direction, has the same length, and has the same total probability as one or more existing lines but does not have an error list in common with any of those lines. Each point in space-time is thus associated with a line list containing zero or more entries. The total number of times each line appears in a list (the line's "count") is recorded. Some lines have much higher counts than others.

[0071] In operation 154, similar lines are merged. Lines are determined to be similar if they point in the same direction, have the same length, and / or share one or more errors. In some embodiments, all three conditions are required for lines to be determined to be similar. Errors that are not common to both lines are discarded. The probability p of a merged line is l is set to be:

[0072]

number

[0073] where p1 is the probability associated with the first line, p2 is the probability associated with the second line, N1 is the count of the first line, and N2 is the count of the second line.

[0074] In some embodiments, when there are three or more lines that are determined to be similar, the pair with the smallest total count (N1 + N2) is chosen for merging, which minimizes the impact of information-loss merging.

[0075] In some embodiments, the lines are combined until there are fewer than 256 unique lines. By combining the lines, the total number of lines can be reduced, simplifying the identification of errors in the execution of the quantum algorithm. Reducing the number of lines can also reduce the size of the data structures used for quantum error correction. In some embodiments, the size of the data structures can be reduced to fit into the processor cache of a processor core. This can speed up the execution of error correction, as fewer or even no external memory accesses will be used. This therefore leads to an improvement in the field of quantum error correction in that less processing resources—memory and processing cycles—are required than in systems that do not implement the systems and methods described herein.

[0076] In operation 156, "jigsaw pieces" are constructed from the unique lines. The circuit description may include instructions such as "repeat this series of circuit layers n times," so that the true data structure at every step can be made from the smallest number of conveniently constructable jigsaw pieces that can be repeated to form a data structure corresponding to the complete circuit. The number of pieces may vary from step to step. This decomposition into repeated pieces is necessary because the total number of repetitions of different parts of the circuit can be large, and it would not be possible to construct and manipulate an undecomposed representation of each step.

[0077] The connected lines are used to construct a line circuit layer in operation 158. Once the final compressed list of lines is obtained, a unique layer of the minimum number of lines required to describe the complete data structure can then be constructed. Only the shortest error list per line is kept.

[0078] The result is a highly compressed data structure representing the error detection portion of the quantum circuit that can fit into the processor cache of a processor core. In some embodiments, the data structure is small enough to fit into the L1 cache of a processor core. Each line in each layer represents an approximation of the total probability of observing a detection event at the end points of the line. Detection events in the quantum circuit occur at the end points of the line.

[0079] A full implementation of the algorithm considers around 100 qubits per local patch, potentially performing millions of error detections during the operation of the quantum computer. The algorithm converts the stream of syndrome measurements from the quantum computer into a smaller number of detection events. The detection events are randomly distributed in space-time. Rather than storing these detection events in a large space-time, in some embodiments, only 32 are kept, each with enough space for a 16x16 array of qubits. In some embodiments, it may be advantageous for the array dimensions to all be powers of two.

[0080] Specifically, in an embodiment where 32 layers are stored, detection events associated with detection circuit 0 would be stored in space-time layer 0, as would detection events associated with detection circuits 32, 64, etc. The cyclic use of a small amount of space-time, with a size that is a power of two, allows the direction and length of each line to be represented using a single 2-byte integer. Each space-time location can be thought of as a voxel, and given the index of any voxel, the index of any other voxel can be calculated by adding the 2-byte integers and discarding any unnecessary high-order bits. This allows for very fast processing. Furthermore, because the data structure fits into the L1 cache, fewer or even no computationally expensive main RAM accesses are used, speeding up the method as well.

[0081] During execution of the algorithm, measurement data from syndrome qubits in the quantum computer is streamed to processor cores in the classical computation layer (e.g., as described with respect to FIG. 1). In some embodiments, each processor core handles a local patch of about 100 qubits.

[0082] As the algorithm executes, detection events begin to populate a circular array representing the space-time volume currently being considered by the processor core. These detection events are the endpoints of unknown error chains and must be matched with other detection events or boundaries to determine a plausible set of errors to use as a basis for corrections to the stream of syndrome measurements. Detection events are matched along the paths of lines connecting them. As noted above, each line has a list of errors that can be used to correct errors if the line is part of the matched path. Corrections propagate through the error detection circuitry by moving measurements. This propagation is itself potentially computationally expensive and must be carefully compiled into a set of inexpensive bit register operations before the quantum computer begins execution.

[0083] 6 illustrates a flowchart of an example of a method for determining errors in the execution of a quantum algorithm from detected events. A minimum weight perfect match is used to match detected events in an embodiment in which lines with a higher probability of occurring associated errors have lower line weights.

[0084] An unmatched detection event in the sequence is selected at operation 160. The event may be randomly selected from the sequence in some embodiments. Alternatively, the detection event may be selected using a rule, such as selecting the oldest unmatched detection event.

[0085] In operation 162, the sequence around the selected detection event is searched. The lines emanating from the selected detection event are treated like "water pipes," with the "water" traveling faster along lines with higher probability. The region of space-time with water associated with a given detection event is called the search region for that detection event. For example, lower weighted lines can be thought of as thinner pipes. During the search, an equal amount of water can be added to each of the pipes. The water will spread farther along the length of thinner pipes than thicker ones (associated with lower probability event pairings).

[0086] It is determined whether additional measurement data is needed, in operation 164. It is determined that more data is needed if the search region begins to flow towards space-time layers where syndrome qubit measurement data is not yet available.

[0087] If this determination is positive, additional syndrome measurement data is obtained in operation 166. The quantum computer provides this data by performing another round of error detection.

[0088] If this determination is negative, then in operation 168 the sequence continues to be searched around the detected event.

[0089] In operation 170, the detected events found in the search areas are matched. The search areas of different detected events are not allowed to overlap. Two detected events can be matched if they can be found such that just enough water can be added to each so that their search areas touch without overlapping with any other search areas.

[0090] More complex situations will result in the creation of alternating trees that may lead to the creation or destruction of flowers, and these are detailed in the "Timing Analysis" paper.

[0091] In operation 172, the processor core determines whether any unmatched detection events remain in the array. If so, another detection event is selected and the process is repeated.

[0092] If no further detection events remain, then in operation 174 the processor core waits for further syndrome measurement data from the quantum computer.

[0093] In some embodiments, the search for neighborhoods around a detected event is handled hierarchically: matching efficiency can be improved by examining one or more simpler cases before invoking the general matching algorithm.

[0094] The initial step in the hierarchy is to search the array around a selected detection event to find an untouched detection event and pair the selected detection event with the untouched detection event. First, when a detection event is first created, it is impossible for any adjacent space-time voxels to contain any water. Such a detection event is called untouched. If a pair of adjacent untouched detection events can be found, it is possible to add just enough water to each to allow them to be matched without first checking for the presence or absence of water in all of the voxels adjacent to both of these detection events. If this is the case, the events are matched and then another detection event is chosen. If a pair of adjacent untouched detection events cannot be found, the next special case is considered.

[0095] The second step in the hierarchy is to search the array around the selected detection event to find previously searched regions associated with a different detection event, and pair the selected detection event with the different detection event. Given adjacent started detection events (i.e., detection events that have already had water added to their lines), the maximum amount of water that can be added to each must be calculated by examining how much water is in each of the adjacent voxels and subtracting this from the weight of the line to that voxel. If enough water can be added to each to allow a match (i.e., no overlap with other detection event search areas), this is done, and another detection event is chosen.

[0096] If none of the above cases apply, then a general minimum weight exact match algorithm is invoked.

[0097] Implementations of quantum materials and quantum operations described herein, including the structures disclosed herein and their structural equivalents, may be realized in suitable quantum circuits or, more generally, in quantum computing systems, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0098] The terms quantum information and quantum data refer to information or data transmitted, held, or stored by a quantum system, the smallest significant system being a qubit, e.g., a system defining a unit of quantum information. It is understood that the term "qubit" encompasses all quantum systems that may be appropriately approximated as two-level systems in the corresponding context. Such quantum systems may include, for example, systems with more than two levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis states are identified as ground and first excited states; however, it is understood that other configurations are possible in which the computational states are identified as higher excited states. A quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for extended periods of time, e.g., a light-matter interface in which light is used for transmission and matter is used to store and retain quantum characteristics of the quantum data, such as superposition or quantum coherence.

[0099] Quantum circuit elements may be used to perform quantum processing operations. That is, quantum circuit elements may be configured to operate on data non-deterministically using quantum mechanical phenomena such as superposition and entanglement. Certain quantum circuit elements, such as qubits, may be configured to represent and operate on information in two or more states simultaneously. Examples of superconducting quantum circuit elements that may be formed by the processes disclosed herein include circuit elements such as coplanar waveguides, quantum LC oscillators, qubits (e.g., flux qubits or charge qubits), superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DCSQUIDs), inductors, capacitors, transmission lines, and ground planes, among others.

[0100] In contrast, classical circuit elements generally process data deterministically. Classical circuit elements may be configured to collectively implement the instructions of a computer program by performing basic arithmetic, logic, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements may be used to transmit data to and / or receive data from quantum circuit elements through electrical or electromagnetic connections. Examples of classical circuit elements that may be formed with the processes disclosed herein include rapid single flux quantum (RSFQ) elements, reciprocal quantum logic (RQL) elements, and ERSFQ elements, which are energy-efficient versions of RSFQ that do not use bias resistors. Other classical circuit elements may be formed with the processes disclosed herein as well.

[0101] During operation of a quantum computing system that uses superconducting quantum and / or superconducting classical circuit elements, such as the circuit elements described herein, the superconducting circuit elements are cooled in a cryostat to a temperature that allows the superconductor material to exhibit superconducting properties.

[0102] While the specification contains many specific implementation details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features described in this specification in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented separately in multiple implementations or in any suitable subcombination. Moreover, while features may be described above as operative in a certain combination and initially claimed as such, one or more features from a claimed combination may, in some cases, be deleted from the combination, and the claimed combination may be reduced to a subcombination or a variation of a subcombination.

[0103] Similarly, although acts are depicted in the figures in a particular order, this should not be understood as requiring such acts to be performed in the particular order or sequence shown, or that all illustrated acts be performed, to achieve desirable results. For example, acts recited in the claims can be performed in a different order and still achieve desirable results. In some situations, multitasking and parallel processing may be advantageous. Moreover, the separation of various components in the implementations described above should not be understood as requiring such separation in all implementations.

[0104] Although several implementations have been described, it will be understood that various modifications may be made without departing from the spirit and scope of the invention. Other implementations are within the scope of the following claims. [Explanation of symbols]

[0105] 100 Quantum Computer 102 Quantum Computation Layer 104 Control Layer 106 Classical Processing Layer 108 qubits (quantum devices) 110 Control element 112 processing cores 114 Topical Patch 126 arrays 128 line circuit layer 130 points 132 lines 134 Detection Events 140 Quantum Gates 142 Error 144 Detected Events

Claims

1. receiving one or more syndrome measurements from a current round of error detection performed by a quantum error detection circuit in a quantum computer running a quantum algorithm; converting the one or more syndrome measurements into detection events for the current round of error detection, wherein the detection events for the current round of error detection are written to a three-dimensional data structure in the form of an array, the array having a plurality of line circuit layers representing previous rounds of error detection performed by the quantum error detection circuit in a series of steps in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events for error detection in the current round depending on the plurality of line circuit layers in the array; each line circuit layer of the plurality of line circuit layers has a plurality of points, each point corresponding to an error detection event identified during an error detection round represented by the line circuit layer; the multiple line circuit layer comprises a plurality of unique lines, each unique line connecting a pair of points in the array, and a weight of each unique line representing the probability of combined detection events at each end of the line occurring together as a result of errors associated with one or more potential error processes in the execution of the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection event for error detection of the current round comprises matching the detection event for error detection of the current round to other detection events along a unique line path in the array, the other detection events being one or more of detection events in the same array, detection events in an array of an adjacent processing core, and an abstract boundary of a quantum circuit; providing a correction for the one or more syndrome measurements based on the one or more errors; A method comprising:

2. The method of claim 1 , wherein the weights are discretized.

3. the plurality of unique lines of the plurality of line circuit layer are constructed from a plurality of merged lines; the merging line has a similar line; The similarity line is Same start and end points, Same direction and length, and Common Potential Errors The method of claim 1 , comprising at least one of:

4. The method of claim 3 , wherein error processes that are not common to similar lines forming a merged line are removed from association with said merged line.

5. The method of claim 1 , wherein the array has a predetermined number N of line circuit layers, and the detected events are written to the array in a cyclical manner.

6. The method of claim 1 , wherein the array includes a plurality of line circuit layers, and the number of line circuit layers in the plurality of line circuit layers is a power of two.

7. The method of claim 1 , wherein the array is stored in a processor cache during execution of the quantum algorithm.

8. 2. The method of claim 1, wherein the array comprises a plurality of wire circuit layers representing respective error detection runs performed by quantum error correction circuits grouped together in the quantum computer.

9. 10. The method of claim 1, wherein determining the one or more errors in the execution of the quantum algorithm comprises using an exact match process.

10. 2. The method of claim 1 , wherein determining the one or more errors in the execution of the quantum algorithm comprises pairing the detected events in the arrays connected by one or more lines in one or more of the line circuit layers using a minimum weight perfect match process.

11. 2. The method of claim 1 , wherein determining the one or more errors in the execution of the quantum algorithm comprises matching one or more of the detected events with boundaries of the array using a minimum weight perfect match process.

12. determining the one or more errors in the execution of the quantum algorithm, searching the sequence around a selected detected event to find an untouched detected event and pairing the selected detected event with the untouched detected event; and / or searching the sequence around a selected detected event to find a previously searched region associated with a different detected event and pairing the selected detected event with the different detected event. The method of claim 1 , comprising at least one of:

13. 13. The method of claim 12, wherein searching the array around a selected detected event includes determining a search area of ​​a line circuit layer using weights of lines included in the line circuit layer.

14. 1. A system comprising one or more classical processing cores and one or more storage devices storing instructions, the instructions being operable, when executed by the one or more classical processing cores, to cause the one or more classical processing cores to perform an operation, the operation comprising: receiving one or more syndrome measurements from a current round of error detection performed by a quantum error detection circuit in a quantum computer executing a quantum algorithm; converting the one or more syndrome measurements into detection events for the current round of error detection, wherein the detection events for the current round of error detection are written into a three-dimensional data structure in the form of an array, the array having a plurality of line circuit layers representing a series of previous rounds of error detection performed by the quantum error detection circuit in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events for error detection in the current round depending on the plurality of line circuit layers in the array; each line circuit layer of the plurality of line circuit layers has a plurality of points, each point corresponding to an error detection event identified during an error detection round represented by the line circuit layer; the multiple line circuit layer comprises a plurality of unique lines, each unique line connecting a pair of points in the array, and a weight of each unique line representing the probability of combined detection events at each end of the line occurring together as a result of errors associated with one or more potential error processes in the execution of the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection event for error detection of the current round comprises matching the detection event for error detection of the current round to other detection events along a unique line path in the array, the other detection events being one or more of detection events in the same array, detection events in an array of an adjacent processing core, and an abstract boundary of a quantum circuit; providing a correction for the one or more syndrome measurements based on the one or more errors; and Including, the system.

15. the plurality of unique lines of the plurality of line circuit layer are constructed from a plurality of merged lines; the merging line has a similar line; The similarity line is Same start and end points, Same direction and length, and Common Potential Errors having at least one of 15. The system of claim 14.

16. A computer program comprising program instructions for causing a processing core to perform operations, said operations comprising: receiving one or more syndrome measurements from a current round of error detection performed by a quantum error detection circuit in a quantum computer executing a quantum algorithm; converting the one or more syndrome measurements into detection events for the current round of error detection, wherein the detection events for the current round of error detection are written into a three-dimensional data structure in the form of an array, the array having a plurality of line circuit layers representing a series of previous rounds of error detection performed by the quantum error detection circuit in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events for error detection in the current round depending on the plurality of line circuit layers in the array; each line circuit layer of the plurality of line circuit layers has a plurality of points, each point corresponding to an error detection event identified during an error detection round represented by the line circuit layer; the multiple line circuit layer comprises a plurality of unique lines, each unique line connecting a pair of points in the array, and a weight of each unique line representing the probability of combined detection events at each end of the line occurring together as a result of errors associated with one or more potential error processes in the execution of the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection event for error detection of the current round comprises matching the detection event for error detection of the current round to other detection events along a unique line path in the array, the other detection events being one or more of detection events in the same array, detection events in an array of an adjacent processing core, and an abstract boundary of a quantum circuit; providing a correction for the one or more syndrome measurements based on the one or more errors; and a computer program comprising:

17. the plurality of unique lines of the plurality of line circuit layer are constructed from a plurality of merged lines; the merging line has a similar line; The similarity line is Same start and end points, the same direction and length, and Common Potential Errors having at least one of 17. A computer program according to claim 16.

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