Photoelectric conversion device and manufacturing method thereof

Abstract

To provide a technology advantageous to suppress reduction in image quality.SOLUTION: A pixel region and a light-shielding region are arranged. The light-shielding region includes: a first light-shielding region where first and second trench structures are provided in a semiconductor layer; and a second light-shielding region arranged between the first light-shielding region and the pixel region. The semiconductor layer has a first surface and a second surface opposite to the first surface. The first trench structure extends from the first surface toward the second surface. The second trench structure extends from the second surface toward the first surface. When a depth from the first surface of the first trench structure is defined as T1 and a depth from the second surface of the second trench structure is defined as T2 while a thickness of the semiconductor layer is defined as D, relations of (D / 2)≤T1<D and (D / 2)≤T2<D are satisfied. The first and second trench structures are arranged so as to be separated from each other while being orthogonal to the first surface. In an orthogonal projection to a virtual surface along a boundary between the first and second light-shielding regions, the first and second trench structures at least partially overlap each other.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device and a method for manufacturing the same. [Background technology]

[0002] A photoelectric conversion device is known that includes a pixel region in which a plurality of pixels, each including a photoelectric conversion element, are arranged in an array, and a light-shielding region in which light is shielded. Patent Document 1 shows a solid-state imaging element in which a peripheral circuit section is shielded from light by a light-shielding film. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-031785 Summary of the Invention [Problem to be solved by the invention]

[0004] The configuration of Patent Document 1 can block light that is incident perpendicularly to the light-shielding film. However, light that is incident obliquely at the edge of the light-shielding film or from the edge of the chip can propagate through the substrate in the light-shielding region blocked by the light-shielding film and become stray light. If stray light is photoelectrically converted by optical black pixels arranged in the light-shielding region, or if it further penetrates into the pixel region and is photoelectrically converted by pixels arranged in the pixel region, the quality of the resulting image can be degraded.

[0005] An object of the present invention is to provide a technique that is advantageous in suppressing degradation of image quality. [Means for solving the problem]

[0006] In view of the above problems, a photoelectric conversion device according to an embodiment of the present invention is a photoelectric conversion device including a semiconductor layer in which a pixel region including a plurality of photoelectric conversion elements and a light shielding region shielded by a light shielding layer are arranged. The light shielding region includes a first light shielding region in which a first trench structure and a second trench structure are provided in the semiconductor layer, and a second light shielding region arranged between the first light shielding region and the pixel region. The semiconductor layer includes a first surface and a second surface on the side opposite to the first surface. The first trench structure extends from the first surface toward the second surface, and the second trench structure extends from the second surface toward the first surface. When the depth of the first trench structure from the first surface is T1, the depth of the second trench structure from the second surface is T2, and the thickness of the semiconductor layer is D, the relationships (D / 2) ≤ T1 < D and (D / 2) ≤ T2 < D are satisfied. In a front projection with respect to the first surface, the first trench structure and the second trench structure are arranged apart from each other. In a front projection with respect to a virtual plane orthogonal to the first surface and along the boundary between the first light shielding region and the second light shielding region, at least a part of the first trench structure and the second trench structure overlap. a photoelectric conversion element other than the plurality of photoelectric conversion elements is arranged; It is characterized by this. a semiconductor layer having a polarity opposite to that of the semiconductor layer and different from the semiconductor layer is disposed at an interface between the semiconductor layer and at least one of the first trench structure and the second trench structure;

Effects of the Invention

[0007] According to the present invention, it is possible to provide a technology advantageous for suppressing deterioration of image quality.

Brief Description of the Drawings

[0008] [Figure 1] A plan view showing a configuration example of the photoelectric conversion device of this embodiment. [Figure 2] A cross-sectional view showing a configuration example of the photoelectric conversion device of FIG. 1. [Figure 3] A view showing an arrangement example of the trench structure of the photoelectric conversion device of FIG. 1. [Figure 4] A view showing a manufacturing method of the photoelectric conversion device of FIG. 1. [Figure 5] A view showing a manufacturing method of the photoelectric conversion device of FIG. 1. [Figure 6] A view showing a manufacturing method of the photoelectric conversion device of FIG. 1. [Figure 7] 2A to 2C are diagrams showing a method for manufacturing the photoelectric conversion device of FIG. 1. [Figure 8] FIG. 1 is a plan view showing an example of the configuration of a photoelectric conversion device according to an embodiment of the present invention. [Figure 9] FIG. 9 is a cross-sectional view showing an example of the configuration of the photoelectric conversion device of FIG. 8. [Figure 10] 9 is a diagram showing an example of the arrangement of a trench structure in the photoelectric conversion device of FIG. 8. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0010] 1 to 10(b), a photoelectric conversion device according to an embodiment of the present disclosure will be described. Fig. 1 is a plan view showing a schematic configuration of a photoelectric conversion device 10 according to this embodiment. Fig. 2 is a cross-sectional view taken along line AB shown in Fig. 1.

[0011] As shown in FIGS. 1 and 2 , a photoelectric conversion device 10 includes a semiconductor layer 100 in which a pixel region 12 including a plurality of photoelectric conversion elements 103 and a light-shielding region 11 shielded from light by a light-shielding layer 109 are arranged. The semiconductor layer 100 has two main surfaces: a surface 151 and a surface 152 opposite to the surface 151. The light-shielding region 11 includes a first light-shielding region 14 in which a first trench structure 101 and a second trench structure 107 are provided in the semiconductor layer 100, and a second light-shielding region 13 arranged between the first light-shielding region 14 and the pixel region 12. The semiconductor layer 100 may further include a peripheral region 15, at least a portion of which is not covered by the light-shielding layer 109, between an end of the semiconductor layer 100 and the second light-shielding region 13. However, this is not limited thereto, and the semiconductor layer 100 may be covered with the light-shielding layer 109 up to the end of the semiconductor layer 100.

[0012] In this embodiment, as shown in FIGS. 1 and 2 , in an orthogonal projection onto the surface 151, the pixel region 12 may be a rectangular region arranged in the central portion of the semiconductor layer 100. In the pixel region 12, a plurality of photoelectric conversion elements 103 may be arranged in an array so as to form rows and columns. In an orthogonal projection onto the surface 151, the second light-shielding region 13 is arranged to surround the pixel region 12, and the outer shape of the second light-shielding region 13 is also rectangular. Furthermore, in an orthogonal projection onto the surface 151, the first light-shielding region 14 is arranged to surround the second light-shielding region 13, and the outer shape of the first light-shielding region 14 is also rectangular. Similarly, in an orthogonal projection onto the surface 151, the peripheral region 15 is arranged to surround the first light-shielding region 14, and the peripheral region 15 includes an edge portion of the semiconductor layer 100. In this embodiment, the semiconductor layer 100 is rectangular in a planar view.

[0013] In this embodiment, the photoelectric conversion device 10 is a so-called back-illuminated photoelectric conversion device in which a plurality of photoelectric conversion elements are arranged on the surface 151 of the semiconductor layer 100 and light is received from the side of the surface 152 of the semiconductor layer 100. Therefore, the light-shielding layer 109 is arranged so as to cover a part of the surface 152 of the semiconductor layer 100. Let the thickness of this semiconductor layer 100 be the thickness D. In the first light-shielding region 14 of the semiconductor layer 100, as described above, the first trench structure 101 and the second trench structure 107 are arranged. The first trench structure 101 extends from the surface 151 of the semiconductor layer 100 toward the surface 152. The second trench structure 107 extends from the surface 152 toward the surface 151. Here, let the depth from the surface 151 of the first trench structure 101 be the depth T1, and the depth from the surface 152 of the second trench structure 107 be the depth T2. Here, the depth T1 from the surface 151 of the first trench structure 101 is the distance between the portion where the shortest distance from the surface 151 among the wall surfaces constituting the first trench structure 101 is the largest and the surface 151. Also, the depth T2 from the surface 152 of the second trench structure 107 is the distance between the portion where the shortest distance from the surface 152 among the wall surfaces constituting the second trench structure 107 is the largest and the surface 152. Typically, when the opening sides of the first trench structure 101 and the second trench structure 107 are upward, the distance from the reference surface 151 or surface 152 to the bottom surface of each is the depth T1 or depth T2. At this time, the thickness D, the depths T1, and T2 satisfy the relationships of (D / 2)≦T1<D and (D / 2)≦T2<D. Also, although a detailed arrangement example will be described later, as can be understood from FIG. 2, in the orthographic projection onto the surface 151 of the semiconductor layer 100, the first trench structure 101 and the second trench structure 107 are arranged apart from each other. Further, in the orthographic projection onto a virtual plane B1 that is orthogonal to the surface 151 of the semiconductor layer 100 and along the boundary between the first light-shielding region 14 and the second light-shielding region 13, at least a part of the first trench structure 101 and the second trench structure 107 overlaps. In other words, the thickness D, the depths T1, and T2 satisfy the relationship of D<(T1+T2).

[0014] Thus, the first trench structure 101 and the second trench structure 107 have a DTI (Deep Trench Isolation) structure with a depth equal to or greater than half the thickness of the semiconductor layer 100. The DTI structure may have an aspect ratio of 2 or greater, obtained by dividing the trench depth by the trench width (length in the short direction). The DTI structure may also have an aspect ratio of 5 or greater, 7 or greater, or 10 or greater.

[0015] A semiconductor layer having a polarity opposite to that of the semiconductor layer 100 may be provided at the interface between the first trench structure 101 and the semiconductor layer 100 or at the interface between the second trench structure 107 and the semiconductor layer 100. For example, polysilicon having a polarity opposite to that of the semiconductor layer 100 may be embedded in the first trench structure 101 or the second trench structure on the side of the interface with the semiconductor layer 100, or epitaxial silicon may be formed. This makes it possible to suppress dark noise generated at the interface between each of the trench structures 101, 107 and the semiconductor layer 100.

[0016] In the pixel region 12, a photoelectric conversion element 103 is arranged on the surface 151 side of the semiconductor layer 100. The photoelectric conversion element 103 may include a photodiode 104 and transistors 105 such as a transfer transistor, a reset transistor, a select transistor, and a source follower transistor. In addition to the photoelectric conversion element 103 arranged in the pixel region 12, a photoelectric conversion element 103' may also be arranged in the second light-shielding region 13 on the surface 151 side of the semiconductor layer 100. The photoelectric conversion element 103' may have the same configuration as the photoelectric conversion element 103 arranged in the pixel region 12. In the second light-shielding region 13, light incident on the photoelectric conversion device 10 is blocked by a light-shielding layer 109 before reaching the photoelectric conversion element 103'. In such a configuration, by utilizing the difference between the signals output from the photoelectric conversion elements 103 arranged in the pixel region 12 and the photoelectric conversion elements 103' arranged in the second light-shielding region 13, the influence of dark noise can be suppressed, enabling highly accurate imaging. Although not shown, a drive circuit for driving the photoelectric conversion elements 103 arranged in the pixel region 12 may be arranged in the second light-shielding region 13. The drive circuit may drive the photoelectric conversion elements 103' arranged in the second light-shielding region 13.

[0017] A structure 106 is disposed so as to cover the surface 151 of the semiconductor layer 100. The structure 106 may include a wiring pattern, an interlayer insulating film, and the like. The semiconductor layer 100 is bonded to a support substrate 180 via the structure 106. The support substrate 180 may be a silicon substrate having a structure 181 made of silicon oxide or the like formed on its surface. Alternatively, the support substrate 180 may be a substrate on which an ASIC (Application Specific Integrated Circuit), a memory, or the like is mounted. In this case, the structure 181 may be provided with a wiring pattern, an interlayer insulating film, and the like. Furthermore, when a substrate on which an ASIC, a memory, or the like is mounted is used as the support substrate 180, a bonding pad 182 for electrically connecting the photoelectric conversion device 10 to an external device may be disposed in the peripheral region 15. In this case, an opening 183 for exposing the bonding pad 182 may be provided in the surface 152 of the semiconductor layer 100 from the surface 152 toward the bonding pad 182. Furthermore, a pad isolation trench structure 102 may be arranged in the semiconductor layer 100 in the peripheral region 15. The pad isolation trench structure 102 functions as an insulating film that electrically isolates the opening 183 and the semiconductor layer 100.

[0018] A structural body 108 is disposed so as to cover the surface 152 of the semiconductor layer 100. The structural body 108 may include an optical structure for guiding light incident on the surface 152 side of the semiconductor layer 100 to the photodiode 104. For example, an intralayer lens, a color filter, a microlens, or the like may be disposed in the structural body 108 as an optical structure. Furthermore, a light-shielding layer 109 for defining a light-shielding region 11 is disposed in the structural body 108 near the surface 152 of the semiconductor layer 100. In this embodiment, the light-shielding layer 109 is disposed so as to cover the entire first light-shielding region 14 and the second light-shielding region 13 and a part of the peripheral region 15 in an orthogonal projection onto the surface 151 of the semiconductor layer 100. The light-shielding layer 109 may be formed of a material such as tungsten, aluminum, or titanium nitride.

[0019] As described above, an overlapping portion O1 is arranged where the first trench structure 101 and the second trench structure 107 partially overlap in an orthogonal projection onto a virtual plane B1 that is orthogonal to the surface 151 of the semiconductor layer 100 and that is along the boundary between the first light-shielding region 14 and the second light-shielding region 13. The configuration of the first trench structure 101 and the second trench structure 107 that realizes this overlapping portion O1 functions as a light-reducing wall that suppresses stray light from the edge of the semiconductor layer 100 or a region of the peripheral region 15 that is not covered by the light-shielding layer 109 into the second light-shielding region 13. In other words, it is possible to suppress light that has entered from the edge of the semiconductor layer 100 or the like from becoming stray light and undergoing photoelectric conversion in the photoelectric conversion element 103′ arranged in the second light-shielding region 13 and the photoelectric conversion element 103 arranged in the pixel region 12.

[0020] Next, the arrangement of the first trench structure 101 and the second trench structure 107 provided in the first light-shielding region 14 will be described in detail with reference to Figures 3(a) and 3(b). Figures 3(a) and 3(b) show plan views of the first trench structure 101 and the second trench structure 107 orthogonally projected onto the surface 151 of the semiconductor layer 100.

[0021] FIG. 3(a) shows an example of an arrangement of the first trench structure 101 and the second trench structure 107. As described above, the first trench structure 101 and the second trench structure 107 are spaced apart from each other in an orthogonal projection onto the surface 151 of the semiconductor layer 100. In the configuration shown in FIG. 3(a), the first trench structure 101 includes an extending portion 101a extending along one side of the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13. Similarly, the second trench structure 107 includes an extending portion 107a extending along one side of the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13. The extending portions 101a and 107a are continuous from one end to the other end in the direction along the one side. Furthermore, in this embodiment, the first trench structure 101 and the second trench structure 107 continuously surround the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13. Due to this arrangement of the first trench structure 101 and the second trench structure 107, the overlapping portion O1 where the first trench structure 101 and the second trench structure 107 overlap in the orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13 surrounds the imaginary plane B1. For example, the overlapping portion O1 can completely surround the imaginary plane B1. This indicates that a light-reducing wall exists surrounding the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13. As a result, stray light can be suppressed.

[0022] Furthermore, the first trench structure 101 and the second trench structure 107 do not penetrate the semiconductor layer 100. Therefore, the strength of the semiconductor layer 100 can be maintained compared to when a light-reducing wall is formed using a trench structure that penetrates the semiconductor layer 100. This makes it possible to suppress stray light while suppressing a decrease in the yield rate of chips of the photoelectric conversion device 10, and to suppress a decrease in the quality of images obtained by the photoelectric conversion device 10.

[0023] As described above, the first trench structure 101 and the second trench structure 107 both have a DTI structure with depths T1 and T2 that are equal to or greater than half the thickness D of the semiconductor layer 100. If one of the trench structures 101 and 107 is an STI (Shallow Trench Isolation) structure, the other must be made deeper to achieve the overlapping portion O1. Generally, the deeper the trench structure, the greater the variation in depth of the formed trench structure. If the trench structure becomes deeper due to variation, the trench structure may penetrate the semiconductor layer 100. If the trench structure penetrates the semiconductor layer 100, the strength of the semiconductor layer 100 may not be maintained. If the trench structure becomes shallower due to variation, the overlapping portion O1 may not be formed between the trench structure having the DTI structure and the trench structure having the STI structure. Therefore, as shown in this embodiment, by forming both the first trench structure 101 and the second trench structure 107 as a DTI structure, it becomes possible to form the light-shielding wall in the photoelectric conversion device 10 with a good yield.

[0024] Furthermore, the depth T1 of the first trench structure 101 and the depth T2 of the second trench structure 107 may satisfy the relationship 0.5≦(T1 / T2)≦1.5. Furthermore, the depth T1 of the first trench structure 101 and the depth T2 of the second trench structure 107 may satisfy the relationship 0.8≦(T1 / T2)≦1.2. This causes the overlapping portion O1 between the first trench structure 101 and the second trench structure 107 to be formed near the center of the semiconductor layer 100. If the overlapping portion O1 is formed near the surface 151 (or the surface 152) of the semiconductor layer 100, there is a high possibility that light reflected at the surface 152 (or the surface 151) of the semiconductor layer 100 will pass through the overlapping portion O1. By arranging the overlapping portion O1 near the center of the semiconductor layer 100, stray light can be more reliably blocked, thereby further enhancing the stray light suppression effect.

[0025] 3(b) shows an example of an arrangement of the first trench structure 101 and the second trench structure 107 different from that shown in FIG. 3(a). Similar to the configuration shown in FIG. 3(a), the first trench structure 101 and the second trench structure 107 are spaced apart from each other in an orthogonal projection onto the surface 151 of the semiconductor layer 100. However, unlike the configuration shown in FIG. 3(a), the first trench structure 101 is composed of a plurality of trench portions 101b spaced apart from each other. Similarly, the second trench structure 107 is composed of a plurality of trench portions 107b spaced apart from each other. In this case, the plurality of trench portions 101b include a plurality of trenches arranged along one side of the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13, and are arranged continuously from one end to the other end in the direction along the side so that ends of the plurality of trenches overlap with each other in an orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13. Also, the plurality of trench portions 107b include a plurality of trenches arranged along one side of the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13, and are arranged continuously from one end to the other end in the direction along the side so that ends of the plurality of trenches overlap with each other in an orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13.

[0026] More specifically, the first trench structure 101 includes trench portions 101b spaced apart from each other on lines L1 and L2 parallel to the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13. The second trench structure 107 includes trench portions 107b spaced apart from each other on lines L3 and L4 parallel to the boundary (imaginary plane B1) between the first light-shielding region 14 and the second light-shielding region 13. In this case, in an orthogonal projection of the boundary between the first light-shielding region 14 and the second light-shielding region 13 onto the imaginary plane B1, an overlapping portion O1 formed by the trench portion 101b on line L1 and the trench portion 107b on line L3 is located in the gap between the overlapping portion O1. In addition, in the orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13, an overlapping portion O1 formed by the trench portion 101b on the line L1 and the trench portion 107b on the line L3 is disposed in the gap of the overlapping portion O1 formed by the trench portion 101b on the line L2 and the trench portion 107b on the line L4. In this manner, the trench portions 101b of the first trench structure 101 complement each other, and similarly, the trench portions 107b of the second trench structure 107 complement each other, so that the overlapping portion O1 where the first trench structure 101 and the second trench structure 107 overlap in the orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13 surrounds the imaginary plane B1. For example, the overlapping portion O1 may completely surround the imaginary plane B1. This indicates that a light-reducing wall exists so as to surround the imaginary plane B1 at the boundary between the first light-shielding area 14 and the second light-shielding area 13. As a result, stray light can be suppressed.

[0027] 3(a), the configuration shown in FIG. 3(b) differs from the configuration shown in FIG. 3(a) in that the first trench structure 101 and the second trench structure 107 are not continuous but are spaced apart, and are composed of multiple trench portions 101b, 107b. This increases the strength of the semiconductor layer 100 compared to the configuration shown in FIG. 3(a). Therefore, the configuration shown in FIG. 3(b) can suppress stray light while further reducing the decrease in the yield rate of chips of the photoelectric conversion device 10.

[0028] The first trench structure 101 and the second trench structure 107 may be configured in combination with the structures shown in FIGS. 3(a) and 3(b). For example, one of the first trench structure 101 and the second trench structure may have an integral, continuous structure as shown in FIG. 3(a), while the other of the first trench structure 101 and the second trench structure may be configured with trench portions spaced apart from each other as shown in FIG. 3(b). The virtual region is defined as the region where the first trench structure 101 and the second trench structure 107 are projected in an orthogonal projection onto a virtual plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13. In either configuration, no straight line connecting the first light-shielding region 14 and the second light-shielding region 13 exists parallel to the surface 151 of the semiconductor layer 100 without passing through the overlapping portion O1 of the first trench structure 101 and the second trench structure 107. As a result, a continuous light-reducing wall exists so as to surround the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13. As described above, in the orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13, the overlapping portion O1 where the first trench structure 101 and the second trench structure 107 overlap continuously surrounds the second light-shielding region 13. As a result, light that has entered the end portion of the semiconductor layer 100 or an unshielded region of the peripheral region 15 is prevented from becoming stray light, and deterioration in the quality of the image obtained by the photoelectric conversion device 10 is suppressed.

[0029] Next, a method for manufacturing the photoelectric conversion device 10 of this embodiment will be described with reference to Figures 4(a) to 7. First, as shown in Figure 4(a), a semiconductor substrate that will become the semiconductor layer 100 is prepared. The semiconductor substrate (semiconductor layer 100) has a surface 151 and a surface 152 that forms a pair with the surface 151. The semiconductor substrate (semiconductor layer 100) also has regions where the above-mentioned pixel region 12, first light-shielding region 14, second light-shielding region 13, and peripheral region 15 are provided.

[0030] Next, as shown in FIG. 4( b), a first trench structure 101 extending from the surface 151 toward the surface 152 of the semiconductor layer 100 is formed in the region that will become the first light-shielding region 14 by a process such as dry etching. The first trench structure 101 may be filled with an insulating film such as silicon oxide or silicon nitride, or a laminated structure thereof. The first trench structure 101 may also be filled with a laminated structure including an insulating film and epitaxial silicon or polysilicon. The first trench structure 101 is filled with the above-mentioned materials, but may have voids in part. In other words, at least a portion of the first trench structure 101 may be filled with an insulating film, an insulating film and polysilicon, or an insulating film and epitaxial silicon. When polysilicon or epitaxial silicon is filled in the first trench structure 101, the polysilicon or epitaxial silicon may be disposed at the interface with the semiconductor layer 100.

[0031] Simultaneously with the formation of the first trench structure 101, a pad isolation trench structure 102 deeper than the first trench structure 101 may be formed in a region that will become the peripheral region 15. One method for simultaneously forming the first trench structure 101 and the pad isolation trench structure 102 is to use the microloading effect during dry etching. That is, by making the trench width of the pad isolation trench structure 102 wider than the trench width of the first trench structure 101, the trench can be formed deeper during dry etching. Before or after forming the first trench structure 101 or the pad isolation trench structure 102, an element isolation structure such as a LOCOS (LOCal Oxidation of Silicon) structure or an STI structure may be formed in each region of the surface 151 (not shown). Part of the element isolation structure may be formed so as to cap the surface 151 side of the first trench structure 101 or the pad isolation trench structure 102.

[0032] Next, as shown in FIG. 4(c), photoelectric conversion elements 103 and 103' are formed in the pixel region 12 and the second light-shielding region 13 on the surface 151 side of the semiconductor layer 100. The photoelectric conversion elements 103 and 103' include a photodiode 104 and transistors 105, such as a transfer transistor, a reset transistor, a select transistor, and a source follower transistor. The photoelectric conversion element 103' formed in the second light-shielding region 13 functions as an optical black pixel. Although not shown, in addition to the photoelectric conversion element 103', various elements constituting a drive circuit for driving the photoelectric conversion elements 103 and 103' may also be formed in the second light-shielding region 13. The photoelectric conversion elements 103 and 103' and elements constituting the drive circuit may be manufactured using known semiconductor processes. In this case, the photoelectric conversion element 103' and elements constituting the drive circuit may not be arranged in the first light-shielding region 14.

[0033] 5(a), a structure 106 is formed to cover the surface 151 of the semiconductor layer 100. The structure 106 includes a wiring pattern and an interlayer insulating film. The structure 106 can be manufactured using a known semiconductor process.

[0034] After forming the structure 106, as shown in FIG. 5(b), the semiconductor layer 100 and the support substrate 180 are bonded via the structures 106 and 181. The bonding between the semiconductor layer 100 and the support substrate 180 may be performed using a so-called room temperature bonding method in which the surfaces of the structure 106 and the structure 181 are activated by irradiating them with plasma. However, the bonding method is not limited to this, and the structure 106 and the structure 181 may be bonded via, for example, an adhesive bonding member.

[0035] The support substrate 180 may be a substrate in which silicon oxide is formed as the structure 181 on a silicon substrate, but in this embodiment, a substrate equipped with functions such as an ASIC or memory is used as the support substrate 180. For this reason, within the structure 181, a wiring pattern, an interlayer insulating film, and bonding pads 182 that serve to electrically connect the photoelectric conversion device 10 to the outside of the photoelectric conversion device 10 are arranged.

[0036] Next, as shown in FIG. 6(a), the semiconductor layer 100 is thinned from the surface 152 side to a thickness D. In this embodiment, the thickness D of the semiconductor layer 100 is assumed to be about 3 μm, but may be, for example, about 1 to 10 μm. The thickness D of the semiconductor layer 100 may be set appropriately depending on the specifications of the photovoltaic conversion device 10. The semiconductor layer 100 can be thinned using a grinder, a wet etching device, a CMP device, or the like.

[0037] After thinning the semiconductor layer 100, as shown in FIG. 6(b), a second trench structure 107 extending from the surface 152 toward the surface 151 of the semiconductor layer 100 is formed using a process such as dry etching. The second trench structure 107 may be filled with an insulating film such as silicon oxide, silicon nitride, hafnium oxide, aluminum oxide, or tantalum oxide, or a laminated structure thereof. These insulating films may also be formed so as to cover the surface 152 of the semiconductor layer 100 (not shown). The second trench structure 107 may be filled with a laminated structure of a metal film such as tungsten, aluminum, or titanium in addition to the insulating film described above. The second trench structure 107 is filled with the above-mentioned materials, but may have voids in some areas. In other words, at least a portion of the second trench structure 107 may be filled with an insulating film, or an insulating film and a metal film. When a metal film is filled in the second trench structure 107, the metal film may be disposed at the interface with the semiconductor layer 100.

[0038] Here, the thickness D of the semiconductor layer 100, the depth T1 of the first trench structure 101, and the depth T2 of the second trench structure 107 are formed so as to satisfy the relationships of (D / 2)≦T1<D, (D / 2)≦T2<D, and D<(T1+T2) as described above.

[0039] After forming the second trench structure 107, as shown in FIG. 7, a structure 108 is formed so as to cover the surface 152 of the semiconductor layer 100. The structure 108 includes an optical structure for guiding light from the surface of the structure 108 to the photodiode 104 through the surface 152 of the semiconductor layer 100. The structure 108 may include an in-layer lens, a color filter, a microlens, etc. as the optical structure. Further, a light shielding layer 109 is formed in the vicinity of the surface 152 of the structure 108. The light shielding layer 109 is arranged so as to cover the entire region that becomes the first light shielding region 14 and the second light shielding region 13 and a part of the region that becomes the peripheral region 15 in the orthographic projection onto the surface 151 of the semiconductor layer 100. Materials such as tungsten, aluminum, titanium nitride, etc. may be used for the light shielding layer 109. Next, an opening 183 for exposing the bonding pad 182 is formed from the surface of the structure 108 on the side of the surface 152 of the semiconductor layer 100 to the bonding pad 182, whereby the photoelectric conversion device 10 shown in FIG. 2 is manufactured.

[0040] Next, a modified example of the above-described photoelectric conversion device 10 will be described. FIG. 8 is a plan view showing a schematic configuration of a photoelectric conversion device 10' according to the present embodiment. FIG. 9 is a cross-sectional view taken between A and B shown in FIG. 8.

[0041] When comparing the photoelectric conversion device 10 and the photoelectric conversion device 10', a third trench structure 201 and a fourth trench structure 207 are provided in the semiconductor layer 100 in the light shielding region 11, and a third light shielding region 24 arranged between the second light shielding region 13 and the pixel region 12 is added. Since the configuration other than the third light shielding region 24 may be the same as that of the above-described photoelectric conversion device 10, the third light shielding region 24 will be described here.

[0042] In the third light-shielding region 24, a third trench structure 201 and a fourth trench structure 207 are arranged. A photoelectric conversion element 103' may be arranged in the third light-shielding region 24. Similar to the first trench structure 101, the third trench structure 201 extends from the surface 151 to the surface 152 of the semiconductor layer 100. Similar to the second trench structure 107, the fourth trench structure 207 extends from the surface 152 to the surface 151. Here, let the depth of the third trench structure 201 from the surface 151 be depth T3, and the depth of the fourth trench structure 207 from the surface 152 be depth T4. At this time, the thickness D of the semiconductor layer 100, the depths T3, and T4 satisfy the relationships of (D / 2)≦T3<D and (D / 2)≦T4<D. Also, although a detailed arrangement example will be described later, as can be understood from FIG. 9, in the orthographic projection onto the surface 151 of the semiconductor layer 100, the third trench structure 201 and the fourth trench structure 207 are arranged apart from each other. Further, in the orthographic projection onto a virtual plane B2 that is orthogonal to the surface 151 of the semiconductor layer 100 and along the boundary between the second light-shielding region 13 and the third light-shielding region 24, at least a part of the third trench structure 201 and the fourth trench structure 207 overlap. In other words, the thickness D, the depths T3, and T4 satisfy the relationship of D<(T3+T4).

[0043] Next, the details of the arrangement of the third trench structure 201 and the fourth trench structure 207 provided in the third light-shielding region 24 will be described using FIGS. 10(a) and 10(b). FIGS. 10(a) and 10(b) show a plan view of the orthographic projection of the third trench structure 201 and the fourth trench structure 207 onto the surface 151 of the semiconductor layer 100.

[0044] FIG. 10(a) shows an example of the arrangement of the third trench structure 201 and the fourth trench structure 207. As described above, in the orthogonal projection onto the surface 151 of the semiconductor layer 100, the third trench structure 201 and the fourth trench structure 207 are spaced apart from each other. In the configuration shown in FIG. 10(a), the third trench structure 201 includes an extending portion 201a extending along one side of the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24. Similarly, the fourth trench structure 207 includes an extending portion 207a extending along one side of the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24. The extending portions 101a and 107a are continuous from one end to the other end in the direction along the one side. Furthermore, in this embodiment, the third trench structure 201 and the fourth trench structure 207 continuously surround the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24. Due to this arrangement of the third trench structure 201 and the fourth trench structure 207, an overlapping portion O2 where the third trench structure 201 and the fourth trench structure 207 overlap in an orthogonal projection onto the imaginary plane B2 of the boundary between the second light-shielding region 13 and the third light-shielding region 24 surrounds the imaginary plane B2. For example, the overlapping portion O2 can completely surround the imaginary plane B2. This indicates that a light-reducing wall exists surrounding the imaginary plane B2 of the boundary between the second light-shielding region 13 and the third light-shielding region 24. As a result, stray light can be suppressed.

[0045] Compared to the photoelectric conversion device 10, the photoelectric conversion device 10' can suppress stray light entering the second light-shielding region 13 from the pixel region 12 side. In other words, when using the difference between the signals output from the photoelectric conversion elements 103 in the pixel region 12 and the photoelectric conversion elements 103' in the second light-shielding region 13, the accuracy of the dark noise component is improved, enabling highly accurate imaging. As a result, the deterioration in the quality of the image obtained by the photoelectric conversion device 10' can be suppressed more than by the photoelectric conversion device 10.

[0046] 10(b) shows an example of an arrangement of the third trench structure 201 and the fourth trench structure 207 different from that shown in FIG. 3(a). Similar to the configuration shown in FIG. 10(a), the third trench structure 201 and the fourth trench structure 207 are spaced apart from each other in an orthogonal projection onto the surface 151 of the semiconductor layer 100. However, unlike the configuration shown in FIG. 10(a), the third trench structure 201 is composed of a plurality of trench portions 201b spaced apart from each other. Similarly, the fourth trench structure 207 is composed of a plurality of trench portions 207b spaced apart from each other. In this case, the plurality of trench portions 201b include a plurality of trenches arranged along one side of the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24, and are arranged continuously from one end to the other end in the direction along the side so that ends of the plurality of trenches overlap with each other in an orthogonal projection of the boundary between the second light-shielding region 13 and the third light-shielding region 24 onto the imaginary plane B2. Also, the plurality of trench portions 207b include a plurality of trenches arranged along one side of the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24, and are arranged continuously from one end to the other end in the direction along the side so that ends of the plurality of trenches overlap with each other in an orthogonal projection of the boundary between the second light-shielding region 13 and the third light-shielding region 24 onto the imaginary plane B2.

[0047] More specifically, the third trench structure 201 includes trench portions 201b spaced apart from each other on lines L5 and L6 parallel to the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24. The fourth trench structure 207 includes trench portions 207b spaced apart from each other on lines L7 and L8 parallel to the boundary (imaginary plane B2) between the second light-shielding region 13 and the third light-shielding region 24. In this case, in an orthogonal projection of the boundary between the second light-shielding region 13 and the third light-shielding region 24 onto the imaginary plane B2, an overlapping portion O2 formed by the trench portion 201b on line L5 and the trench portion 207b on line L7 is located in the gap between the overlapping portion O2 formed by the trench portion 201b on line L6 and the trench portion 207b on line L8. In addition, in the orthogonal projection onto the imaginary plane B2 of the boundary between the second light-shielding region 13 and the third light-shielding region 24, an overlapping portion O2 formed by the trench portion 201b on the line L5 and the trench portion 207b on the line L7 is disposed in the gap of the overlapping portion O2 formed by the trench portion 201b on the line L6 and the trench portion 207b on the line L8. In this manner, the trench portions 201b of the third trench structure 201 complement each other, and similarly, the trench portions 207b of the fourth trench structure 207 complement each other, so that the overlapping portion O2 formed by the third trench structure 201 and the fourth trench structure 207 overlaps in the orthogonal projection onto the imaginary plane B2 of the boundary between the second light-shielding region 13 and the third light-shielding region 24 surrounds the imaginary plane B2. For example, the overlapping portion O2 may completely surround the imaginary plane B2. This indicates that a light-reducing wall is present so as to surround the imaginary plane B2 at the boundary between the second light-shielding region 13 and the third light-shielding region 24. As a result, the photoelectric conversion device 10′ can more effectively suppress stray light entering the second light-shielding region 13 from the pixel region 12 side than the photoelectric conversion device 10.

[0048] In this way, the third trench structure 201 and the fourth trench structure 207 are arranged between the second light-shielding region 13, in which the photoelectric conversion element 103′ is arranged, and the pixel region 12. The third trench structure 201 may have a structure similar to that of the above-described first trench structure 101. Furthermore, the fourth trench structure 207 may have a structure similar to that of the above-described second trench structure 107. Therefore, variations on the structures of the above-described first trench structure 101 and second trench structure 107 may also be applied to the third trench structure 201 and the fourth trench structure 207, as appropriate.

[0049] In the above-described embodiment, in the orthogonal projection onto the imaginary plane B1 of the boundary between the first light-shielding region 14 and the second light-shielding region 13, the overlapping portion O1 between the first trench structure 101 and the second trench structure 107 surrounds the imaginary plane B1. However, this is not limiting. In the orthogonal projection onto the imaginary plane B1, the overlapping portion O1 between the first trench structure 101 and the second trench structure 107 is disposed on a portion of the imaginary plane B1, thereby forming a light-shielding wall and suppressing stray light entering from the overlapping portion O1. This suppresses degradation of the image quality obtained by the photoelectric conversion device 10, 10′. Similarly, in the orthogonal projection onto the imaginary plane B2 of the boundary between the second light-shielding region 13 and the third light-shielding region 24, the overlapping portion O2 between the third trench structure 201 and the fourth trench structure 207 may be disposed on a portion of the imaginary plane B2.

[0050] As described above, the first trench structure 101 and the second trench structure 107 of the DTI structure are provided on the surfaces 151 and 152 of the semiconductor layer 100 outside the second light-shielding region 13 in which the photoelectric conversion element 103′ is disposed. This configuration suppresses the effects of stray light while suppressing a decrease in the strength of the semiconductor layer 100 compared to when a trench structure that penetrates the semiconductor layer 100 is provided, thereby suppressing a decrease in the quality of images obtained by the photoelectric conversion device 10. Furthermore, the third trench structure 201 and the fourth trench structure 207, which have structures similar to the first trench structure 101 and the second trench structure 107, are provided between the second light-shielding region 13 and the pixel region 12. This configuration further suppresses the effects of stray light and suppresses a decrease in the quality of images obtained by the photoelectric conversion device 10.

[0051] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0052] 10: photoelectric conversion device, 11: light-shielding region, 12: pixel region, 13: second light-shielding region, 14: first light-shielding region, 100: semiconductor layer, 101: first trench structure, 107: second trench structure, 109: light-shielding layer

Claims

1. A photoelectric conversion device including a semiconductor layer in which a pixel region having a plurality of photoelectric conversion elements and a light-shielding region shielded from light by a light-shielding layer are arranged, the light-shielding region includes a first light-shielding region in which a first trench structure and a second trench structure are provided in the semiconductor layer, and a second light-shielding region that is disposed between the first light-shielding region and the pixel region and in which a photoelectric conversion element different from the plurality of photoelectric conversion elements is disposed; the semiconductor layer has a first surface and a second surface opposite to the first surface, the first trench structure extends from the first surface toward the second surface; the second trench structure extends from the second surface toward the first surface; where T1 is a depth of the first trench structure from the first surface, T2 is a depth of the second trench structure from the second surface, and D is a thickness of the semiconductor layer, the relationships (D / 2)≦T1<D and (D / 2)≦T2<D are satisfied, In an orthogonal projection onto the first surface, the first trench structure and the second trench structure are spaced apart from each other; at least a portion of the first trench structure and the second trench structure overlap with each other in an orthogonal projection onto a virtual plane that is orthogonal to the first surface and that is along a boundary between the first light-shielding region and the second light-shielding region; a semiconductor layer having an opposite polarity to the semiconductor layer and different from the semiconductor layer, disposed at the interface between the semiconductor layer and at least one of the first trench structure and the second trench structure.

2. 2. The photoelectric conversion device according to claim 1, further satisfying the relationship 0.5≦(T1 / T2)≦1.

5.

3. at least one of the first trench structure and the second trench structure includes an extension portion extending along one side of the boundary; 3. The photoelectric conversion device according to claim 1, wherein the extending portion is continuous from one end to the other end in a direction along the one side.

4. 4. The photoelectric conversion device according to claim 1, wherein at least one of the first trench structure and the second trench structure is configured by a plurality of trench portions arranged spaced apart from each other.

5. the plurality of trench portions include a plurality of trenches arranged along one side of the boundary, The photoelectric conversion device according to claim 4, characterized in that the ends of the plurality of trenches are arranged continuously from one end to the other end in a direction along one of the sides so that they overlap in an orthogonal projection onto the virtual plane.

6. When a region onto which the first trench structure and the second trench structure are projected in orthogonal projection onto the virtual plane is defined as a virtual region, 6. The photoelectric conversion device according to claim 1, wherein at a height where a portion of the virtual region where the first trench structure and the second trench structure overlap is located, there is no straight line path parallel to the first surface connecting the first light-shielding region and the second light-shielding region without passing through the portion where the first trench structure and the second trench structure overlap.

7. In the orthogonal projection onto the first surface, the second light-shielding region surrounds the pixel region, 7. The photoelectric conversion device according to claim 1, wherein the first light-shielding region surrounds the second light-shielding region.

8. 8. The photoelectric conversion device according to claim 7, wherein, in an orthogonal projection onto the virtual plane, an overlapping portion of the first trench structure and the second trench structure continuously surrounds the second light-shielding region.

9. 9. The photoelectric conversion device according to claim 1, wherein polysilicon constituting an insulating film and the other semiconductor layer, or epitaxial silicon constituting an insulating film and the other semiconductor layer, is embedded in at least a portion of the first trench structure.

10. 10. The photoelectric conversion device according to claim 1, wherein an insulating film, or an insulating film and a metal film, are buried in at least a portion of the second trench structure.

11. 11. The photoelectric conversion device according to claim 1, wherein the first trench structure and the second trench structure have a DTI structure.

12. the light-shielding region includes a third trench structure and a fourth trench structure provided in the semiconductor layer, and further includes a third light-shielding region disposed between the second light-shielding region and the pixel region; the third trench structure extends from the first surface toward the second surface; the fourth trench structure extends from the second surface toward the first surface; When a depth of the third trench structure from the first surface is T3 and a depth of the fourth trench structure from the second surface is T4, the relationships (D / 2)≦T3<D and (D / 2)≦T4<D are satisfied, In an orthogonal projection onto the first surface, the third trench structure and the fourth trench structure are spaced apart from each other; 12. The photoelectric conversion device according to claim 1, wherein at least a portion of the third trench structure and the fourth trench structure overlap in an orthogonal projection onto a virtual plane that is perpendicular to the first surface and along the boundary between the second light-shielding region and the third light-shielding region.

13. 13. The photoelectric conversion device according to claim 12, wherein the third trench structure and the fourth trench structure have a DTI structure.

14. the plurality of photoelectric conversion elements are arranged on the first surface, 14. The photoelectric conversion device according to claim 1, wherein the light-shielding layer is disposed so as to cover the second surface.

15. 15. The photoelectric conversion device according to claim 1, further comprising a drive circuit arranged in the second light-shielding region for driving the plurality of photoelectric conversion elements.

16. A photoelectric conversion device described in any one of claims 1 to 15, characterized in that in the semiconductor layer, a peripheral region at least a portion of which is not covered by the light-shielding layer is further arranged between the end of the semiconductor layer and the second light-shielding region.

17. 17. The photoelectric conversion device according to claim 16, wherein a bonding pad is disposed in the peripheral region.

18. 18. The photoelectric conversion device according to claim 17, wherein the second surface is provided with an opening for exposing the bonding pad.

19. A photoelectric conversion device including a semiconductor layer in which a pixel region having a plurality of photoelectric conversion elements and a light-shielding region shielded from light by a light-shielding layer are arranged, the light-shielding region includes a first light-shielding region in which a first trench structure and a second trench structure are provided in the semiconductor layer, and a second light-shielding region that is disposed between the first light-shielding region and the pixel region and in which a photoelectric conversion element different from the plurality of photoelectric conversion elements is disposed; the semiconductor layer has a first surface and a second surface opposite to the first surface, the first trench structure extends from the first surface toward the second surface; the second trench structure extends from the second surface toward the first surface; where T1 is a depth of the first trench structure from the first surface, T2 is a depth of the second trench structure from the second surface, and D is a thickness of the semiconductor layer, the relationships (D / 2)≦T1<D and (D / 2)≦T2<D are satisfied, In an orthogonal projection onto the first surface, the first trench structure and the second trench structure are spaced apart from each other; at least a portion of the first trench structure and the second trench structure overlap with each other in an orthogonal projection onto a virtual plane that is orthogonal to the first surface and that is along a boundary between the first light-shielding region and the second light-shielding region; the light-shielding region includes a third trench structure and a fourth trench structure provided in the semiconductor layer, and further includes a third light-shielding region disposed between the second light-shielding region and the pixel region; the third trench structure extends from the first surface toward the second surface; the fourth trench structure extends from the second surface toward the first surface; When a depth of the third trench structure from the first surface is T3 and a depth of the fourth trench structure from the second surface is T4, the relationships (D / 2)≦T3<D and (D / 2)≦T4<D are satisfied, In an orthogonal projection onto the first surface, the third trench structure and the fourth trench structure are spaced apart from each other; a photoelectric conversion device characterized in that, in an orthogonal projection onto a virtual plane that is perpendicular to the first surface and along the boundary between the second light-shielding region and the third light-shielding region, at least a portion of the third trench structure and the fourth trench structure overlap.

20. A method for manufacturing a photoelectric conversion device including a semiconductor layer in which a pixel region having a plurality of photoelectric conversion elements and a light-shielding region shielded by a light-shielding layer are arranged, the method comprising: forming a first trench structure extending from a first surface of the semiconductor layer toward a second surface opposite the first surface; forming a second trench structure extending from the second surface toward the first surface; the light-shielding region includes a first light-shielding region in which the first trench structure and the second trench structure are provided in the semiconductor layer, and a second light-shielding region that is disposed between the first light-shielding region and the pixel region and in which a photoelectric conversion element different from the plurality of photoelectric conversion elements is disposed; where T1 is a depth of the first trench structure from the first surface, T2 is a depth of the second trench structure from the second surface, and D is a thickness of the semiconductor layer, the relationships (D / 2)≦T1<D and (D / 2)≦T2<D are satisfied, In an orthogonal projection onto the first surface, the first trench structure and the second trench structure are spaced apart from each other; at least a portion of the first trench structure and the second trench structure overlap with each other in an orthogonal projection onto a virtual plane that is orthogonal to the first surface and that is along a boundary between the first light-shielding region and the second light-shielding region; a semiconductor layer having an opposite polarity to the semiconductor layer and different from the semiconductor layer is disposed at the interface between the semiconductor layer and at least one of the first trench structure and the second trench structure.

21. a third trench structure extending from the first surface toward the second surface and a fourth trench structure extending from the second surface toward the first surface in a third light-shielding region between the second light-shielding region and the pixel region in the light-shielding region, When a depth of the third trench structure from the first surface is T3 and a depth of the fourth trench structure from the second surface is T4, the relationships (D / 2)≦T3<D and (D / 2)≦T4<D are satisfied, In an orthogonal projection onto the first surface, the third trench structure and the fourth trench structure are spaced apart from each other; 21. The manufacturing method according to claim 20, wherein at least a portion of the third trench structure and the fourth trench structure overlap in an orthogonal projection onto a virtual plane that is perpendicular to the first surface and along a boundary between the second light-shielding region and the third light-shielding region.

22. A method for manufacturing a photoelectric conversion device including a semiconductor layer in which a pixel region having a plurality of photoelectric conversion elements and a light-shielding region shielded by a light-shielding layer are arranged, comprising: forming a first trench structure extending from a first surface of the semiconductor layer toward a second surface opposite the first surface; forming a second trench structure extending from the second surface toward the first surface; the light-shielding region includes a first light-shielding region in which the first trench structure and the second trench structure are provided in the semiconductor layer, and a second light-shielding region that is disposed between the first light-shielding region and the pixel region and in which a photoelectric conversion element different from the plurality of photoelectric conversion elements is disposed; where T1 is a depth of the first trench structure from the first surface, T2 is a depth of the second trench structure from the second surface, and D is a thickness of the semiconductor layer, the relationships (D / 2)≦T1<D and (D / 2)≦T2<D are satisfied, In an orthogonal projection onto the first surface, the first trench structure and the second trench structure are spaced apart from each other; at least a portion of the first trench structure and the second trench structure overlap with each other in an orthogonal projection onto a virtual plane that is orthogonal to the first surface and that is along a boundary between the first light-shielding region and the second light-shielding region; a third trench structure extending from the first surface toward the second surface and a fourth trench structure extending from the second surface toward the first surface in a third light-shielding region between the second light-shielding region and the pixel region in the light-shielding region, When a depth of the third trench structure from the first surface is T3 and a depth of the fourth trench structure from the second surface is T4, the relationships (D / 2)≦T3<D and (D / 2)≦T4<D are satisfied, In an orthogonal projection onto the first surface, the third trench structure and the fourth trench structure are spaced apart from each other; a manufacturing method characterized in that, in an orthogonal projection onto a virtual plane that is perpendicular to the first surface and along the boundary between the second light-shielding region and the third light-shielding region, at least a portion of the third trench structure and the fourth trench structure overlap.

Images