Semiconductor device manufacturing method

A non-etchable support layer in the manufacturing process for ultra-thin photonic chips addresses the challenges of thickness control and yield, enabling efficient and reliable production of ultra-thin photonic chips.

JP7761487B2Active Publication Date: 2025-10-28ADVANCED MICRO FOUNDRY PTE LTD
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Patent Information

Application Number
JP2021540336
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-01-11
Filing Date
2019-12-26
Publication Date
2025-10-28
Estimated Expiration
2039-12-26

AI Technical Summary

Technical Problem

Current methods for manufacturing ultra-thin photonic chips, particularly those less than 50 μm thick, face challenges in achieving reliable yields due to difficulties in controlling backgrind thickness and chip separation, often resulting in device damage during wafer processing.

Method used

A manufacturing method involving a support layer, such as SiO2, SiON, or SiN, which is not susceptible to etching, is used to control the thickness of photonic chips precisely, combined with backgrinding and wet etching processes to separate individual chips, ensuring precise thickness and high yield.

Benefits of technology

The method enables the production of ultra-thin photonic chips with improved yield and controlled thickness by using a non-etchable support layer, allowing for efficient separation and reducing chip damage during the manufacturing process.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method for manufacturing a semiconductor device, the method comprising: forming a substrate; forming a support layer formed from a first type of material that is not susceptible to etching processes and having a predetermined thickness related to a required thickness of the semiconductor device; forming a device on the support layer; forming at least one layer of cladding material on the device; forming a plurality of trenches in the layer that extend at least to the substrate; applying a film over the cladding material; and at least partially removing the substrate using an etching process to separate the device from others on a wafer.
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Description

[Technical Field]

[0001] The present invention relates to ultra-thin integrated chips and methods for their manufacture, and particularly, but not exclusively, to ultra-thin integrated photonic chips. [Background technology]

[0002] In all fields and integrated circuits, chips and semiconductor devices are becoming smaller and smaller. As sizes decrease, the challenges associated with achieving reliable manufacturing methods for thin and ultra-thin chips increase. This is particularly problematic for so-called photonic chips, which use light instead of electricity. Photonic chips have many applications and are thought to be particularly useful in molecular environments, where they can be used as probes, etc.

[0003] Current standard photonic chips are approximately 750 μm thick. These can generally be reliably manufactured using current technology, as described in more detail below. Current needs call for photonic chips <50 μm thick. Current technology does not provide reliable yields, and in many cases entire wafers can be destroyed by the techniques required for current methods.

[0004] Many proposals exist. Currently, back-grinding of wafers after photonic device fabrication is the preferred method for manufacturing. However, the back-grinding process is only reliable for target thicknesses >100 μm.

[0005] Controlling backgrind thickness for target thicknesses <50 μm is extremely difficult using existing methods, especially for processed photonics wafers with wafer topology and thickness non-uniformity, as the thickness is simply too thin. Also, picking up or removing such thin chips from the wafer is extremely difficult, which can introduce microcracks and chip breakage during the delamination process. As a result, many devices may be destroyed during wafer backgrinding and / or chip pick-up or collection of ultra-thin devices.

[0006] figure 1 is 1 shows an example of a typical process for fabricating photonics chips. A substrate 100 is processed to add, for example, a buried oxide layer (BOX) layer 102 onto the substrate. Waveguides 104 are deposited and a cladding layer 106 is applied. The device is processed to include multiple deep trenches 108 (two of which are shown) to allow for the individual chips to be separated from one another at a later stage. Once chip processing is complete, a backgrinding process is performed on the wafer (which is placed on an adhesive backing sheet, not shown), and the wafer is then polished to a desired thickness. 1 to The resulting device is as shown. If the thickness requirement is not too thin, the final wafer will have a uniform spread of viable devices. However, for thinner devices and other problems associated with backgrinding, the entire wafer may be damaged to the point that virtually no chips remain after backgrinding. The wafer is then directly thinned by mechanical backgrinding. Thickness control and yield are very poor for thin chips.

[0007] Other solutions have been proposed to address the need for thinner devices. These include dicing by thinning, which involves temporarily bonding the device wafer to a handle wafer, followed by wafer backgrinding and an automated die singulation process. The same problems persist with thin wafers and chips: backgrinding and separation of the chips is difficult, resulting in low or non-existent yields. The thickness required for ultra-thin devices cannot be achieved.

[0008] A further proposal is the use of buried cavity thinning. This requires the definition of local buried cavities. Wafer processing is followed by trench etching and chip singulation by pick-and-place. This type of process is not feasible for thin devices due to low yield and reliability. Furthermore, the need to predefine the cavities locally incurs additional process costs.

[0009] Another method is the well-known epitaxial growth and selective etching technique. A silicon (Si) epitaxial layer with a heavily doped film is deposited on a wafer, followed by a Si epitaxial layer with a lightly doped film. The wafer is then back-ground to thin it, and then Si etched to thin it further. However, the use of epitaxial layers and back-grinding does not work well for photonic applications, and the failure rate is too high for the process to be suitable for chips on the order of >100 μm thick. This method is simply not applicable to photonic applications due to the high cost of the epitaxy process, long process times, and the potential for high losses induced by the doped film. Summary of the Invention [Problem to be solved by the invention]

[0010] It is an object of the present invention to provide a simple manufacturing method for producing thin integrated photonic chips that can be easily removed with the result of more controllable thickness.

[0011] Another object of the present invention is to provide an ultra-thin photonics chip and manufacturing method that overcomes at least some of the problems associated with the prior art.

[0012] The embodiments described below are not limited to implementations that solve any or all of the shortcomings of the prior art. [Means for solving the problem]

[0013] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended for use as an aid in determining the scope of the claimed subject matter.

[0014] According to one aspect of the present invention, a semiconductor device is provided with a support layer formed from a material that is not susceptible to etching processes, allowing the support layer to be deposited to a predetermined thickness during manufacturing, thereby allowing for precise control of the required thickness of the device.

[0015] Preferably, the support layer includes a buffer layer.

[0016] Preferably, the buffer layer comprises SiO2, SiON, or SiN.

[0017] Preferably, the support layer further comprises an additional etch stop layer.

[0018] Preferably, the support layer is on the order of a few tens of microns.

[0019] Preferably, the device is a photonic chip.

[0020] Preferably, the device is an ultra-thin device.

[0021] According to one aspect of the present invention, a method is provided, the method comprising forming a substrate, forming a support layer having a predetermined thickness related to a required thickness of a semiconductor device from a first type of material that is not susceptible to etching processes, forming the device on the support layer, forming at least one layer of cladding material over the device, forming a plurality of trenches in the layer that extend at least to the substrate, applying a film over the cladding material, and at least partially removing the substrate using an etching process to separate the device from others on the wafer.

[0022] Preferably, the method further comprises removing the substrate using a combination of back-grinding and wet etching processes.

[0023] Preferably, the method further comprises forming an additional etch stop layer on the support layer.

[0024] Preferably, the support layer includes a buffer layer and comprises at least one of SiO2, SiON, and SiN.

[0025] Preferably, the method further comprises separating the chips by removing the film so that the edges of the individual devices are defined by trenches.

[0026] Preferably, the method further comprises forming a trench around each side of the device.

[0027] Preferably, the method further comprises the step of controlling the formation of the support layer to produce a device having the required thickness.

[0028] Preferably, the film is a non-etchable material.

[0029] The preferred features may be combined as appropriate and in any aspect of the invention, as will be apparent to those skilled in the art. [Brief explanation of the drawings]

[0030] Embodiments of the present invention will now be described, by way of example only, with reference to the following drawings, in which: [Figure 1] 1 shows a schematic diagram of a first prior art method. [Figure 2] 1A-1D are schematic diagrams illustrating a manufacturing process for an ultra-thin photonics chip according to one embodiment of the present invention. Common reference numbers are used throughout the drawings to denote like features. DETAILED DESCRIPTION OF THE INVENTION

[0031] The following describes embodiments of the present invention by way of example only. These examples represent the best ways of carrying out the invention currently known to applicant, but are not the only ways that this can be accomplished. The description sets forth the functions of the examples and the sequence of steps for constructing and operating the examples. However, the same or equivalent functions and arrangements may be accomplished by different examples.

[0032] The present invention relates to a simple manufacturing method for producing thin integrated chips or semiconductor devices, such as photonic chips, that can be easily singulated, achieving improved yields and controllable thickness.

[0033] FIG. 2 shows an example of a method for manufacturing a photonics chip having a thickness of several μm to several tens of μm.

[0034] A silicon substrate 200 is taken. This can be of any suitable size, for example on the order of 725 μm (±25 μm). According to the present invention, the substrate material must be etchable so that it can be removed at a later stage in the process, as will be explained below. The preferred material is silicon, but other substrates may be used instead, provided that the material can be removed as required below. For most applications, a silicon substrate is used. However, glass wafers can also be used, in which case the layers and process flows are adapted to suit the materials involved.

[0035] A buffer layer 202 is deposited on the substrate. The thickness of this buffer layer controls the final chip thickness. The thickness of this deposition can be carefully controlled and can be predetermined depending on the requirements, so that the chip thickness is precisely controlled. The buffer layer can be any suitable material that can act as an etch stop layer during etching of the substrate, including, for example, SiO2, SiON, SiN, etc. The buffer oxide layer is selected to be a material that is not etchable or has high etch selectivity by subsequent wet etching processes.

[0036] Once the overall device thickness is determined, the manufacturer knows the typical thicknesses of all the required device layers and can then calculate the required thickness of the buffer layer to arrive at the required overall device thickness.

[0037] As mentioned above, the thickness of the buffer layer defines the thickness of the final chip. Different types of chips can be of different thicknesses, and the same type of chip may require different predetermined thicknesses for one application or another. As an example, the buffer layer may be ∼20-30 μm for neurophotonics applications.

[0038] In the next step of the process, another etch stop layer 204 is deposited on the buffer layer using a chemical vapor deposition (CVD) process. This layer has a thickness of about a few microns to tens of microns, comprises, for example, SiN or SiON, and is generally used to separate the BOX and buffer layer, if necessary. The etch stop layer is used to stop the etch in the next step of the process, as described in more detail below. This layer essentially serves two different purposes: first, to separate the BOX and buffer layer; and second, if the buffer layer is an oxide, to act as an etch stop for the oxide cladding etch prior to etching the buffer layer. The etch stop layer can be omitted based on the application, design requirements, and materials used.

[0039] In the next step of the process, a BOX layer 206 is deposited on the etch stop layer. This layer is a few microns thick and comprises, for example, oxide. This is a photonic function layer with a lower refractive index compared to the waveguide layer for optical confinement.

[0040] In the next step of the process, a waveguide 208 is deposited on the BOX layer. This layer has a thickness of tens of nanometers to several micrometers and is made of, for example, silicon, silicon nitride (SiN), silicon oxynitride (SiON), polycrystalline Si, or amorphous Si. In a photonics chip, for example, a waveguide is deposited on the BOX layer. At this point, different devices can be fabricated as needed for the proposed chip. For different types of chips, other devices can be fabricated. Any appropriate devices can be added depending on the application and function of the chip.

[0041] In the next step of the process, an optional upper cladding layer 210 is deposited on the device, which is a few microns thick and comprises, for example, an oxide layer.

[0042] In the next process step, deep trenches 212 are applied to the wafer. In the illustrated example, two are located on either side of the waveguide. The trenches are formed by any suitable process, which may include, for example, reactive ion etching (RIE) or inductively coupled plasma etching (ICP). The trenches are only formed as deep as the substrate; there are substantially no trenches in the substrate, for reasons that will be explained later. Although not shown, there are trenches in both the X and Y directions on the wafer, separating each chip from the next.

[0043] After the wafer is fabricated and the trenches are formed, it is attached to a film, such as Mylar film (not shown) or UV tape. The film is applied to a cladding layer to hold the chip in place for the next stage of the process. Once supported by the film, the wafer undergoes a process to remove the entire substrate, which may involve, at least in part, a backgrinding process. Using backgrinding, the substrate is reduced from its original thickness to approximately 50 μm (±25 μm), leaving a total remaining thickness of approximately 100 μm, which is the minimum thickness to ensure sufficient backgrind yield. This means that the amount of substrate removed by backgrinding is selected to be optimal to prevent damage to the overlying surface of the wafer. The resulting device is then Figure 2 The backgrinding process involves using a grinder to grind away a portion of the substrate while the wafer is supported on a film.

[0044] The film material is ideally non-etchable so that the wafer remains intact during the subsequent wet etch.

[0045] In the next step of the present invention, the ground wafer is subjected to a silicon wet etching process, Figure 2The remainder is removed to the substrate, as shown in Figure 1. The wet etching process involves exposing the substrate silicon to a solution such as tetramethylammonium hydroxide (TMAH) to remove the remaining silicon and automatically separate the chips.

[0046] Figure 2 As seen in Figure 1, the wet etching process removes all material down to the bottom of the deep trench. The buffer layer is not etched because it is made of a non-etchable material. The thickness of the buffer layer is predetermined so that the resulting chip will have the required thickness. Therefore, the resulting device has the buffer layer as a support layer rather than the substrate, which typically serves this purpose.

[0047] It should be noted that removal of the substrate, leaving behind the buffer layer as a support layer for the device, can be performed in one or more different steps, such as backgrinding and wet etching, in some cases wet etching alone, or any other suitable step or combination of steps.

[0048] As a result of the trenches, individual devices can be easily separated from one another across the area of ​​the wafer. Once the substrate is etched away, there is nothing holding the individual chips together except for the support of the film. The individual chips are held in place by a film (not shown), or if the film is etched, they can recover after etching.

[0049] The method and ultimate resulting chip of the present invention is a photonics chip, however, it is understood that the process can be used for other types of ultra-thin processing methods and chips, including for example thin devices such as flexible displays.

[0050] The present invention can include many variations and alternatives to the examples described above, which are intended to be included within the scope of the present invention. The present invention is particularly directed to photonic chips, but can also be used in other types of devices, such as flexible electronic devices.

[0051] According to one aspect of the present invention, a semiconductor device is provided having a support layer formed from a material that is not susceptible to etching processes, and during manufacturing the support layer is deposited to a predetermined thickness, thereby allowing for precise control of the required thickness of the device.

[0052] Preferably, the support layer includes a buffer layer.

[0053] Preferably, the buffer layer comprises SiO2, SiON, or SiN.

[0054] Preferably, the support layer further comprises an additional etch stop layer.

[0055] Preferably, the support layer is on the order of a few tens of microns.

[0056] Preferably, the device is a photonic chip.

[0057] Preferably, the device is an ultra-thin device.

[0058] According to one aspect of the present invention, a method is provided, the method comprising forming a substrate, forming a support layer having a predetermined thickness related to a required thickness of a semiconductor device from a first type of material that is not susceptible to etching processes, forming the device on the support layer, forming at least one layer of cladding material over the device, forming a plurality of trenches in the layer that extend at least to the substrate, applying a film over the cladding material, and at least partially removing the substrate using an etching process to separate the device from others on the wafer.

[0059] Preferably, the method further comprises removing the substrate using a combination of back grinding and wet etching processes.

[0060] Preferably, the method further comprises forming an additional etch stop layer on the support layer.

[0061] Preferably, the support layer comprises a buffer layer and comprises at least one of SiO2, SiON and SiN.

[0062] Preferably, the method further comprises separating the chips by removing the film so that the edges of the individual devices are defined by trenches.

[0063] Preferably, the method further comprises forming a trench around each side of the device. Preferably, the method further comprises controlling the formation of the support layer to produce a device having the required thickness.

[0064] Preferably, the film is a non-etchable material.

[0065] As will be apparent to one skilled in the art, any range or device value given herein may be extended or modified without losing the desired effect. Similarly, any material may be substituted with another material having similar properties.

[0066] It is understood that the benefits and advantages described above may relate to one embodiment or to several embodiments, and embodiments are not limited to those that solve any or all of the described problems or that have any or all of the described benefits and advantages.

[0067] A reference to 'an' item refers to one or more of those items. The term "comprising" is used herein to mean including specified method blocks or elements, but such blocks or elements do not comprise an exclusive list and a method or apparatus may include additional blocks or elements.

[0068] The steps of the methods described herein may be performed in any suitable order, or simultaneously where appropriate. Additionally, individual blocks may be deleted from any method without departing from the spirit and scope of the subject matter described herein. Aspects of any of the above embodiments may be combined with aspects of any of the other embodiments described above to form further embodiments without losing the desired effect.

[0069] It will be understood that the above description of preferred embodiments is given by way of example only, and that various modifications may be made by those skilled in the art. Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art could make many changes to the disclosed embodiments without departing from the spirit or scope of the invention.

Claims

1. A method for manufacturing a plurality of semiconductor devices, comprising: forming a substrate; forming a buffer oxide layer on the substrate, the buffer oxide layer being a first etch stop layer, the buffer oxide layer being made of SiO or SiON and having a predetermined thickness; forming a second etch stop layer of SiN on the buffer oxide layer; forming a semiconductor device on the second etch stop layer; forming at least one layer of cladding material over the semiconductor device; forming a plurality of trenches in the layer extending at least to the substrate; applying a film over the cladding material; removing, at least in part, the substrate using an etching process to separate each semiconductor device from others on the substrate; removing the substrate using a combination of backgrinding and wet etching processes; separating the semiconductor device into individual semiconductor devices by removing the film such that the edges of each individual semiconductor device are defined by the trenches; The individual semiconductor device includes: a first etch stop layer, the buffer oxide layer comprising SiO or SiON; the second etch stop layer comprising SiN deposited on the buffer oxide layer; a device deposited on the second etch stop layer; the cladding material deposited on the device; A method for manufacturing a semiconductor device having a thickness of less than 50 μm.

2. The method of claim 1 further comprising forming the trench around each side of the semiconductor device.

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