Program, information processing system and information processing method

The program and system integrate design and implementation by reflecting verification results in the model, addressing inconsistencies through visual presentation, ensuring long-term consistency and high-quality development outcomes.

JP7770720B2Active Publication Date: 2025-11-17LIBERAL LOGIC INC
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Patent Information

Application Number
JP2024196334
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2024-04-08
Filing Date
2024-11-08
Publication Date
2025-11-17
Estimated Expiration
2044-11-08

AI Technical Summary

Technical Problem

Existing software development processes often require repeated implementation and verification due to code modifications, with design updates failing to reflect these changes, leading to inconsistencies between design and implementation.

Method used

A program and information processing system that identifies logical elements and verification items from implemented code, acquires verification results, and generates presentation information to reflect these results in the designed model, ensuring consistency between design and implementation.

Benefits of technology

This approach allows for the seamless integration of design and implementation, preventing deviations by visually representing verification results, thereby maintaining long-term consistency and enabling high-quality development deliverables.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a program, an information processing system, and an information processing method that can reflect verification results of implemented code in a designed model.SOLUTION: According to one embodiment of the present invention, a program is provided that causes at least one computer to execute the following steps: in a specification step, identifying a logical element to be verified from code implemented based on a model and a verification item for the logical element; in an acquisition step, acquiring a verification result of the logical element; and in a generation step, generating presentation information representing the model in a diagram by associating the verification result with the logical element.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a program, an information processing system, and an information processing method. [Background technology]

[0002] When building a system, the processes are carried out in the order of designing a model, implementing the designed model using code, and verifying the implemented code, and the code is modified depending on the verification results. Note that a technology for verifying software programs has been proposed, for example, as described in Patent Document 1.

[0003] Patent Document 1 discloses a method and system for verifying a software program in an integrated development environment. The method for verifying a software program in an integrated development environment includes generating source code for the software program, including logging statements, based on a specification of the software program. The method further includes executing the source code having the logging statements and generating one or more log files during execution of the source code based on the logging statements. The method further includes generating a representation of the source code in a modeling language using the one or more log files. The method includes verifying that the source code complies with the specification by comparing the representation of the source code in the modeling language with the specification in the modeling language. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2020-505710 Summary of the Invention [Problem to be solved by the invention]

[0005] However, implemented code is often modified multiple times, and in this case, implementation and verification are repeated, and the modifications may not be reflected in the design.

[0006] In view of the above circumstances, the present invention provides a program, an information processing system, and an information processing method that can reflect the verification results of implemented code in a designed model. [Means for solving the problem]

[0007] According to one aspect of the present invention, there is provided a program that causes at least one computer to execute the following steps: in the identification step, a logical element to be verified and a verification item for the logical element are identified from code implemented based on a model; in the acquisition step, verification results for the logical element are acquired; and in the generation step, the verification results are associated with the logical element to generate presentation information that represents the model in a diagram.

[0008] According to one aspect of the present invention, the verification results of the implemented code can be reflected in the designed model. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a diagram showing a configuration of an information processing device 1. FIG. [Figure 2] 1 is a block diagram showing a functional configuration of an information processing device 1. FIG. [Figure 3] FIG. 2 is a block diagram showing the functional configuration of a reflection unit 140. [Figure 4] 1 is a flowchart showing an outline of processing executed by the information processing device 1. [Figure 5] 10 is a flowchart showing the flow of operations of the reflection unit 140. [Figure 6] 10 is a diagram for explaining the operation of a reflection unit 140. FIG. [Figure 7] FIG. 10 is a diagram showing an example of presentation information. [Figure 8]FIG. 10 is a diagram showing an example of presentation information in which a verification result is reflected. [Figure 9] 10A and 10B are diagrams illustrating examples of presentation information of logic elements including progress information and the like. [Figure 10] 10A and 10B are diagrams illustrating examples of presentation information of logic elements including progress information and the like. [Figure 11] FIG. 10 is a diagram illustrating an example of extension of presentation information. [Figure 12] This is a diagram showing the flow of integrating design and implementation. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Various features shown in the following embodiments can be combined with each other.

[0011] Incidentally, the program for realizing the software appearing in one embodiment may be provided as a non-transitory computer-readable medium, or may be provided so that it can be downloaded from an external server, or may be provided so that the program is started on an external computer and its functions are realized on a client terminal (so-called cloud computing).

[0012] Furthermore, various information processing according to an embodiment may realize input and output corresponding to the input. Here, the form of information referenced in such information processing (hereinafter referred to as reference information) is not limited as long as an output is obtained as a result of the input. The reference information may be, for example, rule-based information such as a database, a lookup table, or a predetermined function (including a decision formula such as a regression formula constructed using a statistical method), a trained model that has previously trained the correlation between input and output, or a large-scale language model that can output a desired result by inputting a prompt.

[0013] In one embodiment, a "unit" may include, for example, a combination of hardware resources implemented by a circuit in the broad sense and software information processing that can be specifically realized by these hardware resources. In one embodiment, various information is handled, and this information is represented, for example, by physical values ​​of signal values ​​representing voltage and current, high and low signal values ​​as a binary bit set consisting of 0 or 1, or quantum superposition (so-called quantum bits), and communication and calculations can be performed on a circuit in the broad sense.

[0014] Furthermore, a circuit in the broad sense is a circuit realized by at least an appropriate combination of a circuit, circuitry, processor, memory, etc. The processor may be a general-purpose processor or a dedicated circuit. That is, it includes an application specific integrated circuit (ASIC), a programmable logic device (e.g., a simple programmable logic device (SPLD), a complex programmable logic device (CPLD), and a field programmable gate array (FPGA)), etc.

[0015] 1. Configuration of information processing device 1 is a diagram showing the configuration of an information processing device 1. As shown in the figure, the information processing device 1 has a processor 11, a storage unit 12, a temporary storage unit 13, an external device connection unit 14, and a communication unit 15, and these components are electrically connected within the information processing device 1 via a communication bus 16.

[0016] The processor 11 is realized by, for example, a central processing unit (CPU), and operates in accordance with a predetermined program stored in the storage unit 12 to realize various functions. That is, information processing by software stored in the storage unit 12 is specifically realized by the processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11. These will be described in more detail in the next section. The processor 11 is not limited to being a single processor, and may be implemented with multiple processors 11 for each function. A combination of these may also be used.

[0017] The storage unit 12 is a non-volatile storage medium that stores various information. This is realized by a storage device such as a hard disk drive (HDD) or a solid state drive (SSD). Note that the storage unit 12 can also be arranged in another device that can communicate with the information processing device 1.

[0018] The temporary storage unit 13 is a volatile storage medium, which is realized by a memory such as a random access memory (RAM), and stores information (arguments, arrays, etc.) that is temporarily required when the processor 11 operates.

[0019] The external device connection unit 14 is a connection unit that conforms to standards such as Universal Serial Bus (USB) and High-Definition Multimedia Interface (HDMI (registered trademark)), and allows connection of input devices such as keyboards and display devices such as monitors.

[0020] The communication unit 15 is a communication means conforming to, for example, a local area network (LAN) standard, and realizes communication between the information processing device 1 and the local area network or a network such as the Internet via the local area network.

[0021] It should be noted that the information processing device 1 can be a general-purpose server computer, a personal computer, or the like, and the information processing device 1 can also be configured using a plurality of computers.

[0022] 2. Functions of the information processing device 1 Next, an information processing system will be described. The information processing system is an information processing system consisting of at least one device, and has at least one processor capable of executing each step of a program described below. Here, an information processing system is one consisting of one or more devices or components. Therefore, even an information processing device 1 alone is included in the information processing system. In other words, a device constituting the information processing system is, for example, the information processing device 1, and the information processing system is realized by one or more information processing devices 1. Note that the following description will be given taking as an example a case where an information processing system is constituted by one information processing device 1.

[0023] The functions of the information processing device 1 will now be described. The information processing device 1 operates in accordance with a program to realize each of the functional units described below. This program causes at least one computer to execute each of the steps described below. Specifically, the processor 11, which is hardware, operates based on a program stored in the storage unit 12, i.e., software, to realize each of the functional units described below. At this time, the processor 11 operates the storage unit 12, temporary storage unit 13, external device connection unit 14, and communication unit 15 as necessary.

[0024] 2 is a block diagram showing the functional configuration of the information processing device 1. As shown in the figure, the information processing device 1 includes a design unit 110, an implementation unit 120, a verification unit 130, and a reflection unit 140. That is, information processing by software stored in the storage unit 12 is specifically realized by a processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11.

[0025] Specifically, the design unit 110 is a functional unit that designs a model, the implementation unit 120 is a functional unit that implements the model designed by the design unit 110 using code, the verification unit 130 is a functional unit that verifies the code implemented by the implementation unit 120, and the reflection unit 140 is a functional unit that reflects the results of the verification by the verification unit 130 in the model designed by the design unit 110. Note that the design unit 110, the implementation unit 120, and the verification unit 130 can each be realized by general-purpose software. In that case, depending on the specifications of each software, it is also possible for information to be passed from the design unit 110 to the reflection unit 140 or from the implementation unit 120 to the reflection unit 140, as shown by the dashed arrows in FIG. 2.

[0026] Next, the function of the reflection unit 140 will be described. FIG. 3 is a block diagram showing the functional configuration of the reflection unit 140. As shown in FIG. 3, the reflection unit 140 includes an identification unit 141, an acquisition unit 142, and a generation unit 143. The identification unit 141 executes an identification step, in which the identification step identifies logical elements to be verified and verification items for the logical elements from code implemented based on a model. The acquisition unit 142 executes an acquisition step, in which the acquisition step acquires verification results for the logical elements. The generation unit 143 executes a generation step, in which the verification results are associated with the logical elements and presentation information representing the model as a diagram. The model represented by the diagram, i.e., the model designed by the design unit 110, is, for example, written in a modeling language or as a model on a modeling tool. According to this embodiment, various verification functions of the program described below can be realized for a model written in a modeling language or a model written as a model on a modeling tool. 3. Information Processing Method This section describes an information processing method executed by an information processing system (here, information processing device 1). Note that the order of processes included in the information processing method can be changed as appropriate, multiple processes may be executed simultaneously, or some processes may be omitted.

[0027] 3.1 Overview As described above, the information processing device 1 includes at least one processor 11, which functions as each of the following units by reading a program. In other words, the information processing method includes steps corresponding to each unit of the information processing system. From another perspective, the program causes a computer to execute steps corresponding to each unit of the information processing system. FIG. 4 is a flowchart showing an outline of the processing executed by the information processing device 1. Each step shown in FIG. 4 will be described below.

[0028] First, in the process shown in FIG. 4 , the identification step identifies a logic element 2 to be verified from code implemented based on a model and the verification items 3 for the logic element 2 (step S001). The acquisition step acquires the verification results 4 for the logic element 2 (step S002). The generation step associates the verification results 4 with the logic element 2 and generates presentation information representing the model in a diagram (step S003). This aspect allows the verification results of the implemented code to be reflected in the designed model, making it possible to verify the consistency between design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, ultimately realizing an environment that continuously produces high-quality development deliverables. Furthermore, the ability to reflect a large number of verification results in the design model all at once makes it possible to prevent discrepancies between the design model and the implemented code.

[0029] 3.2 Specific examples Specific examples may be included within the scope defined in the above-mentioned overview. Fig. 5 is a flowchart showing the flow of the operation of the reflection unit 140. Fig. 6 is a diagram for explaining the operation of the reflection unit 140. In the specific examples, it is assumed that a user who has implemented source code and test code in an implementation environment included in this program tests the source code. Specifically, a test is executed when the user presses (e.g., clicks, taps, etc.) a button for executing a test, which is included in the user interface of the implementation environment.

[0030] When the initial pressing operation is performed, the identification unit 141 first identifies a logical element 2 from the source code and test code implemented by the implementation unit 120 (step S101), and then identifies a verification item 3 from the identified logical element 2 (step S102). In other words, as the identification step, the identification unit 141 identifies the logical element 2 to be verified and the verification item 3 of the logical element 2 from the code implemented based on the model. Because the source code and test code are written according to predetermined rules, the logical element 2 and the verification item 3 can be identified according to the rules, specifications, etc. of the corresponding programming language.

[0031] Next, the reflection unit 140 causes the verification unit 130 to execute verification and waits for the verification to finish (step S103). Note that step S103 in Fig. 3 is not an operation of the reflection unit 140, but is described for the sake of explanation.

[0032] When the verification by the verification unit 130 is completed, the acquisition unit 142 of the reflection unit 140 acquires the verification result 4 and records it in association with the corresponding test item (step S104). In other words, the acquisition unit 142 acquires the verification result 4 of the logic element 2 as an acquisition step.

[0033] Next, in response to an operation by the user, the screen transitions from the implementation environment screen to the model design environment screen (step S105).

[0034] Next, in response to a user operation, the identification unit 141 analyzes the contents of the implemented test code and extracts a list of verification items 3, which previously had to be done manually, on the user interface of the model design environment (step S106).

[0035] Then, the generation unit 143 generates presentation information in a manner that allows the list of verification items 3 to be grasped (step S107). The generated presentation information may be displayed on a display (not shown) connected via the external device connection unit 14. This allows the user to grasp the verification items 3 that have been automatically listed as described above and the corresponding verification results 4 in the model design environment via the generated presentation information. Details will be explained further in the next section. In other words, as a generation step, the generation unit 143 associates the verification results 4 with the logical elements 2 and generates presentation information that represents the model in a diagram.

[0036] The above is the process flow according to the specific example. Note that the above assumptions and process flow are merely examples and are not limited to these. For example, step S107 may be executed before steps S105 and S106. In either case, the user can understand the verification items 3 automatically listed as described above and the corresponding verification results 4 in the model design environment via the generated presentation information. Conventionally, it has not been possible to visually confirm the consistency between design and implementation. However, according to the above-described aspect, it is possible to prevent a deviation between the design model and the implemented code, which is caused by the conventional independent processes.

[0037] 4. Presentation information Next, the presentation information generated by the generation unit 143 will be described. FIG. 7 is a diagram showing an example of the presentation information. The presentation information shown in FIG. 7 is a diagram representing the model designed by the design unit 110, and is composed of a logic element 201, a logic element 202, a logic element 203, a logic element 204, a logic element 205, and a logic element 206. It also shows that the logic element 201 is composed of a logic element 202, a logic element 203, a logic element 204, a logic element 205, and a logic element 206. Each logic element 2 has a corresponding verification item 3, and the verification items 3 are automatically listed in the user interface of the model design environment. For example, when the logic element 202 is referenced, the verification items 3, such as fff(), ggg(), and hhh(), are automatically listed. For example, if there are 1,000 verification items 3, it would be time-consuming to input all 1,000 verification items 3 in the model design environment, but this program eliminates this time-consuming effort. In particular, because it allows visual understanding of the relationships between multiple logical elements 2, for example, if there are consecutive logical elements 2, if verification of the preceding logical element 2 fails, it is possible to visually and intuitively understand that the subsequent logical element 2 will also fail. Furthermore, not only does it ensure consistency between design and implementation, but it also makes it possible to judge the validity of verification on the design model. In other words, it creates an environment in which logical consistency can be understood in a seamless manner throughout the entire process of design, implementation, and verification.

[0038] Furthermore, when verification is performed by the verification unit 130, the presentation information generated by the generation unit 143 reflects the verification result. FIG. 8 is a diagram illustrating an example of presentation information reflecting the verification result. For example, the presentation information is presented in a manner in which the colors representing the logic elements differ depending on whether the verification result is successful, i.e., the verification is passed, or whether the verification result is unsuccessful, i.e., the verification is failed. In the example illustrated in FIG. 8, logic elements 202 and 204 are successfully verified and are represented in a color indicating successful verification, for example, green. On the other hand, logic elements 201, 203, and 205 are represented in a color indicating unsuccessful verification, for example, red. According to this embodiment, the success or failure of the verification result of the implemented code can be recognized through easy-to-understand visual information, i.e., the difference in color.

[0039] Furthermore, in the presented information, the color representing the logical elements corresponding to the verification result is different from the color representing the logical elements not corresponding to the verification result. In the example shown in FIG. 8, the logical element 206 does not correspond to the verification result, so it is represented in a color different from the logical elements 201 and 202, for example, white. According to this aspect, the verification result of the implemented code can be recognized through easy-to-understand visual information such as the difference in color. Note that the verification by the verification unit 130 may be performed repeatedly. In this case, the presented information may be displayed in a manner that maintains the color representing the logical elements not corresponding to the verification result the same as the previous color. According to this aspect, by not changing the color of the logical elements not corresponding to the verification result among the verification results of the implemented code, the user can recognize the verification result more clearly.

[0040] Meanwhile, verification by the verification unit 130 is performed for each verification item, but a logical element may include multiple verification items. In this case, the colors of the logical elements indicated by the presentation information may not only be different for successful verification and unsuccessful verification, but may also be a color indicating that more than half of the verification items have been successfully verified, such as yellow. Furthermore, the presentation information may be configured to indicate the colors representing the logical elements in colors corresponding to the percentage of successful verification results. According to this aspect, multiple verification items can be recognized from the verification results of the implemented code through easy-to-understand visual information such as different colors.

[0041] Furthermore, when a logic element includes multiple verification items, the presented information may be displayed in such a manner that progress information indicating the percentage of successful verification results is associated with the corresponding logic element, or a character string indicating the verification result is associated with the corresponding logic element. This configuration allows the user to easily grasp the progress of multiple verification items and more clearly recognize the verification results. FIGS. 9 and 10 show examples of presented information for a logic element, including progress information. As shown in the figures, a logic element 210 includes a name 211, summary information 212, progress status information 213, and verification result information 214. This logic element 210 can be used as a substitute for the logic elements 201, 202, etc., shown in FIG. 8.

[0042] The name 211 is the name of the logic element 210, and the summary information 212 is information that indicates an overview of the definition information, functions, and the like included in the logic element 210. The progress status information 213 indicates the percentage of verification items that have been successfully verified by the verification unit 130 as progress (represented as test success rate in the figure). For example, if there are 10 verification items and 5 of them have been successfully verified, the progress status is 50%. The verification result information 214 is character string information that indicates the verification result. Note that by changing the color of the bar 213B indicating the progress status included in the progress status information 213 to the color (e.g., green) that is used when the progress information of the logic element 210 reaches 100%, that is, when verification of all verification items has been successful, the color of the logic element 210 is unified as shown in FIG. 10, and the visibility of the diagram including the logic element 210 is improved.

[0043] 5. Expanded display information Here, an example of extension of the presentation information will be described. FIG. 11 is a diagram showing an example of extension of the presentation information. As shown in FIG. 11, when progress status information is included in the logical elements included in the diagram of the presentation information, the progress information can be displayed in the form of a graph as the presentation information. This graph is generated for each logical element, and graphs showing the progress information of each of the logical elements can also be displayed side by side. According to this embodiment, the progress of multiple verification items can be easily grasped through easy-to-understand visual information such as a graph. In this example, the number of successes is 110, while the number of failures is 7. In particular, when there are a huge number of verification items, such as more than 100, the success rate can be instantly grasped by visual information such as a graph.

[0044] 6. Integrating Design and Implementation As described above, by using the information processing device 1, it is possible to integrate a designed model and an implementation based on that model. Fig. 12 is a diagram showing the flow of integrating design and implementation. If design and implementation are not integrated, there are problems such as design information not being updated even though the design and implementation are completely different, the inability to grasp the comprehensiveness of verification for the entire system, and repeated ad hoc verification with no end in sight. One of the reasons for these problems is the gradual loss of opportunities to access design information during the processes of design, implementation, and verification.

[0045] In contrast, if design and implementation are integrated, · Reflecting a large amount of unit test results in the design model (UML, SysML) all at once - Unit test date and time, and the location and cause of failure when a test fails can also be reflected. -Successful elements are green, and failed elements are red, allowing you to instantly distinguish between them. -Supports large-scale development · Contributes to updating design information in organizations working on design, implementation, and verification Ideal for building a system that ensures consistency between design, implementation, and verification - Implementation can be visually confirmed on the design information, making it easy to grasp the implementation status. - Visual judgment helps maintain motivation at the development site This makes it possible to:

[0046] 5.Other The information processing system according to the above embodiment may adopt the following aspects.

[0047] At least one of the devices included in the information processing system (e.g., the information processing device 1) may be installed outside Japan. For example, the information processing device 1 may be installed outside Japan, and a user terminal connected to the information processing device 1 via a network may be installed inside Japan. Similarly, a user may access the information processing device 1 installed inside Japan from outside Japan using their own user terminal. This configuration may be, for example, a type of SaaS using a website provided by the information processing device 1. In such a service, a user may access the website and upload predetermined information such as test code, thereby obtaining presented information in which the verification result 4 is reflected in a model. In other words, according to this configuration, a more convenient experience can be provided to the user through various management configurations.

[0048] In one embodiment, the various functional units are described as functional units implemented by the processor 11 of the information processing device 1, but at least some of these may be implemented as functional units implemented by a server other than the information processing device 1. Alternatively, they may be implemented as functional units implemented by a processor of a user terminal. Furthermore, the various pieces of information described in the above example may be stored not only in the storage unit 12 of the information processing device 1 but also in a distributed manner in other external devices using blockchain technology or the like.

[0049] Furthermore, it may be provided in the following aspects.

[0050] (1) A program that causes at least one computer to execute the following steps: in the identification step, identifying logical elements to be verified from code implemented based on a model and verification items for the logical elements; in the acquisition step, acquiring verification results for the logical elements; and in the generation step, associating the verification results with the logical elements and generating presentation information that represents the model in a diagram.

[0051] According to this aspect, the verification results of the implemented code can be reflected in the designed model, making it possible to verify the consistency between the design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, thereby realizing an environment in which high-quality development deliverables can be continuously produced. In addition, a large number of verification results can be reflected in the design model all at once, making it possible to prevent deviations between the design model and the implemented code.

[0052] (2) In the program described in (1) above, the presentation information is a program in which the color representing the logical elements that correspond to the verification result is different from the color representing the logical elements that do not correspond to the verification result.

[0053] According to this aspect, the verification result of the implemented code can be recognized through easy-to-understand visual information such as the difference in color.

[0054] (3) In the program described in (2) above, the presentation information is displayed in a manner that the color representing the logical element is different when the verification result is a success and when the verification result is a failure.

[0055] According to this aspect, the verification result of the implemented code can be recognized as success or failure through easy-to-understand visual information such as a difference in color.

[0056] (4) In the program described in (2) or (3) above, the logical element includes a plurality of the verification items, and the presented information is a program in which the color representing the logical element is displayed in a color corresponding to the percentage of the verification results that are successful.

[0057] According to this aspect, among the verification results of the implemented code, multiple verification items can be recognized through easy-to-understand visual information such as different colors.

[0058] (5) A program according to any one of (2) to (4) above, wherein the logical elements include a plurality of the verification items, and the presented information is progress information representing the percentage of successful verification results, displayed in association with the logical elements corresponding to the progress information.

[0059] According to this embodiment, the progress of multiple verification items can be easily grasped.

[0060] (6) In the program described in (5) above, the presented information is a program in which the progress information is displayed in the form of a graph.

[0061] According to this aspect, the progress of multiple verification items can be easily grasped through easy-to-understand visual information such as a graph.

[0062] (7) In the program described in any one of (2) to (6) above, the presentation information is displayed in a manner that maintains the color representing the logical elements that do not correspond to the verification result the same as the previous color.

[0063] According to this aspect, by not changing the color of the logical elements that do not correspond to the verification results of the implemented code, the user can recognize the results more clearly.

[0064] (8) A program according to any one of (2) to (7) above, wherein the presentation information is displayed in such a manner that a string indicating the verification result is associated with a logical element among the logical elements that corresponds to the verification result.

[0065] According to this aspect, the user can recognize the verification result more clearly.

[0066] (9) A program according to any one of (1) to (8) above, wherein the model is written in a modeling language or as a model on a modeling tool.

[0067] According to this aspect, various verification functions of the program can be realized for a model written in a modeling language or a model written as a model on a modeling tool.

[0068] (10) An information processing system consisting of at least one device, the system having at least one processor capable of executing each step of the program described in any one of (1) to (9) above.

[0069] According to this aspect, the verification results of the implemented code can be reflected in the designed model, making it possible to verify the consistency between the design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, thereby realizing an environment in which high-quality development deliverables can be continuously produced. In addition, a large number of verification results can be reflected in the design model all at once, making it possible to prevent deviations between the design model and the implemented code.

[0070] (11) An information processing method comprising the steps of the program described in any one of (1) to (9) above.

[0071] According to this aspect, the verification results of the implemented code can be reflected in the designed model, making it possible to verify the consistency between the design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, thereby realizing an environment in which high-quality development deliverables can be continuously produced. In addition, a large number of verification results can be reflected in the design model all at once, making it possible to prevent deviations between the design model and the implemented code. Of course, this is not the case.

[0072] Finally, while various embodiments of the present invention have been described, these are presented by way of example only and are not intended to limit the scope of the invention. The novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. Such embodiments and modifications are intended to be included within the scope and spirit of the invention, as well as within the scope of the inventions and their equivalents as defined in the accompanying claims. [Explanation of symbols]

[0073] 1: Information processing equipment 2: Logical elements 3: Verification items 4: Verification results 11: Processing section 12: Storage section 13:Temporary storage 14: External device connection 15: Communications Department 16: Communication bus 110:Design Department 120: Mounting section 130: Verification Department 140: Reflection section 141: Specific part 142: Acquisition Department 143 :Generation part 201: Logical elements 202: Logical elements 203: Logical elements 204: Logical elements 205: Logical elements 206: Logical elements 210: Logical Elements 211 :Name 212: Overview information 213: Progress information 213B: Bar 214: Verification result information

Claims

1. A program, causing at least one computer to perform the following steps: In the identification step, a logic element to be verified and verification items of the logic element are identified from the code implemented based on the model; In the obtaining step, a verification result of the logic element is obtained; In the generating step, the verification results are associated with the logical elements to generate presentation information that represents the model in a diagram; the logic element includes a plurality of the verification items; the presented information is displayed in a color representing the logic element according to the percentage of the verification results that are successful; program.

2. A program, causing at least one computer to perform the following steps: In the identification step, a logic element to be verified and verification items of the logic element are identified from the code implemented based on the model; In the obtaining step, a verification result of the logic element is obtained; In the generating step, the verification results are associated with the logical elements to generate presentation information that represents the model in a diagram; the logic element includes a plurality of the verification items; In the presented information, progress information indicating the percentage of the verification results that are successful is displayed in association with the logic element corresponding to the progress information. program.

3. The presented information is a graph of the progress information. The program according to claim 2.

4. 4. The program according to claim 1, In the presentation information, a color representing a logic element corresponding to the verification result among the logic elements is displayed in a color different from a color representing a logic element not corresponding to the verification result. program.

5. 5. The program according to claim 4, the presentation information is displayed in a manner that the color representing the logic element is different when the verification result is successful and when the verification result is unsuccessful. program.

6. 5. The program according to claim 4, The presentation information includes a color representing a logical element that does not correspond to the verification result among the logical elements. The color will be displayed in a way that maintains the same color as before. program.

7. 5. The program according to claim 4, The presentation information is a logical element corresponding to the verification result among the logical elements. The character string indicating program.

8. 5. The program according to claim 4, The model is described in a modeling language or a model on a modeling tool. It is described as program.

9. An information processing system comprising at least one device, A computer-readable medium comprising at least one processor capable of executing the steps of the program according to any one of claims 1 to 3. system.

10. An information processing method, comprising: The program according to any one of claims 1 to 3, method.

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