Radiation imaging device, radiation imaging system including said device, and structure inspection device

Abstract

To provide a radiation imaging device that is inexpensive so as to be applicable to general-purpose products, and enables high-speed driving, low power consumption, and acquisition of highly accurate image data.SOLUTION: A radiation imaging device according to the present invention uses, in a pixel circuit, a thin film transistor using an oxide semiconductor with a small off-current and a small hysteresis for a channel formation region as an amplifying element, and a thin film transistor using polycrystalline silicon for a channel formation region, which operates at high speed and can reduce power consumption as a switching element for outputting an electric signal from a pixel to a signal line.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a radiation imaging device that uses X-rays or the like, and a radiation imaging system and a structure inspection device that include the radiation imaging device. [Background technology]

[0002] Devices that use radiation to image subjects and structures (hereinafter referred to as radiation imaging devices) are used for a variety of purposes, including the medical and industrial fields. For example, in the medical field, diagnostic imaging devices that use X-rays to image the inside of the human body are widely used in medical settings.

[0003] In conventional radiological imaging devices using X-rays, a specific part of a patient (bones, lungs, etc.) is irradiated with X-rays from an X-ray source, and the X-rays that pass through the specific part are received by a sensor directly or indirectly to obtain image data as digital data. Note that "indirectly" means that the radiation is converted by a scintillator into light of a wavelength that can be detected by a photoelectric conversion element, and then received by the sensor.

[0004] In such radiation imaging devices, pixel circuits are constructed with thin film transistors using amorphous silicon or polycrystalline silicon in general-purpose products, while pixel circuits are constructed with single crystal silicon in high-performance products. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-59293 Summary of the Invention [Problem to be solved by the invention]

[0006] However, amorphous silicon has problems such as low carrier mobility, making it difficult to capture video at high frame rates, and the difficulty of miniaturizing thin-film transistors, resulting in high power consumption. This means that battery-powered devices require frequent charging, making it impossible to capture images in emergencies. Furthermore, when the amplifier element in the pixel circuit is made of amorphous silicon, hysteresis and off-current become problems, making it difficult to capture high-precision images.

[0007] Furthermore, polycrystalline silicon configurations have carrier mobility more than 100 times faster than amorphous silicon, enabling video capture at high frame rates. Furthermore, the size of thin-film transistors can be reduced, enabling lower power consumption. However, the problems of hysteresis and off-state current in amplifying elements remain, hindering the acquisition of highly accurate image data. While it is desirable to detect diseases such as cancer when the lesion is very small, poor image quality can result in such lesions appearing unclearly, leading to doctors overlooking them.

[0008] Furthermore, in the case of a structure using single crystal silicon, the above-mentioned problems do not occur, but it is very expensive and can only be used in high-performance, high-end products.

[0009] In addition, Japanese Patent Laid-Open No. 2004-59293, a prior art document, suggests a radiation imaging device having pixels in which thin film transistors using polycrystalline silicon for the channel formation region and thin film transistors using oxide semiconductors for the channel formation region are mixed. However, the invention disclosed in this publication is characterized in that the channel formation region of a third transistor for storing charges generated by a photoelectric conversion element is made of an oxide semiconductor. Although polycrystalline silicon and oxide semiconductor are listed in parallel as materials to be used for the channel formation regions of a first transistor functioning as an amplifying element and a second transistor functioning as a switching element, as described in paragraphs 0071 to 0074, it suggests that the first transistor and the second transistor preferably use the same type of semiconductor material, and does not suggest the use of a combination of different types of semiconductor materials.

[0010] The present invention has been made to solve the above-mentioned conventional problems, and aims to provide a radiation imaging device that is inexpensive so that it can be applied to general-purpose products, and that is capable of high-speed operation, low power consumption, and the acquisition of highly accurate image data. [Means for solving the problem]

[0011] The radiation imaging device of the present invention comprises a conversion element that receives radiation or light converted from the radiation and generates an electric charge, a thin film transistor as an amplifying element driven by a gate voltage based on the electric charge generated by the conversion element, and a thin film transistor as a first switch element for outputting an electric signal generated by the thin film transistor to a signal line, wherein a channel formation region of the thin film transistor as the amplifying element is made of an oxide semiconductor, and a channel formation region of the thin film transistor as the first switch element is made of polycrystalline silicon. [Effects of the Invention]

[0012] The radiation imaging device of the present invention uses, in its pixel circuits, thin film transistors as amplifying elements, each having a channel formation region made of an oxide semiconductor with small hysteresis and off-current, and thin film transistors as switching elements for supplying electrical signals from pixels to signal lines, each having a channel formation region made of polycrystalline silicon, which operates at high speed and can reduce power consumption.

[0013] In this invention, by using a combination of thin film transistors using different types of semiconductor materials, which has not been suggested in the past, it is possible to provide a radiation imaging device that is inexpensive, can be driven at high speed with a high frame rate, consumes low power, and can obtain highly accurate radiation images. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a diagram showing the configuration of a radiation imaging apparatus according to the present invention; [Figure 2] FIG. 2 is a diagram showing the circuit configuration of the pixel 5 shown in FIG. [Figure 3] 2 is a diagram showing the configuration of a conversion element and a thin film transistor of the pixel 5 shown in FIG. 1. [Figure 4] 1. (a) is a diagram showing the circuit configuration of the readout circuit 3 shown in FIG. 1, and (b) is a diagram showing the circuit configuration of the column circuit 202. FIG. [Figure 5] FIG. 2 is a diagram showing an X-ray imaging system to which the radiation imaging apparatus shown in FIG. 1 is applied. DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. Note that, in the present invention, radiation includes not only α-rays, β-rays, γ-rays, and the like, which are beams produced by particles (including photons) emitted by radioactive decay, but also beams having the same or higher energy levels, such as X-rays, particle beams, and cosmic rays.

[0016] Fig. 1 shows a schematic configuration of a radiation imaging device 1 of the present invention. As shown in Fig. 1, the radiation imaging device has a plurality of pixels 5 formed on a substrate such as a flat glass, each of which converts incident light or radiation into an electrical signal. The pixel section 4 forms an area (flat detector) in which the plurality of pixels 5 are arranged in a matrix. For example, a 17-inch radiation imaging device has approximately 2800 rows and 2800 columns of pixels.

[0017] On the substrate, a gate driver 2 for driving the pixels 5, a readout circuit 3 for reading out electrical signals from the pixels 5, and a system control circuit 6 for controlling the operation timing of these components are connected to conductive paths such as metal wiring on the substrate using solder or a conductive adhesive.

[0018] The gate driver 2 drives the pixel unit 5 with a changeable number of added pixels. The readout circuit 3 outputs the electric signals from the driven pixel unit 4 as digital image data. The radiation imaging device 1 further includes a signal processing unit (not shown) that processes and outputs the image data from the readout circuit 3, a power supply unit (not shown) that supplies bias to each component, and the like.

[0019] The gate driver 2 is configured to be able to switch the scanning area and the number of pixels to be added in response to a control signal from the system control circuit 6. The power supply unit receives voltage from an external power source or built-in battery (not shown) and includes power supply circuits such as a regulator that supplies the voltage required by the gate driver 2, readout circuit 3, pixel unit 4, and system control circuit 6.

[0020] In this embodiment, the system control circuit 6 has the function of switching between multiple imaging operations. The imaging operation in the present invention has multiple parameters, and is determined by a combination of pre-prepared parameter values. These parameters include, for example, the frame rate, amplification factor (gain), and pixel summation number (binning). The pixel summation number corresponds to the number of pixel rows simultaneously driven by the gate driver 2. For example, if only one pixel row is simultaneously driven, the summation number is 1; if two pixel rows are simultaneously driven, the summation number is 2.

[0021] Next, the configuration and operation of the pixel 5 will be described with reference to FIG. 2. The conversion element 21 is a photoelectric conversion element that converts radiation or light converted from radiation by a scintillator into an electric charge. The switch element 21 (second switch element) has a function of switching the connection state between the conversion element 21 and a reset potential Vrst in order to initialize the conversion element 21, and is controlled by the gate driver 2 via a drive wiring 26. The capacitor 23 has a function of holding the electric charge generated by the conversion element 21. The amplifier element 24 is driven by a gate voltage corresponding to the electric charge held in the capacitor 23, and generates an output current corresponding to the gate voltage at the drain electrode. The switch element 25 (first switch element) has a function of outputting the output current as an electric signal to a signal line 28, and is controlled by the gate driver 2 via a drive wiring 27.

[0022] In this embodiment, an indirect type conversion element 21 is used, which has a scintillator on the radiation incident side that converts radiation into light in a wavelength band that can be sensed by the conversion element 21. Specifically, a PIN type photodiode made mainly of amorphous silicon is used. Note that, in addition to the indirect type, a direct type conversion element that directly converts radiation into electric charges may also be used as the conversion element 21. In this case, amorphous selenium, cadmium tellurium, or the like is used as the main material.

[0023] MOS transistors having a control terminal and two main terminals are preferably used as the switch elements 24 and 25 and the amplifying element 24, and in this embodiment, thin film transistors (TFTs) are used, as will be described in detail later.

[0024] One electrode of the conversion element 21, the cathode, is electrically connected to a drain electrode, which is one of two main terminals of the switch element 22, and the other electrode, the anode, is connected to a bias potential or ground potential. In addition, the other main terminal, the source electrode of the switch element 22, is connected to a reset potential Vrst.

[0025] The drive wiring 26 that controls the switch elements 22 is electrically connected in common to the control terminals of the switch elements 22 of each of the multiple pixels 5 existing in the same row, and receives a drive signal from the gate driver 2 that controls the conductive state of the switch elements 22. In this way, the gate driver 2 simultaneously controls the connected state and non-connected state of the switch elements 22 of each of the multiple pixels 5 existing in the same row, so that the conversion elements 21 of the multiple pixels 5 existing in the same row are simultaneously reset. Also, by performing this reset operation simultaneously for all rows, it is possible to simultaneously initialize the conversion elements 22 of the multiple pixels 5 existing in the pixel section 4.

[0026] The drive wiring 27 that controls the switch elements 25 is electrically connected in common to the control terminals of the switch elements 25 of multiple pixels 5 that exist in the same row, and a drive signal that controls the conductive state of the switch elements 25 is supplied row by row from the gate driver 2. In this way, the gate driver 2 controls the connected and disconnected states of the switch elements 25 row by row, so that electrical signals from the pixels 5 can be output to each signal line 28 row by row.

[0027] Next, the operation of the pixel 5 will be described with reference to FIG. 2. Prior to imaging the subject, the gate driver 2 simultaneously supplies drive signals to the drive wiring 26 of all rows to turn on the switch elements 22, and the conversion elements 21 of multiple pixels 5 in the pixel section 4 are simultaneously connected to the reset potential Vrst. When the cathode of the conversion element 21 is set to the reset potential Vrst, the conversion element 21 is in a reverse bias state. This reset operation does not have to be performed for all pixels at once, but may be performed sequentially row by row. During this reset operation, the capacitor 23 is also reset by the reset potential Vrst.

[0028] Thereafter, the switch element 22 is driven to a non-conductive state again, but the conversion elements 22 and the like maintain their reset states. Next, an X-ray imaging is performed on the subject, and radiation, i.e., X-rays, generated by the imaging, or light converted from the radiation by a scintillator, is incident on the conversion elements 21. The conversion elements 21 generate charges corresponding to the amount of incident radiation or light. During a predetermined imaging time, the generated charges are stored in the capacitor 23, and a voltage corresponding to the amount of accumulated charge is generated at one terminal of the capacitor 23. The amplifier elements 24 are driven using the generated voltage as a gate voltage, and generate an output current corresponding to the gate voltage at their drain electrodes. The source electrodes of the amplifier elements 24 are connected to a bias potential VDD, forming a source follower circuit. After a predetermined imaging time, the gate driver 2 sequentially supplies drive signals to the drive wiring 27, row by row, to turn on the switch elements 25. The output currents of the pixels 5 in the same row are sequentially output as electrical signals to the signal lines 28 of each column. This series of operations is the basic operation of each pixel 5 for acquiring an X-ray image of the subject, and other imaging operations are performed by changing the number of rows driven simultaneously according to the specified binning number, or by changing the frequency at which the switch element 25 is driven, etc.

[0029] Next, the readout circuit 3 will be described. The readout circuit 3 includes a column circuit 202 provided for each signal line 28 (for each column of the pixel unit 4), a multiplexer 203, a buffer amplifier 204, and an analog-to-digital converter (A / D converter) 205. The configuration of each column circuit 202 will be described in detail later with reference to FIG. 4(b). The multiplexer 203 converts the parallel analog electrical signals output from each column circuit 202 into serial analog electrical signals. The buffer amplifier 204 transmits the serial analog electrical signals from the multiplexer 203 to the A / D converter 205. The A / D converter 205 converts the analog electrical signals output from the buffer amplifier 204 into digital electrical signals and outputs them to a signal processing circuit (not shown) in the subsequent stage. The signal processing circuit performs predetermined or designated image processing on the input digital electrical signals as image signals and then outputs the signals to the outside of the radiation imaging device 1.

[0030] The column circuit 202 will be described with reference to FIG. 4(b). The column circuit 202 includes a voltage follower circuit, a low-pass filter, and a sample-and-hold circuit. The voltage follower circuit includes a constant current source and an operational amplifier. The operational amplifier has a positive input terminal connected to a signal line 28, and a negative input terminal and output terminal connected to each other. One end of the signal line 28 is connected to one terminal of a constant current source, and the other terminal of this constant current source is connected to a bias potential VSS. The electrical signal of the pixel 5 output to the signal line 28 by this voltage follower circuit is converted from a current signal to a voltage signal.

[0031] The sample-and-hold circuit has a first sample-and-hold unit CDS1 and a second sample-and-hold unit CDS2 that perform a holding operation to hold an input voltage signal. The first sample-and-hold unit CDS1 is composed of a capacitive element C-CDS1 and a reset switch element SW-CDS1 connected to one electrode of the capacitive element C-CDS1. The second sample-and-hold unit CDS2 is composed of a capacitive element C-CDS2 and a reset switch element SW-CDS2 connected to one electrode of the capacitive element C-CDS2. The reset switch elements SW-CDS1 and SW-CDS2 are each controlled on and off by a control signal supplied from the system control circuit 6. When the reset switch element SW-CDS1 switches from off to on, the first sample-and-hold unit CDS1 switches from hold mode to sampling mode. During sampling mode, the input signal to the first sample-and-hold unit charges the capacitive element C-CDS1. When the reset switch element SW-CDS1 switches from on to off, the first sample and hold unit switches from sampling mode to hold mode. During the hold mode, the signal held in the capacitive element C-CDS1 is held (fixed) and then supplied to the multiplexer 203.

[0032] The second sample-and-hold unit operates in the same manner, but its operation timing differs from that of the first sample-and-hold unit, resulting in different electrical signals being sampled and held. Specifically, the first sample-and-hold unit samples and holds an electrical signal serving as a noise signal when no image is being captured, while the second sample-and-hold unit samples and holds an electrical signal serving as an image signal when an image is being captured. In other words, the sample-and-hold circuits are used for correlated double sampling (CDS). Both signals are differentially processed by a differential amplifier used as a buffer amplifier 204 to remove noise signal components from the image signal, and then the signal is sent to an A / D converter 205.

[0033] In addition, a variable resistance element RLPF is connected between the voltage follower circuit and the sample-and-hold circuit. The variable resistance element RLPF changes its own resistance value in response to a control signal supplied from the system control circuit 6. When the reset switch element SW-CDS1 is turned on, a conductive state is established between the variable resistance element RLPF and the capacitance element C-CDS1, and a low-pass filter is formed by the variable resistance element RLPF and the capacitance element C-CDS1. The low-pass filter is a filter circuit for filtering the signal output from the operational amplifier.

[0034] Next, the switch elements 22, 25 and the amplifier element 24 of the pixel 5 provided in the pixel section 4 will be described in detail. The switch elements 22, 25 and the amplifier element 24 are MOS transistors. The switch elements 22, 25 are configured as thin film transistors using polycrystalline silicon in the channel formation region. The amplifier element 24 is configured as a thin film transistor using an oxide semiconductor in the channel formation region.

[0035] Polycrystalline silicon has a carrier mobility about 100 times higher than that of amorphous silicon, enabling high-speed switching operations. This means that information can be read out at high speeds, making it suitable for applications such as radiation imaging devices for capturing moving images at high frame rates. Furthermore, the high carrier mobility allows it to be implemented as a thin-film transistor with a small channel width, which reduces the gate voltage and therefore power consumption.

[0036] Oxide semiconductors (such as amorphous indium gallium zinc oxide) have carrier mobility that is about 20 times higher than that of amorphous silicon, and also have the characteristic of having a very small off-state current compared to amorphous silicon and polycrystalline silicon.

[0037] This off-state current will be explained in detail. Oxide semiconductors have a band gap of 3.0 eV or more, which is much larger than the band gap of silicon (1.1 eV). The off-state resistance of a thin-film transistor is inversely proportional to the concentration of thermally excited carriers in the channel formation region. In the case of silicon, the band gap is 1.1 eV, so the concentration of thermally excited carriers at room temperature (200 K) is 1×10 11 cm -3 On the other hand, the band gap of oxide semiconductors is large, at 3.0 eV or more. For example, when the band gap is 3.2 eV, the concentration of thermally excited carriers is 1×10 -7 cm -3 When the carrier mobility is the same, resistivity is inversely proportional to the carrier concentration, so the resistivity of a semiconductor with a band gap of 3.2 eV is 18 orders of magnitude greater than that of silicon. For this reason, thin-film transistors that use an oxide semiconductor in the channel formation region can achieve extremely low off-current.

[0038] Furthermore, when oxide semiconductors are implemented as thin-film transistors, the channel length tends to be designed to be relatively short compared to amorphous silicon or polycrystalline silicon, which allows for low hysteresis.

[0039] The amplifier element 24 is required to have the function of accurately amplifying the electrical signal based on the charge generated by the conversion element 21, so it needs to have low hysteresis and high carrier mobility. On the other hand, a low off-current is required to prevent unnecessary potential from being output to the bias potential VDD. Therefore, it is effective to use an oxide semiconductor material that combines properties such as low hysteresis, high carrier mobility, and low off-current in the channel formation region. This is an important performance for obtaining highly accurate image data.

[0040] Conventionally, in order to prioritize low manufacturing costs, all thin film transistors provided in the pixel section 4 have generally been formed from the same semiconductor material. However, the thin film transistors in the pixel 5 each have different functions and are required to have different performance. For this reason, it is difficult to say that the conventional configuration is optimized in terms of performance.

[0041] In the present invention, the switch elements 22 and 24 are configured as thin-film transistors using polycrystalline silicon in the channel formation region, and the amplifying element 24 is configured as a thin-film transistor using an oxide semiconductor in the channel formation region. This makes it possible to simultaneously achieve high-speed readout operations, low power consumption during operation, and highly accurate image data acquisition. As a result, it is possible to provide a radiation imaging device that achieves high accuracy, high-speed video capture, and low power consumption.

[0042] Next, the structure of one pixel of the thin film transistor and conversion element in this embodiment will be described in more detail with reference to FIG.

[0043] A protective layer 31 made of SiON is provided on a flat glass substrate 30. Layers 32-1, 32-2, and 32-3 made of polycrystalline silicon are formed and patterned on the protective layer 31 by a known method. 32-1 constitutes a channel formation region of the switch element 22, 32-2 one electrode of the capacitor 23, and 32-3 a channel formation region of the switch element 25.

[0044] A gate insulating film 35 made of SiO is formed on the layer made of polycrystalline silicon. Metal layers 36-1, 36-2, and 36-3 made of Al or an alloy thereof are formed by patterning on the gate insulating film 35. 36-1 constitutes the gate electrode of the switch element 22, 36-2 the other electrode of the capacitor 23, and 36-3 the gate electrode of the switch element 25.

[0045] A protective layer (not shown) made of SiN is formed on the metal layers 36-1, 36-2, and 36-3, and an interlayer insulating film 36 made of SiO is further formed on the protective layer. Wiring layers 38, 39, and 41 made of Al or an alloy thereof are formed by patterning on the interlayer insulating film 36. These wiring layers may have a multilayer structure with Ti or TiN layers on the top and bottom to improve adhesion with adjacent layers above and below and to prevent migration. Reference numeral 38 denotes a wiring line connected to the source electrode of the switch element 22 and supplying a reset potential Vrst. Reference numeral 39 denotes a wiring line electrically connecting the drain electrode of the switch element 22, the cathode electrode of the conversion element 21, one terminal of the capacitor 23, and the gate electrode of the amplifier element 24 to each other. Reference numeral 41 denotes a wiring line electrically connecting the drain electrode of the switch element 25 to the signal line 28. An interlayer insulating film 37 made of SiO is formed on the wiring layers 38, 39, and 41.

[0046] An oxide semiconductor layer 44 made of an oxide semiconductor (e.g., indium gallium zinc oxide) is formed on the interlayer insulating film 37 by a known sputtering method, ALD method, or the like, and then patterned. The oxide semiconductor layer 44 includes a channel formation region of the amplifying element 24.

[0047] A wiring layer 40 made of Al or an alloy thereof, which also serves as the drain electrode of the amplifying element 24, is formed by patterning in a state that it overlaps one end of the oxide semiconductor layer 44. This wiring layer 40 may have a multilayer structure with layers made of Ti or TiN provided above and below it to improve adhesion with adjacent layers above and below it, prevent migration, and improve ohmic contact with the oxide semiconductor layer 44. This wiring layer 40 is connected to the source electrode of the switch element 25 via a contact hole.

[0048] An interlayer insulating film 43 made of SiO is formed on the wiring layer 40 and the oxide semiconductor layer 44. A wiring layer 45 made of Al or an alloy thereof is formed by patterning on the interlayer insulating film 43. This wiring layer 45 also serves as the source electrode of the amplifying element 24, and supplies a bias potential VDD to the amplifying element 24.

[0049] A planarization layer 46 made of TEOS or the like is formed on the wiring layer 45. The conversion element 21 is formed on the planarization layer 46. The conversion element 21 is configured by stacking, in this order from the planarization layer 46 side, a cathode 48 made of a metal such as Al, a P-type semiconductor layer 50, an I-type semiconductor layer 51, and an N-type semiconductor layer 52 made of Si or the like, and an anode 53 made of a metal such as Al. The cathode 48 is electrically connected to a part of the wiring layer 39 via a contact hole 47 formed in the planarization layer 46. In addition, a bank layer 49 made of SiO is formed on the end of the cathode 48 and on the contact hole 47. This bank layer 49 is formed to prevent short-circuiting between the end of the cathode 48 of the conversion element 21 and the anode 53, as well as to planarize the contact hole 47 and define the layout of the conversion element 21.

[0050] Thin film transistors that use an oxide semiconductor in the channel formation region are generally n-channel devices (i.e., NMOS transistors). Thin film transistors made of polycrystalline silicon can be designed as either p-channel or n-channel devices, but in this embodiment, a PMOS is used.

[0051] The above-described structure can be easily manufactured using well-known semiconductor processes. The polycrystalline silicon constituting one terminal of the capacitor 23 may be doped with impurities to enhance conductivity. The contact portions between the polycrystalline silicon and the source / drain electrodes of the switch elements 22 and 25 and the amplifier element 24 may be silicided. Metals other than Al, such as Mo, or alloys may be used for the wiring layer. A metal shielding layer may be provided between the interlayer insulating films to shield the channel formation region made of polycrystalline silicon or oxide semiconductor from light. The oxide semiconductor layer 44 may be amorphous, crystalline, or a mixture thereof.

[0052] Next, a radiation imaging system to which the radiation imaging apparatus of the present invention is applied will be described with reference to FIG.

[0053] In Figure 5, 60 is an X-ray source that generates X-rays. 61 is a subject or an affected area of ​​the subject that is the subject to be imaged. 63 is a radiation imaging device of the present invention. 62 is a support that contains and supports the radiation imaging device, and is disposed opposite the X-ray source 60 with the subject 61 in between. 64 is a computer that controls the radiation imaging device 63, and sends instructions to the system control circuit 6 of the radiation imaging device 63 to switch between multiple types of imaging operations, and to instruct the timing of starting, interrupting, and stopping the imaging operation. Also, image data captured by the radiation imaging device 63 is acquired, further image processing is performed, and the image data is displayed on a display 65.

[0054] Next, the imaging method will be described. Following the instructions of a doctor or technician, the subject 61 places the affected area to be imaged in front of the radiation imaging device 63 supported on a support 62. The doctor or technician operates the computer 64 to start up the radiation imaging device 63 and set it to a ready state.

[0055] In the ready state, the radiation imaging device 63 supplies a drive signal from the gate driver 2 to the switch element 22 via the drive wiring 26, thereby turning the switch element 22 into a conductive state. When the switch element 22 is turned into a conductive state, the cathode of the conversion element 21, one electrode of the capacitor 23, and the gate electrode serving as the control electrode of the amplifier element 24 are reset to a reset potential Vrst. This reset operation is performed on all pixels in the pixel section 4. In this state, the gate driver 2 supplies a drive signal to the switch element 25 via the drive wiring 27, and outputs a current generated at the drain electrode of the amplifier element 25, using the reset potential Vrst as the gate potential, as an electrical signal to the signal line 28. The current output to the signal line 28 is converted into a voltage by the operational amplifier in the column circuit 202 in the readout circuit 3 and then held by the first sample-and-hold unit as a noise signal (dark current signal) during non-imaging. This completes the operation in the ready state. Once the ready state is completed, the radiation imaging device 63 notifies the computer that it is ready to begin imaging.

[0056] Upon being notified that imaging is possible, a doctor or technician operates the X-ray source 60 to emit X-rays toward the affected area of ​​the subject 61. The X-rays emitted from the X-ray source 60 pass through the affected area of ​​the subject 61 and are received by the pixel unit 4 of the radiation imaging device 63 indicated by the support 62. The received X-rays are converted by a scintillator arranged on the light-receiving surface side of the radiation imaging device 63 into light of a wavelength that can be detected by the conversion elements 21. The converted light is received by each of the conversion elements 21 and photoelectrically converted, generating an amount of charge according to the amount of light received. The generated charge is accumulated in the capacitor 23 of each pixel 5 for a predetermined imaging time, and the accumulated charge generates a voltage at one terminal of the capacitor 23 as a gate voltage to drive the amplifier element 24, generating a current according to the gate voltage at the drain electrode of the amplifier element 24.

[0057] Although not shown, the radiation imaging device 63 is equipped with a known automatic X-ray incidence detection function that detects the incidence of X-rays. When the automatic X-ray incidence detection function detects the incidence of X-rays, it transmits a detection signal to the system control circuit 6. Upon receiving the detection signal, the system control circuit 6 starts driving the gate driver 2 and readout circuit 3 to read out the generated current as an electrical signal after a predetermined imaging time has elapsed. At this time, the gate driver 2 drives the pixels 5 of the pixel section 4 row by row. Here, an example will be described in which the binning number is 1 and readout is performed row by row.

[0058] A drive signal supplied from the gate driver 2 via the drive wiring 26 is simultaneously supplied to the gate electrodes 36-3 of the switch elements 25 in each of the multiple pixels 5 arranged in the first row, turning each switch element 25 into a conductive state. Then, a current flowing through the drain electrode of the switch element 25 is output as an electric signal to each signal line 28 provided in each pixel column of the pixel section 4.

[0059] The current output to the signal line 28 is converted to a voltage by the operational amplifier of each column circuit 202 in the readout circuit 3, and then sampled and held by the second sample and hold unit as an image signal at the time of shooting. Next, the multiplexer 203 sequentially reads out, for each signal line, the voltage signals held by the capacitive element C-CDS1 of the first sample and hold unit and the capacitive element C-CDS2 of the second sample and hold unit of each column circuit 202. The buffer amplifier 204 takes the difference between the voltage signal held by the capacitive element C-CDS1 and the voltage signal held by the capacitive element C-CDS2 transmitted from the multiplexer 203, and transmits this to the A / D converter 205. The A / D converter 205 converts the differential signal output from the buffer amplifier 204 into a digital electrical signal and outputs it to a downstream signal processing circuit (not shown).

[0060] The above process is repeated row by row for each column circuit, and electrical signals are read out as image signals from all pixels 5 of the pixel section 4. The image signals read out by the readout circuit 3 are then subjected to predetermined image processing in a signal processing circuit (not shown), and then transmitted from the radiation imaging device 1 to a computer 64, which then displays the image data on a display 65. A doctor diagnoses the affected area of ​​the subject 61 based on the image displayed on the display. [Industrial Applicability]

[0061] In the above embodiment, the radiation imaging device has been described as being for medical use, but the radiation imaging device of the present invention is not limited to this use and can also be applied to structural inspection devices for inspecting the internal structure of buildings, etc. [Explanation of symbols]

[0062] 1, 63 Radiation imaging device 2 Gate Drivers 3 Readout circuit 4 Pixel section 5 pixels 21 Conversion element 22 second switch element 23 Capacitor 24 Amplifying element 25 First switch element 26, 27 Drive wiring 28 Signal Line 30 boards 31 Protective layer 32 Polycrystalline silicon 35 Gate insulating film 36 Metal layer 37, 43 Interlayer insulating film 38,39,40,41,45 wiring layer 44 Oxide Semiconductors 46 Planarization layer 47 Contact Hole 48 cathode electrode 49 Bank Layer 50 P-type semiconductor layer 51 I-type semiconductor layer 52 N-type semiconductor layer 53 Anode electrode 60 X-ray source 61 Subjects 62 Support 64 Computers 65 Display 202 column circuit 203 Multiplexer 204 Buffer amplifier 205 ADC

Claims

1. A radiation imaging device having a pixel section which is an area in which a plurality of pixels are arranged in a matrix, and pixels of a plurality of pixel rows among the plurality of pixels are connected to signal lines provided in the pixel section, Each of the plurality of pixels is a conversion element that receives radiation or light converted from the radiation and generates electric charges; an amplifying element made of a first thin film transistor, which is driven by a gate voltage based on the charge generated by the conversion element; a switch element configured by a second thin film transistor, which outputs the electrical signal generated by the amplifying element to the signal line; a channel formation region of the first thin film transistor is connected to the signal line via a channel formation region of the second thin film transistor; a channel formation region of the first thin film transistor made of an oxide semiconductor, and a channel formation region of the second thin film transistor made of polycrystalline silicon;

2. A radiation imaging device as described in Claim 1, wherein each of the plurality of pixels further has a switch element composed of a third thin film transistor that connects the conversion element to wiring that supplies a reset potential, and the channel formation region of the third thin film transistor is composed of polycrystalline silicon.

3. 3. The radiation imaging device according to claim 1, wherein the oxide semiconductor is indium gallium zinc oxide.

4. 4. The radiation imaging device according to claim 1, wherein the oxide semiconductor is amorphous.

5. 5. The radiation imaging apparatus according to claim 1, further comprising a scintillator that converts the radiation into light of a wavelength to which the conversion element is sensitive.

6. 6. The radiation imaging apparatus according to claim 1, wherein the conversion element is a PIN photodiode.

7. A radiation imaging device as described in any one of claims 1 to 6, wherein each of the plurality of pixels is provided with a capacitor connected to the gate electrode of the first thin film transistor, which stores the charge generated by the conversion element.

8. A radiation imaging device described in any one of claims 1 to 7, wherein the second thin film transistor is a p-channel device.

9. A radiation imaging device as described in claims 1 to 8, comprising a substrate on which the plurality of pixels are formed and a gate driver that drives the plurality of pixels, wherein the gate driver is bonded to a conductive path on the substrate using solder or a conductive adhesive.

10. 10. The radiation imaging device according to claim 1, further comprising a readout circuit that samples and holds an electrical signal output to the signal line during non-imaging and an electrical signal output to the signal line during imaging, differentiates the sampled and held electrical signals, converts them into digital electrical signals, and outputs them.

11. The radiation imaging device according to any one of claims 1 to 10, a computer that controls the radiation imaging apparatus; A radiation imaging system comprising:

12. The radiation imaging device according to any one of claims 1 to 10, an X-ray source that emits X-rays to the radiation imaging device; A radiation imaging system comprising:

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