Expandable scalable power supply system

Abstract

A signal expansion circuit (31) is electrically connected between an MPU (20) and a drive circuit (120), and generates and outputs a second drive signal phase-adjusted with respect to a first drive signal. A low-voltage malfunction prevention circuit (41) is connected between the output ends of the MPU (20) and signal extension circuit (31) and the input end of the drive circuit (120). The first drive signal is a three-state signal having a first voltage, a second voltage, and a third voltage, from the lowest side. The low-voltage malfunction prevention circuit (41) includes a detection / comparison circuit (411) that detects an output voltage Vo and determines that it is equal to or lower than a threshold value Vth, which is a voltage value lower than a predetermined output voltage. When the output voltage Vo is lower than the threshold value Vth, the low voltage malfunction prevention circuit (41) outputs the first drive signal to the drive circuit (120) as the second drive signal. When the output voltage Vo is higher than the threshold value Vth, the low voltage malfunction prevention circuit (41) outputs to the drive circuit (120) the second drive signal that is phase-adjusted by the signal expansion circuit (31) with respect to the first drive signal.

Description

[Technical Field]

[0001] The present invention relates to a power supply system having a plurality of power conversion circuits, and more particularly to a scalable power supply system. [Background technology]

[0002] Patent Document 1 describes a multiphase DC-DC converter. The multiphase DC-DC converter described in Patent Document 1 includes a plurality of delay circuits. The plurality of delay circuits delay the PWM drive signal output by a control circuit.

[0003] The control circuit and multiple delay circuits supply PWM drive signals and delay-controlled PWM drive signals to the converter drive circuits connected downstream, respectively, achieving scalable multi-phase drive that allows the number of power conversion circuits to be set according to output power specifications. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-146711 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the multi-phase DC-DC converter (conventional power supply system) described in Patent Document 1, the number of power conversion circuits can be set without being limited by the number of PWM signals output by the control circuit, thereby realizing a scalable configuration of expanded scale. However, in the transient state at the start-up of the power supply system, the period of the PWM signal fluctuates greatly, making it difficult to ensure reliable communication between the control circuit and the converter drive circuit, and also making it difficult to transition the operating state to a stable steady state.

[0006] Therefore, the object of the present invention is to provide a high-performance, scale-scalable power supply system with a simple circuit configuration and excellent power conversion efficiency, which can realize a scale-scalable power conversion circuit by setting the number of power conversion circuits without being limited by the number of PWM signals output by the control circuit, and which can more reliably communicate between the control circuit (power management control IC element) and the converter drive circuit (drive circuit) in a transient state and achieve a stable transition of operating state from a transient state to a steady state. [Means for solving the problem]

[0007] The scale-expandable scalable power supply system of the present invention includes multiple power conversion circuits, an output terminal, a signal expansion circuit, and an under-voltage lockout prevention circuit. The multiple power conversion circuits include at least a first power conversion circuit including a first inductor, a first switching element that controls the current flowing through the first inductor, and a first drive circuit that drives the first switching element, and a second power conversion circuit including a second inductor, a second switching element that controls the current flowing through the second inductor, and a second drive circuit that drives the second switching element. The output terminal connects the multiple power conversion circuits in parallel and combines their output currents to obtain an output voltage. The power management control IC element has an external signal function that outputs a first drive signal controlled in response to an external signal to the multiple power conversion circuits.

[0008] The signal extension circuit is electrically connected between the power management control IC element and the second drive circuit, and generates and outputs a second drive signal that is phase-adjusted with respect to the first drive signal. The under-voltage lockout circuit is connected between the output terminal of the power management control IC element, the output terminal of the signal extension circuit, and the input terminal of the second drive circuit. The first drive signal is a three-state signal having a first voltage, a second voltage, and a third voltage, from the lowest. The under-voltage lockout circuit includes a detection / comparison circuit that detects the output voltage and determines whether it is equal to or lower than a threshold voltage, which is a voltage value lower than a predetermined output voltage.

[0009] When the output voltage is lower than the threshold voltage, the OVLO circuit outputs the first drive signal as a second drive signal to the second drive circuit. When the output voltage is higher than the threshold voltage, the OVLO circuit outputs a second drive signal that has been phase-adjusted with respect to the first drive signal by a signal extension circuit to the second drive circuit. The multiple power conversion circuits perform multiphase signal drive operation.

[0010] In this configuration, during transient states where the output voltage does not reach the threshold, the power management control IC element and the second drive circuit are directly connected without passing through the signal expansion circuit. The power management control IC element and the first drive circuit are directly connected regardless of whether they are in a transient state or a steady state. This establishes communication between the power conversion control IC element and multiple drive circuits even during transient states. Furthermore, during transient states, the first drive signal is input directly to the second drive circuit as a second drive signal without passing through the signal expansion circuit, so a stable second drive signal is input to the second drive circuit without being affected by periodic fluctuations in the PWM signal. [Effects of the Invention]

[0011] According to this invention, it is possible to realize a scale-scalable power conversion circuit by setting the number of power conversion circuits without being limited by the number of PWM signals output by the control circuit, and it is also possible to provide a high-performance scale-scalable power supply system that has a simple circuit configuration and excellent power conversion efficiency, which can more reliably communicate between the power management control IC element and the drive circuit in a transient state and achieve a stable transition from a transient state to a steady state. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a circuit block diagram showing an example of a power supply system according to the first embodiment. [Figure 2] Figure 2(A) is a diagram showing the connection state of an MPU, a signal expansion circuit, an undervoltage lockout circuit, and multiple drive circuits in a transient state, and Figure 2(B) is a diagram showing the connection state of an MPU, a signal expansion circuit, an undervoltage lockout circuit, and multiple drive circuits in a steady state. [Figure 3]FIG. 3 is a flowchart that schematically shows the control executed by the power supply system according to the first embodiment. [Figure 4] FIG. 4 is a diagram showing an example of each waveform of the power supply system according to the first embodiment. [Figure 5] FIG. 5 is a diagram showing an example of output voltage waveforms in the configuration of the present invention and the comparative configuration. [Figure 6] FIG. 6 is a diagram showing an example of waveforms of the power supply system according to the second embodiment. [Figure 7] FIG. 7 is a circuit block diagram showing an example of a power supply system according to the third embodiment. [Figure 8] FIG. 8 is a circuit block diagram showing an example of a power supply system according to the fourth embodiment. [Figure 9] FIG. 9 is a circuit block diagram showing an example of a part of a power supply system according to the fifth embodiment. [Figure 10] FIG. 10 is a circuit block diagram showing an example of a part of a power supply system according to the sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] In this application, the term "scalable power supply system" refers to a power supply system in which the number of power conversion circuits used for multiphase drive can be set to a desired number. More specifically, the term "scalable power supply system" refers to a power supply system in which the number of power conversion circuits required can be appropriately set to achieve a desired output current value with high efficiency at an output voltage value determined in response to command values ​​(drive voltage, drive current) from a load such as a CPU. Hereinafter, the scalable power supply system will be simply referred to as the power supply system.

[0014] [First embodiment] A power supply system according to a first embodiment of the present invention will be described with reference to the drawings.

[0015] (Schematic configuration of power supply system 100) Fig. 1 is a circuit block diagram showing an example of a power supply system according to the first embodiment. As shown in Fig. 1, the power supply system 100 includes an MPU 20, a plurality of individual power conversion systems 101, an output capacitor Co, and an input capacitor Ci. Although Fig. 1 shows an example including four individual power conversion systems 101, the number of individual power conversion systems 101 is not limited to this.

[0016] The multiple individual power conversion systems 101 have the same configuration, and are also similarly connected to the MPU 20, input terminals Pi, and output terminals Po. Therefore, in Fig. 1, one individual power conversion system 101 is described in detail, and detailed description of the other individual power conversion systems 101 is omitted.

[0017] The power supply system 100 includes an input terminal Pi and an output terminal Po. The input terminal Pi is connected to an external DC voltage source (input power supply). The power supply system 100 receives a DC input voltage Vin from the input terminal Pi. The output terminal Po is connected to a load 90.

[0018] The load 90 is, for example, a processor or the like that can change power consumption depending on the status of the CPU, GPU, etc., and has a communication function. The communication function is, for example, communication according to the PMBus protocol. The load 90 communicates with the MPU 20 of the power supply system 100 using this communication function.

[0019] The MPU 20 is connected to an input terminal Pi and receives power through the input terminal Pi. In practice, a regulator or the like is connected to the power input terminal of the MPU 20, and power is supplied through the regulator. This power supply line is connected to the ground reference potential through an input capacitor Ci1.

[0020] The MPU 20 is a programmable micro processing unit, and is realized by a semiconductor control IC that realizes multi-phase driving operation, etc. The MPU 20 corresponds to the "power management control IC element" of the present invention.

[0021] The MPU 20 has a communication function, for example, communication according to the PMBus protocol. The MPU 20 communicates with the load 90 using this communication function and performs control according to the communication result.

[0022] For example, the communication signal PM from the load 90 includes a drive voltage and a drive current. The MPU 20 determines the number of individual power conversion systems 101 to be driven and the specifications of multi-phase PWM control so as to stably supply the drive voltage and drive current specified in the communication signal PM to the load 90. The MPU 20 generates PWM drive control signals for the multiple individual power conversion systems 101 in accordance with the determined PWM control.

[0023] The MPU 20 is connected to the plurality of individual power conversion systems 101. The MPU 20 outputs PWM drive control signals to the plurality of individual power conversion systems 101.

[0024] The multiple individual power conversion systems 101 are driven in response to PWM drive control signals from the MPU 20 and perform power conversion respectively. The output ends of the multiple individual power conversion systems 101 are connected in parallel to the output terminal Po. As a result, the output currents of the multiple individual power conversion systems 101 join together at the output terminal Po and are supplied to the load 90 as the output current of the power supply system 100. The voltage at the output terminal Po at this time becomes the output voltage Vo of the power supply system 100.

[0025] (Configuration of individual power conversion system 101) The individual power conversion system 101 includes a plurality of power conversion circuits 11-12 (power conversion circuits 11 and 12), a signal extension circuit 31, and an under voltage lockout circuit 41.

[0026] A plurality of power conversion circuits 11, 12 are connected to an input terminal Pi and are supplied with power through the input terminal Pi. The power supply line of the power conversion circuit 11 is connected to a ground reference potential through an input capacitor Ci1. The power supply line of the power conversion circuit 12 is connected to a ground reference potential through an input capacitor Ci2. The power conversion circuit 11 corresponds to a "first power conversion circuit" of the present invention, and the power conversion circuit 12 corresponds to a "second power conversion circuit" of the present invention.

[0027] The output terminal of the power conversion circuit 11 and the output terminal of the power conversion circuit 12 are connected to each other at an output common node, and are connected to an output terminal Po through the output common node.

[0028] The plurality of power conversion circuits 11 and 12 individually and in parallel perform a power conversion operation of converting an input voltage Vin into an output voltage Vo.

[0029] 1, the power conversion circuit 11 includes a drive circuit 110, a switching element Q1H, a switching element Q1L, an inductor L1, and a capacitor Co1. The drive circuit 110, the switching element Q1H, and the switching element Q1L are formed, for example, by an integrated FET-integrated PWM control IC (analog circuit IC). The drive circuit 110 corresponds to a "first drive circuit" of the present invention, and the switching element Q1H and the switching element Q1L correspond to a "first switching element" of the present invention.

[0030] The drive circuit 110 is connected to an input terminal Pi and is supplied with power through the input terminal Pi. In practice, a regulator or the like is connected to the power input terminal of the drive circuit 110 and power is supplied through the regulator. The drive circuit 110 is connected to the MPU 20. The gates of the switching elements Q1H and Q1L are connected to the drive circuit 110.

[0031] The drain of switching element Q1H is connected to input terminal Pi. The source of switching element Q1H is connected to the drain of switching element Q1L. The source of switching element Q1L is connected to ground reference potential. One end of inductor L1 is connected to the node of switching element Q1H and switching element Q1L. The other end of inductor L1 is connected to the output common node. The other end of inductor L1 is also connected to ground reference potential through capacitor Co1.

[0032] The power conversion circuit 12 includes a drive circuit 120, switching element Q2H, switching element Q2L, inductor L2, and capacitor Co2. The drive circuit 120, switching element Q2H, and switching element Q2L are formed, for example, by an integrated FET-integrated PWM control IC (analog circuit IC). The drive circuit 120 corresponds to the "second drive circuit" of the present invention, and the switching element Q2H and switching element Q2L correspond to the "second switching element" of the present invention.

[0033] The driver circuit 120 is connected to an input terminal Pi and receives power through the input terminal Pi. In practice, a regulator or the like is connected to the power input terminal of the driver circuit 120, and power is supplied through the regulator. The driver circuit 120 is connected to the MPU 20 through a signal extension circuit 31 and / or an under voltage malfunction prevention circuit 41. The gates of the switching elements Q2H and Q2L are connected to the driver circuit 120.

[0034] The drain of switching element Q2H is connected to input terminal Pi. The source of switching element Q2H is connected to the drain of switching element Q2L. The source of switching element Q2L is connected to ground reference potential. One end of inductor L2 is connected to the node of switching element Q2H and switching element Q2L. The other end of inductor L2 is connected to the output common node. The other end of inductor L2 is also connected to ground reference potential through capacitor Co2.

[0035] The input terminal of the signal expansion circuit 31 is connected to the connection line between the MPU 20 and the power conversion circuit 11. The output terminal of the signal expansion circuit 31 is connected to the low voltage lockout circuit 41.

[0036] The signal extension circuit 31 is configured by an analog IC. That is, the signal extension circuit 31 is configured by an analog delay circuit. This allows the signal extension circuit 31 to be configured inexpensively and simply.

[0037] The under voltage lockout prevention circuit 41 includes a switch circuit 41S and a detection / comparison circuit 411. The switch circuit 41S is connected to the output terminal of the signal expansion circuit 31, the connection line between the MPU 20 and the power conversion circuit 11, and the drive circuit 120.

[0038] The detection comparison circuit 411 is configured by, for example, a comparator. The output voltage Vo is input to the detection comparison circuit 411. A threshold value Vth set by a voltage value is set in the detection comparison circuit 411. The threshold value Vth is set based on the drive voltage of the load 90 in a steady state. For example, the threshold value Vth is set to the drive voltage of the load 90 in a steady state. This setting is realized by the communication signal PM received by the MPU 20 described above.

[0039] The detection comparison circuit 411 generates a switch control signal PG according to the result of comparison between the output voltage Vo and the threshold value Vth, and outputs the signal to the switch circuit 41S.

[0040] Figure 2(A) is a diagram showing the connection state of an MPU, a signal expansion circuit, an undervoltage lockout circuit, and multiple drive circuits in a transient state, and Figure 2(B) is a diagram showing the connection state of an MPU, a signal expansion circuit, an undervoltage lockout circuit, and multiple drive circuits in a steady state.

[0041] When the output voltage Vo is lower than the threshold value Vth (transient state), the detection comparison circuit 411 controls the switch circuit 41S using the switch control signal PG so as to electrically connect the connection line between the MPU 20 and the power conversion circuit 11 to the drive circuit 120 (see Figure 2(A)).

[0042] When the output voltage is higher than the threshold Vth, or when the output voltage is equal to or greater than the threshold Vth (steady state), the detection comparison circuit 411 controls the switch circuit 41S using the switch control signal PG so as to electrically connect the output terminal of the signal extension circuit 31 to the drive circuit 120 (see Figure 2(B)).

[0043] (Specific explanation of power conversion control) Fig. 3 is a flowchart that schematically shows the control executed by the power supply system according to the first embodiment. Fig. 4 is a diagram showing an example of each waveform of the power supply system according to the first embodiment. From the top, Fig. 4 shows an enable signal En, an output voltage Vo, a switch control signal PG, a PWM drive control signal PWM11, and a PWM drive control signal PWM12. The PWM drive control signal PWM11 is a signal that is input to the drive circuit 110, and the PWM drive control signal PWM12 is a signal that is input to the drive circuit 120.

[0044] The MPU 20 of the power supply system 100 receives a command to supply a drive voltage from the load 90 (S11). This is performed by the enable signal En shown in Fig. 4. Specifically, the MPU 20 receives the command to supply a drive voltage from the load 90 by receiving the enable signal En at a high level. This causes the MPU 20 to start up.

[0045] The MPU 20 analyzes the communication signal PM and determines the specifications of the multi-phase PWM control (such as the number of individual power conversion systems 101 to be driven) from, for example, the drive voltage and drive current.

[0046] More specifically, the MPU 20 communicates with the drive circuit 110 of the power conversion circuit 11 and the drive circuit 120 of the power conversion circuit 12 to check the status of the power conversion circuits 11 and 12 (the drive circuits 110 and 120) (S12). This communication is performed using a three-state PWM signal, which is a digital signal. A three-state PWM signal is a signal having three states: Low level (first voltage), Mid level (second voltage), and Hi level (third voltage), and communication is achieved by combining these three levels. By using three states, it is possible to communicate a larger amount of information than with two states. This period is the communication period STc for checking the status, as shown in FIG. 4.

[0047] The MPU 20 determines the number of drivable power conversion circuits (number of components) from the results of communication with the drive circuits 110, 120 (S13), and determines a PWM control signal according to the required drive current and the number of components (S14).

[0048] The MPU 20 executes PWM control in the transient state (S15). Specifically, the MPU 20 generates and outputs a PWM drive control signal PWM11 so that the output voltage Vo reaches the required drive voltage Vdd. At this time, the MPU 20 varies the PWM control period according to the output voltage Vo that is fed back.

[0049] At this time, since the output voltage Vo is lower than the threshold value Vth, the detection comparison circuit 411 outputs a low-level switch control signal PG to the switch circuit 41S. When the low-level switch control signal PG is input, the switch circuit 41S electrically connects the connection line between the MPU 20 and the power conversion circuit 11 to the drive circuit 120. In other words, the switch circuit 41S electrically connects the output terminal of the MPU 20 to the drive circuit 120.

[0050] As a result, in the transient state STt, the PWM drive control signal PWM12 input to the drive circuit 120 is the same as the PWM drive control signal PWM11. That is, the same PWM drive control signal is input to the drive circuits 110 and 120.

[0051] The MPU 20 executes PWM control in the transient state (S15) until the output voltage Vo reaches the threshold value Vth (S16: NO). Also, until the output voltage Vo reaches the threshold value Vth (S16: NO), the switch control signal PG is at a low level, and the switch circuit 41S electrically connects the output terminal of the MPU 20 and the drive circuit 120.

[0052] This control continues, and when the output voltage Vo reaches the threshold value Vth (S16: YES), the state transitions to the steady state STs. At this time, the MPU 20 determines the threshold value Vth according to the required drive voltage Vdd, and executes PWM control in the steady state based on this threshold value (S17). Specifically, the MPU 20 generates a PWM drive control signal PWM11 to achieve multiphase PWM control with a PWM period Tpwm according to the required drive voltage, drive current, and number of individual power conversion systems 101 to be driven.

[0053] Furthermore, in a steady state, the output voltage Vo is higher than the threshold value Vth, so the detection comparison circuit 411 outputs a high-level switch control signal PG to the switch circuit 41S. When the high-level switch control signal PG is input, the switch circuit 41S electrically disconnects the output terminal of the MPU 20 from the drive circuit 120 and electrically connects the output terminal of the signal extension circuit 31 to the drive circuit 120.

[0054] Therefore, in a steady state, the PWM drive control signal output from the signal expansion circuit 31 is input to the drive circuit 120. As described above, the signal expansion circuit 31 is made up of a delay circuit (phase adjustment circuit), and outputs the input PWM drive control signal PWM11 after delaying it by a predetermined amount. This delay amount is determined by the above-mentioned PWM period Tpwm and the number of members.

[0055] As a result, the PWM drive control signal PWM12 input to the drive circuit 120 is delayed by a predetermined amount relative to the PWM drive control signal PWM11. Therefore, the plurality of individual power conversion systems 101 are driven in a multiphase manner.

[0056] As a result, with an appropriate number of power conversion circuits, power supply system 100 can achieve a desired output current value with high efficiency at an output voltage value determined in response to command values ​​(drive voltage, drive current) from load 90. That is, power supply system 100 can suppress power consumption in a steady state, and can flexibly respond to an increase in current according to the number of power conversion circuits being driven, thereby expanding the scale of its output power capacity.

[0057] After transitioning to the steady state, although detailed circuitry is omitted, the power conversion circuit 11 detects the inductor current of inductor L1 and feeds back the detected inductor current value of inductor L1 to the MPU 20 via the individual current feedback circuit iFB11. The power conversion circuit 12 detects the inductor current of inductor L2 and feeds back the detected inductor current value of inductor L2 to the MPU 20 via the individual current feedback circuit iFB12. In addition, the output voltage Vo of the output terminal Po is fed back to the MPU 20.

[0058] The MPU 20 adjusts the PWM drive control signal using these fed-back currents and voltages, thereby adjusting the output difference between the power conversion circuit 11 and the power conversion circuit 12 and the output difference between the multiple individual power conversion systems 101. Therefore, the power supply system 100 can achieve even more efficient power conversion.

[0059] Furthermore, in the power supply system 100, communication between the MPU 20 and the drive circuits 110 and 120 can be more reliably achieved in a transient state. This allows the MPU 20 to more reliably grasp the states of the multiple individual power conversion systems 101 at startup, thereby achieving the highly efficient power conversion described above.

[0060] Furthermore, in the power supply system 100, in a transient state, appropriate PWM drive control signals can be provided to the drive circuits 110 and 120. This allows the power supply system 100 to start up stably.

[0061] FIG. 5 is a diagram showing an example of output voltage waveforms in the configuration of the present invention and the comparative configuration.

[0062] For example, without the configuration of the power supply system 100 (in the case of the comparative configuration), the PWM period is shorter and fluctuates more significantly during a transient state than during a steady state. Therefore, if the undervoltage lockout circuit 41 is not provided and the output terminal of the signal expansion circuit 31 is electrically connected to the drive circuit 120 even during a transient state, problems may occur, such as the PWM drive control signal being input to the drive circuit 120 exceeding the PWM period at that time. This causes the startup state of the power supply system 100 to become unstable. As shown by the dashed line in FIG. 5, this causes a problem in which the rise of the output voltage Vo is unstable, and the output voltage Vo does not reach the required drive voltage Vdd after a predetermined time ts from the startup time t0. Another problem occurs in which the output voltage Vo does not increase monotonically during a transient state.

[0063] However, by providing the configuration of the power supply system 100, the output voltage Vo increases substantially uniformly in the transient state, and at a predetermined time ts, the output voltage Vo reaches the required drive voltage Vdd, enabling a transition to a steady state. Furthermore, a substantially constant output voltage Vo can be obtained even after the transition to the steady state.

[0064] [Second embodiment] A power supply system according to a second embodiment of the present invention will be described with reference to the drawings. Fig. 6 is a diagram showing an example of waveforms of the power supply system according to the second embodiment. From the top, Fig. 6 shows an enable signal En, an output voltage Vo, a switch control signal PG, a PWM drive control signal PWM11, and a PWM drive control signal PWM12.

[0065] 6, the power supply system according to the second embodiment differs from the power supply system 100 according to the first embodiment in the setting of the threshold Vth and the timing of switching the PWM control signal from a transient state to a steady state. The other configurations and controls of the power supply system according to the second embodiment are the same as those of the power supply system 100 according to the first embodiment, and a description of the same parts will be omitted.

[0066] The detection comparison circuit 411 and the MPU 20 set a threshold value Vth that is a predetermined voltage ΔV lower than the required drive voltage Vdd. The voltage ΔV is, for example, about 5% to 10% of the required drive voltage Vdd. Note that the voltage ΔV is not limited to this, and may be set appropriately as a percentage of the required drive voltage Vdd, or may be a fixed value unrelated to the required drive voltage Vdd.

[0067] As described above, the detection comparison circuit 411 generates the switch control signal PG in accordance with the result of the comparison between the output voltage Vo and the threshold value Vth, and controls the switch circuit 41S.

[0068] When the output voltage Vo becomes higher than the threshold value Vth, the MPU 20 starts timing for the switching control. When the time for the switching control reaches a predetermined time td, the MPU 20 switches from the transient state PWM control drive signal to the steady state PWM drive control signal. This predetermined time td is determined based on the time change characteristics of the output voltage Vo and the value of the threshold value Vth, and is set based on the timing at which the output voltage Vo reliably reaches the required drive voltage Vdd.

[0069] With such a configuration and control, the power supply system according to the second embodiment can reduce malfunctions when transitioning from a transient household state to a stable state, and can achieve a more stable startup.

[0070] [Third embodiment] A power supply system according to a third embodiment of the present invention will be described with reference to the drawing. Fig. 7 is a circuit block diagram showing an example of the power supply system according to the third embodiment.

[0071] 7, the power supply system 100A according to the third embodiment differs from the power supply system 100 according to the first embodiment in the configuration of the signal extension circuits 31 of the multiple individual power conversion systems 101. The other configurations of the power supply system 100A are the same as those of the power supply system 100, and a description of the same parts will be omitted.

[0072] The signal expansion circuits 31 of the multiple individual power conversion systems 101 are formed by one programmable FPGA 300 .

[0073] With this configuration, the power supply system 100A can achieve the same effects as the power supply system 100. Furthermore, the power supply system 100A can achieve highly accurate setting of delay times (phase adjustment) for the PWM drive control signals PWM12 of the multiple individual power conversion systems 101. Furthermore, the power supply system 100A can easily set the number of signal adjustment circuits according to the number of individual power conversion systems 101.

[0074] [Fourth embodiment] A power supply system according to a fourth embodiment of the present invention will be described with reference to the drawing. Fig. 8 is a circuit block diagram showing an example of the power supply system according to the fourth embodiment.

[0075] 8, the power supply system 100B according to the fourth embodiment differs from the power supply system 100 according to the first embodiment in the configurations of the signal extension circuits 31 and the under voltage malfunction prevention circuits 41 of the multiple individual power conversion systems 101. The other configurations of the power supply system 100B are the same as those of the power supply system 100, and a description of the similar parts will be omitted.

[0076] The signal expansion circuits 31 and the under voltage lockout circuits 41 of the multiple individual power conversion systems 101 are formed by one programmable FPGA 340 .

[0077] With this configuration, the power supply system 100B can achieve the same effects as the power supply system 100. Furthermore, the power supply system 100B can set a highly accurate delay time (phase adjustment) for the PWM drive control signal PWM12 of the multiple individual power conversion systems 101. The power supply system 100B can also achieve highly accurate timing for switching between a transient state and a steady state. Furthermore, the power supply system 100B can easily set the number of signal adjustment circuits and the number of undervoltage lockout prevention circuits according to the number of individual power conversion systems 101. Furthermore, since the signal expansion circuit 31 and the undervoltage lockout prevention circuit 41 are formed in a single FPGA, the power supply system 100B can be made smaller.

[0078] [Fifth embodiment] A power supply system according to a fifth embodiment of the present invention will be described with reference to the drawings. Fig. 9 is a circuit block diagram showing an example of a part of the power supply system according to the fifth embodiment.

[0079] 9, an individual power conversion system 101C of a power supply system 100C according to the fifth embodiment differs from the individual power conversion system 101 of the power supply system 100 according to the first embodiment in that it includes a plurality of power conversion circuits 13, a signal extension circuit 32, and an under voltage malfunction prevention circuit 42. The other configuration of the power supply system 100C is the same as that of the power supply system 100, and a description of similar parts will be omitted.

[0080] Power conversion circuit 13 includes drive circuit 130, switching element Q3H, switching element Q3L, inductor L3, and capacitor Co3. The basic configuration of power conversion circuit 13 is similar to that of power conversion circuit 12. Power conversion circuit 13 corresponds to the "second power conversion circuit" of the present invention, drive circuit 130 corresponds to the "second drive circuit" of the present invention, and switching element Q3H and switching element Q3L correspond to the "second switching element" of the present invention.

[0081] The input terminal of the signal expansion circuit 32 is connected to the connection line between the MPU 20 and the power conversion circuit 11. The output terminal of the signal expansion circuit 32 is connected to the low voltage lockout circuit 42. The basic configuration of the signal expansion circuit 32 is the same as that of the signal expansion circuit 31. However, the delay amount of the signal expansion circuit 32 is different from the delay amount of the signal expansion circuit 31.

[0082] The low voltage lockout circuit 42 includes a switch circuit 42S and a detection / comparison circuit 421. The switch circuit 42S is connected to the output terminal of the signal expansion circuit 32, the connection line between the MPU 20 and the power conversion circuit 11, and the drive circuit 130. The basic configuration of the low voltage lockout circuit 42 is the same as that of the low voltage lockout circuit 41.

[0083] In this way, the individual power conversion system 101C of the power supply system 100C is provided with two sets of circuits to which a signal expansion circuit, a low voltage malfunction prevention circuit, and a power conversion circuit are electrically connected in sequence, and these are connected in parallel.

[0084] With this configuration, power supply system 100C can achieve the same effects as power supply system 100. Furthermore, power supply system 100C can increase the number of phases that can be handled by one individual power conversion system 101C.

[0085] [Sixth embodiment] A power supply system according to a sixth embodiment of the present invention will be described with reference to the drawing. Fig. 10 is a circuit block diagram showing an example of a part of the power supply system according to the sixth embodiment.

[0086] 10, an individual power conversion system 101D of a power supply system 100D according to the sixth embodiment differs from the individual power conversion system 101C of the power supply system 100C according to the fifth embodiment in that it includes an undervoltage malfunction prevention circuit 40. Other configurations of the individual power conversion system 101D are similar to those of the individual power conversion system 101C, and a description of similar parts will be omitted.

[0087] The individual power conversion system 101D includes an under voltage lockout circuit 40. The under voltage lockout circuit 40 includes a switch circuit 41S, a switch circuit 42S, and a detection and comparison circuit 400. The switch circuit 41S and the switch circuit 42S are similar to those in the individual power conversion system 101C described above.

[0088] The detection / comparison circuit 400 generates a switch control signal PG based on the result of comparison between the output voltage Vo and the threshold value Vth, and outputs the signal to the switch circuit 41S and the switch circuit 42S.

[0089] With this configuration, power supply system 100D can achieve the same effects as power supply system 100C. Furthermore, power supply system 100D can achieve a smaller and simpler circuit configuration than power supply system 100C.

[0090] In the individual power conversion system 101C according to the fifth embodiment and the individual power conversion system 101D according to the sixth embodiment, two sets of circuits to which the signal extension circuit, the low voltage malfunction prevention circuit, and the power conversion circuit are electrically connected in sequence are shown, but three or more sets may also be used.

[0091] Furthermore, the configurations and controls of the above-described embodiments can be combined as appropriate, and effects corresponding to each combination can be achieved. [Explanation of symbols]

[0092] 11, 12, 13: Power conversion circuit 20:MPU 31, 32: Signal expansion circuit 40, 41, 42: Low voltage malfunction prevention circuit 41S, 42S: Switch circuit 90: Load 100, 100A, 100A, 100B, 100C, 100D: Power supply system 101, 101C, 101D: Individual power conversion systems 110, 120, 130: Drive circuit 300, 340: FPGA 400, 411, 421: Detection comparison circuit

Claims

1. a plurality of power conversion circuits including at least a first power conversion circuit including a first inductor, a first switching element that controls a current flowing through the first inductor, and a first drive circuit that drives the first switching element; and a second power conversion circuit including a second inductor, a second switching element that controls a current flowing through the second inductor, and a second drive circuit that drives the second switching element; an output terminal for connecting the plurality of power conversion circuits in parallel to combine output currents into one to obtain an output voltage; a power management control IC element having an external signal function for outputting a first drive signal controlled in response to an external signal to the plurality of power conversion circuits; a signal extension circuit electrically connected between the power management control IC element and the second drive circuit, which generates and outputs a second drive signal whose phase is adjusted with respect to the first drive signal; an under voltage lockout circuit connected between the output terminal of the power management control IC element, the output terminal of the signal extension circuit, and the input terminal of the second driving circuit; Equipped with the first drive signal is a three-state signal having a first voltage, a second voltage, and a third voltage, from the lowest voltage; the under voltage lockout circuit includes a detection and comparison circuit that detects the output voltage and determines whether the output voltage is equal to or lower than a threshold voltage that is a voltage value lower than a predetermined output voltage; If the output voltage is lower than the threshold voltage, the under voltage lockout circuit outputs the first drive signal as the second drive signal to the second drive circuit; If the output voltage is greater than the threshold voltage, the under voltage lockout circuit outputs the second drive signal, which is phase-adjusted with respect to the first drive signal by the signal extension circuit, to the second drive circuit; the plurality of power conversion circuits perform multi-phase signal drive operations; A scalable power supply system.

2. There are a plurality of sets of power conversion circuit configurations corresponding to the second power conversion circuit, These sets operate based on the output signal of the power management control IC element, and the plurality of sets of power conversion circuits are connected in parallel to combine the output currents into one to obtain an output voltage. The scalable power supply system according to claim 1 .

3. The power management control IC element comprises: a plurality of output terminals for outputting the first drive signal; a power conversion circuit configuration corresponding to the first power conversion circuit, the under voltage lockout circuit, and the second power conversion circuit is provided for each of the plurality of output terminals; 3. The scale-expandable scalable power supply system according to claim 1 or 2.

4. The power management control IC element comprises: outputting the plurality of first drive signals with different phases; 4. The scalable power supply system according to claim 3.

5. The power management control IC element is composed of a multi-phase controller semiconductor IC equipped with a digital control circuit. The scalable power supply system according to claim 1 .

6. The external signal function provided in the power management control IC element executes communication with the outside using a PMBus signal. The scalable power supply system according to claim 1 .

7. The signal expansion circuit is configured with a programmable FPGA. The scalable power supply system according to claim 1 .

8. The signal extension circuit is composed of an analog IC. The scalable power supply system according to claim 1 .

9. The signal extension circuit and the under voltage lockout circuit are configured by a programmable FPGA. The scalable power supply system according to claim 1 .

10. The signal extension circuit and the undervoltage lockout circuit are configured by analog ICs. The scalable power supply system according to claim 1 .

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