Bus capacitors and automobiles

Abstract

A bus capacitor and a vehicle are provided, the bus capacitor comprising a plurality of capacitor layers stacked along a thickness direction of the bus capacitor and a dielectric filled between two adjacent capacitor layers, the plurality of capacitor layers including a plurality of positive capacitor layers and a plurality of negative capacitor layers, the bus capacitor being provided with a first hole extending along its thickness direction, the first hole penetrating the plurality of positive capacitor layers and a first conductive member provided within the first hole, the first conductive member contacting the plurality of positive capacitor layers such that the plurality of positive capacitor layers are electrically connected, the bus capacitor being provided with a second hole extending along its thickness direction, the second hole penetrating the plurality of negative capacitor layers and a second conductive member provided within the second hole, the second conductive member contacting the plurality of negative capacitor layers such that the plurality of negative capacitor layers are electrically connected.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to Chinese Patent Application No. 202110945614.7, entitled "Bus Capacitor and Automobile," filed with the State Intellectual Property Office of the People's Republic of China on August 17, 2021, the entire contents of which are incorporated herein by reference.

[0002] The present application relates to a bus capacitor and an automobile. [Background technology]

[0003] Third-generation semiconductors, represented by silicon carbide (SiC), have excellent performance in the electrical control of new energy vehicles, possessing advantages such as a wide bandgap, high thermal conductivity, high melting point, high critical breakdown electric field, and high saturated electron mobility. Metal-oxide-semiconductor field-effect transistors (MOSFETs) made with SiC have excellent performance such as low on-resistance, fast switching speed, high temperature resistance, and high voltage resistance.

[0004] In the motor drive power module of a new energy vehicle, using MOSFET elements manufactured with SiC as switching elements can reduce losses, increase the driving range in the New European Driving Cycle (NEDC), reduce volume, and improve space utilization. Currently, the stray inductance of the system cannot be properly controlled, so the only way to mitigate the impact of stray inductance on the elements is to slow down the switching speed to prevent damage to the elements caused by shock voltages caused by stray inductance during switching. However, slowing down the switching speed prevents the MOSFET from fully utilizing its fast switching speed. More specifically, the performance of SiC used in MOSFET elements cannot be fully utilized. Summary of the Invention [Problem to be solved by the invention]

[0005] The present application aims to provide a bus capacitor and an automobile that can reduce stray inductance, thereby mitigating the impact of stray inductance on elements and fully utilizing the advantage of fast MOSFET switching speed, i.e., fully utilizing the performance of SiC used in MOSFET elements. [Means for solving the problem]

[0006] A first aspect of the present application provides a bus capacitor comprising: a plurality of capacitor layers stacked along a thickness direction of the bus capacitor; and a dielectric filled between any two adjacent capacitor layers, the plurality of capacitor layers including a plurality of positive capacitor layers and a plurality of negative capacitor layers; the bus capacitor has first holes extending along its thickness direction, the first holes penetrating the plurality of positive capacitor layers and having first conductive members disposed within the first holes, the first conductive members contacting the plurality of positive capacitor layers so as to electrically connect the plurality of positive capacitor layers; and second holes extending along its thickness direction, the second holes penetrating the plurality of negative capacitor layers and having second conductive members disposed within the second holes, the second conductive members contacting the plurality of negative capacitor layers so as to electrically connect the plurality of negative capacitor layers.

[0007] In some embodiments, the first conductive member includes a first conductive rod inserted into the first hole, and the second conductive member includes a second conductive rod inserted into the second hole.

[0008] In some embodiments, the first conductive member includes a first conductive layer applied to the inner wall of the first hole, and the second conductive member includes a second conductive layer applied to the inner wall of the second hole.

[0009] In some embodiments, a plurality of positive electrode capacitor layers and a plurality of negative electrode capacitor layers are alternately stacked along the thickness direction, a first hole further penetrates the negative electrode capacitor layer, the negative electrode capacitor layer is sandwiched between any two adjacent positive electrode capacitor layers, a first conductive member is spaced apart from the negative electrode capacitor layer penetrated by the first hole, a second hole further penetrates the positive electrode capacitor layer, the positive electrode capacitor layer is sandwiched between any two adjacent negative electrode capacitor layers, and a second conductive member is spaced apart from the positive electrode capacitor layer penetrated by the second hole.

[0010] In some embodiments, the bus capacitor has a plurality of first holes extending along its thickness direction and a plurality of second holes extending along its thickness direction, the plurality of first conductive members in the plurality of first holes being distributed at different positions so as to electrically connect different portions of the plurality of positive capacitor layers, and the plurality of second conductive members in the plurality of second holes being distributed at different positions so as to electrically connect different portions of the plurality of negative capacitor layers.

[0011] In some embodiments, the plurality of positive electrode capacitor layers includes a first positive electrode layer and a second positive electrode layer, wherein the thickness of the first positive electrode layer is greater than the thickness of the second positive electrode layer; and the plurality of negative electrode capacitor layers includes a first negative electrode layer and a second negative electrode layer, wherein the thickness of the first negative electrode layer is greater than the thickness of the second negative electrode layer.

[0012] In some embodiments, the bus capacitor further includes a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, wherein the positive input terminal is in contact with the first positive electrode layer and thereby electrically connected to the first positive electrode layer, the negative input terminal is in contact with the first negative electrode layer and thereby electrically connected to the first negative electrode layer, the positive output terminal is in contact with the plurality of positive capacitor layers and thereby electrically connected to the plurality of negative capacitor layers, and the negative output terminal is in contact with the plurality of negative capacitor layers and thereby electrically connected to the plurality of negative capacitor layers.

[0013] In some embodiments, the bus capacitor further includes an insulating case, the plurality of capacitor layers are disposed inside the insulating case, the positive input terminal penetrates the bus capacitor along the thickness direction, and two ends of the positive input terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the negative input terminal penetrates the bus capacitor along the thickness direction, and two ends of the negative input terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the positive input terminal has a positive input hole that penetrates along the thickness direction, and the negative input terminal has a negative input hole that penetrates along the thickness direction.

[0014] In some embodiments, the bus capacitor further includes an insulating case, the plurality of capacitor layers are disposed inside the insulating case, the positive output terminal penetrates the bus capacitor along the thickness direction, and two ends of the positive output terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the negative output terminal penetrates the bus capacitor along the thickness direction, and two ends of the negative output terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the positive output terminal has a positive output hole that penetrates along the thickness direction, and the negative output terminal has a negative output hole that penetrates along the thickness direction.

[0015] In some other embodiments, the bus capacitor further includes an insulating case, the plurality of capacitor layers are disposed inside the insulating case, the positive output terminal has an arched sheet shape, and the negative output terminal has an arched sheet shape, the bus capacitor is provided with a mounting hole penetrating along its thickness direction, the positive output terminal and the negative output terminal are both disposed within the mounting hole, and the positive output terminal and the negative output terminal are located on the same side or on different sides of the mounting hole.

[0016] In some embodiments, the line connecting the positive input terminal to the positive output terminal and the line connecting the negative input terminal to the negative output terminal cross each other.

[0017] In some embodiments, the plurality of positive electrode capacitor layers includes a plurality of second positive electrode layers, and the plurality of negative electrode capacitor layers includes a plurality of second negative electrode layers, and the number of second positive electrode layers is equal to the number of second negative electrode layers.

[0018] In some embodiments, the bus capacitor further includes a positive input terminal and a negative input terminal, the positive input terminal electrically connected to the first positive electrode layer and the second positive electrode layer, and the negative input terminal electrically connected to the first negative electrode layer and the second negative electrode layer.

[0019] A second aspect of the present application provides a vehicle including the bus capacitor and a power module according to any one of the first aspects of the present application, wherein the power module is provided with a positive connection terminal and a negative connection terminal, the positive connection terminal being connected to a positive capacitor layer of the bus capacitor, and the negative connection terminal being connected to a negative capacitor layer of the bus capacitor. [Effects of the Invention]

[0020] According to the bus capacitor of the present application, the positive capacitor layers of the bus capacitor are electrically connected via a first conductive member in a first hole that extends along the thickness direction of the bus capacitor and penetrates the positive capacitor layers, and the negative capacitor layers of the bus capacitor are electrically connected via a second conductive member in a second hole that extends along the thickness direction of the bus capacitor and penetrates the negative capacitor layers. In this way, when the power module is connected to the bus capacitor via the positive output terminal and the negative output terminal, the connection distance between each positive capacitor layer and the power module is significantly shortened, and the connection distance between each negative capacitor layer and the power module is also significantly shortened. This reduces stray inductance and mitigates the impact of stray inductance on the element, fully demonstrating the advantage of fast switching speed of the MOSFET, i.e., fully demonstrating the performance of SiC used in MOSFET elements.

[0021] The details of one or more embodiments of the application are set forth in the drawings and description below. Other features and advantages of the application will be apparent from the description, drawings, and claims.

[0022] In order to more clearly describe the technical solution of the present application, the drawings necessary for use in the detailed description of the invention are briefly described below. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a schematic diagram illustrating the principle of generation of stray inductance. [Figure 2] FIG. 1 is a schematic diagram illustrating voltage overshoot caused by stray inductance. [Figure 3] FIG. 1 is a schematic diagram illustrating a bus capacitor according to an embodiment of the present application. [Figure 4] 4 is a schematic configuration diagram of the bus capacitor shown in FIG. 3 from another perspective. FIG. [Figure 5] FIG. 4 is a cross-sectional view of the bus capacitor taken along line AA in FIG. 3. [Figure 6] FIG. 4 is a cross-sectional view of the bus capacitor taken along line BB in FIG. 3. [Figure 7] 4 is a schematic diagram of the bus capacitor shown in FIG. 3, in which a first conductive member and a second conductive member are provided. FIG. [Figure 8] FIG. 1 is a schematic diagram illustrating a combination of a bus capacitor and a power module. [Figure 9] FIG. 10 is a schematic diagram of a bus capacitor according to another embodiment of the present application. [Figure 10] FIG. 10 is a cross-sectional view of the bus capacitor taken along line CC in FIG. 9. [Figure 11] FIG. 10 is a schematic diagram of a bus capacitor according to yet another embodiment of the present application. [Figure 12] FIG. 12 is a schematic diagram illustrating a combination of the bus capacitor and the power module shown in FIG. [Figure 13] 1 is a schematic configuration diagram of an automobile according to an embodiment of the present application; DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, the technical means in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application.

[0025] The terms "first," "second," etc. used in the specification and claims of this application are intended to distinguish between similar objects and do not describe a particular order or priority. It should be understood that the data used in this manner may be interchanged as appropriate so that the embodiments of this application may be practiced in an order other than that shown or described herein, and that the objects distinguished by "first," "second," etc. are generally of the same type, and the number of objects is not limited; for example, there may be one or more first objects.

[0026] In this application, unless otherwise clearly specified or limited, the term "connection" and the like should be understood in a broad sense, and may refer to, for example, a fixed connection, a detachable connection, or an integral connection, a mechanical connection or an electrical connection, a direct connection or an indirect connection via an intermediate medium, or a relationship of internal communication between two components or an interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to specific circumstances.

[0027] In this application, unless otherwise clearly specified or limited, a first feature being "above" or "below" a second feature may include direct contact between the first and second features, or indirect contact between the first and second features via an intermediate medium. Furthermore, a first feature being "above," "above," or "on the upper surface" of a second feature may include the first feature being directly above or diagonally above the second feature, or may simply mean that the horizontal height of the first feature is higher than that of the second feature. A first feature being "below," "below," or "on the lower surface" of a second feature may include the first feature being directly below or diagonally below the second feature, or may simply mean that the horizontal height of the first feature is lower than that of the second feature.

[0028] 1 is a schematic diagram showing the principle of stray inductance generation. The stray inductance consists of two parts. One is the stray inductance generated by the copper bar from the bus capacitor C to the terminal of the power module 700, and the other is the stray inductance generated by the copper bar from the bus capacitor C to the terminal of the power module 700. DC-Link The other part is the internal inductance of the power module itself, which is shown as L in Figure 1. mode It will be understood that the entire power module is a direct current to alternating current (DC-AC) conversion module, such as a DC-AC converter. Two MOSFET elements are provided within the power module, and a node A between the two MOSFETs is the output terminal of the power module. Generally, the upper MOSFET element in FIG. 1 is connected to the positive terminal of a capacitor C after being turned on, and the lower MOSFET element is connected to the negative terminal of the capacitor C after being turned on, and the upper MOSFET and the lower MOSFET are alternately turned on to achieve DC to AC conversion.

[0029] Figure 2 is a schematic diagram showing a voltage overshoot caused by stray inductance. The left vertical axis in Figure 2 represents current I in amperes (A), the right vertical axis represents voltage U in volts (V), and the horizontal axis represents time T in nanoseconds (ns). Curve L1 represents the voltage change, and curve L2 represents the current change. As can be seen from Figure 2, the instantaneous impulse voltage after the power supply is turned off is ΔV, which is calculated by the following formula: ΔV=(L DC-Link +L mode )*(di / dt) Equation 1

[0030] In Equation 1, ΔV is the instantaneous impulse voltage when the MOSFET device is turned off, and L DC-Link is the stray inductance caused by the copper bars from the bus capacitor C to the terminals of the power module, and L modeis the internal inductance of the power module, and (di / dt) is the switching speed of the MOSFET element. As can be seen from Equation 1, the stray inductance L mode If we want to keep the value unchanged, the stray inductance L DC-Link The larger the stray inductance L, the larger the instantaneous impulse voltage ΔV. DC-Link If it is not possible to reduce the di / dt, it is necessary to control the switching speed (di / dt) of the MOSFET element to be slower in order to prevent the instantaneous impulse voltage ΔV from becoming excessive.

[0031] However, reducing the switching speed of a MOSFET element prevents the advantages of the MOSFET element (i.e., fast switching speed) from being fully utilized. More specifically, the performance of SiC used in the MOSFET element cannot be fully utilized.

[0032] To solve the above problem, an embodiment of the present application provides a bus capacitor. The bus capacitor can be used in an electric control module of an automobile, and the electric control module may be a motor controller. Of course, it should be understood that the bus capacitor is generally used in conjunction with a power module 700 (e.g., a power chip including an IGBT, a SiC MOSFET, or a Si MOSFET).

[0033] As shown in Figures 3 to 6 and 8, Figure 3 is a schematic diagram of a bus capacitor according to an embodiment of the present application, Figure 4 is a schematic diagram of the bus capacitor shown in Figure 3 from another perspective, Figure 5 is a cross-sectional view of the bus capacitor taken along line AA in Figure 3, Figure 6 is a cross-sectional view of the bus capacitor taken along line BB in Figure 3, and Figure 8 is a schematic diagram of a combination of a bus capacitor and a power module. The bus capacitor according to an embodiment of the present application includes an insulating case 600, multiple capacitor layers, and a dielectric 300. The multiple capacitor layers and the dielectric 300 are all located inside the insulating case 600, and the multiple capacitor layers are stacked along the thickness direction of the bus capacitor (i.e., the Z-axis direction), with a dielectric 300 provided between every two adjacent capacitor layers.

[0034] The insulating case 600 may be made of plastic, and the dielectric 300 may be any one of mica, ceramic, and organic thin film. The insulating case 600 protects the capacitor layer and the dielectric 300 and prevents the capacitor layer and the dielectric 300 from getting wet. The insulating case 600 may be manufactured in a cylindrical, rectangular, cuboid, elliptical cylindrical, or other shape according to actual needs, and is not limited thereto in the present application.

[0035] As should be understood by those skilled in the art, the bus capacitor may further include terminals since it must ultimately be connected to the power module 700. Specifically, the bus capacitor further includes a positive input terminal 500, a negative input terminal 510, a positive output terminal 520, and a negative output terminal 530. The positive input terminal 500 and the negative input terminal 510 are input ports of electrical energy and are generally connected to the internal power supply point of the controller via a copper bar, and the positive output terminal 520 and the negative output terminal 530 are respectively connected to the power supply points of the power module 700. Positive and negative connection terminals is connected to.

[0036] In this embodiment, the positive capacitor layer to which the positive input terminal and the positive output terminal are connected is the same positive capacitor layer, but the positive input terminal and the positive output terminal are connected to different portions of the positive capacitor layer, so that the positive capacitor layer also functions as an electrical energy transmission function.Similarly, the negative input terminal and the negative output terminal are connected to different portions of the same negative capacitor layer, so that the negative capacitor layer also functions as an electrical energy transmission function.

[0037] In this embodiment, multiple sets of output terminals may be provided, and as shown in the figure, three sets of output terminals may be provided, each including one positive output terminal 520 and one negative output terminal 530. Each set of output terminals may be connected to a corresponding power module 700.

[0038] In some specific embodiments, for ease of installation, the positive input terminal 500 and the positive output terminal 520 are distributed in a row, and the negative input terminal 510 and the negative output terminal 530 are distributed in a row.

[0039] In some other specific embodiments, the positive input terminal 500 and the positive output terminal 520 are distributed diagonally, the negative input terminal 510 and the negative output terminal 530 are distributed diagonally, and a line connecting the positive input terminal 500 and the positive output terminal 520 and a line connecting the negative input terminal 510 and the negative output terminal 530 cross each other. This allows the positive current and the negative current to be distributed crossing each other, thereby reducing inductance.

[0040] When connected internally, the positive input terminal 500 and the positive output terminal 520 are connected to the positive capacitor layer 100 , and the negative input terminal 510 and the negative output terminal 530 are connected to the negative capacitor layer 200 .

[0041] Specifically, the plurality of capacitor layers include a plurality of positive electrode capacitor layers 100 and a plurality of negative electrode capacitor layers 200. More specifically, the plurality of positive electrode capacitor layers 100 include a first positive electrode layer 110 and a second positive electrode layer 120, and the thickness of the first positive electrode layer 110 is greater than the thickness of the second positive electrode layer 120. The plurality of negative electrode capacitor layers 200 include a first negative electrode layer 210 and a second negative electrode layer 220, and the thickness of the first negative electrode layer 210 is greater than the thickness of the second negative electrode layer 220.

[0042] In some specific embodiments, the positive electrode input terminal 500 is provided to be in contact with the first positive electrode layer 110 and thereby electrically connected to the first positive electrode layer 110, and the negative electrode input terminal 510 is provided to be in contact with the first negative electrode layer 210 and thereby electrically connected to the first negative electrode layer 210.

[0043] The positive electrode output terminal 520 is provided so as to be in contact with the plurality of positive electrode capacitor layers 100, thereby being electrically connected to the plurality of positive electrode capacitor layers 100, i.e., so as to be connected to both the first positive electrode layer 110 and the second positive electrode layer 120. The negative electrode output terminal 530 is provided so as to be in contact with the plurality of negative electrode capacitor layers 200, thereby being electrically connected to the plurality of negative electrode capacitor layers 200, i.e., so as to be connected to both the first negative electrode layer 210 and the second negative electrode layer 220.

[0044] That is, the positive input terminal 500 is connected only to the first positive electrode layer 110, the negative input terminal 510 is connected only to the first negative electrode layer 210, the positive output terminal 520 is connected to not only the first positive electrode layer 110 but also the second positive electrode layer 120, and the negative output terminal 530 is connected to not only the first negative electrode layer 210 but also the second negative electrode layer 220. This allows a load current to be transmitted between the first positive electrode layer 110 and the first negative electrode layer 210, and the second positive electrode layer 120 and the second negative electrode layer 220 only pass a ripple current and are not involved in transmitting the load current.

[0045] Generally, since the load current is much larger than the ripple current, the first positive electrode layer 110 and the first negative electrode layer 210 are formed thick to effectively transmit the load current, and the second positive electrode layer 120 and the second negative electrode layer 220 are formed thin to save resources, reduce the thickness of the bus capacitor, and effectively pass the ripple current.

[0046] In this embodiment, the first positive electrode layer 110 and the first negative electrode layer 210 are mainly responsible for current transmission, and the thickness and number of layers of both layers may be designed according to the load current that needs to be transmitted. The second positive electrode layer 120 and the second negative electrode layer 220 are the parts that provide the main capacitance value, and multiple layers may be provided to meet capacitance requirements.

[0047] In some other specific embodiments, the positive input terminal 500 may be provided so as to be connected not only to the first positive electrode layer 110 but also to the second positive electrode layer 120. Correspondingly, the negative input terminal 510 may be provided so as to be connected not only to the first negative electrode layer 210 but also to the second negative electrode layer 220. This allows the positive input terminal 500 and the negative input terminal 510 to also participate in transmitting the load current, thereby increasing the load on the bus capacitor.

[0048] In either connection method, the first positive electrode layer 110 and the first negative electrode layer 210 have the same number of layers, and each may be provided as one layer or two or more layers. The second positive electrode layer 120 and the second negative electrode layer 220 have the same number of layers, and each may be provided as one layer or two or more layers.

[0049] It will be understood that the multiple capacitor layers may be stacked in any manner, such as a manner in which the first positive electrode layer 110 and the first negative electrode layer 210 are provided as the top layer or the bottom layer, or a manner in which the first positive electrode layer 110 and the first negative electrode layer 210 are provided as intermediate layers. Several configurations are listed below. In a first configuration, the first positive electrode layer 110, the first negative electrode layer 210, the second positive electrode layer 120, the second negative electrode layer 220, the second positive electrode layer 120, the second negative electrode layer 220, the second positive electrode layer 120, and the second negative electrode layer 220 are stacked in this order from top to bottom. In a second configuration, the first negative electrode layer 210, the first positive electrode layer 110, the second positive electrode layer 120, the second negative electrode layer 220, the second positive electrode layer 120, the second negative electrode layer 220, the second positive electrode layer 120, and the second negative electrode layer 220 are stacked in this order from top to bottom. In a third configuration, a first positive electrode layer 110, a first negative electrode layer 210, a first positive electrode layer 110, a first negative electrode layer 210, a second positive electrode layer 120, a second negative electrode layer 220, a second positive electrode layer 120, and a second negative electrode layer 220 are stacked. In a fourth configuration, a first positive electrode layer 110, a first negative electrode layer 210, a second positive electrode layer 120, a second negative electrode layer 220, a second negative electrode layer 220, a second positive electrode layer 120, and a second negative electrode layer 220 are stacked in this order from top to bottom. The above only lists some configurations, and other similar configurations are not listed.

[0050] The thickness and number of the first positive electrode layer 110, the first negative electrode layer 210, the second positive electrode layer 120, and the second negative electrode layer 220 can be determined according to actual needs and are not limited in the present application.

[0051] 7 is a schematic diagram of a bus capacitor provided with a first conductive member and a second conductive member as shown in FIG. 3. In this embodiment, in order to reduce stray inductance, the bus capacitor is provided with a first hole extending along its thickness direction, the first hole penetrating the plurality of positive capacitor layers 100, a first conductive member 400 provided within the first hole, and the first conductive member 400 contacting the plurality of positive capacitor layers 100 so as to electrically connect the plurality of positive capacitor layers 100. The bus capacitor is provided with a second hole extending along its thickness direction, the second hole penetrating the plurality of negative capacitor layers 200, a second conductive member 410 provided within the second hole, and the second conductive member 410 contacting the plurality of negative capacitor layers 200 so as to electrically connect the plurality of negative capacitor layers 200.

[0052] As can be seen from the above, in this embodiment, the plurality of positive capacitor layers 100 can be electrically connected via the first conductive member 400, and the plurality of negative capacitor layers 200 can be electrically connected via the second conductive member 410. As a result, when the power module 700 is connected to the bus capacitor via the positive output terminal 520 and the negative output terminal 530, the connection distance between each positive capacitor layer 100 and the power module 700 is significantly shortened, and the connection distance between each negative capacitor layer 200 and the power module 700 is also significantly shortened. Compared to conventional methods using copper bars or connecting wires, the distance between the bus capacitor and the positive output terminal 520 and the negative output terminal 530 is significantly shortened, which reduces stray inductance and mitigates the impact of stray inductance on the device, thereby fully utilizing the advantage of fast switching speed of the MOSFET, i.e., fully utilizing the performance of SiC used in MOSFET devices.

[0053] In addition, since the capacitor layers may have some resistance, which may cause a loss in the transmitted electrical energy, the equivalent series resistance can be reduced by electrically connecting the plurality of positive electrode capacitor layers 100 via the first conductive member 400 and electrically connecting the plurality of negative electrode capacitor layers 200 via the second conductive member 410. Specifically, when electrical energy is transmitted between thin capacitor layers, the resistance of the thin capacitor layers is high, which causes a large loss in the transmitted electrical energy. However, by connecting the thin second positive electrode layer 120 and the thick first positive electrode layer 110 via the first conductive member 400 and connecting the thin second negative electrode layer 220 and the thick first negative electrode layer 110 via the second conductive member 410, First negative electrode layer 210 By connecting these layers, when a current is transmitted through the thin second positive electrode layer 120 and second negative electrode layer 220, a portion of the current is diverted to the thick first positive electrode layer 110 and first negative electrode layer 210 for transmission, and on the other hand, since the resistance of the thick first positive electrode layer 110 and first negative electrode layer 210 is small, the loss during transmission of electrical energy is also small, which corresponds to a reduction in the equivalent series resistance in the electrical energy transmission process.

[0054] For example, the number of first conductive members 400 may be one or two or more, and the multiple first conductive members 400 may be distributed at different positions so as to connect different portions of the multiple positive electrode capacitor layers 100, thereby effectively reducing the equivalent resistance of each portion of the thin positive electrode capacitor layer 100. Similarly, the number of second conductive members 410 may be one or two or more, and the multiple second conductive members 410 may be distributed at different positions so as to connect different portions of the multiple negative electrode capacitor layers 200. This effectively reduces the equivalent resistance of each portion of the thin negative electrode capacitor layer 200.

[0055] The first conductive member 400 and the second conductive member 410 can have various forms. In some specific embodiments, the first conductive member 400 includes a first conductive rod 402 inserted into the first hole 401, and the second conductive member 410 includes a second conductive rod 412 inserted into the second hole 411. The first conductive rod may be formed by injecting a conductive liquid into the first hole, may be pre-fabricated with a conductive material and then inserted into the first hole, or may be fabricated by an electroless copper plating process, and are not limited to these examples. The second conductive rod is similar and will not be described here. Such first conductive member 400 and second conductive member 410 have high electrical connection stability and are easy to process.

[0056] In some other specific embodiments, the first conductive member 400 includes a first conductive layer applied to the inner wall of the first hole, and the second conductive member 410 includes a second conductive layer applied to the inner wall of the second hole. That is, the first conductive member 400 is formed by applying a conductive material to the inner wall of the first hole, and the second conductive member 410 is formed by applying a conductive material to the inner wall of the second hole. This allows the first conductive member 400 and the second conductive member 410 to have a stable electrical connection, consume less material, be easy to process, and contribute to a lightweight design of the bus capacitor.

[0057] As described above, the plurality of positive electrode capacitor layers 100 and the plurality of negative electrode capacitor layers 200 may be alternately stacked along the thickness direction. In this case, when the first holes penetrate the positive electrode capacitor layers 100, they also penetrate the negative electrode capacitor layers 200 sandwiched between two adjacent positive electrode capacitor layers 100. To prevent short circuits due to contact between the first conductive members 400 in the first holes and the negative electrode capacitor layers 200, the first conductive members 400 can be spaced apart from the negative electrode capacitor layers 200 through which the first holes penetrate. Specifically, hole positions are formed at positions where the first holes penetrate the negative electrode capacitor layers 200, and the hole positions can be made larger, i.e., the hole diameter at the hole positions can be larger than the hole diameter of the first holes. In this case, the first conductive members 400 located in the first holes are spaced apart from the negative electrode capacitor layers 200.

[0058] Similarly, the second hole may further penetrate the positive electrode capacitor layer 100 sandwiched between any two adjacent negative electrode capacitor layers 200, and may separate the second conductive member 410 from the positive electrode capacitor layer 100 penetrated by the first hole to prevent a short circuit due to contact between the second conductive member 410 in the second hole and the positive electrode capacitor layer 100. Specifically, a hole position is formed at the position where the second hole penetrates the negative electrode capacitor layer 200, and the hole position may be made large, i.e., the hole diameter at the hole position may be larger than the hole diameter of the second hole. In this case, the second conductive member 410 located in the second hole is separated from the positive electrode capacitor layer 100.

[0059] In this embodiment, the positive input terminal 500 is specifically configured such that the positive input terminal 500 penetrates the bus capacitor along the thickness direction, and two ends of the positive input terminal 500 on both sides in the thickness direction are exposed to the outside of the insulating case 600. The negative input terminal 510 is specifically configured such that the negative input terminal 510 penetrates the bus capacitor along the thickness direction, and two ends of the negative input terminal 510 on both sides in the thickness direction are exposed to the outside of the insulating case 600. The positive input terminal 500 is provided with a positive input hole 501 that penetrates along the thickness direction, and the negative input terminal 510 is provided with a negative input hole 511 that penetrates along the thickness direction.

[0060] In this embodiment, the positive output terminal 520 is configured such that the positive output terminal 520 penetrates the bus capacitor along the thickness direction, and two ends of the positive output terminal 520 on both sides in the thickness direction are exposed to the outside of the insulating case 600. The negative output terminal 530 is configured such that the negative output terminal 530 penetrates the bus capacitor along the thickness direction, and two ends of the negative output terminal 530 on both sides in the thickness direction are exposed to the outside of the insulating case 600, and the positive output terminal 520 is provided with a positive output hole 521 that penetrates along the thickness direction, and the negative output terminal 530 is provided with a negative output hole 531 that penetrates along the thickness direction.

[0061] For the positive output terminal 520 and negative output terminal 530 configured as described above, the positive connection terminal 710 of the power module 700 is a positive terminal hole formed in the power module 700, and the negative connection terminal 720 of the power module 700 is a negative terminal hole formed in the power module 700. When connecting the bus capacitor and the power module 700, one conductive fastening rod 730 is inserted into the positive output hole 521 and the positive terminal hole. The positive terminal hole may be a screw hole, and the conductive fastening rod 730 may be a fastening bolt that is tightened into the screw hole to connect the power module 700 and the bus capacitor. Similarly, another conductive fastening rod 730 is inserted into the negative output hole 531 and the negative terminal hole. The negative terminal hole may be a screw hole, and the conductive fastening rod 730 may be a fastening bolt that is tightened into the screw hole to connect the power module 700 and the bus capacitor. This allows for both mechanical and electrical connection, and since the contact distance between the power module 700 and the bus capacitor is zero, the stray inductance is reduced, mitigating the impact of the stray inductance on the element, allowing the advantage of the fast switching speed of the MOSFET to be fully utilized, i.e., the performance of SiC used in the MOSFET element to be fully utilized.

[0062] 9 and 10, Fig. 9 is a schematic diagram of a bus capacitor according to another embodiment of the present invention, and Fig. 10 is a cross-sectional view of the bus capacitor taken along line CC in Fig. 9. The bus capacitor according to some other embodiments of the present invention differs from the bus capacitors in the above-described embodiments in that the positive output terminal 520a has an arched sheet shape, the negative output terminal 530a also has an arched sheet shape, the bus capacitor is provided with a mounting hole 800 penetrating along its thickness direction, and the positive output terminal 520a and the negative output terminal 530a are both provided within the mounting hole 800. In addition, the positive output terminal 520a and the negative output terminal 530a are located on the same side of the mounting hole 800.

[0063] Specifically, the positive output terminal 520a and the negative output terminal 530a may both be U-shaped. With respect to the direction in the figure, the opening faces upward, and one side is connected to the side wall of the mounting hole 800. The side wall of the mounting hole 800 is formed so that the capacitor layer and the dielectric 300 are exposed to the mounting hole 800. It should be understood that, to prevent short circuits, only the positive capacitor layer 100 is exposed at the connection point with the positive output terminal 520a on the side wall of the mounting hole 800, and only the negative capacitor layer 200 is exposed at the connection point with the negative output terminal 530a.

[0064] When a bus capacitor having such a configuration is connected to a power module, the power module is provided with an insertion rod having a corresponding positive connection terminal and a negative connection terminal, and the insertion rod is inserted into the mounting hole 800, and the positive connection terminal is Positive output terminal The negative terminal abuts against Negative output terminal By abutting the bus capacitor and the power module, the electrical connection distance between the bus capacitor and the power module can be made zero, thereby reducing stray inductance.

[0065] The positive output terminal 520a and the negative output terminal 530a are located on the same side of the mounting hole 800, and correspondingly, the positive connection terminal and the negative connection terminal can be distributed in the direction of the same side of the mounting hole 800 of the bus capacitor, i.e., along the width direction of the bus capacitor in the figure, which makes it easy to arrange the positive output terminal 520a and the negative output terminal 530a.

[0066] 11 and 12, Fig. 11 is a schematic diagram of a bus capacitor according to still another embodiment of the present invention, and Fig. 12 is a schematic diagram of a combination of the bus capacitor shown in Fig. 11 and a power module. The bus capacitor according to still another embodiment of the present invention differs from the bus capacitor according to the above-described embodiments in that the positive output terminal 520a and the negative output terminal 530a are located on different sides of the mounting hole 800. As can be seen from the figures, the positive output terminal 520a is located on the right side of the mounting hole 800, and the negative output terminal 530a is located on the left side of the mounting hole 800. Correspondingly, the positive connection terminal 710a and the negative connection terminal 720a may be distributed on both sides of the mounting hole 800 of the bus capacitor, i.e., along the length direction of the bus capacitor in the figures. As a result, the positive output terminal 520a and the negative output terminal 530a can firmly clamp the insertion rod of the power module 700, realizing mechanical and electrical connections, and the structure is simple, reliable, and stable.

[0067] FIG. 13 is a schematic diagram of a vehicle according to one embodiment of the present application. In some embodiments, the vehicle includes the bus capacitor described above and at least one power module coupled to the bus capacitor. The power module is provided with a positive connection terminal and a negative connection terminal, and the positive connection terminal is connected to the positive capacitor layer of the bus capacitor, and the negative connection terminal is connected to the negative capacitor layer of the bus capacitor. Note that FIG. 13 merely illustrates an example of a combination of a bus capacitor and a power module in a vehicle. In the present application, other combinations of a bus capacitor and a power module in a vehicle can be obtained based on other types of bus capacitor structures, and description thereof will be omitted here.

[0068] The above describes the examples of the present application in detail, and the principles and specific embodiments of the present application are explained using specific examples in this specification. The above description of the examples can help understand the method and gist of the present application. [Explanation of symbols]

[0069] 1000 Bus Capacitor 100 Positive Capacitor Layer 110 First positive electrode layer 120 Second positive electrode layer 200 negative capacitor layer 210 First negative electrode layer 220 Second negative electrode layer 300 Dielectric 400 First conductive member 401 Hole 1 402 First conductive rod 403 First conductive layer 410 Second conductive member 411 Hole 2 412 Second conductive rod 413 Second conductive layer 500 Positive input terminal 501 Positive input hole 510 Negative input terminal 511 Negative input hole 520, 520a Positive output terminal 521 Positive output hole 530, 530a Negative output terminal 531 Negative output hole 600 Insulation Case 700 Power Module 710, 710a Positive connection terminal 720, 720a Negative connection terminal 730 Conductive fastening rod 800 mounting holes, 2000 Automobile

Claims

1. A bus capacitor (1000) comprising: a plurality of capacitor layers stacked along a thickness direction of the bus capacitor; a dielectric (300) filled between any two adjacent capacitor layers; a positive input terminal (500); and a negative input terminal (510), wherein the plurality of capacitor layers include a plurality of positive capacitor layers (100) and a plurality of negative capacitor layers (200); The bus capacitor is provided with a first hole (401) extending along its thickness direction, the first hole penetrating the plurality of positive capacitor layers; a first conductive member (400) provided within the first hole, the first conductive member contacting the plurality of positive capacitor layers such that the plurality of positive capacitor layers are electrically connected; The bus capacitor is provided with a second hole (411) extending along its thickness direction, the second hole penetrating the plurality of negative electrode capacitor layers; a second conductive member (410) is provided within the second hole, the second conductive member contacting the plurality of negative electrode capacitor layers such that the plurality of negative electrode capacitor layers are electrically connected; The plurality of positive electrode capacitor layers includes a first positive electrode layer (110) and a second positive electrode layer (120); The plurality of negative electrode capacitor layers include a first negative electrode layer (210) and a second negative electrode layer (220); Only one first positive electrode layer and one first negative electrode layer are provided, the positive input terminal is electrically connected to the first positive electrode layer by contacting only the first positive electrode layer among the plurality of capacitor layers; the negative input terminal is electrically connected to the first negative electrode layer by contacting only the first negative electrode layer among the plurality of capacitor layers; A bus capacitor (1000) characterized by:

2. 2. The bus capacitor of claim 1, wherein the first conductive member includes a first conductive rod (402) inserted into the first hole, and the second conductive member includes a second conductive rod (412) inserted into the second hole.

3. 2. The bus capacitor of claim 1, wherein the first conductive member includes a first conductive layer (403) applied to an inner wall of the first hole, and the second conductive member includes a second conductive layer (413) applied to an inner wall of the second hole.

4. The plurality of positive electrode capacitor layers and the plurality of negative electrode capacitor layers are alternately stacked along the thickness direction, the first hole further penetrates the negative electrode capacitor layer, the negative electrode capacitor layer is sandwiched between any two adjacent positive electrode capacitor layers, and the first conductive member is spaced apart from the negative electrode capacitor layer penetrated by the first hole; 2. The bus capacitor of claim 1, wherein the second hole further penetrates the positive capacitor layer, the positive capacitor layer is sandwiched between any two adjacent negative capacitor layers, and the second conductive member is spaced from the positive capacitor layer penetrated by the second hole.

5. 2. The bus capacitor of claim 1, wherein the bus capacitor has a plurality of first holes extending along a thickness direction thereof and a plurality of second holes extending along a thickness direction thereof, the plurality of first conductive members in the plurality of first holes being distributed at different positions so as to electrically connect different portions of the plurality of positive capacitor layers, and the plurality of second conductive members in the plurality of second holes being distributed at different positions so as to electrically connect different portions of the plurality of negative capacitor layers.

6. 2. The bus capacitor of claim 1, wherein the plurality of positive capacitor layers includes a first positive electrode layer (110) and a second positive electrode layer (120), the thickness of the first positive electrode layer being greater than the thickness of the second positive electrode layer, and the plurality of negative capacitor layers includes a first negative electrode layer (210) and a second negative electrode layer (220), the thickness of the first negative electrode layer being greater than the thickness of the second negative electrode layer.

7. It further includes a positive output terminal (520, 520a) and a negative output terminal (530, 530a), the positive output terminal is in contact with the plurality of positive capacitor layers to be electrically connected to the plurality of positive capacitor layers; 7. The bus capacitor of claim 6, wherein the negative output terminal is electrically connected to the plurality of negative capacitor layers by contacting the plurality of negative capacitor layers.

8. The method further includes an insulating case (600), wherein the plurality of capacitor layers are provided inside the insulating case; the positive input terminal penetrates the bus capacitor along the thickness direction, and two ends of the positive input terminal on both sides in the thickness direction are exposed to the outside of the insulating case; the negative input terminal penetrates the bus capacitor along the thickness direction, and two ends of the negative input terminal on both sides in the thickness direction are exposed to the outside of the insulating case; 8. The bus capacitor according to claim 7, wherein the positive input terminal is provided with a positive input hole (501) penetrating along the thickness direction, and the negative input terminal is provided with a negative input hole (511) penetrating along the thickness direction.

9. The method further includes an insulating case (600), wherein the plurality of capacitor layers are provided inside the insulating case; 8. The bus capacitor according to claim 7, wherein the positive output terminal penetrates the bus capacitor along the thickness direction, and two ends of the positive output terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the negative output terminal penetrates the bus capacitor along the thickness direction, and two ends of the negative output terminal on both sides in the thickness direction are exposed to the outside of the insulating case, the positive output terminal has a positive output hole (521) that penetrates along the thickness direction, and the negative output terminal has a negative output hole (531) that penetrates along the thickness direction.

10. The method further includes an insulating case (600), wherein the plurality of capacitor layers are provided inside the insulating case; 8. The bus capacitor according to claim 7, wherein the positive output terminal has an arched sheet shape, the negative output terminal has an arched sheet shape, the bus capacitor has a mounting hole (800) penetrating along its thickness direction, the positive output terminal and the negative output terminal are both disposed within the mounting hole, and the positive output terminal and the negative output terminal are located on the same side or on different sides of the mounting hole.

11. 8. The bus capacitor according to claim 7, wherein a line connecting the positive input terminal and the positive output terminal and a line connecting the negative input terminal and the negative output terminal intersect with each other.

12. 7. The bus capacitor of claim 6, wherein the plurality of positive electrode capacitor layers includes a plurality of the second positive electrode layers, and the plurality of negative electrode capacitor layers includes a plurality of the second negative electrode layers, and the number of the second positive electrode layers is equal to the number of the second negative electrode layers.

13. 7. The bus capacitor of claim 6, further comprising a positive input terminal (500) and a negative input terminal (510), wherein the positive input terminal is electrically connected to the first positive electrode layer and the second positive electrode layer, and the negative input terminal is electrically connected to the first negative electrode layer and the second negative electrode layer.

14. A bus capacitor (1000) according to any one of claims 1 to 13 and a power module (700), The power module is provided with a positive electrode connection terminal (710, 710a) and a negative electrode connection terminal (720, 720a), the positive electrode connection terminal is connected to the positive electrode capacitor layer of the bus capacitor, and the negative electrode connection terminal is connected to the negative electrode capacitor layer of the bus capacitor.

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