AK Protocol Wheel Speed Sensor Protocol Data Bit Analysis Method and Apparatus
By converting and processing AK protocol wheel speed sensor signals to extract protocol data timestamps, the method addresses the high cost of dedicated chips, reducing costs and enhancing competitiveness.
Patent Information
- Application Number
- JP2024514379
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-09-21
- Filing Date
- 2023-12-12
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2043-12-12
AI Technical Summary
The high cost of using dedicated peripheral chips to analyze AK protocol data signals in wheel speed sensors is a significant issue, impacting product costs and enterprise competitiveness.
A method and apparatus that analyze AK protocol wheel speed sensor protocol data bits by converting current signals into voltage signals, capturing edge timestamps, and extracting protocol data timestamps to determine the value of each bit without requiring dedicated chips, using a comparator and edge capture modules for signal processing.
This approach reduces product costs, enhances supply chain security, and improves enterprise competitiveness by eliminating the need for dedicated chips while accurately analyzing protocol data bits.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to the technical field of data processing, and more particularly to a method and apparatus for analyzing AK protocol wheel speed sensor protocol data bits. [Background technology]
[0002] The AK protocol is a specified interface between wheel speed sensors and electronic control units (ECUs) for the transmission of data signals. The sensor signals are processed by a signal modulation unit to generate speed and data signals.
[0003] Currently, component suppliers mainly use dedicated peripheral chips to analyze AK protocol data signals, but the solution of using dedicated peripheral chips to analyze AK protocol data signals faces the problem of high cost. Summary of the Invention [Problem to be solved by the invention]
[0004] To overcome the shortcomings of the prior art, an objective of an embodiment of the present invention is to provide an AK protocol wheel speed sensor protocol data bit analysis method and apparatus, which can reduce product costs, ensure supply chain security, and enhance enterprise competitiveness. [Means for solving the problem]
[0005] In order to solve the above problems, according to a first aspect of an embodiment of the present invention, a method for analyzing protocol data bits of an AK protocol wheel speed sensor is disclosed, and the method for analyzing protocol data bits of an AK protocol wheel speed sensor includes: receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only speed signal pulses; capturing times of rising and falling edges of the first voltage signal and the second voltage signal, setting timestamps of the captured rising and falling edges of the first voltage signal as a first timestamp set, setting timestamps of the captured rising and falling edges of the second voltage signal as a second timestamp set, and storing the first timestamp set and the second timestamp set; obtaining a timestamp of a complete set of protocol data bits as a protocol data timestamp based on the first timestamp set and the second timestamp set; and analyzing the protocol data bits based on the protocol data timestamp to obtain a value for each protocol data bit.
[0006] In an embodiment of the present invention, a current signal from a wheel speed sensor is converted into a first voltage signal and a second voltage signal, a first set of timestamps and a second set of timestamps of rising edges and falling edges are captured based on the first voltage signal and the second voltage signal, timestamps of protocol data bits (as protocol data timestamps) are extracted based on the first set of timestamps and the second set of timestamps, and the protocol data bits are analyzed, thereby obtaining the value of each protocol data bit and completing the analysis of the protocol data bits, thereby reducing product costs and improving enterprise competitiveness.
[0007] In one preferred embodiment, in a first aspect of the embodiment of the present invention, the step of receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal and a second voltage signal includes: The method includes converting the current signal into a first voltage signal and a second voltage signal based on a signal comparison by an AK signal isolation circuit.
[0008] The AK signal separation circuit can be realized by a comparator. For example, it can complete the conversion of a current signal and a voltage signal through a predetermined I / V conversion circuit, and obtain a corresponding pulse signal based on the comparison of the converted voltage signal with a reference voltage signal, and the obtained pulse signal can be the first voltage signal and the second voltage signal.
[0009] In the high-speed pattern, the speed pulse width is 28 mA and the protocol data bit pulse width is 14 mA, so that the first voltage signal and the second voltage signal can be extracted from the high-speed pattern, of which the high level of the second voltage signal corresponds to the speed pulse width value of 28 mA, that is, the second voltage signal outputs a high level only when the speed pulse is equal to or greater than a first preset value (e.g., 23.5 mA), and outputs a low level when the speed pulse is less than the first preset value. As can be seen from this, the second voltage signal does not include protocol data bit pulses, but only includes speed signal pulses.
[0010] The first voltage signal is completed by a comparator, which is used to output a high level when the obtained pulse width value is greater than a second preset value (e.g., 11.7 mA), and output a low level when the obtained pulse width value is less than the second preset value, and the first voltage signal not only includes a speed signal pulse but also a protocol data bit pulse.
[0011] In the low-speed pattern, the speed pulse width value is 14 mA and the protocol data bit pulse width value is 14 mA, so when extracting the pulse signal in the low-speed pattern, only the first voltage signal can be extracted, and the speed signal pulse is aligned with the protocol data bit pulse, so the second voltage signal cannot be extracted separately.
[0012] In the low-speed-high-speed pattern, the speed pulse width values include 14 mA and also 28 mA, so it is possible to extract a second voltage signal with a speed pulse width value of 28 mA, and also to extract a first voltage signal with pulse width values of 28 mA, 14 mA, and a protocol data bit pulse width value of 14 mA.
[0013] The timestamps of the rising and falling edges of the first and second voltage signals can be acquired by an edge capture module. The edge capture module can be implemented, for example, by a GTM / TIM module, an eMIOS module, or a FlexIO module. A rising edge is the moment when the pulse signal changes from 0 to 1, while a falling edge is the moment when the pulse signal changes from 1 to 0. Therefore, by collecting all the time points from 0 to 1 and from 1 to 0 using the edge capture module, a first timestamp set and a second timestamp set are obtained.
[0014] In one preferred embodiment, in a first aspect of the embodiment of the present invention, in the high-speed pattern, the step of obtaining timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set includes: determining a timestamp of a rising edge of the last speed pulse and a timestamp of a falling edge of the second-to-last speed pulse based on the second timestamp set within a preset sampling period as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively; and obtaining all first timestamp sets, i.e., the protocol data timestamps, between the first reference high speed timestamp and the second reference high speed timestamp.
[0015] In a high-speed pattern, the pulses between two adjacent speed pulses are both protocol data pulses, so the protocol data timestamp can be constructed from the pulses between two adjacent speed pulses.
[0016] In one preferred embodiment, in a first aspect of the embodiment of the present invention, in the low speed pattern, the step of obtaining timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set includes: sorting a first set of timestamps in a predetermined sampling period in order of decreasing time; The method includes a step of selecting a predetermined number of first timestamps in chronological order from the sorted first timestamp set, and configuring the protocol data timestamps such that the difference between any adjacent first timestamps is located at [TP / 2, TP (TP is the pulse width)].
[0017] In the protocol data of the same frame, the difference between two adjacent timestamps is between TP / 2 and TP. Therefore, in the slow pattern, since it only has the first voltage signal, the protocol data timestamp can be constructed using the first timestamp whose difference between two adjacent timestamps is between TP / 2 and TP. The specific process is as follows:
[0018] In one preferred embodiment, in a first aspect of the embodiment of the present invention, in the case of a low-speed-high-speed pattern, the step of obtaining timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set includes: determining a timestamp of a rising edge of the last speed pulse based on the second timestamp set within a preset sampling period as a first reference high speed timestamp; sorting a first set of timestamps within the sampling period in order of decreasing time starting from the first reference fast timestamp; The method includes a step of selecting a predetermined number of first timestamps in chronological order from the sorted first timestamp set, and configuring the protocol data timestamps such that the differences between adjacent first timestamps are all located at [TP / 2, TP (TP is the pulse width)].
[0019] In the low-speed-high-speed pattern, since a first voltage signal and a second voltage signal are present, a first reference high-speed timestamp is determined from the second voltage signal, and a protocol data timestamp can be constructed by starting from the first reference high-speed timestamp and selecting from the first timestamp set a pair of first timestamps that are closest to the first reference high-speed timestamp and whose difference between the two timestamps is between TP / 2 and TP.
[0020] In one preferred embodiment, in the first aspect of the embodiment of the present invention, the step of analyzing the protocol data bits based on the protocol data timestamps to obtain a value of each protocol data bit comprises: sorting the protocol data timestamps in ascending order; determining a value for a first protocol data bit based on a first timestamp of the sorted protocol data timestamps; TimeStamp0 - TimeStamp -2 = 1.5TP, bit0 = 0, TimeStamp0 - TimeStamp -2 = 2TP, bit0 = 1, However, TimeStamp0 is the first timestamp among the sorted protocol data timestamps. -2 is the second timestamp preceding TimeStamp0 in the first timestamp set, and bit0 is the value of the first protocol data bit; bit k If =0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, the TimeStamp k+2 and TimeStamp k+1 The difference is calculated as the first difference, and if the first difference is TP / 2, bit k+1 =0 and the first difference is TP, k+1 = 1, and bit k If =1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, the TimeStamp k+1 and TimeStamp k The difference is calculated as the second difference, and if the second difference is TP / 2, k+1 =0 and the second difference is TP, k+1 = 1, where 0≦k≦6 and TP is the pulse width; The method includes a step of determining the value of bit8 based on the sum of bit0 to bit7, and when the sum of bit0 to bit7 is an even number, bit8=0, and when the sum of bit0 to bit7 is an odd number, bit8=1.
[0021] The protocol data bits use Manchester encoding (IEEE 802.3), and the encoding rule is that when the bit mid-level jumps from low to high, it is "1", and when the bit mid-level jumps from high to low, it is "0". Based on the AK protocol specification, as shown in Figure 5, the width of the rate pulse is TP (nominal value 50us), and the falling edge of the rate pulse and the symbol width of the first protocol data bit are TP / 2. Based on this, the symbol in the protocol data timestamp can be determined, and the value of each protocol data bit can be analyzed based on the Manchester encoding rule and the falling edge of the rate pulse and the symbol width of the first protocol data bit TP / 2.
[0022] A second aspect of the present invention discloses an AK protocol wheel speed sensor protocol data bit analyzer, which comprises: a receiving unit for receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only the speed signal pulses; a capture unit for capturing times of rising edges and falling edges of the first voltage signal and the second voltage signal, setting timestamps of the captured rising edges and falling edges of the first voltage signal as a first timestamp set, setting timestamps of the captured rising edges and falling edges of the second voltage signal as a second timestamp set, and storing the first timestamp set and the second timestamp set; an acquiring unit for acquiring timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set; and an analyzing unit for analyzing the protocol data bits based on the protocol data timestamp to obtain a value of each protocol data bit.
[0023] In an embodiment of the present invention, a current signal from a wheel speed sensor is converted into a first voltage signal and a second voltage signal, a first set of timestamps and a second set of timestamps of rising edges and falling edges are captured based on the first voltage signal and the second voltage signal, timestamps of protocol data bits (as protocol data timestamps) are extracted based on the first set of timestamps and the second set of timestamps, and the protocol data bits are analyzed, thereby obtaining the value of each protocol data bit and completing the analysis of the protocol data bits, thereby reducing product costs and improving enterprise competitiveness.
[0024] In one preferred embodiment, in the second aspect of the embodiment of the present invention, the analysis unit: a sorting subunit for sorting the protocol data timestamps in ascending order; a determination subunit for determining a value of a first protocol data bit based on a first timestamp of the sorted protocol data timestamps, TimeStamp0 - TimeStamp -2 = 1.5TP, bit0 = 0, TimeStamp0 - TimeStamp -2 = 2TP, bit0 = 1, However, TimeStamp0 is the first timestamp among the sorted protocol data timestamps. -2 is a second timestamp preceding TimeStamp0 in the first timestamp set, and bit0 is the value of the first protocol data bit; and bit k If =0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, the TimeStamp k+2 and TimeStamp k+1 is used to calculate the difference as the first difference, and when the first difference is TP / 2, bit k+1 =0 and the first difference is TP, k+1 a first analytical subunit with .times. ... bit k If =1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, the TimeStamp k+1 and TimeStamp k is used to calculate the difference as the second difference, and when the second difference is TP / 2, bit k+1 =0 and the second difference is TP, k+1= 1, where 0≦k≦6, TP is the pulse width, and a second analysis subunit that is used to determine the value of bit8 based on the sum of bit0 to bit7, where if the sum of bit0 to bit7 is an even number, bit8=0, and if the sum of bit0 to bit7 is an odd number, bit8=1.
[0025] The protocol data bits use Manchester encoding (IEEE 802.3), and the encoding rule is that when the bit mid-level jumps from low to high, it is "1", and when the bit mid-level jumps from high to low, it is "0". Based on the AK protocol specification, as shown in Figure 5, the width of the rate pulse is TP (nominal value 50us), and the falling edge of the rate pulse and the symbol width of the first protocol data bit are TP / 2. Based on this, the symbol in the protocol data timestamp can be determined, and the value of each protocol data bit can be analyzed based on the Manchester encoding rule and the falling edge of the rate pulse and the symbol width of the first protocol data bit TP / 2.
[0026] A third aspect of an embodiment of the present invention discloses an electronic device, the electronic device including: a memory in which executable program code is stored; and a processor coupled to the memory, the processor calling the executable program code stored in the memory to perform the AK protocol wheel speed sensor protocol data bit parsing method disclosed in the first aspect of the embodiment of the present invention.
[0027] A fourth aspect of the present invention discloses a computer-readable storage medium having a computer program stored therein, the computer program causing a computer to execute the AK protocol wheel speed sensor protocol data bit analysis method disclosed in the first aspect of the present invention.
[0028] A fifth aspect of the present invention discloses a computer program product, which, when executed on a computer, causes the computer to perform the AK protocol wheel speed sensor protocol data bit analysis method disclosed in the first aspect of the present invention.
[0029] A sixth aspect of the present invention discloses an application release platform for releasing a computer program product, which, when executed on a computer, causes the computer to perform the AK protocol wheel speed sensor protocol data bit analysis method disclosed in the first aspect of the present invention. [Effects of the Invention]
[0030] The embodiment of the present invention extracts protocol data timestamps based on the first timestamp set and the second timestamp set, thereby analyzing protocol data bits based on the protocol data timestamps to obtain the value of each protocol data bit. Compared with the prior art, the beneficial effects of the embodiment of the present invention are as follows:
[0031] 1. No dedicated chip is required to analyze protocol data bits, reducing product costs, ensuring supply chain security, and improving enterprise competitiveness.
[0032] 2. Based on the analyzed value of each protocol data bit, the field width size, mode status, direction information, check information, etc. of the smart wheel speed sensor are further obtained. [Brief explanation of the drawings]
[0033] [Figure 1] 4 is a flowchart of a method for analyzing protocol data bits of an AK protocol wheel speed sensor disclosed in an embodiment of the present invention. [Figure 2] FIG. 10 is a schematic diagram of AK protocol data in a fast pattern. [Figure 3]FIG. 10 is a schematic representation of AK protocol data in a slow pattern. [Figure 4] FIG. 1 is a structural block diagram of an AK protocol wheel speed sensor protocol data bit analysis system disclosed in an embodiment of the present invention. [Figure 5] FIG. 1 is a schematic diagram of a time stamp. [Figure 6] FIG. 1 is a schematic diagram of a cache buffer. [Figure 7] FIG. 1 is a schematic diagram of velocity pulse capture in a high speed pattern. [Figure 8] FIG. 1 is a schematic diagram of protocol data bit capture in a high speed pattern. [Figure 9] FIG. 1 is a schematic diagram of AK data in a slow pattern. [Figure 10] FIG. 10 is a schematic diagram of protocol data bit capture in a slow pattern. [Figure 11] FIG. 1 is a schematic diagram of protocol data bit capture in a slow-to-fast pattern. [Figure 12] FIG. 1 is a schematic diagram of Manchester encoding. [Figure 13] Schematic diagram of protocol data bit bit0 analysis. [Figure 14] 4 is a flowchart of an AK protocol wheel speed sensor protocol data bit analysis device disclosed in an embodiment of the present invention. [Figure 15] 1 is a structural schematic diagram of an electronic device disclosed in an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION
[0034] The detailed description of the present invention is merely an interpretation of the present invention and is not a limitation on the present invention. After reading this specification, a person skilled in the art may make modifications to the present embodiment as necessary without making a creative contribution, but the modifications are protected by patent law as long as they are within the scope of the claims of the present invention.
[0035] In order to clarify the objectives, technical solutions and advantages of the present invention, the technical solutions of the present invention will be described below in a clear and complete manner in conjunction with the drawings of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without any creative effort are within the scope of protection of the present invention.
[0036] The term "comprises" and any variations thereof in the specification and claims of this application are intended to cover a non-exclusive "comprises", for example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to the process, method, product or apparatus.
[0037] In the embodiments of the present invention, words such as "exemplary" or "for example" are used to denote an example, illustration, or explanation. Any embodiment or design described in the embodiments of the present invention as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concept in concrete terms. Example 1 1 is a flowchart of a method for analyzing AK protocol wheel speed sensor protocol data bits according to an embodiment of the present invention. As shown in FIG. 1, the method may include the following steps:
[0038] In S110, receive a current signal transmitted by an AK protocol wheel speed sensor and convert the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only speed signal pulses.
[0039] The AK protocol is a specified interface between wheel speed sensors and electronic control units (ECUs) for the transmission of data signals. The sensor signals are processed by a signal modulation unit to generate speed and data signals.
[0040] The protocol data bits include bit0-bit8, of which bit0 represents the installation air gap error flag bit, bit1 represents the sensor operation mode ('0' is normal, '1' is abnormal), bit2 represents the protocol mode bit ('0' is the protocol correct, '1' is the protocol incorrect), bit3 represents the direction valid bit ('0' is invalid, '1' is valid), bit4 is the direction information bit ('0' is normal, '1' is inverted), bit5-bit7 are the air gap position information bits, and bit8 is the parity bit. If the sum of the current 8 bits (bit0-bit7) is even, bit8=0; if the sum of the current 8 bits is odd, bit8=1.
[0041] Therefore, the size of the field width of the wheel speed sensor, mode status, direction information, check information, etc. can be obtained based on the protocol data bits.
[0042] In a preferred embodiment of the present invention, the AK signal separation circuit can convert the current signal into a first voltage signal and a second voltage signal based on the signal comparison.
[0043] The AK signal separation circuit can be realized by a comparator. For example, it can complete the conversion of a current signal and a voltage signal through a predetermined I / V conversion circuit, and obtain a corresponding pulse signal based on the comparison of the converted voltage signal with a reference voltage signal, and the obtained pulse signal can be the first voltage signal and the second voltage signal.
[0044] In the high-speed pattern, the speed pulse width is 28 mA, and the protocol data bit pulse width is 14 mA. As shown in Figure 2, when the vehicle speed is high, not all of the protocol data bit pulses (bits 0-8) are necessarily transmitted. Therefore, a first voltage signal and a second voltage signal can be extracted from the high-speed pattern. The high level of the second voltage signal corresponds to the speed pulse width of 28 mA. That is, the second voltage signal outputs a high level only when the speed pulse is equal to or greater than a first preset value (e.g., 23.5 mA), and outputs a low level when the speed pulse is less than the first preset value. As can be seen from this, the second voltage signal does not include protocol data bit pulses, but only includes speed signal pulses.
[0045] The first voltage signal is completed by a comparator, which is used to output a high level when the obtained pulse width value is greater than a second preset value (e.g., 11.7 mA), and output a low level when the obtained pulse width value is less than the second preset value, and the first voltage signal not only includes a speed signal pulse but also a protocol data bit pulse.
[0046] 3, in the low-speed pattern, the speed pulse width is 14 mA and the protocol data bit pulse width is 14 mA, so that a second voltage signal with a speed pulse width of 28 mA can be extracted, and a first voltage signal with pulse widths of 28 mA, 14 mA, and a protocol data bit pulse width of 14 mA can also be extracted.
[0047] In the low-speed-high-speed pattern, the speed pulse width values include 14 mA and also 28 mA, so it is possible to extract a second voltage signal with a speed pulse width value of 28 mA, and also to extract a first voltage signal with pulse width values of 28 mA, 14 mA, and a protocol data bit pulse width value of 14 mA.
[0048] As shown in Figure 4, the AK signal separation circuit can extract the current signal of the AK protocol based on the different characteristics of the protocol data bit pulse and the speed pulse width value and convert it into voltage signals WSO1 (i.e., first voltage signal) and WSO2 (i.e., second voltage signal). WSO1 includes both the speed signal pulse and the protocol data bit pulse, and WSO2 includes only the speed signal pulse.
[0049] In S120, the times of the rising and falling edges of the first and second voltage signals are captured, the timestamps of the captured rising and falling edges of the first voltage signal are set as a first timestamp set, the timestamps of the captured rising and falling edges of the second voltage signal are set as a second timestamp set, and the first and second timestamp sets are saved.
[0050] As shown in Figure 4, the rising edge and falling edge times of the first and second voltage signals can be captured by a pulse capture module. The edge capture module collects all the time points from 0 to 1 (rising edge) and from 1 to 0 (falling edge), thereby obtaining a first set of timestamps and a second set of timestamps. The edge capture module can be implemented, for example, by a GTM / TIM module, an eMIOS module, or a FlexIO module.
[0051] The pulse capture module captures the rising and falling edge times of WSO1 and WSO2, and inputs the timestamps Time Stamp1 (corresponding to the rising and falling edges of WSO1, called the first timestamp set) to the protocol data bit analysis module, and the timestamps Time Stamp2 (corresponding to the rising and falling edges of WSO2, called the second timestamp set) to the wheel speed calculation module. The relationship between I_low (7mA), I_mid (14mA), I_high (28mA), and Time Stamp1 and Time Stamp2 is shown in Figure 5. In Figure 5, TP is the pulse width, and its nominal value is 50us.
[0052] As shown in Figure 6, the pulse capture module updates all timestamps captured in the past 5 ms at preset intervals (sampling time, e.g., 5 ms), and stores the updated first and second timestamp sets in two cache buffers: RecvBuffer_TimeStap1 (i.e., the first timestamp cache area) and RecvBuffer_TimeStap2 (i.e., the second timestamp cache area).
[0053] In S130, timestamps of a set of complete protocol data bits are obtained as protocol data timestamps based on the first timestamp set and the second timestamp set.
[0054] The embodiment of the present invention analyzes protocol data bits mainly in three patterns: a high speed pattern, a low speed pattern, and a low speed-high speed pattern.
[0055] In a high-speed pattern, the pulses between two adjacent speed pulses are both protocol data pulses, so the protocol data timestamp can be constructed using the pulses between the two adjacent speed pulses. Therefore, the protocol data timestamp for a high-speed pattern can be obtained using the following process.
[0056] Within a preset sampling period, the timestamp of the rising edge of the last speed pulse and the timestamp of the falling edge of the second-to-last speed pulse are determined as the first and second reference high-speed timestamps based on the second timestamp set. As shown in Figure 7, the rising edge of the last captured speed pulse (the second-to-last timestamp in the second timestamp set) is found and the timestamp (NewEdgeTimeStamp, defined as the first reference high-speed timestamp) is recorded in RecvBuffer_TimeStap2. The falling edge of the second-to-last captured speed pulse (the third-to-last timestamp in the second timestamp set) is found and the timestamp (PreviousEdgeTimeStamp, defined as the second reference high-speed timestamp) is recorded in RecvBuffer_TimeStap2. In RecvBuffer_TimeStap2, the element with Index=j stores PreviousEdgeTimeStamp, and the element with Index=(j+1) stores NewEdgeTimeStamp.
[0057] All first timestamps between the first reference fast timestamp and the second reference fast timestamp, i.e., set protocol data timestamps, are obtained. As shown in Figure 8, the timestamps cached in RecvBuffer_TimeStap1 within the nearest 5 ms are traversed from back to front to obtain timestamps located between NewEdgeTimeStamp and PreviousEdgeTimeStamp (all first timestamp sets between the first reference fast timestamp and the second reference fast timestamp), and cache them in Buffer_CalAKBitTimeStamp. Up to this point, all timestamps of the last set of protocol data bits (a total of 18 protocol data timestamps) within the nearest preset sampling period are cached in Buffer_CalAKBitTimeStamp (i.e., the preset cache area for AK byte timestamps).
[0058] As shown in FIG. 9, in the low speed pattern, the value of the speed pulse width changes to I_mid (14 mA), which matches the value of the protocol data bit pulse width.
[0059] In the protocol data of the same frame, the difference between two adjacent timestamps is between TP / 2 and TP. Therefore, in the slow pattern, since it only has the first voltage signal, the protocol data timestamp can be constructed using the first timestamp whose difference between two adjacent timestamps is between TP / 2 and TP. The specific process is as follows:
[0060] Within a predetermined sampling period, sorting a first set of time stamps within the sampling period in order of closest time; From the sorted set of first timestamps, a preset number of first timestamps (here, the preset number is a fixed value, and timestamps before and after this fixed value all correspond to speed pulse signals) are selected in chronological order to form protocol data timestamps, and the difference between any adjacent first timestamps among the protocol data timestamps is located at [TP / 2, TP (TP is the pulse width)]. As shown in Figure 10, the timestamps cached in RecvBuffer_TimeStap1 within the nearest 5 ms are traversed from back to front, and when the search success count reaches 20, it is considered that a complete set of protocol data bit (bit 0-bit 8) timestamps for one frame has been found.
[0061] Start traversing from the current timestamp i and return TimeStamp i -TimeStamp i-1 If is between TP / 2 and TP, then TimeStamp i-1 and TimeStamp i belongs to one frame of protocol data, add 1 to the search success count, and search recursively forward. i-5 -TimeStamp i-4 If is greater than TP, the search fails and the count is cleared. The traverse search starts from i-5 and traverses to i-24. At this time, the count is accumulated to 20 and the traverse is successful. TimeStamp i-5 ~TimeStamp i-22 (Total of 18 protocol data timestamps) are cached in Buffer_CalAKBitTimeStamp.
[0062] As shown in FIG. 11, in the low-high speed pattern for the whole vehicle, the value of the speed pulse width changes from I_mid (14 mA) to I_high (28 mA).
[0063] The low-speed-high-speed pattern can be regarded as a combination of the low-speed pattern and the high-speed pattern. Since there are a first voltage signal and a second voltage signal, a first reference high-speed timestamp is determined from the second voltage signal, and a protocol data timestamp can be constructed by selecting a set of first timestamps from the first timestamp set that are closest to the first reference high-speed timestamp and whose difference is between TP / 2 and TP, as the first reference high-speed timestamp. The specific process is as follows:
[0064] determining a timestamp of a rising edge of the last speed pulse based on the second timestamp set within the preset sampling period as a first reference high-speed timestamp; Starting with the first reference fast timestamp, sort the first set of timestamps in the sampling period in order of closest in time; A predetermined number of first timestamps are selected in chronological order from the sorted first timestamp set to form protocol data timestamps, and the differences between adjacent first timestamps among the protocol data timestamps are all located at [TP / 2, TP (TP is the pulse width)].
[0065] In Figure 11, find the rising edge of the last captured speed pulse and add the timestamp TimeStamp i-4 Start the traversal from the current timestamp i and record the TimeStamp i is a TimeStamp i-4 Since it is greater than , it does not satisfy the search criteria, so it searches recursively forward and finds the TimeStamp i-5 is a TimeStamp i-4 If it is smaller than i, it is considered that the first protocol data bit timestamp has been found, and the search success count is incremented by 1. The traversal search starts from i-5 and traverses to i-24. At this time, the count is accumulated to 20, and the traversal is successful. i-5 ~TimeStamp i-22(Total of 18 protocol data timestamps) are cached in Buffer_CalAKBitTimeStamp.
[0066] In S140, the protocol data bits are analyzed based on the protocol data timestamp to obtain the value of each protocol data bit.
[0067] As shown in Figure 12, the protocol data bits use Manchester encoding (IEEE 802.3), and the encoding rule is that when the bit mid-level jumps from low to high, it is "1", and when the bit mid-level jumps from high to low, it is "0". Based on the AK protocol specification, as shown in Figure 5, the width of the rate pulse is TP (nominal value 50us), and the width between the falling edge of the rate pulse and the first protocol data bit symbol is TP / 2.
[0068] Based on this, the symbol in the protocol data timestamp can be determined, and the value of each protocol data bit can be analyzed according to the Manchester encoding rule, the falling edge of the rate pulse, and the first protocol data bit symbol width TP / 2. The specific process is as follows:
[0069] The value of the first protocol data bit is determined based on the first timestamp of the sorted protocol data timestamps.
[0070] TimeStamp0 - TimeStamp -2 = 1.5TP, bit0 = 0, TimeStamp0 - TimeStamp -2 = 2TP, bit0 = 1, However, TimeStamp0 is the first timestamp among the sorted protocol data timestamps. -2is the second timestamp in the first timestamp set that precedes TimeStamp0, bit0 is the value of the first protocol data bit, bit k If =0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, the TimeStamp k+2 and TimeStamp k+1 The difference is calculated as the first difference, and if the first difference is TP / 2, bit k+1 =0 and the first difference is TP, k+1 =1, bit k If =1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, the TimeStamp k+1 and TimeStamp k The difference is calculated as the second difference, and if the second difference is TP / 2, k+1 =0 and the second difference is TP, k+1 = 1, where 0≦k≦6, TP is the pulse width, The value of bit8 is determined based on the sum of bit0 to bit7, and if the sum of bit0 to bit7 is an even number, bit8=0, and if the sum of bit0 to bit7 is an odd number, bit8=1.
[0071] For example, for a high-speed pattern, based on the timestamp (protocol data timestamp) cached in Buffer_CalAKBitTimeStamp, (i-2) corresponds to the rising edge of the speed pulse in Figure 8, and i corresponds to the edge of the first symbol. As shown in Figure 8 and Figure 13, TimeStamp i -TimeStamp i-2 = 1.5TP, the first symbol middle position is a falling edge, that is, the value of the first protocol data bit, bit0, is 0. i-TimeStamp i-2 When =2TP, it indicates that the first symbol middle position is a rising edge, that is, the value of the first protocol data bit, bit0, is 1.
[0072] If bit0=0, the timestamp corresponding to the center edge of protocol data bit0 is TimeStamp i+1 TimeStamp i+2 -TimeStamp i+1 = TP / 2, bit1 = 0, and TimeStamp i+2 -TimeStamp i+1 If =TP, then bit1=1.
[0073] When bit0=1, the timestamp corresponding to the center edge of protocol data bit0 is TimeStamp i TimeStamp i+1 -TimeStamp i = TP / 2, bit1 = 0, and TimeStamp i+1 -TimeStamp i If =TP, then bit1=0.
[0074] The method for analyzing bits 2 to 7 is to perform a recursive search as described above, and finally obtain the value of bit 8 based on the values of bits 0 to 7.
[0075] The embodiment of the present invention uses a separate circuit to capture the timestamp of the protocol data bits of the AK protocol by a processor, and based on the captured timestamp, analyze the protocol data bits according to the characteristics of the AK protocol, and further obtain the field width size, mode status, direction information, and check information of the AK protocol wheel speed sensor.
[0076] Example 2 Referring to Figure 14, Figure 14 is a structural schematic diagram of an AK protocol wheel speed sensor protocol data bit analysis device disclosed in an embodiment of the present invention. As shown in Figure 14, the AK protocol wheel speed sensor protocol data bit analysis device includes: a receiving unit 210 for receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only the speed signal pulses; a capture unit 220 for capturing times of rising edges and falling edges of the first voltage signal and the second voltage signal, setting timestamps of the captured rising edges and falling edges of the first voltage signal as a first timestamp set, setting timestamps of the captured rising edges and falling edges of the second voltage signal as a second timestamp set, and storing the first timestamp set and the second timestamp set; an obtaining unit 230 for obtaining timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set; and a parsing unit 240 for parsing the protocol data bits based on the protocol data timestamps to obtain a value for each protocol data bit.
[0077] In an optional aspect, the receiving unit 210 The method may include converting the current signal into a first voltage signal and a second voltage signal based on the signal comparison by an AK signal isolation circuit.
[0078] In an optional embodiment, in the high speed pattern, the acquisition unit 230 determining a timestamp of a rising edge of the last speed pulse and a timestamp of a falling edge of the second-to-last speed pulse based on the second timestamp set within a preset sampling period as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively; and obtaining all first timestamps of the set, i.e., the protocol data timestamps, between the first reference high speed timestamp and the second reference high speed timestamp.
[0079] In an optional aspect, in the slow pattern, the acquisition unit 230 sorting a first set of timestamps within a predetermined sampling period in order of decreasing time; Selecting a predetermined number of first timestamps in chronological order from the sorted first timestamp set to configure the protocol data timestamps such that the difference between adjacent first timestamps is all located at [TP / 2, TP (TP is the pulse width)].
[0080] In an optional aspect, in the slow-fast pattern, the acquisition unit 230 determining a timestamp of a rising edge of the last speed pulse based on the second timestamp set within a preset sampling period as a first reference high speed timestamp; sorting a first set of timestamps within the sampling period in order of decreasing time starting from the first reference fast timestamp; Selecting a predetermined number of first timestamps in chronological order from the sorted first timestamp set to configure the protocol data timestamps such that the difference between adjacent first timestamps is all located at [TP / 2, TP (TP is the pulse width)].
[0081] In an optional aspect, the analysis unit 240: a sorting subunit for sorting the protocol data timestamps in ascending order; a determination subunit for determining a value of a first protocol data bit based on a first timestamp of the sorted protocol data timestamps, TimeStamp0 - TimeStamp-2 = 1.5TP, bit0 = 0, TimeStamp0 - TimeStamp -2 = 2TP, bit0 = 1, However, TimeStamp0 is the first timestamp among the sorted protocol data timestamps. -2 is a second timestamp preceding TimeStamp0 in the first timestamp set, and bit0 is the value of the first protocol data bit; and bit k If =0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, the TimeStamp k+2 and TimeStamp k+1 is used to calculate the difference as the first difference, and when the first difference is TP / 2, bit k+1 =0 and the first difference is TP, k+1 a first analytical subunit with .times. ... bit k If =1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, the TimeStamp k+1 and TimeStamp k is used to calculate the difference as the second difference, and when the second difference is TP / 2, bit k+1 =0 and the second difference is TP, k+1 = 1, where 0≦k≦6, TP is the pulse width, It may also include a second analysis subunit that is used to determine the value of bit8 based on the sum of bit0 to bit7, where if the sum of bit0 to bit7 is an even number, bit8=0, and if the sum of bit0 to bit7 is an odd number, bit8=1.
[0082] Example 3 Referring to Figure 15, Figure 15 is a structural schematic diagram illustrating an electronic device for implementing an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, mobile phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices. The components, their connections and relationships, and their functions shown herein are merely examples and are not intended to limit the implementation of the embodiments of the present invention described herein.
[0083] 15, the electronic device includes at least one processor 310 and a memory, such as a ROM (read-only memory) 320 or a RAM (random access memory) 330, communicatively connected to the at least one processor 310. The memory stores computer programs executable by the at least one processor. The processor 310 can perform various appropriate operations and processes according to the computer programs stored in the ROM 320 or loaded from a storage unit 380 into the random access memory RAM 330. The RAM 330 can store various programs and data necessary for the operation of the electronic device. The processor 310, the ROM 320, and the RAM 330 are connected to one another via a bus 340. An I / O (input / output) interface 350 is also connected to the bus 340.
[0084] Multiple components in the electronic device are connected to the I / O interface 350, including input units 360 such as a keyboard, mouse, etc., output units 370 such as various types of displays and speakers, storage units 380 such as a disk or optical disk, and communication units 390 such as a network card, modem, wireless communication transceiver, etc. The communication units 390 enable the electronic device to exchange information / data with other devices via a computer network such as the Internet or / and various telecommunication networks.
[0085] Processor 310 may be any of a variety of general-purpose and / or special-purpose processing components having processing and computing capabilities. Some examples of processor 310 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors that run machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 310 performs one or more steps of the AK protocol wheel speed sensor protocol data bit parsing method described in any of the above examples.
[0086] In some embodiments, the AK protocol wheel speed sensor protocol data bit parsing method can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 380. In some embodiments, part or all of the computer program can be loaded and / or installed into an electronic device via ROM 320 and / or communication unit 390. When the computer program is loaded into RAM 330 and executed by processor 310, it can perform one or more steps of the AK protocol wheel speed sensor protocol data bit parsing method described in any of the above embodiments. Alternatively, in other embodiments, processor 310 can be configured to perform the AK protocol wheel speed sensor protocol data bit parsing method in any other suitable manner (e.g., by firmware).
[0087] Various embodiments of the systems and techniques described herein may be realized in digital electronic circuitry systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on a chip (SOCs), field programmable logic devices (CPLDs), computer hardware, firmware, software, or combinations thereof. These various embodiments include implementation in one or more computer programs that can be executed and / or interpreted on a programmable system that includes at least one programmable processor, which may be a special-purpose or general-purpose programmable processor, and that can receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
[0088] Computer programs for implementing the methods of the embodiments of the present invention can be written using any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus such that, when executed by the processor, the computer programs perform the functions / acts specified in the flowcharts and / or block diagrams. The computer programs can be executed entirely on the machine, partially on the machine, partially on the machine as a separate software package and partially on a remote machine, or entirely on a remote machine or server or machine.
[0089] In the context of embodiments of the present invention, a computer-readable storage medium may be a tangible medium that contains or can store a computer program for use by or in conjunction with an execution system, device, or apparatus. A computer-readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or apparatus, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include one or more wire-based electrical connections, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0090] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device that includes a display device (e.g., a cathode ray tube (CRT) or liquid crystal display (LCD) monitor) for displaying information to a user, and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the electronic device. Other types of devices can also be used to provide interaction with a user; for example, feedback provided to the user can be any form of sensing feedback (e.g., visual feedback, auditory feedback, or tactile feedback), and input from the user can be received in any form (including voice input, audio input, or tactile input).
[0091] The systems and techniques described herein can be implemented in a computing system that includes background components (e.g., as a data server), or middleware components (e.g., an application server), or front-end components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with embodiments of the systems and techniques described herein), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communications network). Examples of communications networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0092] A computing system may include a client and a server. The client and server are generally remote from each other and typically interact via a communications network. The client-server relationship is created by running computer programs on the corresponding computers. The server may be a cloud server, also known as a cloud computing server or cloud host computer. A cloud server is a host computer product in a cloud computing service system that overcomes the drawbacks of traditional physical host computers and VPS services, such as the high level of management complexity and limited business scalability.
[0093] The above is a detailed introduction to the AK protocol wheel speed sensor protocol data bit analysis method and apparatus disclosed in the present invention. This specification uses specific examples to describe the principles and embodiments of the present invention. The explanation of the above examples is only intended to aid in understanding the method of the present invention and its core idea. Furthermore, those skilled in the art may modify the specific embodiments and application scope based on the idea of the present invention. As such, the contents of this specification should not be construed as a limitation on the present invention.
Claims
1. 1. A method for parsing AK protocol wheel speed sensor protocol data bits, comprising: receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only speed signal pulses; capturing times of rising and falling edges of the first and second voltage signals, setting timestamps of the captured rising and falling edges of the first voltage signal as a first timestamp set, setting timestamps of the captured rising and falling edges of the second voltage signal as a second timestamp set, and storing the first and second timestamp sets; obtaining timestamps for a set of complete protocol data bits as protocol data timestamps based on the first set of timestamps and the second set of timestamps, In the high-speed pattern, within a preset sampling period, the timestamp of the rising edge of the last speed pulse and the timestamp of the falling edge of the second-to-last speed pulse are determined as a first reference high-speed timestamp and a second reference high-speed timestamp based on the second timestamp set, respectively, and the protocol data timestamps of all the first timestamp sets between the first reference high-speed timestamp and the second reference high-speed timestamp are obtained, and in the high-speed pattern, the speed pulse width value is 28 mA and the protocol data bit pulse width value is 14 mA; In the low speed pattern, within a preset sampling period, a first time stamp set within the sampling period is sorted in ascending order of time, and a preset number of first time stamps are selected in chronological order from the sorted first time stamp set to form the protocol data time stamps such that the difference between adjacent first time stamps is all located at [TP / 2, TP (TP is the pulse width)], and in the low speed pattern, the speed pulse width value is 14 mA and the protocol data bit pulse width value is 14 mA, In the low-speed-high-speed pattern, within a preset sampling period, a timestamp of the rising edge of the last speed pulse is determined based on the second timestamp set as a first reference high-speed timestamp, and starting from the first reference high-speed timestamp, the first timestamp set within the sampling period is sorted in order of time from the first reference high-speed timestamp. From the sorted first timestamp set, a preset number of first timestamps are selected in chronological order to configure the protocol data timestamps such that the difference between adjacent first timestamps is located at [TP / 2, TP]. In the low-speed-high-speed pattern, the speed pulse width value ranges from 14 mA to 28 mA. and analyzing the protocol data bits based on the protocol data timestamp to obtain a value for each protocol data bit.
2. receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal and a second voltage signal; 2. The method of claim 1, further comprising converting the current signal into a first voltage signal and a second voltage signal based on a signal comparison by an AK signal isolation circuit.
3. The step of analyzing the protocol data bits based on the protocol data timestamp to obtain a value for each protocol data bit includes: sorting the protocol data timestamps in ascending order; determining a value for a first protocol data bit based on a first one of the sorted protocol data timestamps; Time Stamp 0 -TimeStamp -2 = 1.5TP, bit 0 = 0, Time Stamp 0 -TimeStamp -2 = 2TP, bit 0 = 1, However, TimeStamp 0 The first timestamp of the sorted protocol data timestamps, TimeStamp -2 is the TimeStamp in the first timestamp set 0 The second timestamp, bit 0 is the value of the first protocol data bit; bit k = 0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, TimeStamp k+2 and TimeStamp k+1 The difference between the first difference and the second difference is calculated as the first difference. When the first difference is TP / 2, bit k+1 = 0 and the first difference is TP, k+1 = 1, and bit k is the value of the k+1-th protocol data bit, and bit k+1 is the value of the k+2-th protocol data bit; k = 1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, TimeStamp k+1 and TimeStamp k The difference between the two is calculated as the second difference, and when the second difference is TP / 2, bit k+1 = 0 and the second difference is TP, k+1 = 1, where 0≦k≦6, TP is the pulse width, and TimeStamp k The k+1th timestamp among the sorted protocol data timestamps, TimeStamp k+1 The k+2th timestamp among the sorted protocol data timestamps, TimeStamp k+2 is the k+3-th timestamp among the sorted protocol data timestamps; 0 ~bit 7 Based on the sum of bits 8 Determine the value of bit 0 ~bit 7 If the sum of is even, bit 8 = 0, and bit 0 ~bit 7 If the sum of is odd, bit 8 = 1, and bit 7 is the value of the 8th protocol data bit, and bit 8 is the value of the 9th protocol data bit.
4. 1. An AK protocol wheel speed sensor protocol data bit analyzer, comprising: a receiving unit for receiving a current signal transmitted by an AK protocol wheel speed sensor and converting the current signal into a first voltage signal including speed signal pulses and protocol data bit pulses, and a second voltage signal including only the speed signal pulses; a capture unit for capturing times of rising edges and falling edges of the first voltage signal and the second voltage signal, setting timestamps of the captured rising edges and falling edges of the first voltage signal as a first timestamp set, setting timestamps of the captured rising edges and falling edges of the second voltage signal as a second timestamp set, and storing the first timestamp set and the second timestamp set; an acquiring unit for acquiring timestamps of a set of complete protocol data bits as protocol data timestamps based on the first timestamp set and the second timestamp set, In the high-speed pattern, within a preset sampling period, the timestamp of the rising edge of the last speed pulse and the timestamp of the falling edge of the second-to-last speed pulse are determined as a first reference high-speed timestamp and a second reference high-speed timestamp based on the second timestamp set, respectively, and the protocol data timestamps of all the first timestamp sets between the first reference high-speed timestamp and the second reference high-speed timestamp are obtained, and in the high-speed pattern, the speed pulse width value is 28 mA and the protocol data bit pulse width value is 14 mA; In the low speed pattern, within a preset sampling period, a first time stamp set within the sampling period is sorted in ascending order of time, and a preset number of first time stamps are selected in chronological order from the sorted first time stamp set to form the protocol data time stamps such that the difference between adjacent first time stamps is all located at [TP / 2, TP (TP is the pulse width)], and in the low speed pattern, the speed pulse width value is 14 mA and the protocol data bit pulse width value is 14 mA, In the low-speed-high-speed pattern, an acquisition unit determines the timestamp of the rising edge of the last speed pulse based on the second timestamp set within a preset sampling period as a first reference high-speed timestamp, sorts the first timestamp set within the sampling period in order of closest time starting from the first reference high-speed timestamp, and selects a preset number of first timestamps in chronological order from the sorted first timestamp set to configure the protocol data timestamp such that the difference between adjacent first timestamps is located at [TP / 2, TP]; and in the low-speed-high-speed pattern, the speed pulse width value ranges from 14 mA to 28 mA, an analyzing unit for analyzing the protocol data bits based on the protocol data timestamp to obtain a value of each protocol data bit.
5. The analysis unit a sorting subunit for sorting the protocol data timestamps in ascending order; a determination subunit for determining a value of a first protocol data bit based on a first timestamp of the sorted protocol data timestamps, Time Stamp 0 -TimeStamp -2 = 1.5TP, bit 0 = 0, Time Stamp 0 -TimeStamp -2 = 2TP, bit 0 = 1, However, TimeStamp 0 The first timestamp of the sorted protocol data timestamps, TimeStamp -2 is the TimeStamp in the first timestamp set 0 The second timestamp, bit 0 a decision subunit where is the value of the first protocol data bit; bit k = 0, the protocol data bit k The timestamp corresponding to the center edge of k+1 In this case, TimeStamp k+2 and TimeStamp k+1 is used to calculate the difference as the first difference, and when the first difference is TP / 2, bit k+1 = 0 and the first difference is TP, k+1 = 1, and bit k is the value of the k+1-th protocol data bit, and bit k+1 is the value of the k+2th protocol data bit; bit k = 1, the protocol data bit k The timestamp corresponding to the center edge of k In this case, TimeStamp k+1 and TimeStamp k is used to calculate the difference as the second difference, and when the second difference is TP / 2, bit k+1 = 0 and the second difference is TP, k+1 = 1, where 0≦k≦6, TP is the pulse width, and TimeStamp k The k+1th timestamp among the sorted protocol data timestamps, TimeStamp k+1 The k+2th timestamp among the sorted protocol data timestamps, TimeStamp k+2 is the k+3-th timestamp among the sorted protocol data timestamps, bit 0 ~bit 7 Based on the sum of bits 8 is used to determine the value of bit 0 ~bit 7 If the sum of is even, bit 8 = 0, and bit 0 ~bit 7 If the sum of is odd, bit 8 = 1, and bit 7 is the value of the 8th protocol data bit, and bit 8 and a second parsing sub-unit which is a value of the ninth protocol data bit.
6. 10. An electronic device comprising: a memory having executable program code stored therein; and a processor coupled to the memory, the processor invoking the executable program code stored in the memory to perform the AK protocol wheel speed sensor protocol data bit parsing method of claim 1.
7. 10. A computer-readable storage medium having a computer program stored thereon, the computer program causing a computer to execute the AK protocol wheel speed sensor protocol data bit analysis method of claim 1.
Citation Information
Patent Citations
Signal generator, decoder, method for generating a transmitting signal and method for determining speed data
CN103968861A
Wheel information transmission device, wheel information transmission method, and vehicle equipped with wheel information transmission device
JP2023504563A
Wheel speed sensor interface circuit, operation method thereof, and electronic control system
US20210323521A1