High Voltage Power Supply

Abstract

An object of the present invention is to provide a high-voltage power supply that can quickly stabilize a high voltage at a set value. [Solution] In a high-voltage power supply (100), a full-wave rectifier circuit section (3) includes a capacitor (36) connected to one end of a first series circuit section (4) and a charging circuit (37) that charges the capacitor (36); a first half-wave rectifier CW circuit section (10) rectifies and boosts the AC voltage generated in a secondary winding (21b); a second half-wave rectifier CW circuit section (20) rectifies and boosts the AC voltage generated in the secondary winding (21b) in an opposite phase to that of the first half-wave rectifier CW circuit section (10); the output voltages from the first half-wave rectifier CW circuit section (10) and the second half-wave rectifier CW circuit section (20) are added to a first DC voltage (VDC1) in the first series circuit section (4) to generate a second DC voltage (VDC2); and a control section (8) instructs the charging circuit (37) when to charge the capacitor (36).

Description

[Technical Field]

[0001] The present disclosure relates to high voltage power supplies. [Background technology]

[0002] A boost rectifier circuit including a Cockcroft-Walton circuit (hereinafter referred to as a CW circuit) that boosts and rectifies an input voltage by combining multiple circuit components including capacitors and diodes is known (see, for example, Patent Document 1). High-voltage power supplies including a boost rectifier circuit that generates high voltages of several hundred kilovolts may also include a functional unit for shortening the fall time of the high voltage. For example, a wave-tail mitigation circuit and a driver circuit for driving the wave-tail mitigation circuit are known as examples of such functional units (see, for example, Patent Document 2). The wave-tail mitigation circuit of Patent Document 2 has a configuration in which multiple FETs are cascaded between terminals to which a high voltage is applied. The driver circuit controls the wave-tail mitigation circuit based on a high-voltage on signal for driving the high-voltage power supply. As a result, the wave-tail mitigation circuit discharges charges accumulated in the filter capacitor in the high-voltage power supply and the capacitance of the high-voltage cable, thereby shortening the fall time of the high voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-13015 [Patent Document 2] Japanese Patent Application Publication No. 8-212948 Summary of the Invention [Problem to be solved by the invention]

[0004] High-voltage power supplies including boost rectifier circuits such as CW circuits are represented by a transfer function with a delay, such as a first-order lag system, in which a setting signal that sets the magnitude of the high voltage is input and the resulting high voltage is output. Such high-voltage power supplies are controlled by an extremely slow system, taking into account stability in steady state. For this reason, the time constant of the transfer function is extremely large, and when the load fluctuates momentarily or when the set value of the high voltage magnitude is changed, the output control response may not be fast enough, resulting in a momentary voltage drop. In such cases, it is desirable to quickly stabilize the high voltage at the set value.

[0005] An object of the present disclosure is to provide a high-voltage power supply that can quickly stabilize a high voltage at a set value. [Means for solving the problem]

[0006] A boost rectifier circuit according to one aspect of the present disclosure includes: [1] "a transformer including a primary winding and a secondary winding, inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding and rectifying the AC voltage generated in the secondary winding to generate a first DC voltage; a first series circuit unit including a plurality of first capacitors and a plurality of second capacitors alternately connected in series; a second series circuit unit including a plurality of third capacitors connected in series; a third series circuit unit including a plurality of fourth capacitors connected in series; and a control unit, wherein the full-wave rectifier circuit unit includes a fifth capacitor connected to one end of the first series circuit unit and a charging circuit that charges the fifth capacitor; one end of the second series circuit unit is connected to one end of the secondary winding, one end of the third series circuit unit is connected to the other end of the secondary winding, and the third capacitor of the first series circuit unit and the first capacitor of the first series circuit unit constitute a first half-wave rectifier boost circuit unit, the fourth capacitor of the third series circuit unit and the second capacitor of the first series circuit unit constitute a second half-wave rectifier boost circuit unit, the first half-wave rectifier boost circuit unit rectifies and boosts the AC voltage generated in the secondary winding, the second half-wave rectifier boost circuit unit rectifies and boosts the AC voltage generated in the secondary winding in an opposite phase to that of the first half-wave rectifier boost circuit unit, the output voltage from the first half-wave rectifier boost circuit unit and the output voltage from the second half-wave rectifier boost circuit unit are added to the first DC voltage in the first series circuit unit to generate a second DC voltage, and the control unit instructs the charging circuit to charge the fifth capacitor.

[0007] In the high-voltage power supply described in [1] above, by providing a full-wave rectifier circuit immediately after the transformer, it is possible to generate a first DC voltage while suppressing ripples by utilizing both half-waves of the AC voltage generated in the secondary winding of the transformer. Furthermore, because the phases of the output voltages from the first half-wave rectifier boost circuit and the second half-wave rectifier boost circuit are opposite, noise superimposed on the first series circuit cancels each other out. This allows the second DC voltage to be generated while effectively suppressing ripples. In addition, in the full-wave rectifier circuit, a voltage is generated in the fifth capacitor due to the charge stored in the fifth capacitor. The voltage generated in the fifth capacitor increases both the first DC voltage and the second DC voltage. When a voltage drop occurs in the second DC voltage, the charging circuit, instructed by the control unit, charges the fifth capacitor, thereby compensating for at least a portion of the drop in the second DC voltage. This reduces the voltage drop and enables high-voltage control with high speed and stability.

[0008] A boost rectifier circuit according to one aspect of the present disclosure may be [2] "the high-voltage power supply according to [1], further comprising a detection unit that generates an instruction voltage that is the difference between a detection voltage indicating the magnitude of the second DC voltage and a set voltage for setting the magnitude of the second DC voltage, wherein the control unit outputs a pulse-on signal to the charging circuit at the timing when the control unit detects the instruction voltage, and the charging circuit receives the pulse-on signal and charges the fifth capacitor." This allows the charging circuit to reliably charge the fifth capacitor when a voltage drop occurs in the second DC voltage. This makes it possible to more appropriately compensate for at least a portion of the drop in the second DC voltage and quickly stabilize the second DC voltage at a set value.

[0009] A boost rectifier circuit according to one aspect of the present disclosure may be [3] "the high-voltage power supply according to [2], wherein the control unit outputs a pulse drive wave including a duty ratio corresponding to the instruction voltage to the charging circuit, and the charging circuit adjusts the magnitude of the voltage generated in the fifth capacitor based on the magnitude of the duty ratio." According to this, by controlling the magnitude of the voltage generated in the fifth capacitor based on the magnitude of the duty ratio, it is possible to accurately compensate for the drop in the second DC voltage.

[0010] A boost rectifier circuit according to one aspect of the present disclosure may be [4] "the high-voltage power supply according to [3], further comprising an inverter circuit that generates the AC voltage to be input to the primary winding, and the control unit drives the inverter circuit with an inverter drive wave having a frequency lower than or equal to that of the pulse drive wave." In this case, the amount of charge stored in the fifth capacitor is adjusted at a cycle faster than the cycle for driving the inverter circuit to adjust the magnitude of the high voltage. This makes it possible to compensate for the drop in the second DC voltage faster than the change in the magnitude of the high voltage, thereby enabling more stable control of the high voltage.

[0011] A boost rectifier circuit according to one aspect of the present disclosure is [5] "further comprising: a first rectifier capacitor having the other electrode connected to the other end of the secondary winding; and a second rectifier capacitor having the other electrode connected to one end of the secondary winding; wherein the charging circuit includes a first switch element including a control terminal to which the pulse drive wave is input, a first current terminal connected to one electrode of the first rectifier capacitor, and a second current terminal; a second switch element including a control terminal to which the pulse drive wave is input, a first current terminal connected to one electrode of the second rectifier capacitor, and a second current terminal; and The high-voltage power supply according to claim 3 or 4 may include: a first inductor having one end connected to the second current terminal of the second switch element and the other end connected to one electrode of the fifth capacitor; a second inductor having one end connected to the second current terminal of the second switch element and the other end connected to the one electrode of the fifth capacitor; and a third switch element having a control terminal to which the pulse-on signal is input, a first current terminal connected to one electrode of the fifth capacitor, and a second current terminal connected to the other electrode of the fifth capacitor. According to this, the fifth capacitor can be charged and discharged with a simple configuration by turning the third switch element on and off with a pulse-on signal. Furthermore, a voltage obtained by smoothing the output wave of the first switch element by the first inductor and the fifth capacitor and a voltage obtained by smoothing the output wave of the second switch element by the second inductor and the fifth capacitor are added together to generate a charging voltage for the fifth capacitor. This allows the charging voltage to be adjusted according to the duty ratio of the pulse driving wave with a simple configuration.

[0012] A boost rectifier circuit according to one aspect of the present disclosure may be the high-voltage power supply according to claim 1, wherein [6] "the full-wave rectifier circuit section further includes a sixth capacitor having one electrode connected to one of the electrodes of the fifth capacitor opposite to the electrode connected to the first series circuit section, and the other electrode connected to a reference potential, and the control section connects the one electrode to the reference potential and switches the other electrode from the reference potential to an open state when the state of the load connected to the other end of the first series circuit section transitions from a heavy load state to a no-load state." In this configuration, the first DC voltage does not include the DC voltage output from the sixth capacitor, but includes only the DC voltage generated in the fifth capacitor. Therefore, the first DC voltage and the second DC voltage are reduced by the DC voltage output from the sixth capacitor. As a result, overshoot of the second DC voltage occurring when the load state transitions from a heavy load state to a no-load state is suppressed.

[0013] A boost rectifier circuit according to one aspect of the present disclosure is [7] "comprised of: a transformer including a primary winding and a secondary winding, and inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding, and generating a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit unit formed by connecting a plurality of first capacitors in series; a second series circuit unit formed by connecting a plurality of second capacitors in series; a third series circuit unit formed by connecting a plurality of third capacitors in series; and a control unit, wherein the full-wave rectifier circuit unit includes a fourth capacitor connected to one end of the first series circuit unit. a charging circuit that charges the fourth capacitor, wherein one end of the second series circuit unit is connected to one end of the secondary winding and one end of the third series circuit unit is connected to the other end of the secondary winding, the plurality of first capacitors of the first series circuit unit, the plurality of second capacitors of the second series circuit unit, and the plurality of third capacitors of the third series circuit unit form a full-wave rectifying boost circuit unit, and the control unit instructs the timing at which the charging circuit charges the fourth capacitor.

[0014] According to the high-voltage power supply described in [7] above, in the full-wave rectifier circuit section, a voltage is generated in the fourth capacitor due to the charge stored in the fourth capacitor. The voltage generated in the fourth capacitor increases the first DC voltage. Then, in the full-wave rectifier boost circuit section, the high voltage is generated by adding the first DC voltage to a DC voltage obtained by rectifying and boosting an AC voltage using both half-waves of the AC voltage generated in the secondary winding of the transformer. When a voltage drop occurs in the high voltage, the charging circuit instructed by the control unit charges the fourth capacitor, thereby compensating for at least a portion of the high voltage drop. This reduces the voltage drop and enables fast and stable control of the high voltage.

[0015] A boost rectifier circuit according to one aspect of the present disclosure is [8] "a first boost rectifier circuit including a transformer having a primary winding and a secondary winding, and inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding and rectifying the AC voltage generated in the secondary winding to generate a first DC voltage; a first series circuit unit formed by connecting a plurality of first capacitors in series; a first diode connected between one end of the secondary winding of the transformer and one end of the first series circuit unit; a second diode connected between the other end of the secondary winding and the one end of the first series circuit unit; and a circuit unit connected to the secondary winding and including a second capacitor and a third diode, which are combined in multiple stages. a second boost rectifier circuit unit connected to the secondary winding and comprising a plurality of stages of circuit units including a third capacitor and a fourth diode, for rectifying and boosting the AC voltage generated in the secondary winding in an opposite phase to that of the first boost rectifier circuit unit; a voltage synthesis unit that synthesizes the output voltage from the first boost rectifier circuit unit, the output voltage from the second boost rectifier circuit unit, and the first DC voltage to generate a second DC voltage; and a control unit, wherein the full-wave rectifier circuit unit includes a fourth capacitor connected to the one end of the first series circuit unit and a charging circuit that charges the fourth capacitor, and the control unit instructs the charging circuit to charge the fourth capacitor.

[0016] According to the high-voltage power supply described in [8] above, in the full-wave rectifier circuit, a voltage is generated in the fourth capacitor due to the charge stored in the fourth capacitor. The voltage generated in the fourth capacitor increases the first DC voltage and also increases the second DC voltage. For example, when a voltage drop occurs in the second DC voltage, the charging circuit instructed by the control unit charges the fourth capacitor, thereby compensating for at least a portion of the drop in the second DC voltage. This reduces the voltage drop and enables high-voltage control with high speed and stability. [Effects of the Invention]

[0017] According to the present disclosure, it is possible to provide a high-voltage power supply that can quickly stabilize a high voltage at a set value. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a circuit diagram showing a configuration of a boost rectifier circuit included in a high-voltage power supply according to an embodiment of the present disclosure. [Figure 2] 1 is a circuit diagram showing a configuration of a boost rectifier circuit included in a high-voltage power supply according to an embodiment of the present disclosure. [Figure 3] 2 is a circuit diagram showing the configuration of a detection unit and a control unit included in a high-voltage power supply according to an embodiment of the present disclosure. FIG. [Figure 4] 3 is a graph showing an example of the operation of a charging circuit in the boost rectifier circuit shown in FIGS. 1 and 2. [Figure 5] 10 is a graph showing an example of the correspondence relationship between an instruction voltage and a duty ratio of a pulse drive wave. [Figure 6] 3 is a graph showing an example of the operation of the boost rectifier circuit shown in FIGS. 1 and 2. [Figure 7] 10 is a graph showing an example of behavior of a load current and a second DC voltage. [Figure 8] FIG. 10 is a circuit diagram showing the configuration of a high-voltage power supply according to a first modified example. [Figure 9] FIG. 10 is a circuit diagram showing the configuration of a high-voltage power supply according to a first modified example. [Figure 10] FIG. 10 is a circuit diagram showing the configuration of a high-voltage power supply according to a second modified example. [Figure 11] FIG. 10 is a circuit diagram showing the configuration of a high-voltage power supply according to a third modified example. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, a preferred embodiment of a high-voltage power supply according to an embodiment of the present disclosure will be described in detail with reference to the drawings. In the description of the drawings, the same elements are given the same reference numerals, and duplicated explanations will be omitted. [High voltage power supply configuration]

[0020] As shown in FIGS. 1 to 3, a high-voltage power supply 100 according to an embodiment of the present disclosure includes a boost rectifier circuit 1, a detection unit 7, and a control unit 8. The high-voltage power supply 100 generates a high DC voltage in the boost rectifier circuit 1. The detection unit 7 detects fluctuations in the DC voltage, and the control unit 8 generates a drive signal based on the fluctuations in the DC voltage. A charging circuit included in the boost rectifier circuit 1 is driven by the drive signal to quickly stabilize the DC voltage at a set value. [Configuration and operation of boost rectifier circuit]

[0021] 1 and 2 are circuit diagrams showing the configuration of a boost rectifier circuit. As shown in Fig. 1 and 2, the boost rectifier circuit 1 includes an inverter circuit 12, a transformer 21, a capacitor 22 (first rectifier capacitor), a diode 23, a capacitor 24 (second rectifier capacitor), a diode 25, a full-wave rectifier circuit unit 3, a first series circuit unit 4, a second series circuit unit 5, and a third series circuit unit 6.

[0022] The inverter circuit 12 is a circuit configured with multiple switch elements. The inverter circuit 12 is, for example, a bridge circuit. The inverter circuit 12 uses the inverter voltage Viv input from the detection unit 7 as a power supply voltage. The inverter voltage Viv is input from a connection point CN1A. The connection point CN1A is connected to the input terminal of the inverter circuit 12 via a resistor R1. One output terminal 12a of the inverter circuit 12 is connected to one terminal of a primary winding 21a of a transformer 21 via a resistor 13a, a capacitor 14a, and an inductor 15a. The other output terminal 12b of the inverter circuit 12 is connected to the other terminal of the primary winding 21a of the transformer 21. Both ends of the primary winding 21a are connected to each other via an inductor 15b and a capacitor 14b arranged in parallel with each other. The resistor 13a is, for example, provided as a damping resistor. Alternatively, the resistor 13a may be equivalent to the winding resistance of the primary winding 21a of the transformer 21, expressed as a lumped constant. In this case, the resistor 13a does not need to be provided as an external resistor.

[0023] In the inverter circuit 12, the multiple switch elements are driven by, for example, an inverter drive wave (not shown) of a predetermined frequency input from the control unit 8. In the following description, the switch elements refer to, for example, transistors such as FETs. When the inverter voltage Viv is input from the detection unit 7, the inverter circuit 12 periodically distributes the inverter voltage Viv to two output terminals 12a and 12b. That is, square waves of opposite phases generated based on the inverter drive wave are output from the two output terminals 12a and 12b. This square wave is converted into an AC voltage by the resistor, inductor, and capacitor described above, and the AC voltage is input to the primary winding 21a of the transformer 21. Note that, instead of the bridge circuit, another circuit (e.g., a push-pull circuit) may be used as long as it can apply an AC voltage to the primary winding 21a of the transformer 21.

[0024] The anode of the diode 23 is connected to one end 21c of the secondary winding 21b via a resistor R2. The cathode of the diode 23 is connected to one electrode of the capacitor 22. The other electrode of the capacitor 22 is connected to the other end 21d of the secondary winding 21b via a resistor R3. The anode of the diode 25 is connected to the other end 21d of the secondary winding 21b via a resistor R3. The cathode of the diode 25 is connected to one electrode of the capacitor 24. The other electrode of the capacitor 24 is connected to one end 21c of the secondary winding 21b via a resistor R2. In the following description, one electrode of the capacitor mainly refers to the electrode located on the output side, i.e., the opposite side from the secondary winding 21b. The other electrode of the capacitor mainly refers to the electrode located on the input side, i.e., the side of the secondary winding 21b. The resistors R2 and R3 are provided, for example, as damping resistors. Alternatively, the resistors R2 and R3 may be equivalent to the winding resistance of the secondary winding 21b of the transformer 21 expressed as a lumped constant. In this case, the resistors R2 and R3 do not need to be provided as external resistors.

[0025] The full-wave rectifier circuit unit 3 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The full-wave rectifier circuit unit 3 includes a capacitor 31 (a sixth capacitor), a diode 32, a diode 33, a diode 34, a diode 35, a capacitor 36 (a fifth capacitor), and a charging circuit 37. The cathode of the diode 32 is connected to one electrode of the capacitor 31, and the anode of the diode 32 is connected to one end 21c of the secondary winding 21b via resistor R2. The cathode of the diode 33 is connected to one end 21c of the secondary winding 21b via resistor R2, and the anode of the diode 33 is connected to the other electrode of the capacitor 31. The cathode of the diode 34 is connected to one electrode of the capacitor 31, and the anode of the diode 34 is connected to the other end 21d of the secondary winding 21b via resistor R3. The cathode of diode 35 is connected to the other end 21d of secondary winding 21b via resistor R3, and the anode of diode 35 is connected to the other electrode of capacitor 31. The other electrode of capacitor 31 is connected to reference potential GND. The other electrode of capacitor 36 is connected to one electrode of capacitor 31. That is, capacitors 36 and 31 are connected to each other in series. In other words, capacitor 31 is connected to the electrode (other electrode) of capacitor 36 opposite to the electrode connected to first series circuit unit 4.

[0026] The charging circuit 37 includes a switch element T1 (first switch element), a switch element T2 (second switch element), a switch element T3 (third switch element), an inductor L1 (first inductor), an inductor L2 (second inductor), a diode 371, and a diode 372. Each of the switch elements T1, T2, and T3 includes a control terminal to which a drive signal is input, a first current terminal, and a second current terminal, and a current flows from the first current terminal to the second current terminal. In the example of FIG. 1, a body diode connected in parallel between the first current terminal and the second current terminal of each switch element is illustrated.

[0027] The control terminal T3a of the switch element T3 is connected to the connection point CN4A. The first current terminal T3b of the switch element T3 is connected to one electrode of the capacitor 36. The second current terminal T3c of the switch element T3 is connected to the other electrode of the capacitor 36. A pulse-on signal Spn1 is input to the connection point CN4A from the control unit 8. The charging circuit 37 receives the pulse-on signal Spn1 and charges the capacitor 36. As will be described in detail later, the pulse-on signal Spn1 indicates Low when a fluctuation of a certain level or more occurs in the second DC voltage VDC2 (hereinafter referred to as a fluctuation state), and indicates Hi when a fluctuation of a certain level or more does not occur in the second DC voltage VDC2 (hereinafter referred to as a normal state). Under normal conditions, the pulse-on signal Spn1 is Hi, so that the switch element T3 is in an ON state. As a result, both ends of the capacitor 36 are short-circuited, and no charge is charged to the capacitor 36. During fluctuation, the pulse-on signal Spn1 is low, so the switch element T3 is turned off. This causes the capacitor 36 to be charged. In the following description, Hi and Low in each signal indicate the potential state of the signal. Hi is a potential higher than Low. Hi may be the potential of the power supply voltage, and Low may be the potential of the reference potential GND.

[0028] The control terminal T1a of the switch element T1 is connected to the connection point CN2A. The first current terminal T1b of the switch element T1 is connected to one electrode of the capacitor 22. The second current terminal T1c of the switch element T1 is connected to one end of the inductor L1 and the cathode of the diode 371. The other end of the inductor L1 is connected to one electrode of the capacitor 36, and the anode of the diode 371 is connected to the other electrode of the capacitor 36. The control terminal T2a of the switch element T2 is connected to the connection point CN3A. The first current terminal T2b of the switch element T2 is connected to one electrode of the capacitor 24. The second current terminal T2c of the switch element T2 is connected to one end of the inductor L2 and the cathode of the diode 372. The other end of the inductor L2 is connected to one electrode of the capacitor 36, and the anode of the diode 372 is connected to the other electrode of the capacitor 36. A pulse drive wave Spw is input to the connection points CN2A and CN3A from the control unit 8. The pulse drive wave Spw is a PWM (Pulse Width Modulation) wave. As will be described in detail later, the duty ratio of the pulse drive wave Spw varies depending on the magnitude of the fluctuation in the second DC voltage VDC2 during fluctuation. The control unit 8 outputs the pulse drive wave Spw, which includes a duty ratio according to the instruction voltage Vdrc for suppressing fluctuations in the second DC voltage VDC2, to the charging circuit 37, and the charging circuit 37 adjusts the magnitude of the voltage generated in the capacitor 36 based on the magnitude of the duty ratio.

[0029] 4 is a graph showing an example of the operation of the switch element T1, the switch element T2, the inductor L1, and the inductor L2. As shown in FIGS. 4(a) and 4(b), the frequency of the inverter drive wave that drives the inverter circuit 12 is lower than the frequency of the pulse drive wave Spw. However, the frequency of the inverter drive wave does not necessarily have to be lower than the frequency of the pulse drive wave Spw and may be the same as the frequency of the pulse drive wave Spw. The control unit 8 sets the frequency of the pulse drive wave Spw so that the frequency of the pulse drive wave Spw is higher than the frequency of the inverter drive wave. In the example of FIG. 4, the frequency of the pulse drive wave Spw is twice the frequency of the inverter drive wave. The timing at which the switch element T1 conducts and the timing at which the switch element T2 conducts may be shifted from each other. As shown in (c) and (e) of FIG. 4, the phase of the voltage generated across the switching element T1 (the voltage between the first current terminal T1b and the second current terminal T1c) may be shifted by 180° from the phase of the voltage generated across the switching element T2 (the voltage between the first current terminal T2b and the second current terminal T2c). Accordingly, as shown in (d) and (f) of FIG. 4, the phase of the current flowing through inductor L1 may be shifted by 180° from the phase of the current flowing through inductor L2. For example, when the pulse driving wave Spw rises from low to high during a period in which the inverter driving wave is high, the switching element T1 turns on and a current flows through inductor L1. On the other hand, when the pulse driving wave Spw rises from low to high during a period in which the inverter driving wave is low, the switching element T2 turns on and a current flows through inductor L2. The current that has flowed through the inductor L1 or the inductor L2 further flows to the capacitor , and thus the capacitor accumulates electric charge.

[0030] As a charge accumulates in the capacitor 36, a DC voltage is generated across the capacitor 36. For example, a DC voltage obtained by smoothing the output wave of the switching element T1 through the inductor L1 and the capacitor 36 is generated across the capacitor 36. Similarly, for example, a DC voltage obtained by smoothing the output wave of the switching element T2 through the inductor L2 and the capacitor 36 is generated across the capacitor 36. The DC voltage generated across the capacitor 36 varies depending on the duty ratio of the pulse driving wave Spw. For example, the larger the duty ratio of the pulse driving wave Spw, the larger the DC voltage generated across the capacitor 36.

[0031] The full-wave rectifier circuit unit 3A generates a DC voltage by rectifying the AC voltage generated in the secondary winding 21b. In the full-wave rectifier circuit unit 3, the positive and negative half-waves of the AC voltage in the secondary winding 21b are rectified by diodes 32 to 35, and a DC voltage is output from one electrode of the capacitor 31. As an example, if the inverter voltage Viv is 50V and the number of turns of the secondary winding 21b of the transformer 21 is 100 times the number of turns of the primary winding 21a, the amplitude of the AC voltage in the secondary winding 21b may be 5 kVp-p. In this case, the full-wave rectifier circuit unit 3A generates a DC voltage with an absolute value of 5 kV. Furthermore, because the capacitor 36 is connected in series with the capacitor 31, the DC voltage generated in the capacitor 36 is added to the DC voltage output from one electrode of the capacitor 31. This added DC voltage becomes the first DC voltage VDC1, which is the output voltage of the full-wave rectifier circuit unit 3. Therefore, the first DC voltage VDC1 varies depending on the duty ratio of the pulse drive wave Spw. For example, when the absolute value of the DC voltage generated in the capacitor 36 varies between 0 V and 5 kV, the absolute value of the first DC voltage VDC1 varies between 5 kV and 10 kV.

[0032] The first series circuit section 4 is formed by alternately connecting a plurality of first capacitors and a plurality of second capacitors in series. In the example of FIG. 2, the first series circuit section 4 is formed by alternately connecting N (N is an integer equal to or greater than 2; the figure illustrates the case where N=3) first capacitors Cp(2), Cp(4), . . . , Cp(2N) and N second capacitors Cq(2), Cq(4), . . . , Cq(2N). One end of the first series circuit section 4 is connected to the output terminal of the full-wave rectifier circuit section 3. Specifically, one end of the first series circuit section 4 is connected to one electrode of the capacitor 36. The second series circuit section 5 is formed by connecting a plurality of third capacitors in series. In the example of FIG. 2, the second series circuit unit 5 is formed by connecting N+1 (N is an integer equal to or greater than 2; the figure illustrates the case where N=3) third capacitors Cp(1), Cp(3), . . . , Cp(2N+1) in series. One end of the second series circuit unit 5 is connected to one end 21c of the secondary winding 21b via a resistor R2. The third series circuit unit 6 is formed by connecting multiple fourth capacitors in series. In the example of FIG. 2, the third series circuit unit 6 is formed by connecting N fourth capacitors Cq(1), Cq(3), . . . , Cq(2N-1) in series. One end of the third series circuit unit 6 is connected to the other end 21d of the secondary winding 21b via a resistor R3.

[0033] In the example of FIG. 2, 2N+1 diodes Dp(1), Dp(2), ..., Dp(2N+1) connect the first series circuit unit 4 and the second series circuit unit 5. The cathode of the diode Dp(1) is connected to the other electrode of the capacitor Cp(2), and the anode of the diode Dp(1) is connected to one electrode of the capacitor Cp(1). The cathode of the diode Dp(2n) (where n = 1, 2, 3, ...) is connected to one electrode of the capacitor Cp(2n+1), and the anode of the diode Dp(2n) is connected to the other electrode of the capacitor Cp(2n). The cathode of the diode Dp(2n+1) is connected to one electrode of the capacitor Cp(2n), and the anode of the diode Dp(2n+1) is connected to one electrode of the capacitor Cp(2n+1). Similarly, 2N diodes Dq(1), Dq(2), ..., Dq(2N) connect the first series circuit unit 4 and the third series circuit unit 6. The anode of diode Dq(1) is connected to the other electrode of capacitor Cp(2), and the cathode of diode Dq(1) is connected to one electrode of capacitor Cq(1). The anode of diode Dq(2n) (where n = 1, 2, 3, ...) is connected to the other electrode of capacitor Cq(2n+1), and the cathode of diode Dq(2n) is connected to one electrode of capacitor Cp(2n). The anode of diode Dq(2n+1) is connected to one electrode of capacitor Cp(2n), and the cathode of diode Dq(2n+1) is connected to one electrode of capacitor Cq(2n+1).

[0034] In this embodiment, the third capacitors Cp(1), Cp(3), ..., Cp(2N+1) of the second series circuit section 5 and the first capacitors Cp(2), Cp(4), ..., Cp(2N) of the first series circuit section 4 constitute a first half-wave rectifier CW circuit section 10 (first half-wave rectifier boost circuit section). Also, the fourth capacitors Cq(1), Cq(3), ..., Cq(2N-1) of the third series circuit section 6 and the second capacitors Cq(2), Cq(4), ..., Cq(2N) of the first series circuit section 4 constitute a second half-wave rectifier CW circuit section 20 (second half-wave rectifier boost circuit section). The first series circuit section 4 is a circuit section common to the first half-wave rectification type CW circuit section 10 and the second half-wave rectification type CW circuit section 20.

[0035] The first half-wave rectifier CW circuit unit 10 rectifies and boosts the AC voltage generated across both ends of the secondary winding 21b. The first half-wave rectifier CW circuit unit 10 generates a DC output voltage from the AC voltage by repeatedly storing charge in the third capacitors Cp(1), Cp(3), ..., Cp(2N+1) and the first capacitors Cp(2), Cp(4), ..., Cp(2N) and rectifying the voltage using the diode Dp(n). The second half-wave rectifier CW circuit unit 20 rectifies and boosts the AC voltage generated across both ends of the secondary winding 21b in opposite phase (180° out of phase) to that of the first half-wave rectifier CW circuit unit 10. The second half-wave rectification type CW circuit unit 20 generates a DC output voltage from an AC voltage by repeating the accumulation of charge by the fourth capacitors Cq(1), Cq(3), ..., Cq(2N-1) and the second capacitors Cq(2), Cq(4), ..., Cq(2N) and rectification by the diode Dq(n).

[0036] The output voltage from the first half-wave rectifier CW circuit unit 10 and the output voltage from the second half-wave rectifier CW circuit unit 20 are added to the first DC voltage VDC1 in the first series circuit unit 4 to generate the second DC voltage VDC2. More specifically, in the boost rectifier circuit 1, the voltages generated at both ends of the electrodes of the first capacitors Cp(2), Cp(4), . . . , Cp(2N) and the second capacitors Cq(2), Cq(4), . . . , Cq(2N) in the first series circuit unit 4 are sequentially added to the first DC voltage VDC1, thereby finally generating the second DC voltage VDC2. For example, if the absolute value of the first DC voltage VDC1 is 10 kV, a voltage with an absolute value of 5 kV is generated at the electrodes at both ends of each of the first capacitors Cp(2), Cp(4), ..., Cp(2N) and the second capacitors Cq(2), Cq(4), ..., Cq(2N), and the absolute value of the second DC voltage VDC2 ultimately becomes approximately 40 kV.

[0037] The second DC voltage VDC2 is output from the other end of the first series circuit unit 4 as the output voltage of the boost rectifier circuit 1 and is supplied to load resistors RL1 and RL2, which are connected in series with each other. In the example of FIG. 2, one end of the load resistor RL1 is connected to the other end of the first series circuit unit 4, and the other end of the load resistor RL2 is connected to the reference potential GND. A connection point CN5A is connected to the node between the load resistors RL1 and RL2. As a result, a detection voltage Vdet, which is the second DC voltage VDC2 divided by the load resistors RL1 and RL2, is output to the detection unit 7 via the connection point CN5A. The detection voltage Vdet indicates the magnitude of the second DC voltage VDC2. Also, in the example of FIG. 2, a constant current source CS is connected between the other end of the first series circuit unit 4 and the reference potential GND. For example, if the load current I L is set. In the boost rectifier circuit 1, the second DC voltage VDC2 is positive. If the second DC voltage VDC2 were negative, the directions of the diodes Dp(1), Dp(2), . . . , Dp(2N+1) and the diodes Dq(1), Dq(2), . . . , Dq(2N+1) would be reversed from the configuration in FIG. 2, and the direction of the constant current source CS would also be reversed. [Configuration and operation of the detection unit and control unit]

[0038] Next, the configurations and operations of the detection unit 7 and the control unit 8 will be described with reference to FIG. 3. The detection unit 7 includes a buffer 71, an error amplifier 72, a voltage source 73, an error amplifier 75, and a linear power converter 77. The input terminal of the buffer 71 is connected to a connection point CN5B. The connection point CN5B is electrically connected to the connection point CN5A. As a result, the detection voltage Vdet is input to the input terminal of the buffer 71 via the connection point CN5B. The error amplifier 72 includes two input terminals and an output terminal. One input terminal of the error amplifier 72 is connected to the output terminal of the buffer 71 via a resistor R4. The other input terminal of the error amplifier 72 is connected to a voltage source 73. The voltage source 73 generates a setting voltage Vset (setting signal) for setting the magnitude of the second DC voltage VDC2. The output terminal of the error amplifier 72 is connected to the input terminal of the linear power converter 77. The output terminal of the linear power converter 77 is connected to the connection point CN1B. The output terminal of the error amplifier 72 is connected to one input terminal via a resistor R5 and a capacitor 74. Resistors R4, R5, and a capacitor 74 determine, for example, the DC gain and frequency characteristics of a feedback system that controls the inverter voltage Viv. The junction CN1B is electrically connected to a junction CN1A (see FIG. 1) that is connected to the input terminal of the inverter circuit 12. The detector 7 generates the inverter voltage Viv based on the detection voltage Vdet. In the example of FIG. 3, the detection voltage Vdet is output to the error amplifier 72 in a stable state, with attenuation of the output level suppressed by the buffer 71. The error amplifier 72 generates an inverter command voltage Vdhv based on the difference between the set voltage Vset and the detection voltage Vdet, and outputs the generated voltage to the linear power converter 77. The linear power converter 77 generates the inverter voltage Viv proportional to the inverter command voltage Vdhv. The linear power converter 77 may be a series regulator or a switching regulator. The set voltage Vset is a fixed value unless, for example, a user changes the setting. If a voltage drop occurs in the second DC voltage VDC2, the detection voltage Vdet also drops. The inverter voltage Viv increases in proportion to the difference between the set voltage Vset and the detected voltage Vdet.That is, the greater the drop in the second DC voltage VDC2, the greater the difference and the higher the inverter voltage Viv.

[0039] The error amplifier 75 includes two input terminals and an output terminal. One input terminal of the error amplifier 75 is connected to the output terminal of the buffer 71 via a resistor R6. The other input terminal of the error amplifier 75 is connected to a voltage source 73. The output terminal of the error amplifier 75 is connected to a control element 81 included in the control unit 8. The output terminal of the error amplifier 75 is connected to one input terminal via a resistor R7 and a capacitor 76. The resistors R6, R7, and the capacitor 76 determine the DC gain and frequency characteristics of a feedback system that controls, for example, the command voltage Vdrc, and ultimately the pulse drive wave Spw (described later). The error amplifier 75 generates the command voltage Vdrc based on the difference between the set voltage Vset and the detection voltage Vdet. The set voltage Vset is a fixed value unless, for example, a user changes the setting. The error amplifier 75 generates the command voltage Vdrc when the detection voltage Vdet is smaller than the set voltage Vset. If a voltage drop occurs in the second DC voltage VDC2, the detection voltage Vdet also drops. In this case, when the detected voltage Vdet drops and becomes smaller than the set voltage Vset, the command voltage Vdrc may be generated. The command voltage Vdrc increases in proportion to the difference between the set voltage Vset and the detected voltage Vdet. In other words, the greater the drop in the second DC voltage VDC2, the greater the difference and the greater the command voltage Vdrc.

[0040] The error amplifier 75 and its peripheral circuits (resistors R6, R7, and capacitor 76) and the error amplifier 72 and its peripheral circuits (resistors R4, R5, and capacitor 74) may implement, for example, PI control. Here, the capacitance of capacitor 76 is much smaller than the capacitance of capacitor 74. The capacitance of capacitor 76 is, for example, 10 nF, and the capacitance of capacitor 74 is, for example, 1 μF. The control target of the error amplifier 72 and its peripheral circuits is the inverter voltage Viv, and the second DC voltage VDC2 is ultimately generated based on the inverter voltage Viv. Therefore, the feedback system that controls the inverter voltage Viv, including the error amplifier 72 and its peripheral circuits, is prone to a large response delay, and to ensure stability, such as to prevent oscillation, the capacitance of capacitor 74 needs to be large. In contrast, the feedback system that controls the pulse drive wave Spw, including the error amplifier 75 and its peripheral circuits, can operate faster than the feedback system that controls the inverter voltage Viv, and the capacitance of capacitor 76 may be small to ensure stability.

[0041] The control unit 8 instructs the charging circuit 37 when to charge the capacitor 36. The control unit 8 causes the charging circuit 37 to charge the capacitor 36 when the command voltage Vdrc is detected. The control unit 8 includes a control element 81 and a signal generating unit 82. The control element 81 includes an input terminal 81a, an output terminal 81b, and an output terminal 81c. The command voltage Vdrc may be detected when the command voltage Vdrc is input to the control element 81. Alternatively, the control element 81 may compare the command voltage Vdrc input from the input terminal 81a with a threshold value. In this case, the command voltage Vdrc may be detected when the command voltage Vdrc exceeds the threshold value. The control element 81 may output a pre-pulse on signal Spn0 from the output terminal 81c when the command voltage Vdrc is detected.

[0042] The signal generating unit 82 includes a NOT element 825 and an isolation element 826. The input terminal of the NOT element 825 is connected to the output terminal 81c. The output terminal of the NOT element 825 is connected to a connection point CN4B via the isolation element 826. The connection point CN4B is electrically connected to a connection point CN4A that is connected to the control terminal T3a of the switch element T3. The polarity of the pre-pulse-on signal Spn0 output from the output terminal 81c is inverted by the NOT element 825. Then, the pre-pulse-on signal Spn0 with its polarity inverted passes through the isolation element 826 and is output from the connection point CN4B as a pulse-on signal Spn1. The isolation element 826 is an element for, for example, matching the level of the reference potential of the control unit 8 with the level of the reference potential GND of the boost rectifier circuit 1.

[0043] The control element 81 sets the duty ratio of the pulse driving wave Spw based on the command voltage Vdrc. The control element 81 may, for example, store in advance the correspondence relationship between the command voltage Vdrc and the duty ratio of the pulse driving wave Spw. FIG. 5 is a graph showing an example of the correspondence relationship between the command voltage Vdrc and the duty ratio of the pulse driving wave Spw. The horizontal axis in FIG. 5 represents the load current I L The load current I L As the voltage Vset increases, the amount of drop in the second DC voltage VDC2 may increase. This increases the difference between the set voltage Vset and the detection voltage Vdet, which in turn increases the command voltage Vdrc. As shown in FIG. 5, the command voltage Vdrc is proportional to the duty ratio of the pulsed driving wave Spw. For example, as the command voltage Vdrc increases from 1 V to 4 V, the duty ratio of the pulsed driving wave Spw increases from 0.01 to 0.35. In the example of FIG. 5, the command voltage Vdrc and the duty ratio of the pulsed driving wave Spw change nonlinearly, but they may also change linearly. The control element 81 outputs the pulsed driving wave Spw with the set duty ratio from the output terminal 81b.

[0044] The signal generating unit 82 further includes AND elements 821 and 822 and isolation elements 823 and 824. The AND element 821 includes two input terminals. One input terminal of the AND element 821 is connected to the output terminal 81b, and the other input terminal is connected to the output terminal 81c. The output terminal of the AND element 821 is connected to a connection point CN2B via an isolation element 823. The connection point CN2B is electrically connected to a connection point CN2A that is connected to the control terminal T1a of the switch element T1. When the pre-pulse-on signal Spn0 output from the output terminal 81c is Low, the pulsed drive wave Spw is not output from the output terminal of the AND element 821. When the pre-pulse-on signal Spn0 is High, the pulsed drive wave Spw is output from the output terminal of the AND element 821. That is, the pulsed drive wave Spw is output from the output terminal of the AND element 821 at the timing when the command voltage Vdrc is detected.

[0045] The AND element 822 has two input terminals. One input terminal of the AND element 822 is connected to the output terminal 81b, and the other input terminal is connected to the output terminal 81c. The output terminal of the AND element 822 is connected to the connection point CN3B via the insulating element 824. The connection point CN3B is electrically connected to the connection point CN3A, which is connected to the control terminal T2a of the switch element T2. When the pre-pulse-on signal Spn0 output from the output terminal 81c is Low, the pulsed drive wave Spw is not output from the output terminal of the AND element 822. When the pre-pulse-on signal Spn0 is Hi, the pulsed drive wave Spw is output from the output terminal of the AND element 822. That is, the pulsed drive wave Spw is output from the output terminal of the AND element 822 at the timing when the command voltage Vdrc is detected. [High voltage power supply operation]

[0046] Based on the configuration of the high-voltage power supply 100 described above, and with reference to FIG. 6, the load current I L A series of steps from when a DC voltage VDC2 flows to when a voltage is generated in the capacitor 36 will be described. First, the second DC voltage VDC2 is generated in the first series circuit section 4. Then, as shown in FIG. 6(a), the load current I set in the constant current source CS flows.L As shown in FIG. 6(b), the error amplifier 75 generates a command voltage Vdrc based on the difference between the set voltage Vset and the detection voltage Vdet. The control element 81 outputs a pre-pulse-on signal Spn0 from the output terminal 81c as shown in FIG. 6(c) at the timing when the command voltage Vdrc is input. This causes the pulse-on signal Spn1 to go low, causing the capacitor 36 to start charging, and as shown in FIG. 6(d), the voltage of the capacitor 36 starts to rise. The time TM1 from when the pre-pulse-on signal Spn0 is output until the voltage of the capacitor 36 starts to rise is, for example, 50 μsec to 80 μsec. Thereafter, the control element 81 adjusts the duty ratio of the pulse drive wave Spw based on the command voltage Vdrc, and the voltage of the capacitor 36 stabilizes after a time TM2 has elapsed since the pre-pulse-on signal Spn0 was output. Here, "stable" may refer to a state in which the fluctuation rate per predetermined time of the voltage generated in the capacitor 36 is within 10%. The time TM2 is, for example, 150 μsec to 250 μsec. [Action and effect]

[0047] Next, the effects of the high-voltage power supply 100 according to this embodiment will be described in comparison with a high-voltage power supply according to a comparative example. The high-voltage power supply according to the comparative example differs from the high-voltage power supply 100 in that the boost rectifier circuit 1 does not include the capacitor 36 and the charging circuit 37, the detection unit 7 does not generate the command voltage Vdrc, and the control unit 8 does not generate the pulse drive wave Spw and the pulse-on signal Spn1. In the high-voltage power supply according to the comparative example, one electrode of the capacitor 31 is connected to one end of the first series circuit unit 4, and a DC voltage is output from one electrode of the capacitor 31 at the first DC voltage VDC1. As described above, the high-voltage power supply according to the comparative example does not have the function of quickly stabilizing the second DC voltage VDC2 at a set value even when the second DC voltage VDC2 fluctuates.

[0048] Figure 7 shows the load current I L7A and 7B are graphs showing an example of the behavior of the second DC voltage VDC2. As shown in (a) of FIG. 7A, in this example, the constant current source CS supplies a plurality of pulse-like load currents I L 1~I L 5 is applied at a predetermined time interval. The load current I L 1~I L 5 gradually increases in this order. For example, the load current I L 1 is 0.1mA, and the load current I L 2 is 0.3mA, and the load current I L 3 is 0.5mA, and the load current I L 4 is 1mA, and the load current I L 7(b), in the high-voltage power supply according to the comparative example, the second DC voltage VDC2 varies more from the value corresponding to the set voltage as the load current increases. L The amount of fluctuation is greatest when the supply of DC voltage VDC2 is stopped, and the maximum fluctuation ΔV at that time is, for example, 30 kV or more. In contrast, as shown in FIG. 7(c), in the high-voltage power supply 100, the fluctuation of the second DC voltage VDC2 from the value corresponding to the set voltage is suppressed even when the load current changes. The maximum fluctuation ΔV is, for example, within 1.5 kV. Therefore, the high-voltage power supply 100 can significantly suppress the fluctuation of the second DC voltage VDC2 from the value corresponding to the set voltage, compared to the high-voltage power supply according to the comparative example.

[0049] In the high-voltage power supply 100, by providing the full-wave rectifier circuit unit 3 immediately after the transformer 21, it is possible to generate the first DC voltage VDC1 while suppressing ripples by utilizing both half-waves of the AC voltage generated in the secondary winding 21b of the transformer 21. Furthermore, since the phases of the output voltages from the first half-wave rectifier CW circuit unit 10 and the second half-wave rectifier CW circuit unit 20 are opposite to each other, noises superimposed on the first series circuit unit 4 are canceled out. This makes it possible to generate the second DC voltage VDC2 while effectively suppressing ripples. In addition, in the full-wave rectifier circuit unit 3, a voltage is generated in the capacitor 36 due to the charge stored in the capacitor 36. The voltage generated in the capacitor 36 increases the first DC voltage VDC1 and the second DC voltage VDC2. When a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37 is instructed by the control unit 8 to charge the capacitor 36, thereby compensating for at least a part of the drop in the second DC voltage VDC2. This reduces the voltage drop and enables high voltage to be controlled quickly and stably.

[0050] The high-voltage power supply 100 further includes a detection unit 7 that generates an instruction voltage Vdrc, which is the difference between a detection voltage Vdet that indicates the magnitude of the second DC voltage VDC2 and a set voltage Vset for setting the magnitude of the second DC voltage VDC2. The control unit 8 outputs a pulse-on signal Spn1 to a charging circuit 37 at the timing when the instruction voltage Vdrc is detected, and the charging circuit 37 receives the pulse-on signal Spn1 and charges the capacitor 36. This allows the charging circuit 37 to reliably charge the capacitor 36 when a voltage drop occurs in the second DC voltage VDC2. This makes it possible to more appropriately compensate for at least a portion of the drop in the second DC voltage VDC2 and quickly stabilize the second DC voltage VDC2 at the set value.

[0051] The control unit 8 outputs a pulse drive wave Spw having a duty ratio according to the command voltage Vdrc to the charging circuit 37, and the charging circuit 37 adjusts the magnitude of the voltage generated in the capacitor 36 based on the magnitude of the duty ratio. Thus, by controlling the magnitude of the voltage generated in the capacitor 36 based on the magnitude of the duty ratio, it is possible to accurately compensate for the drop in the second DC voltage VDC2.

[0052] The high-voltage power supply 100 further includes an inverter circuit 12 that generates an AC voltage to be input to the primary winding 21a, and the control unit 8 drives the inverter circuit 12 with an inverter drive wave having a frequency lower than the frequency of the pulse drive wave Spw. This adjusts the amount of charge stored in the capacitor 36 at a cycle faster than the cycle for driving the inverter circuit 12 to adjust the magnitude of the second DC voltage VDC2. This makes it possible to compensate for the drop in the second DC voltage VDC2 faster than the change in the magnitude of the second DC voltage VDC2, thereby enabling more stable control of the second DC voltage VDC2.

[0053] The high-voltage power supply 100 further includes a capacitor 22 having the other electrode connected to the other end 21d of the secondary winding 21b via a resistor R3, and a capacitor 24 having the other electrode connected to one end 21c of the secondary winding 21b via a resistor R2. The charging circuit 37 includes: a switch element T1 including a control terminal T1a to which the pulse drive wave Spw is input, a first current terminal T1b connected to one electrode of the capacitor 22, and a second current terminal T1c; a switch element T2 including a control terminal T2a to which the pulse drive wave Spw is input, a first current terminal T2b connected to one electrode of the capacitor 24, and a second current terminal T2c; an inductor L1 including one end connected to the second current terminal T1c of the switch element T1 and the other end connected to one electrode of the capacitor 36; an inductor L2 including one end connected to the second current terminal T2c of the switch element T2 and the other end connected to one electrode of the capacitor 36; and a switch element T3 including a control terminal T3a to which the pulse-on signal Spn1 is input, a first current terminal T3b connected to one electrode of the capacitor 36, and a second current terminal T3c connected to the other electrode of the capacitor 36. According to this, the switching element T3 is turned on and off by the pulse-on signal Spn1, thereby enabling charging and discharging of the capacitor 36 with a simple configuration. Furthermore, a voltage obtained by smoothing the output wave of the switching element T1 with the inductor L1 and the capacitor 36 and a voltage obtained by smoothing the output wave of the switching element T2 with the inductor L2 and the capacitor 36 are added together to generate a charging voltage for the capacitor 36. This makes it possible to adjust the charging voltage according to the duty ratio of the pulse drive wave Spw with a simple configuration. [Variations]

[0054] The high-voltage power supply 100 of the present disclosure is not limited to the above-described embodiment, and various other modifications are possible. For example, the full-wave rectifier circuit unit 3 may be directly connected to both ends of the secondary winding 21b without the resistors R2 and R3. In the high-voltage power supply 100 according to the above-described embodiment, the control element 81 sets the duty ratio of the pulse drive wave Spw based on the command voltage Vdrc. Alternatively, the control element 81 may output the pulse drive wave Spw with a fixed duty ratio. In other words, the control element 81 does not need to change the duty ratio of the pulse drive wave Spw based on the command voltage Vdrc. For example, when the load current I L If the load current I L The amount of fluctuation of the second DC voltage VDC2 relative to the second DC voltage VDC2 may be measured, and the duty ratio of the pulsed driving wave Spw necessary to suppress the measured amount of fluctuation may be determined in advance. Then, the control element 81 may output the pulsed driving wave Spw with its duty ratio fixed to the determined duty ratio. By such control, the high-voltage power supply 100 can prevent fluctuations in the second DC voltage VDC2 in advance.

[0055] The high-voltage power supply may have a function (feed-forward control function) of forcibly reducing the second DC voltage VDC2. As shown in FIG. L As the load current I changes rapidly in a pulsed manner, it may be difficult to achieve optimal control using feedback control based on the duty ratio of the pulse drive wave Spw. In particular, when the constant current source CS changes the load state from a heavy load state to a no-load state, for example, L When the load current I LWhen the high-voltage power supply 100 transitions to a state where no current flows (a no-load state), an overvoltage (overshoot) may occur in the second DC voltage VDC2. This may result in a voltage withstand defect in the connected load, or, if the high-voltage power supply 100 is used to drive an X-ray tube, a high voltage exceeding a specified voltage may be generated. As a means to prevent these problems, a feedforward control function may be effective. FIG. 8 is a circuit diagram showing an example of a full-wave rectifier circuit section 3A of a boost rectifier circuit 1A in a high-voltage power supply 100A according to a first modification. The full-wave rectifier circuit section 3A differs from the full-wave rectifier circuit section 3 in the high-voltage power supply 100 in that the other electrode of the capacitor 31 is connected to a connection point CN6A and that one electrode of the capacitor 31 is connected to a connection point CN7A.

[0056] FIG. 9 illustrates an example of a control unit 8A in a high-voltage power supply 100A. A control element 81A of the control unit 8A differs from the control element 81 in that it further includes an output terminal 81d. A signal generating unit 82A differs from the signal generating unit 82 in that it further includes isolation elements 827 and 830, switch elements 828 and 831, and a NOT element 829. The input terminal of the NOT element 829 is connected to the output terminal 81d. The control terminal of the switch element 828 is connected to the output terminal 81d via the isolation element 827. The first current terminal of the switch element 828 is connected to the connection point CN6B, and the second current terminal of the switch element 828 is connected to the reference potential GND. The connection point CN6B is electrically connected to the connection point CN6A. The input terminal of the NOT element 829 is connected to the output terminal 81d. The output terminal of the NOT element 829 is connected to the control terminal of the switch element 831 via the isolation element 826. A first current terminal of the switch element 831 is connected to the connection point CN7B, and a second current terminal of the switch element 828 is connected to the reference potential GND. The connection point CN7B is electrically connected to the connection point CN7A.

[0057] The control element 81A outputs an adjustment signal Scn from the output terminal 81d. The control element 81A then inverts the polarity of the adjustment signal Scn at an arbitrary timing. The arbitrary timing is, for example, a timing when the user wants to forcibly reduce the second DC voltage VDC2. Specifically, when the load current I L Examples of timings for transitioning from a heavy load state to a no-load state while changing the second DC voltage VDC2 in a pulsed manner include the timing of transition from a heavy load state to a no-load state. When the second DC voltage VDC2 is not to be forcibly reduced, the control element 81A may set the adjustment signal Scn to Hi. In this case, the switch element 828 is turned on, thereby connecting the other electrode of the capacitor 31 to the reference potential GND. On the other hand, the NOT element 829 causes the adjustment signal Scn to be Low, so the switch element 831 is turned off. When the second DC voltage VDC2 is to be forcibly reduced, the control element 81A may set the adjustment signal Scn to Low. In this case, the switch element 828 is turned off. On the other hand, the NOT element 829 causes the adjustment signal Scn to be Hi, so the switch element 831 is turned on, so connecting one electrode of the capacitor 31 to the reference potential GND. That is, when the load state transitions from a heavy load state to a no-load state, the control element 81A connects one electrode of the capacitor 31 to the reference potential GND, and switches the other electrode of the capacitor 31 from the reference potential GND to an open state. As a result, the first DC voltage VDC1 does not include the DC voltage output from one electrode of the capacitor 31, but only includes the DC voltage generated in the capacitor 36. Therefore, the first DC voltage VDC1 and the second DC voltage VDC2 are reduced by the amount of the DC voltage output from one electrode of the capacitor 31. This suppresses overshoot of the second DC voltage VDC2. The load current I L After a certain time has passed since the load current I L This sequence is used to change the load current I L By repeating this in synchronization with the timing at which the voltage is changed into a pulsed state, stable driving with suppressed overshoot can be achieved.

[0058] FIG. 10 is a circuit diagram showing an example of a boost rectifier circuit 1B in a high-voltage power supply 100B according to a second modification. The boost rectifier circuit 1B differs from the boost rectifier circuit 1 in the configurations of a first series circuit unit 4A, a second series circuit unit 5A, and a third series circuit unit 6A. The first series circuit unit 4A is formed by a plurality of first capacitors connected alternately in series. In the example of FIG. 10, the first series circuit unit 4A has N1 capacitors Ce(1) to Ce(N1) as the plurality of first capacitors (the figure shows an example where N1=3). The second series circuit unit 5A is formed by a plurality of second capacitors connected in series. In the example of FIG. 10, the second series circuit unit 5A has N1 capacitors Cf(1) to Cf(N1) as the plurality of second capacitors. The third series circuit unit 6A is formed by a plurality of third capacitors connected in series. In the example of FIG. 10, the third series circuit section 6A has N1 capacitors Cg(1) to Cg(N1) as a plurality of third capacitors. The capacitors Ce(n) are connected to each other in series, and one end thereof is connected to one electrode of capacitor 36 (the fourth capacitor in the first series circuit section 4A). The capacitors Cf(n) are connected to each other in series, and one end thereof is connected to one end 21c of the secondary winding 21b via resistor R2. The capacitors Cg(n) are connected to each other in series, and one end thereof is connected to the other end 21d of the secondary winding 21b via resistor R3. The plurality of first capacitors of the first series circuit section 4A, the plurality of second capacitors of the second series circuit section 5A, and the plurality of third capacitors of the third series circuit section 6A constitute a full-wave rectifier boost circuit section 30.

[0059] The boost rectifier circuit 1B further includes 2N1 diodes De(1) to De(2N1) and 2N1 diodes Df(1) to Df(2N1). The cathodes of the odd-numbered diodes De(2m-1) are connected to one electrode of the capacitor Cf(n), and the anodes of the diodes De(2m-1) are connected to the other electrode of the capacitor Ce(n). The cathodes of the even-numbered diodes De(2m) are connected to one electrode of the capacitor Ce(n), and the anodes of the diodes De(2m) are connected to the other electrode of the capacitor Cf(n+1). However, the anode of the final-stage diode De(2N1) is connected to one electrode of the capacitor Cf(N1).

[0060] In addition, the cathode of the odd-numbered diode Df(2m-1) is connected to one electrode of the capacitor Cg(n), and the anode of the diode Df(2m-1) is connected to the other electrode of the capacitor Ce(n). The cathode of the even-numbered diode Df(2m) is connected to one electrode of the capacitor Ce(n), and the anode of the diode Df(2m) is connected to the other electrode of the capacitor Cg(n+1). However, the anode of the final-stage diode Df(2N1) is connected to one electrode of the capacitor Cg(N1).

[0061] In the high-voltage power supply 100B, in the full-wave rectifier circuit unit 3, a voltage is generated in the capacitor 36 due to the charge stored in the capacitor 36. The voltage generated in the capacitor 36 is added to the DC voltage output from one electrode of the capacitor 31 to generate the first DC voltage VDC1. In the full-wave rectifier boost circuit unit 30, the first DC voltage VDC1 is added to a DC voltage obtained by rectifying and boosting the AC voltage generated in the secondary winding 21b of the transformer 21 using both half-waves of the AC voltage. This generates the second DC voltage VDC2. In this case, for example, if a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37, instructed by the control unit 8, charges the capacitor 36, thereby compensating for at least a portion of the drop in the second DC voltage VDC2. This reduces the voltage drop, enabling fast and stable control of the second DC voltage VDC2.

[0062] 11 is a circuit diagram showing an example of a boost rectifier circuit 1C in a high-voltage power supply 100C according to a third modification. The boost rectifier circuit 1C differs from the boost rectifier circuit 1 in that it includes a diode D1 (first diode) and a diode D2 (second diode), in that it includes a first boost rectifier circuit unit instead of the configuration of the first series circuit unit 4 and the second series circuit unit 5, and in that it includes a second boost rectifier circuit unit instead of the third series circuit unit 6.

[0063] The cathode of the diode D1 is connected to one end 21c of the secondary winding 21b via a resistor R2. The anode of the diode D1 is connected to one electrode of a capacitor 36 (a fourth capacitor in the boost rectifier circuit 1C). The cathode of the diode D2 is connected to the other end 21d of the secondary winding 21b via a resistor R3. The anode of the diode D2 is connected to one electrode of the capacitor 36.

[0064] The first boost rectifier circuit 40 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The first boost rectifier circuit 40 is configured by combining multiple circuit sections including a second capacitor and a third diode, and performs first half-wave rectification and boosting of the AC voltage generated across the secondary winding 21b. The first boost rectifier circuit 40 is configured by a half-wave rectifier CW circuit.

[0065] Specifically, the first boost rectifier circuit unit 40 includes N2 (N2=5 in the example shown) capacitors Cj(1) to Cj(N2) (second capacitors) and diodes Dj(1) to Dj(N2) (third diodes). The even-numbered capacitors Cj(2m) are connected in series with one end connected to one end of the secondary winding 21b via a resistor R2. The odd-numbered capacitors Cj(2m-1) are connected in series with one end connected to the other end of the secondary winding 21b via a resistor R3. The cathode of the diode Dj(n) is connected to one electrode of the capacitor Cj(n), and the anode of the diode Dj(n) is connected to the other electrode of the capacitor Cj(n+1). The anode of the final-stage diode Dj(N2) is connected to one electrode of the capacitor Cj(N2-1). Furthermore, the diode Dj(2m) in the even-numbered stages is configured with two diodes connected in series in the forward direction. Similar to the high-voltage power supply 100 according to the embodiment, the resistors R2 and R3 are provided as, for example, damping resistors. Alternatively, the resistors R2 and R3 may be equivalent to the winding resistance of the secondary winding 21b of the transformer 21, expressed as a lumped constant. In this case, the resistors R2 and R3 do not need to be provided as external resistors.

[0066] That is, the first boost rectifier circuit unit 40 is configured by combining N2-stage circuit parts each including a capacitor Cj(n) and a diode Dj(n). As a result, a DC voltage VDC2a obtained by rectification and boosting is output from one electrode of the capacitor Cj(N2).

[0067] The second boost rectifier circuit unit 50 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The second boost rectifier circuit unit 50 is configured by combining multiple circuit sections including a third capacitor and a fourth diode, and rectifies and boosts another half-wave of the AC voltage generated across the secondary winding 21b, i.e., a second half-wave that is in opposite phase to the first half-wave (180° out of phase with respect to the first half-wave). The second boost rectifier circuit unit 50 of this embodiment is configured by a half-wave rectifier CW circuit, similar to the first boost rectifier circuit unit 40.

[0068] Specifically, the second boost rectifier circuit unit 50 has N2 capacitors Ck(1) to Ck(N2) (third capacitors) and multiple diodes Dk(1) to Dk(N2) (fourth diodes). The even-numbered capacitors Ck(2m) are connected in series with one another, and one end of the capacitors Ck(2m-1) is connected to the other end 21d of the secondary winding 21b via a resistor R3. The odd-numbered capacitors Ck(2m-1) are connected in series with one end of the capacitors Ck(n-1) is connected to the other end 21c of the secondary winding 21b. The cathode of Dk(n) is connected to one electrode of the capacitor Ck(n), and the anode of Dk(n) is connected to the other electrode of the capacitor Ck(n+1). However, the anode of the final-stage diode Dk(N2) is connected to one electrode of the capacitor Ck(N2-1). Moreover, the diode Dk(2m) in the even-numbered stage is composed of two diodes connected in series in the forward direction.

[0069] That is, the second boost rectifier circuit unit 50 is configured by combining N2-stage circuit parts each including a capacitor Ck(n) and a diode Dk(n). As a result, a DC voltage VDC2b obtained by rectification and boosting is output from one electrode of the capacitor Ck(N2).

[0070] The boost rectifier circuit 1C further includes a voltage synthesis unit 60. The voltage synthesis unit 60 synthesizes a DC voltage VDC2a output from the first boost rectifier circuit unit 40 and a DC voltage VDC2b output from the second boost rectifier circuit unit 50. The voltage synthesis unit 60 is composed of two diodes 60a and 60b. The anode of the diode 60a is connected to the output terminal of the first boost rectifier circuit unit 40 (one electrode of the capacitor Cj(N2)). The anode of the diode 60b is connected to the output terminal of the second boost rectifier circuit unit 50 (one electrode of the capacitor Ck(N2)). The cathode of the diode 60a and the cathode of the diode 60b are connected to each other at a connection point 61. With this configuration, the DC voltage VDC2a and the DC voltage VDC2b are combined and output from the connection point 61 as the second DC voltage VDC2, which is the output voltage of the boost rectifier circuit 1C.

[0071] Furthermore, in the boost rectifier circuit 1C, the first series circuit section 4B includes N35 (N3 is an integer equal to or greater than N2 / 2 and equal to or less than (N2 / 2+1)) capacitors Cm(1) to Cm(N3) (first capacitors) connected in series with one another. One end of the series circuit formed by the capacitors Cm(1) to Cm(N3) is connected to one electrode of the capacitor 36, and the other end is connected to a connection point 61 of the voltage synthesis section 60. Furthermore, between Cm(n) and Cm(n+1), there is connected a connection point between two diodes constituting the diode Dj(2m) of the even-numbered stage of the first boost rectifier circuit section 40 and a connection point between two diodes constituting the diode Dk(2m) of the even-numbered stage of the second boost rectifier circuit section 50.

[0072] In the high-voltage power supply 100C, in the full-wave rectifier circuit unit 3, a voltage is generated in the capacitor 36 due to the charge stored in the capacitor 36. The voltage generated in the capacitor 36 is added to the DC voltage output from one electrode of the capacitor 31 to form the first DC voltage VDC1, which in turn becomes the second DC voltage VDC2. When a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37, instructed by the control unit 8, charges the capacitor 36, thereby compensating for at least a portion of the drop in the second DC voltage VDC2. This reduces the voltage drop, enabling the second DC voltage VDC2 to be controlled quickly and stably. [Explanation of symbols]

[0073] 3, 3A...full-wave rectifier circuit section, 4, 4A, 4B...first series circuit section, 5, 5A...second series circuit section, 6, 6A...third series circuit section, 7...detection section, 8, 8A...control section, 10...first half-wave rectifier CW circuit section (first half-wave rectifier step-up circuit section), 20...second half-wave rectifier CW circuit section (second half-wave rectifier step-up circuit section), 12...inverter circuit, 21...transformer, 21b...secondary winding, 21a...primary winding, 21c...one end, 21d...other end, 22...capacitor (first rectifier capacitor), 24...capacitor (second rectifier capacitor), 30...full-wave Rectifier type boost circuit section, 31...capacitor (sixth capacitor), 36...capacitor (fifth capacitor), 36...capacitor (fourth capacitor in first series circuit section 4A), 36...capacitor (fourth capacitor in first series circuit section 4B), 37...charging circuit, 40...first boost rectifier circuit section, 50...second boost rectifier circuit section, 60...voltage synthesis section, 100, 100A, 100B, 100C...high voltage power supply, Cp(2), Cp(4), Cp(2N), Ce(1) to Ce(N1), Cm(1) to Cm(N3)...first capacitor Cq(2), Cq(4), Cq(2N), Cf(1) to Cf(N1), Cj(1) to Cj(N2)...second capacitor, Cp(1), Cp(3), Cp(2N+1), Cg(1) to Cg(N1), Ck(1) to Ck(N2)...third capacitor, Cq(1), Cq(3), Cq(2N-1)...(fourth capacitor in the first series circuit part 4), GND...reference potential, VDC1...first DC voltage, VDC2...second DC voltage, D1...diode (first diode), D2...diode (second diode), Dj(1) ~Dj(N2)...diode (third diode), Dk(1)~Dk...diode (N2) (fourth diode), L1...inductor (first inductor), L2...inductor (second inductor), Spw...pulse drive wave, Spn1...pulse-on signal, T1...switch element (first switch element), T2...switch element (second switch element), T3...switch element (third switch element), T1a, T2a, T3a...control terminal, T1b, T2b, T3b...first current terminal, T1c, T2c, T3c...second current terminal.

Claims

1. a transformer including a primary winding and a secondary winding, and inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding and configured to rectify an AC voltage generated in the secondary winding to generate a first DC voltage; a first series circuit portion formed by alternately connecting a plurality of first capacitors and a plurality of second capacitors in series; a second series circuit portion formed by connecting a plurality of third capacitors in series; a third series circuit portion formed by connecting a plurality of fourth capacitors in series; a control unit, The full-wave rectifier circuit unit is a fifth capacitor connected to one end of the first series circuit portion; a charging circuit that charges the fifth capacitor; one end of the second series circuit portion is connected to one end of the secondary winding, one end of the third series circuit unit is connected to the other end of the secondary winding, the third capacitor of the second series circuit unit and the first capacitor of the first series circuit unit constitute a first half-wave rectification type boost circuit unit, the fourth capacitor of the third series circuit unit and the second capacitor of the first series circuit unit form a second half-wave rectification type boost circuit unit, the first half-wave rectifier boost circuit unit rectifies and boosts the AC voltage generated in the secondary winding, the second half-wave rectifier boost circuit rectifies and boosts the AC voltage generated in the secondary winding in an opposite phase to that of the first half-wave rectifier boost circuit, an output voltage from the first half-wave rectifier boost circuit unit and an output voltage from the second half-wave rectifier boost circuit unit are added to the first DC voltage in the first series circuit unit to generate a second DC voltage; The control unit instructs the timing at which the charging circuit charges the fifth capacitor.

2. a detection unit that generates an indication voltage that is a difference between a detection voltage that indicates a magnitude of the second DC voltage and a set voltage that sets the magnitude of the second DC voltage, the control unit outputs a pulse-on signal to the charging circuit at the timing when the command voltage is detected; 2. The high-voltage power supply according to claim 1, wherein the charging circuit receives the pulse-on signal and charges the fifth capacitor.

3. the control unit outputs a pulse drive wave having a duty ratio corresponding to the instruction voltage to the charging circuit; 3. The high-voltage power supply according to claim 2, wherein said charging circuit adjusts the magnitude of the voltage generated in said fifth capacitor based on the magnitude of said duty ratio.

4. further comprising an inverter circuit that generates the AC voltage to be input to the primary winding; 4. The high-voltage power supply according to claim 3, wherein the control unit drives the inverter circuit with an inverter drive wave having a frequency lower than or equal to that of the pulse drive wave.

5. a first rectifying capacitor having the other electrode connected to the other end of the secondary winding, and a second rectifying capacitor having the other electrode connected to one end of the secondary winding, The charging circuit a first switch element including a control terminal to which the pulse drive wave is input, a first current terminal connected to one electrode of the first rectifying capacitor, and a second current terminal; a second switch element including a control terminal to which the pulse drive wave is input, a first current terminal connected to one electrode of the second rectifier capacitor, and a second current terminal; a first inductor having one end connected to the second current terminal of the first switch element and the other end connected to one electrode of the fifth capacitor; a second inductor having one end connected to the second current terminal of the second switch element and the other end connected to the one electrode of the fifth capacitor; a third switch element including a control terminal to which the pulse-on signal is input, a first current terminal connected to one electrode of the fifth capacitor, and a second current terminal connected to the other electrode of the fifth capacitor.

6. the full-wave rectifier circuit unit further includes a sixth capacitor having one electrode connected to one of the electrodes of the fifth capacitor opposite to the electrode connected to the first series circuit unit, and the other electrode connected to a reference potential; 2. The high-voltage power supply according to claim 1, wherein the control unit connects the one electrode to the reference potential and switches the other electrode from the reference potential to an open state when a state of a load connected to the other end of the first series circuit unit transitions from a heavy load state to a no-load state.

7. a transformer including a primary winding and a secondary winding, and inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding and configured to rectify an AC voltage generated in the secondary winding to generate a first DC voltage; a first series circuit portion formed by connecting a plurality of first capacitors in series; a second series circuit portion formed by connecting a plurality of second capacitors in series; a third series circuit portion formed by connecting a plurality of third capacitors in series; a control unit, The full-wave rectifier circuit unit is a fourth capacitor connected to one end of the first series circuit portion; a charging circuit that charges the fourth capacitor; one end of the second series circuit portion is connected to one end of the secondary winding, one end of the third series circuit unit is connected to the other end of the secondary winding, the plurality of first capacitors of the first series circuit section, the plurality of second capacitors of the second series circuit section, and the plurality of third capacitors of the third series circuit section constitute a full-wave rectification boost circuit section, The control unit instructs the timing at which the charging circuit charges the fourth capacitor.

8. a transformer including a primary winding and a secondary winding, and inputting an AC voltage to the primary winding; a full-wave rectifier circuit unit connected to the secondary winding and configured to rectify an AC voltage generated in the secondary winding to generate a first DC voltage; a first series circuit portion formed by connecting a plurality of first capacitors in series; a first diode connected between one end of the secondary winding of the transformer and one end of the first series circuit portion; a second diode connected between the other end of the secondary winding and the one end of the first series circuit portion; a first boost rectifier circuit unit connected to the secondary winding, the first boost rectifier circuit unit being configured by combining a plurality of stages of circuit units each including a second capacitor and a third diode, to rectify and boost the AC voltage generated in the secondary winding; a second boost rectifier circuit unit connected to the secondary winding, the second boost rectifier circuit unit being configured by combining a plurality of circuit units including a third capacitor and a fourth diode, to rectify and boost the AC voltage generated in the secondary winding in an opposite phase to that of the first boost rectifier circuit unit; a voltage synthesis unit that synthesizes an output voltage from the first boost rectifier circuit unit, an output voltage from the second boost rectifier circuit unit, and the first DC voltage to generate a second DC voltage; a control unit, The full-wave rectifier circuit unit is a fourth capacitor connected to the one end of the first series circuit portion; a charging circuit that charges the fourth capacitor; The control unit instructs the timing at which the charging circuit charges the fourth capacitor.

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