combiner

Abstract

A multiplexer (1) comprises impedance transformers (ZC1, ZC2). The impedance transformer (ZC1) is constituted by: a transmission line (L14) having a length of λ / 4 (where λ is the wavelength of a signal in the transmission line) and a characteristic impedance of 35 Ω; and a transmission line (L15) having a length of λ / 4 and a characteristic impedance of 70 Ω. The impedance transformer (ZC2) is constituted by: a transmission line (L16) having a length of λ / 4 and a characteristic impedance of 35 Ω; and a transmission line (L17) having a length of λ / 4 and a characteristic impedance of 70 Ω.

Description

[Technical Field]

[0001] The present invention relates to a multiplexer that is applied to a power amplifier or the like. [Background technology]

[0002] Among the circuits that make up a wireless communication transceiver, a power amplifier (PA) plays an important role in the transmitter, amplifying the signal strength to a required level. To increase the speed and distance of wireless communication, PAs are required to have a wide bandwidth and high output power. A commonly used PA configuration that achieves high output power while maintaining a wide bandwidth is one in which unit cells 100, each made up of transistors with low parasitic capacitance, are connected in parallel, as shown in Figure 11, and the signals are combined in phase by a power combiner 101 after the final stage (see Non-Patent Document 1).

[0003] As the configuration of multiplexer 101, a Wilkinson combiner (WC) configuration as shown in FIG. 12 is generally used (see Non-Patent Document 2). However, when using a conventional multiplexer in a high-frequency PA, there is a problem in that the output power of the PA is reduced due to the large loss in the WC. The reason for this is explained below.

[0004] 12 shows the configuration of a 4:1 multiplexer 101 when the final stage of the PA is configured with four unit cells 100 connected in parallel. In this example, 2:1 multiplexing must be performed twice. Therefore, between the unit cells 100 and the output OUT of the PA, the signal must pass through two WC1000 and WC1002, or two WC1001 and WC1002.

[0005] Each WC1000-1002 consists of two 70-Ω transmission lines L1 and L2 with a length of λ / 4 (λ is the wavelength of the signal in the transmission line) and a 100-Ω resistor R1 placed between the transmission lines L1 and L2. Resistor R1 must be placed close to the two transmission lines L1 and L2 to prevent degradation of the transmission characteristics. However, because the four unit cells 100 in the final stage of the PA are physically separated in the parallelization direction (the vertical direction in Figure 12), additional 50-Ω transmission lines L3-L8 extending vertically must be placed to combine the outputs of these unit cells 100. The transmission lines L1 and L2 do not contribute to the vertical wiring. Therefore, the total length of the RF (Radio Frequency) line of 4:1 multiplexer 101 becomes longer by the length of the transmission lines of the two WCs (WC1000 and WC1002, or WC1001 and WC1002), resulting in increased loss. [Prior art documents] [Non-patent literature]

[0006] [Non-Patent Document 1] Z.Griffith, M.Urteaga, P.Rowell and R.Pierson, “A 227.5GHz InP HBT SSPA MMIC with 101mW Pout at 14.0dB Compressed Gain and 4.04% PAE”, 2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS),2013,pp.1-4,doi:10.1109 / CSICS.2013.6659190 [Non-patent document 2] K. Kim and C. Nguyen, “A V-Band Power Amplifier With Integrated Wilkinson Power Dividers-Combiners and Transformers in 0.18-μm SiGe BiCMOS”, in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 3, pp. 337-341, March 2019,doi:10.1109 / TCSII.2018.2850899 Summary of the Invention [Problem to be solved by the invention]

[0007] The present invention has been made to solve the above problems, and has an object to provide a broadband and low-loss multiplexer. [Means for solving the problem]

[0008] The multiplexer of the present invention comprises: a first transmission line having a characteristic impedance of 50 Ω, one end of which is connected to the first input terminal and the other end of which is connected to the first junction; a second transmission line having a characteristic impedance of 50 Ω, one end of which is connected to the second input terminal and the other end of which is connected to the first junction; a third transmission line having a characteristic impedance of 50 Ω, one end of which is connected to the third input terminal and the other end of which is connected to the second junction; a fourth transmission line having a characteristic impedance of 50 Ω, one end of which is connected to the fourth input terminal and the other end of which is connected to the second junction; a first impedance converter having one end connected to the first junction and the other end connected to an output terminal of the multiplexer; The aforementioned a second impedance converter having one end connected to the second junction and the other end connected to the output terminal, the first impedance converter having a length of λ / 4 (λ is the wavelength in the transmission line of the signal input to the first to fourth input terminals) and a characteristic impedance of 35Ω, one end of which is connected to the first junction; 5 a transmission line having one end connected to the 5 The other end of the transmission line is connected to the output terminal. The first 6 The second impedance converter is a first transmission line having a length of λ / 4 and a characteristic impedance of 35Ω, one end of which is connected to the second junction. 7 a transmission line having one end connected to the 7 The other end of the transmission line is connected to the output terminal. The first 8and a transmission line. [Effects of the Invention]

[0009] According to the present invention, a first impedance converter and a second impedance converter are provided, the first impedance converter consisting of a first transmission line with a length of λ / 4 and a characteristic impedance of 35Ω and a second transmission line with a length of λ / 4 and a characteristic impedance of 70Ω, and the second impedance converter consisting of a third transmission line with a length of λ / 4 and a characteristic impedance of 35Ω and a fourth transmission line with a length of λ / 4 and a characteristic impedance of 70Ω. This shortens the total length of the RF line compared to when a conventional Wilkinson combiner is used, enabling signal multiplexing over a wide bandwidth with low loss. As a result, applying the multiplexer of the present invention to a power amplifier can improve the output power of the power amplifier. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a circuit diagram showing the configuration of a 4:1 multiplexer according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a diagram showing a simulation result of the transmission loss of the 4:1 multiplexer according to the first embodiment of the present invention. [Figure 3] FIG. 3 is a circuit diagram showing the configuration of a conventional 4:1 multiplexer. [Figure 4] FIG. 4 is a diagram showing a simulation result of the return loss of the 4:1 multiplexer according to the first embodiment of the present invention. [Figure 5] FIG. 5 is a diagram showing a simulation result of the isolation of the 4:1 multiplexer according to the first embodiment of the present invention. [Figure 6] FIG. 6 is a plan view schematically showing the configuration of a 4:1 multiplexer according to a second embodiment of the present invention. [Figure 7] FIG. 7 is a cross-sectional view of a transmission line of a 4:1 multiplexer according to a second embodiment of the present invention. [Figure 8]FIG. 8 is a plan view schematically showing the configuration of a 4:1 multiplexer according to a third embodiment of the present invention. [Figure 9A-9B] 9A and 9B are diagrams showing the electric field distribution between ports when there is no through via and when there is a through via. [Figure 10] FIG. 10 is a diagram showing the simulation results of the intensity of the substrate mode signal. [Figure 11] FIG. 11 is a block diagram showing the configuration of a conventional power amplifier. [Figure 12] FIG. 12 is a circuit diagram showing the configuration of a conventional 4:1 multiplexer. DETAILED DESCRIPTION OF THE INVENTION

[0011] [First Example] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a circuit diagram showing the configuration of a 4:1 multiplexer according to a first embodiment of the present invention. The connection topology of the unit cells of the PA is the same as the configuration shown in Fig. 11. Fig. 1 shows only four unit cells 100-1 to 100-4 in the final stage of the PA. The output impedance of each of the unit cells 100-1 to 100-4 is 50Ω.

[0012] The 4:1 multiplexer 1 includes a transmission line L10 having a characteristic impedance of 50 Ω, one end of which is connected to the first input terminal of the multiplexer 1 (the output terminal of the first unit cell 100-1), a transmission line L11 having a characteristic impedance of 50 Ω, one end of which is connected to the second input terminal of the multiplexer 1 (the output terminal of the second unit cell 100-2) and the other end of which is connected to the other end of the transmission line L10, a transmission line L12 having a characteristic impedance of 50 Ω, one end of which is connected to the third input terminal of the multiplexer 1 (the output terminal of the third unit cell 100-3), and a 1 is a load connected to the output terminal of the multiplexer 1. The multiplexer 1 is configured with a transmission line L13 having a characteristic impedance of 50 Ω, one end of which is connected to the fourth input terminal of the multiplexer 1 (the output terminal of the fourth unit cell 100-4) and the other end of which is connected to the other end of the transmission line L12, an impedance converter ZC1 having one end connected to the junction (first junction) of the transmission lines L10 and L11 and the other end connected to the output terminal of the multiplexer 1, and an impedance converter ZC2 having one end connected to the junction (second junction) of the transmission lines L12 and L13 and the other end connected to the output terminal of the multiplexer 1. RL in FIG. 1 is a load connected to the output terminal of the multiplexer 1.

[0013] The impedance converter ZC1 is composed of a transmission line L14 having a length of λ / 4 (λ is the wavelength in the transmission line of the signals input to the first to fourth input terminals) and a characteristic impedance of 35 Ω, one end of which is connected to the connection point of the transmission lines L10 and L11, and a transmission line L15 having a length of λ / 4 and a characteristic impedance of 70 Ω, one end of which is connected to the other end of the transmission line L14 and the other end of which is connected to the output terminal of the multiplexer 1.

[0014] The impedance converter ZC2 is composed of a transmission line L16 having a length of λ / 4 and a characteristic impedance of 35 Ω, one end of which is connected to the connection point of the transmission lines L12 and L13, and a transmission line L17 having a length of λ / 4 and a characteristic impedance of 70 Ω, one end of which is connected to the other end of the transmission line L16 and the other end of which is connected to the output terminal of the multiplexer 1.

[0015] By using the 4:1 multiplexer 1 of this embodiment, the total length of the RF line is shorter than that using the conventional WC, making it possible to multiplex with low loss and improve the output power of the PA.

[0016] Figure 2 shows the simulation results for the transmission loss of the 4:1 multiplexer 1. For comparison, the simulation results for other 4:1 multiplexers are also shown. TR0 indicates the ideal transmission loss. TR1 indicates the transmission loss of the 4:1 multiplexer 1, TR2 indicates the transmission loss of the conventional 4:1 multiplexer 101 shown in Figure 12, and TR3 indicates the transmission loss of the 4:1 multiplexer 102 shown in Figure 3. The 4:1 multiplexer 102 is composed of transmission lines L20 to L25 with a characteristic impedance of 50 Ω.

[0017] 2, it can be seen that the 4:1 multiplexer 1 of this embodiment has the lowest loss. The reason why the 4:1 multiplexer 102, which does not use an impedance converter, has a larger loss than the 4:1 multiplexer 101 is because of the larger return loss.

[0018] Fig. 4 shows the simulation results of the return loss seen from the output terminal of the 4:1 multiplexers 1, 101, and 102. RE1 indicates the return loss of the 4:1 multiplexer 1, RE2 indicates the return loss of the 4:1 multiplexer 101, and RE3 indicates the return loss of the 4:1 multiplexer 102. Fig. 4 shows that by using the 4:1 multiplexer 1 of this embodiment, it is possible to achieve a wide bandwidth and low return loss.

[0019] 5 shows the simulation results of the isolation between the input terminals (coupling characteristics between adjacent input terminals) of the 4:1 multiplexers 1, 101, and 102. CO1 indicates the isolation of the 4:1 multiplexer 1, CO2 indicates the isolation of the 4:1 multiplexer 101, and CO3 indicates the isolation of the 4:1 multiplexer 102. The 4:1 multiplexer 1 of this embodiment has inferior isolation to the 4:1 multiplexer 101, but can achieve better isolation results than the 4:1 multiplexer 102.

[0020] [Second Example] In the 4:1 multiplexer 1 shown in the first embodiment, it is desirable to configure each of the transmission lines L10 to L17 with a coplanar waveguide (CPW), because this is less susceptible to variations in chip substrate thickness and allows the signal line width to be increased, thereby achieving multiplexing with low loss.

[0021] On the other hand, the ground of the transmission line located on the inside in the parallel connection direction of the unit cells (vertical direction in Figure 1) tends to be thinner and weaker than the ground of the transmission line located on the outside. This means that the impedance of the transmission line on the outside and inside may not be the same. As a result, there is a problem that it is no longer possible to combine waves in phase, which increases loss.

[0022] Therefore, in this embodiment, by densely arranging through silicon vias (TSVs) 2 that connect the ground conductors on the surface of the chip with the ground conductors on the backside of the chip as shown in Figure 6, the ground of the transmission lines at the inner position can be strengthened, thereby enabling low-loss multiplexing.

[0023] While Fig. 6 simply shows the planar configuration of the 4:1 multiplexer 1, for example, the cross-sectional structure of the transmission line L15 is as shown in Fig. 7. The 4:1 multiplexer 1 is formed on the same semiconductor substrate 10 as the PA. The transmission line L15 is composed of a signal line 11 formed on the surface of the semiconductor substrate 10, ground conductors 12 formed on both outer sides of the signal line 11 on the surface of the semiconductor substrate 10 along the propagation direction of the signal propagating through the signal line 11, and a ground conductor 13 formed on the back surface of the semiconductor substrate 10. The TSV2 is formed to penetrate the semiconductor substrate 10 and connect the ground conductors 12 and 13.

[0024] In FIG. 7, the transmission line L15 is taken as an example for explanation, but the other transmission lines L10 to L14, L16, and L17 have the same configuration as the transmission line L15. By providing a large number of TSVs 2 in the 4:1 multiplexer 1 as in this embodiment, it becomes possible to block substrate mode signals that leak from the output to the input, which has the secondary effect of suppressing PA oscillation and improving frequency ripple.

[0025] [Third Example] In the second embodiment, as shown in Figure 8, by setting the spacing between TSVs 2 within the plane of the semiconductor substrate 10 (on the paper surface of Figure 8) to 1 / 7 of the in-substrate wavelength λ2 of the signal, it is possible to significantly suppress leakage of substrate mode signals. For example, when an InP substrate (dielectric constant = 12) is used as the semiconductor substrate 10, the in-substrate wavelength λ2 of a 300 GHz signal is 0.3 mm. Since the length of 1 / 7 of the in-substrate wavelength λ2 is 43 µm, the spacing between TSVs 2 should be set to 43 µm or less.

[0026] 9A shows the electric field distribution between ports P1 and P2 when there are no TSVs, and FIG. 9B shows the electric field distribution between ports P1 and P2 when TSVs are arranged at 40 μm intervals. FIG. 10 shows the results of simulating the strength of substrate mode signals for the cases of FIGS. 9A and 9B. In the examples of FIGS. 9A, 9B, and 10, the thickness of semiconductor substrate 10 made of InP is 600 μm, and the thickness of conductor 14 formed on the surface of semiconductor substrate 10 is 50 μm.

[0027] 9A and 9B, dark areas on the surface of semiconductor substrate 10 indicate low electric field strength, and bright areas indicate high electric field strength. Also, in Fig. 10, S0 indicates the strength of the substrate mode signal when there is no TSV2, and S1 indicates the strength of the substrate mode signal when TSV2 is provided. It can be seen from Figs. 9A, 9B, and 10 that the propagation of the substrate mode signal can be significantly suppressed by providing TSV2 spaced 40 μm apart.

[0028] Some or all of the above embodiments can be described as, but are not limited to, the following supplementary notes.

[0029] (Note 1) A multiplexer includes a first impedance converter having one end connected to a first junction of a signal input to a first input terminal and a signal input to a second input terminal, and the other end connected to an output terminal of a multiplexer, and a second impedance converter having one end connected to a second junction of a signal input to a third input terminal and a signal input to a fourth input terminal, and the other end connected to the output terminal, and the first impedance converter has a length λ / 4 (λ is the propagation length of the signals input to the first to fourth input terminals) connected to the first junction. The second impedance converter is composed of a first transmission line having a length of λ / 4 and a characteristic impedance of 35 Ω, one end of which is connected to the other end of the first transmission line and the other end of which is connected to the output terminal, and a second transmission line having a length of λ / 4 and a characteristic impedance of 70 Ω, one end of which is connected to the second junction, and a fourth transmission line having a length of λ / 4 and a characteristic impedance of 70 Ω, one end of which is connected to the other end of the third transmission line and the other end of which is connected to the output terminal.

[0030] (Supplementary Note 2) The multiplexer according to Supplementary Note 1 further comprises a fifth transmission line having a characteristic impedance of 50 Ω, one end connected to the first input terminal and the other end connected to the first junction; a sixth transmission line having a characteristic impedance of 50 Ω, one end connected to the second input terminal and the other end connected to the first junction; a seventh transmission line having a characteristic impedance of 50 Ω, one end connected to the third input terminal and the other end connected to the second junction; and an eighth transmission line having a characteristic impedance of 50 Ω, one end connected to the fourth input terminal and the other end connected to the second junction.

[0031] (Supplementary Note 3) In the multiplexer described in Supplementary Note 2, the first to eighth transmission lines are each composed of a coplanar line, and each coplanar line is composed of a signal line formed on a surface of a substrate, a first ground conductor formed around the signal line on the surface of the substrate, and a second ground conductor formed on a back surface of the substrate, and the first ground conductor and the second ground conductor are connected by a through via that penetrates the substrate.

[0032] (Supplementary Note 4) In the multiplexer according to Supplementary Note 3, the spacing between the through vias within the plane of the substrate is λ2 / 7 or less (λ2 is the wavelength within the substrate of the signals input to the first to fourth input terminals). [Industrial Applicability]

[0033] The present invention can be applied to a technique for multiplexing high-frequency signals. [Explanation of symbols]

[0034] 1...4:1 multiplexer, 2...through via, 10...semiconductor substrate, 11...signal line, 12, 13...ground conductor, 100, 100-1 to 100-4...unit cell, L10 to L17...transmission line, ZC1, ZC2...impedance converter.

Claims

1. A first transmission line having a characteristic impedance of 50 Ω, one end of which is connected to a first input terminal and the other end of which is connected to a first junction; a second transmission line having a characteristic impedance of 50Ω, one end of which is connected to the second input terminal and the other end of which is connected to the first junction; a third transmission line having a characteristic impedance of 50 Ω, one end of which is connected to the third input terminal and the other end of which is connected to the second junction; a fourth transmission line having a characteristic impedance of 50Ω, one end of which is connected to the fourth input terminal and the other end of which is connected to the second junction; a first impedance converter having one end connected to the first junction and the other end connected to an output terminal of the multiplexer; a second impedance converter having one end connected to the second junction and the other end connected to the output terminal; The first impedance converter includes: a fifth transmission line having a length of λ / 4 (λ is the wavelength in the transmission line of the signals input to the first to fourth input terminals) and a characteristic impedance of 35Ω, one end of which is connected to the first junction; a sixth transmission line having a length of λ / 4 and a characteristic impedance of 70Ω, one end of which is connected to the other end of the fifth transmission line and the other end of which is connected to the output terminal; The second impedance converter includes: a seventh transmission line having a length of λ / 4 and a characteristic impedance of 35Ω, one end of which is connected to the second junction; an eighth transmission line having a length of λ / 4 and a characteristic impedance of 70 Ω, one end of which is connected to the other end of the seventh transmission line and the other end of which is connected to the output terminal.

2. 2. The multiplexer according to claim 1, the first to eighth transmission lines are each formed by a coplanar line, Each coplanar line is a signal line formed on a surface of the substrate; a first ground conductor formed around the signal line on the surface of the substrate; a second ground conductor formed on the rear surface of the substrate; A multiplexer, characterized in that the first ground conductor and the second ground conductor are connected by a through via that penetrates the substrate.

3. 3. The multiplexer according to claim 2, The spacing between the through vias in the plane of the substrate is λ ２ / 7(λ ２ is equal to or less than the wavelength within the substrate of the signals input to the first to fourth input terminals.

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