Wafer mounting table

The horizontally placed coil or perforated cylinder in the ceramic base of the wafer mounting table addresses the issue of non-uniform heating by reducing heat generation and improving thermal uniformity and structural integrity, ensuring efficient electrical connectivity.

JP7783391B2Active Publication Date: 2025-12-09NGK CORP
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Patent Information

Application Number
JP2024207304
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-11-28
Publication Date
2025-12-09
Estimated Expiration
2041-12-13

AI Technical Summary

Technical Problem

Conventional wafer mounting tables using zigzag metal meshes or vertically placed coils for conductive paths result in longer conduction paths, leading to increased heat generation and non-uniform heating of wafers.

Method used

The use of a horizontally placed coil or perforated cylindrical conductive portion within the ceramic base to connect first and second conductive layers, reducing the conduction path length and minimizing heat generation, while ensuring electrical continuity and structural integrity.

Benefits of technology

This configuration enhances thermal uniformity of the wafer by reducing heat generation and improving the strength and density uniformity of the ceramic base, facilitating better electrical connectivity.

✦ Generated by Eureka AI based on patent content.

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Abstract

To improve a uniform temperature property of a wafer placed on a wafer mounting table in which a first conductive layer and a second conductive layer located at different heights are brought into electric conduction via a conducting part.SOLUTION: Inside a ceramic substrate 12 having a wafer mounting surface 12a, a wafer mounting table 10 has a sub-RF electrode 21 (a first conductive layer) and a jumper layer 22 (a second conductive layer) embedded at different heights. The wafer mounting table also has a conducting part 30 which brings the sub-RF electrode 21 into electric conduction with the jumper layer 22. The conducting part 30 is a horizontally placed coil or a hollow cylindrical body.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present invention relates to a wafer stage. [Background technology]

[0002] Conventionally, wafer mounting tables used for processing wafers have been known. Examples of wafer mounting tables include ceramic heaters, electrostatic chucks, and susceptors (with built-in electrodes for generating plasma). For example, Patent Document 1 discloses such a wafer mounting table in which, within a ceramic base having a wafer mounting surface, a disk-shaped first electrode and a ring-shaped second electrode having an outer diameter larger than that of the first electrode are embedded parallel to the wafer mounting surface, from the side closest to the wafer mounting surface. The first electrode and the second electrode are electrically connected via a conductive portion. Patent Document 1 also discloses examples in which a zigzag-bent metal mesh and a vertically oriented coil are used as the conductive portion. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-163259 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when a zigzag metal mesh or a vertically placed coil is used as the conductive part, the conduction path of the conductive part becomes much longer than the distance between the first and second electrodes, which makes the conductive part more susceptible to heat generation and can have a negative impact on the uniform heating of the wafer.

[0005] The present invention has been made to solve such problems, and its main purpose is to improve the thermal uniformity of the wafer on a wafer mounting table in which first and second conductive layers of different heights are connected via a conductive portion. [Means for solving the problem]

[0006] The wafer mounting table of the present invention comprises: A wafer mounting table including a ceramic base having a wafer mounting surface, a first conductive layer and a second conductive layer embedded at different heights inside the ceramic base, and a conductive portion electrically connecting the first conductive layer and the second conductive layer, The conductive portion is a horizontally placed coil or a perforated cylindrical body. It is something.

[0007] In this wafer mounting table, the conductive portion is a horizontally placed coil or a perforated cylinder. Therefore, the conduction path of the conductive portion is closer to the distance between the first conductive layer and the second conductive layer than when a zigzag bent metal mesh or a vertically placed coil is used as the conductive portion. This reduces heat generation in the conductive portion, thereby improving the thermal uniformity of the wafer. Examples of the perforated cylinder include a punched metal cylinder and a metal mesh cylinder.

[0008] In the wafer stage of the present invention, the material of the ceramic base may fill the internal space of the conductive portion, thereby reducing density variations in the ceramic base and increasing its strength.

[0009] In the wafer mounting table of the present invention, the cross-sectional shape of the conductive portion may be circular or elliptical, so that even if compressive forces are applied to the conductive portion from above and below during the manufacturing process, the conductive portion can absorb the forces.

[0010] In the wafer mounting table of the present invention, the conductive portion may be a coil, and at least one of the first conductive layer and the second conductive layer may have a hole penetrating in the thickness direction, and the coil may fit into the hole so that the inner surface of the hole contacts the side surface of the coil. This increases the contact area compared to when the coil is in point contact with each conductive layer, making it easier to ensure conductivity.

[0011] In the wafer mounting table of the present invention, the second conductive layer may be a linear or rectangular conductive layer that intersects with the first conductive layer in a plan view, and the axis of the conductive portion may be a straight line extending in the direction in which the second conductive layer extends. This allows the length of the conductive portion to be relatively long, making it easier to ensure electrical continuity between the first and second conductive layers.

[0012] In the wafer mounting table of the present invention, the second conductive layer may be an annular or fan-shaped conductive layer that overlaps the first conductive layer in a plan view, and the axis of the conductive portion may be an arc that is concentric with the second conductive layer. This allows the length of the conductive portion to be relatively long, making it easier to ensure electrical continuity between the first and second conductive layers. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. [Figure 2] Cross section AA of Figure 1. [Figure 3] FIG. 3 is a side view of the conductive portion 30 and its surroundings. [Figure 4] View B of Figure 3. [Figure 5] 3A to 3C are explanatory views showing the manufacturing process of the wafer mounting table 10. [Figure 6] 3A and 3B are explanatory diagrams illustrating an example of use of the wafer mounting table 10. [Figure 7] FIG. [Figure 8] Cross section CC of Figure 7. [Figure 9] FIG. 2 is a plan view of a conductive portion 130 and its surroundings. [Figure 10] View from D in Figure 9. [Figure 11] FIG. 10 is an explanatory diagram showing a modified example of the first embodiment. [Figure 12] FIG. 10 is an explanatory diagram showing a modified example of the first embodiment. [Figure 13] FIG. 10 is an explanatory diagram showing a modified example of the first embodiment. [Figure 14] FIG. 3 is an explanatory diagram of a wafer mounting table 310. [Figure 15] FIG. 4 is an explanatory diagram of a wafer mounting table 410. [Figure 16] FIG. 5 is an explanatory diagram of a wafer mounting table 510. [Figure 17] FIG. 6 is an explanatory diagram of a wafer mounting table 610. [Figure 18] FIG. DETAILED DESCRIPTION OF THE INVENTION

[0014] [First embodiment] A first embodiment of the present invention will be described below with reference to the drawings. Fig. 1 is a plan view of the wafer mounting table 10, Fig. 2 is a cross-sectional view taken along line AA in Fig. 1, Fig. 3 is a side view of the conductive portion 30 and its periphery, and Fig. 4 is a view viewed from the direction B in Fig. 3. In this specification, "upper" and "lower" do not represent absolute positional relationships, but rather relative positional relationships. Therefore, depending on the orientation of the wafer mounting table 10, "upper" and "lower" may become "lower" and "upper," "left" and "right," or "front" and "rear."

[0015] The wafer mounting table 10 is used to perform CVD, etching, etc. on a wafer using plasma, and is placed in a semiconductor process chamber (not shown). The wafer mounting table 10 includes a ceramic base 12 and includes a main RF electrode 20, a sub-RF electrode 21, a jumper layer 22, and a conductive portion 30 inside the ceramic base 12.

[0016] The ceramic substrate 12 is a disk-shaped plate made of a ceramic material such as aluminum nitride, silicon carbide, silicon nitride, or aluminum oxide. The ceramic substrate 12 has a circular wafer-mounting surface 12a and a back surface 12b opposite the wafer-mounting surface 12a. A circular main RF electrode 20 and an annular sub-RF electrode 21 are concentrically arranged on the same plane inside the ceramic substrate 12. A rectangular jumper layer 22 is arranged inside the ceramic substrate 12 on a surface different from the plane on which the main RF electrode 20 and the sub-RF electrode 21 are arranged. The wafer-mounting surface 12a has a plurality of concave and convex portions formed by embossing (not shown). A heat-conducting gas (e.g., He gas) is supplied from the back surface 12b through a gas supply path (not shown) between the recesses provided in the wafer-mounting surface 12a and the wafer placed on the wafer-mounting surface 12a.

[0017] The main RF electrode 20 is a circular electrode concentric with the ceramic substrate 12, and is disposed so as to face the wafer mounting surface 12a and be parallel to it. "Parallel" includes not only perfect parallelism but also parallelism within an allowable range (e.g., tolerance) (the same applies below). The main RF electrode 20 is an electrode whose main component is Mo, Nb, W, Ta, carbides thereof, or a high-melting-point composite metal containing two or more of these elements, and is formed of a metal mesh, punched metal, or metal plate. The "main component" refers to the component with the highest content (the same applies below). An RF voltage is applied between the main RF electrode 20 and an upper electrode (a showerhead 90, described later) when generating plasma in the space above the central region of a wafer mounted on the wafer mounting surface 12a. The main RF electrode 20 is connected to a power feed rod 20a inserted into the back surface 12b of the ceramic substrate 12. The power feed rod 20a is positioned so as not to come into contact with the jumper layer 22.

[0018] The sub-RF electrode 21 is an annular electrode having an outer diameter larger than that of the main RF electrode 20 and concentric with the ceramic base 12. A gap is provided between the inner peripheral edge of the sub-RF electrode 21 and the outer peripheral edge of the main RF electrode 20. The sub-RF electrode 21 is made of the same material as the main RF electrode 20, such as a metal mesh, a punched metal, or a metal plate. An RF voltage is applied between the sub-RF electrode 21 and an upper electrode (a shower head 90 described later) when plasma is generated in the space above the outer peripheral region of a wafer placed on the wafer-mounting surface 12a.

[0019] The jumper layer 22 is a rectangular, planar conductive layer extending in the diameter direction of the ceramic substrate 12. The jumper layer 22 is formed of the same material as the main RF electrode 20, such as a metal mesh, punched metal, or metal plate. The jumper layer 22 is connected to a power feed rod 22a inserted into the back surface 12b of the ceramic substrate 12.

[0020] The conductive portion 30 is a member that electrically connects the sub-RF electrode 21 and the jumper layer 22, and is provided at two locations where the sub-RF electrode 21 and the jumper layer 22 overlap in a plan view. The conductive portion 30 is a horizontally placed coil. A horizontally placed coil means that the axis of the coil is oriented horizontally (the same applies hereinafter). Horizontal includes not only completely horizontal but also horizontal within an allowable range (e.g., tolerance) (the same applies hereinafter). The conductive portion 30 is provided linearly with its axis aligned along the extension direction of the jumper layer 22 (here, the diameter direction of the ceramic substrate 12). The coil is formed of a material primarily composed of Mo, Nb, W, Ta, carbides thereof, or a high-melting-point composite metal containing two or more of these elements. The coil may be formed of the same material as the main RF electrode 20, or a different material. The coil wire diameter is preferably 0.6 mm or less. 4, the coil has an elliptical shape, and the minor axis thereof coincides with the distance between the sub-RF electrode 21 and the jumper layer 22. The terminal end 30a of the coil constituting the conductive portion 30 is located inside the outer diameter of the coil (see FIG. 4).

[0021] Next, a manufacturing example of the wafer mounting table 10 will be described with reference to Fig. 5. Fig. 5 is an explanatory diagram showing the manufacturing process of the wafer mounting table 10.

[0022] First, a disk-shaped first ceramic compact 41 is produced using ceramic powder with an average particle size of several μm to several tens of μm, and a jumper layer 22 is formed on one surface of the first ceramic compact 41 (see FIG. 5A). The first ceramic compact 41 can be obtained by, for example, tape casting. When forming the jumper layer 22, a metal mesh or the like may be placed on the upper surface of the first ceramic compact 41, or a conductive paste that will become the jumper layer 22 may be printed on the upper surface of the first ceramic compact 41.

[0023] Next, a second ceramic compact 42, which is produced in the same manner as the first ceramic compact 41, is placed on the surface of the first ceramic compact 41 on which the jumper layer 22 is formed, and they are integrated together. After that, a hole 42a is drilled in the second ceramic compact 42 at a position where the conductive portion 30 is to be provided, reaching the jumper layer 22 (see FIG. 5B).

[0024] Next, a circular or elliptical coil 31 is placed horizontally in the hole 42a (see FIG. 5C). Then, ceramic powder is filled into the gaps in the coil 31, and the main RF electrode 20 and the sub-RF electrode 21 are formed on the upper surface of the second ceramic compact 42 (see FIG. 5D).

[0025] Next, a third ceramic compact 43, which is produced in the same manner as the first ceramic compact 41, is placed on the upper surface of the second ceramic compact 42 and integrated with it to obtain a laminate 44 (see FIG. 5E).

[0026] Next, the laminate 44 is hot-press fired, sintering the ceramic powder contained in the laminate 44 and forming a disk-shaped ceramic base 46 (see FIG. 5F). The horizontally placed coil 31 is compressed vertically during hot-press firing, and is deformed into an elliptical shape to form the conductive portion 30. Because the conductive portion 30 is a compressed, elliptical coil, it comes into strong contact with the sub-RF electrode 21 and the jumper layer 22. Thereafter, the outer shape of the disk-shaped ceramic base 46 is processed, and holes are drilled for inserting the power feed rods 20a and 22a. The power feed rod 20a is bonded to the main RF electrode 20, and the power feed rod 22a is bonded to the jumper layer 22. In this manner, a wafer mounting table 10 including a ceramic base 12 is obtained.

[0027] Next, an example of how the wafer stage 10 is used will be described with reference to Fig. 6. Fig. 6 is an explanatory diagram of an example of how the wafer stage 10 is used.

[0028] The wafer mounting table 10 is installed in the chamber 80 after a metal cooling plate 50 is attached to the backside 12b of the ceramic base 12. The power feed rods 20a and 22a are electrically insulated from the cooling plate 50. A shower head 90 is installed in the chamber 80 at a position facing the wafer mounting table 10. A disk-shaped wafer W is placed on the wafer mounting surface 12a of the wafer mounting table 10. In this state, the interior of the chamber 80 is set to a predetermined vacuum atmosphere (or reduced-pressure atmosphere), and plasma is generated in the space above the wafer W while a process gas is supplied from the shower head 90. Specifically, plasma is generated by supplying high-frequency power to the main RF electrode 20 via the power feed rod 20a, and supplying high-frequency power to the sub-RF electrode 21 via the power feed rod 22a, jumper layer 22, and conductive part 30, independently of the main RF electrode 20. Different radio frequency powers (for example, powers of different wattages at the same frequency, powers of different wattages at different frequencies, or powers of different wattages at different frequencies) can be supplied to the main RF electrode 20 and the sub-RF electrode 21, respectively, so that the density of plasma on the wafer W placed on the wafer placement surface 12a can be made uniform. Then, the plasma is used to perform CVD film formation or etching on the wafer W. The temperature of the wafer W can be controlled by adjusting the temperature of a coolant supplied to a coolant passage (not shown) of a cooling plate 50 attached to the backside of the wafer placement table 10.

[0029] Here, the correspondence between the components of this embodiment and the components of the present invention will be clarified. The ceramic base 12 of this embodiment corresponds to the ceramic base of the present invention, the sub-RF electrode 21 corresponds to the first conductive layer, the jumper layer 22 corresponds to the second conductive layer, and the conductive portion 30 corresponds to the conductive portion.

[0030] In the wafer mounting table 10 described above, the conductive portion 30 is a horizontally placed coil. Therefore, the conductive path of the conductive portion 30 is closer to the distance between the sub-RF electrode 21 and the jumper layer 22 than when a zigzag bent metal mesh or a vertically placed coil is used as the conductive portion. Specifically, the conductive path of the conductive portion 30 is a substantially semi-elliptical path (see the two-dot chain line in FIG. 4). Therefore, heat generation in the conductive portion 30 can be suppressed, and the thermal uniformity of the wafer can be improved.

[0031] Furthermore, since the internal space of the coil that constitutes the conductive portion 30 is filled with the same ceramic material as the ceramic substrate 12, the density variation of the ceramic substrate 12 is reduced and the strength is increased.

[0032] Furthermore, the coil that constitutes the conductive portion 30 is an elliptical coil. When compressive forces are applied from above and below a horizontally placed circular or elliptical coil during the manufacturing process, the coil absorbs the forces and takes on an elliptical shape.

[0033] Furthermore, the jumper layer 22 is a rectangular conductive layer that intersects with the sub-RF electrode 21 in a plan view, and the axis of the coil that constitutes the conductive portion 30 is a straight line that follows the extension direction of the jumper layer 22. Therefore, the length of the horizontally placed coil can be made relatively long, making it easier to ensure electrical continuity between the sub-RF electrode 21 and the jumper layer 22.

[0034] [Second embodiment] A second embodiment of the present invention will be described below with reference to the drawings. Fig. 7 is a plan view of a wafer mounting table 110, Fig. 8 is a cross-sectional view taken along line CC in Fig. 7, Fig. 9 is a plan view of a conductive portion 130 and its periphery, and Fig. 10 is a view seen from the direction D in Fig. 9.

[0035] The wafer mounting table 110 is used to perform CVD, etching, etc. on a wafer using plasma, and is placed in a chamber (not shown) for semiconductor processing. The wafer mounting table 110 includes a ceramic base 112, a first RF electrode 121, a second RF electrode 122, and a conductive portion 130 inside the ceramic base 112.

[0036] The ceramic base 112 is a disk-shaped plate made of a ceramic material such as aluminum nitride, silicon carbide, silicon nitride, or aluminum oxide. The ceramic base 112 has a circular wafer mounting surface 112a and a back surface 112b opposite the wafer mounting surface 112a. A first RF electrode 121 and a second RF electrode 122 are embedded in the ceramic base 112 in this order, starting from the side closest to the wafer mounting surface 112a, so as to be parallel to the wafer mounting surface 112a. The wafer mounting surface 112a has a plurality of concave and convex portions formed by embossing, not shown. A heat conduction gas (e.g., He gas) is supplied from the back surface 112b side through a gas supply path, not shown, between the recesses formed in the wafer mounting surface 112a and the wafer mounted on the wafer mounting surface 112a.

[0037] The first RF electrode 121 is a disk electrode concentric with the ceramic base 112 and is disposed facing the wafer mounting surface 112a. The first RF electrode 121 is an electrode whose main component is Mo, Nb, W, Ta, carbides thereof, or a high-melting-point composite metal containing two or more of these elements, and is formed of a metal mesh, punched metal, or metal plate. An RF voltage is applied between the first RF electrode 121 and an upper electrode (not shown) when generating plasma in the space above the central region of a wafer mounted on the wafer mounting surface 112a. The first RF electrode 121 is connected to a power feed rod 121a inserted into the back surface 112b of the ceramic base 112.

[0038] The second RF electrode 122 is an annular electrode having an outer diameter larger than that of the first RF electrode 121 and concentric with the ceramic base 112. The second RF electrode 122 is formed of the same material as the first RF electrode 121, such as a metal mesh, punched metal, or metal plate. The second RF electrode 122 is provided so as to overlap the first RF electrode 121 in a plan view. An RF voltage is applied between the second RF electrode 122 and an upper electrode (not shown) when plasma is generated in the space above the outer periphery of the wafer placed on the wafer placement surface 112a.

[0039] The conductive portions 130 are components that electrically connect the first RF electrode 121 and the second RF electrode 122, and are provided in multiple locations where the first RF electrode 121 and the second RF electrode 122 overlap in a plan view. Here, as shown in FIG. 7, multiple conductive portions 130 (eight in this example) are provided at equal intervals along the circumferential direction of the wafer mounting table 10. The conductive portions 130 are horizontally placed coils. The conductive portions 130 are provided so that the axis of the coil forms an arc (an arc concentric with the second RF electrode 122 in this example). The coil is made of the same material as the first RF electrode 121. The wire diameter of the coil is preferably 0.6 mm or less. As shown in FIG. 8, the coil has an elliptical shape, and its minor axis coincides with the distance between the first RF electrode 121 and the second RF electrode 122.

[0040] The manufacturing and use examples of the wafer mounting table 110 are similar to those of the wafer mounting table 10, and therefore, the description thereof will be omitted here.

[0041] Here, the correspondence between the components of this embodiment and the components of the present invention will be clarified. The ceramic base 112 of this embodiment corresponds to the ceramic base of the present invention, the first RF electrode 121 corresponds to the first conductive layer, the second RF electrode 122 corresponds to the second conductive layer, and the conductive portion 130 corresponds to the conductive portion.

[0042] In the wafer mounting table 110 described above, the conductive portion 130 is a horizontally placed coil. Therefore, compared to when a zigzag bent metal mesh or a vertically placed coil is used as the conductive portion, the conduction path of the conductive portion 130 is closer to the distance between the first RF electrode 121 and the second RF electrode 122. Specifically, the conduction path of the conductive portion 130 is a substantially semi-elliptical path (see the two-dot chain line in FIG. 10 ). Therefore, heat generation in the conductive portion 130 can be suppressed, and ultimately, the thermal uniformity of the wafer can be improved.

[0043] Furthermore, since the internal space of the coil that constitutes the conductive portion 130 is filled with the same ceramic material as the ceramic base 112, the density variation of the ceramic base 112 is reduced and the strength is increased.

[0044] Furthermore, the coil that constitutes the conductive portion 130 is an elliptical coil. When compressive forces are applied from above and below a horizontally placed circular or elliptical coil during the manufacturing process, the coil absorbs the forces and takes on an elliptical shape.

[0045] Furthermore, the second RF electrode 122 is a ring-shaped conductive layer that overlaps with the first RF electrode 121 in a plan view, and has a conductive portion 130 The axis of the coil constituting the first RF electrode 121 is arc-shaped and concentric with the annular second RF electrode 122. Therefore, the length of the horizontally placed coil can be made relatively long, making it easier to ensure electrical continuity between the first RF electrode 121 and the second RF electrode 122.

[0046] It goes without saying that the present invention is not limited to the above-described embodiment, and can be embodied in various forms as long as they fall within the technical scope of the present invention.

[0047] In the first embodiment described above, as shown in Fig. 11, a hole 21b may be formed in the sub-RF electrode 21, which is the first conductive layer, penetrating in the thickness direction, and a hole 22b may be formed in the jumper layer 22, which is the second conductive layer, penetrating in the thickness direction, so that the coil constituting the conductive portion 30 fits into these holes 21b, 22b, thereby contacting the inner surface of the hole 21b, 22b with the side surface of the coil. In this way, the contact area is increased compared to when the coil constituting the conductive portion 30 is in point contact with the sub-RF electrode 21 or the jumper layer 22, making it easier to ensure conductivity. Note that the hole may be formed in either the sub-RF electrode 21 or the jumper layer 22. Such a hole may also be formed in the second embodiment.

[0048] In the first and second embodiments described above, an elliptical coil is used, but a circular coil or a polygonal coil may also be used. When a polygonal coil is used, it is preferable that at least one corner of the polygon is located between the first conductive layer and the second conductive layer, and more preferably that two or more corners are located. Fig. 12 shows an example in which a hexagonal coil is used as the conductive portion 230 in the first embodiment. In Fig. 12, two corners are located between the sub-RF electrode 21 (first conductive layer) and the jumper layer 22 (second conductive layer).

[0049] In the first embodiment described above, the jumper layer 22 was used, but instead of the jumper layer 22, a wire portion 30b may be used in which the terminal end of the coil constituting the conductive portion 30 is extended so as to be parallel to the surface of the sub-RF electrode 21, as shown in FIG. 13.

[0050] In the first embodiment described above, the annular sub-RF electrode 21, which is the first conductive layer, and the rectangular jumper layer 22, which is the second conductive layer, are connected by the conductive portion 30. In the second embodiment, the circular first RF electrode 121, which is the first conductive layer, and the annular second RF electrode 122, which is the second conductive layer, are connected by the conductive portion 30. 130 However, the shapes of the first conductive layer and the second conductive layer are not particularly limited to these, and various shapes can be adopted.

[0051] In the first embodiment described above, the first conductive layer is an RF electrode and the second conductive layer is a jumper layer, but this is not particularly limited to this. For example, the first conductive layer may be an electrostatic electrode and the second conductive layer may be a jumper layer, or the first conductive layer may be a heater electrode (resistance heating element) and the second conductive layer may be a jumper layer. Furthermore, in the second embodiment described above, the first and second conductive layers are both RF electrodes, but this is not particularly limited to this. For example, both the first and second conductive layers may be electrostatic electrodes, or both may be heater electrodes.

[0052] In the first embodiment described above, the ceramic green body is produced by tape casting, but this is not limiting. For example, a ceramic green body produced by compressing ceramic powder, a ceramic green body produced by mold casting, or a combination of these may be used.

[0053] In the first and second embodiments described above, a step for mounting a known focus ring may be provided on the outer periphery of the upper surface of the ceramic base 12, 112. The focus ring serves to stably generate plasma up to the outer periphery of the wafer and to protect the surface of the wafer mounting table.

[0054] In addition to the first and second embodiments described above, wafer mounting tables 310, 410, 510, and 610 shown in FIGS. 14 to 17 are shown as examples of preferred embodiments to which the present invention is applied.

[0055] FIG. 14 is an explanatory diagram of the wafer mounting table 310, with FIG. 14A being a plan view, FIG. 14B being an E-E cross-sectional view, and FIGS. 14C to 14E being cross-sectional views of the wafer mounting table 310 when horizontally cut at the first conductive layer 321, the conductive portion 330, and the second conductive layer 322, respectively. The wafer mounting table 310 is a monopolar electrostatic chuck and includes a ceramic base 312 having a wafer mounting surface 312a. The ceramic base 312 is disk-shaped, and a stepped surface 312b is provided on the outer periphery of the upper surface. The first conductive layer 321 is a circular electrostatic electrode embedded in the ceramic base 312. A power supply rod 321a is connected to the central lower surface of the first conductive layer 321. The second conductive layer 322 is an annular electrostatic electrode embedded at a different height from the first conductive layer 321. The conductive part 330 is a horizontally placed coil with a circular (or elliptical) cross section, and electrically connects the first conductive layer 321 and the second conductive layer 322. The conductive part 330 is a ring-shaped member formed by connecting coils in an endless manner, and is provided concentrically with the second conductive layer 322. When DC power is supplied to the power feed rod 321a of the wafer mounting table 310, a DC voltage is applied to both the first conductive layer 321 and the second conductive layer 322.

[0056] 15A is a plan view, FIG. 15B is an FF cross-sectional view, and FIGS. 15C to 15E show the wafer mounting table 410 with first conductive layers 421 and 423 and a conductive portion 430, respectively. ,432 The wafer mounting table 410 is a bipolar electrostatic chuck and includes a ceramic base 412 having a wafer mounting surface 412a. The ceramic base 412 is disk-shaped, and a stepped surface 412b is provided on the outer periphery of the upper surface. The first conductive layers 421 and 423 are formed on the ceramic base. 412 The conductive portions 430 and 432 are semicircular (fan-shaped) electrostatic electrodes embedded at a distance from each other in the first conductive layer 421. A power feed rod 421a is connected to the lower surface of the first conductive layer 421, and a power feed rod 423a is connected to the lower surface of the first conductive layer 423. The second conductive layers 422 and 424 are semicircular (fan-shaped) electrostatic electrodes embedded at a distance from each other at a different height from the first conductive layers 421 and 423. The conductive portion 430 is a horizontally placed coil that electrically connects the first conductive layer 421 and the second conductive layer 422. The conductive portion 432 is a horizontally placed coil that electrically connects the first conductive layer 423 and the second conductive layer 424. The conductive portions 430 and 432 are coils with a circular (or elliptical) cross section whose axis is arc-shaped, and are provided concentrically with the second conductive layers 422 and 424. When the power supply rod 421a of the wafer mounting table 410 is connected to a positive electrode and the power supply rod 423a is connected to a negative electrode, the first conductive layer 421 and the second conductive layer 422 become positive electrodes and the first conductive layer 423 and the second conductive layer 424 become negative electrodes.

[0057] FIG. 16 is an explanatory diagram of a wafer mounting table 510, with FIG. 16A being a plan view, FIG. 16B being a cross-sectional view taken along the line G-G, and FIGS. 16C to 16E being cross-sectional views of the wafer mounting table 510 taken horizontally at the comb-tooth electrodes 521 and 523, the conductive portion 530, and the conductive layer 522. The wafer mounting table 510 is a bipolar electrostatic chuck and includes a ceramic base 512 having a wafer mounting surface 512a. The ceramic base 512 is disk-shaped and has a stepped surface 512b formed on the outer periphery of its upper surface. The bipolar comb-tooth electrodes 521 and 523 are a pair of electrostatic electrodes embedded and spaced apart in the ceramic base 512. A power feed rod 521a is connected to the lower surface of the comb-tooth electrode 521, and a power feed rod 523a is connected to the lower surface of the comb-tooth electrode 523. The conductive layer 522 is a ring-shaped electrostatic electrode embedded at a different height from the comb-tooth electrodes 521 and 523. The conductive portion 530 is a horizontally placed coil that electrically connects the comb-tooth electrode 521 (first conductive layer) and the conductive layer 522 (second conductive layer). The conductive portion 530 is a coil with a circular (or elliptical) cross section whose axis is arc-shaped, and is provided concentrically with the conductive layer 522. When the positive electrode is connected to the power feed rod 521a of the wafer mounting table 510 and the negative electrode is connected to the power feed rod 523a, the comb-tooth electrode 521 and the conductive layer 522 become the positive electrode, and the comb-tooth electrode 523 becomes the negative electrode.

[0058] FIG. 17 is an explanatory diagram of a wafer mounting table 610, with FIG. 17A being a plan view, FIG. 17B being an HH cross-sectional view, and FIGS. 17C to 17E being cross-sectional views of the wafer mounting table 610 taken horizontally at upper conductive layers 621 and 623, conductive portions 630 and 632, and lower conductive layer 622. The wafer mounting table 610 is a bipolar electrostatic chuck and includes a ceramic base 612 having a wafer mounting surface 612a. The ceramic base 612 is disk-shaped, and a stepped surface 612b is provided on the outer periphery of the upper surface. The upper conductive layers 621 and 623 are electrostatic electrodes embedded and spaced apart in the ceramic base 612, with the upper conductive layer 621 being annular and the upper conductive layer 623 being circular. A power supply rod 623a is connected to the lower surface of the circular upper conductive layer 623. The lower conductive layer 622 is an annular electrostatic electrode buried at a different height from the upper conductive layers 621 and 623, and a power supply rod 622a is connected to its underside. The two conductive parts 630 and 632 are horizontally placed coils that electrically connect the annular upper conductive layer 621 (first conductive layer) and the circular lower conductive layer 622 (second conductive layer). The conductive part 630 is a coil with a circular (or elliptical) cross section whose axis is arc-shaped, and is provided concentrically with the lower conductive layer 622. When the power supply rod 622a of the wafer mounting table 610 is connected to a positive electrode and the power supply rod 623a is connected to a negative electrode, the upper conductive layer 621 and the lower conductive layer 622 become positive electrodes, and the upper conductive layer 623 becomes a negative electrode.

[0059] In the first and second embodiments described above and the embodiments shown in Figures 14 to 17, a horizontally placed coil is used as the conductive part. However, a horizontally placed perforated cylinder may also be used as the conductive part. A perforated cylinder is a conductive cylinder with holes provided on the side surface. Examples of perforated cylinders include punched metal cylinders (see Figure 18) and metal mesh cylinders. The perforated cylinder allows the ceramic substrate material to enter the interior through the holes on the side surface. As with the coil, the perforated cylinder can be made of a material primarily composed of Mo, Nb, W, Ta, carbides of these elements, or a high-melting-point composite metal containing two or more of these elements. Even when a horizontally placed perforated cylinder is used instead of a horizontally placed coil, the same effects as when a coil is used can be obtained. [Explanation of symbols]

[0060] 10 wafer mounting table, 12 ceramic base, 12a wafer mounting surface, 12b back surface, 20 main RF electrode, 20a power feed rod, 21 sub-RF electrode, 21b hole, 22 jumper layer, 22a power feed rod, 22b hole, 30 conductive portion, 30a termination portion, 30b strand portion, 31 coil, 41 first ceramic compact, 42 second ceramic compact, 42a hole, 43 third ceramic compact, 44 laminate, 46 ceramic base, 50 cooling plate, 80 chamber, 90 shower head, 110 wafer mounting table, 112 ceramic base, 112a wafer mounting surface, 112b back surface, 121 first RF electrode, 121a power feed rod, 122 second RF electrode, 130, 230 conductive portion.

Claims

1. A wafer mounting table including a ceramic base having a wafer mounting surface, a first conductive layer and a second conductive layer embedded at different heights inside the ceramic base, and a conductive portion electrically connecting the first conductive layer and the second conductive layer, the conductive portion is a horizontally placed coil or a perforated cylindrical body, the material of the ceramic base enters the internal space of the conductive portion, and the internal space of the conductive portion is filled with the material of the ceramic base; Wafer stage.

2. The cross-sectional shape of the conductive portion is circular or elliptical. The wafer stage according to claim 1 .

3. the conductive portion is a coil, At least one of the first conductive layer and the second conductive layer has a hole penetrating in a thickness direction, and the coil is inserted into the hole so that an inner surface of the hole and a side surface of the coil are in contact with each other. The wafer stage according to claim 1 or 2.

4. the second conductive layer is a linear or rectangular conductive layer that intersects with the first conductive layer in a plan view, the axis of the conductive portion is a straight line extending in the direction in which the second conductive layer extends; The wafer stage according to any one of claims 1 to 3.

Citation Information

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