Method and apparatus for high-level signaling for weighted prediction

Abstract

To provide a high-level signaling method and apparatus for weighted prediction.SOLUTION: An encoding method according to the present invention includes the steps of determining a syntax element to be coded, which includes a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, coding at least one HLS weighted prediction parameter, and coding the reference picture list structure subsequent to coding the at least one HLS weighted prediction parameter. The syntax element is reordered such that coding the reference picture list structure can be based on the value of at least one HLS weighted prediction parameter.SELECTED DRAWING: Figure 11

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This patent application claims priority to International Patent Application No. PCT / RU2019 / 000625, filed September 6, 2019. The disclosures of the aforementioned patent applications are incorporated herein by reference in their entirety.

[0002] FIELD Embodiments of the present disclosure relate generally to the field of picture processing, and more particularly to shape adaptive resampling of residual blocks for still image and video coding. [Background technology]

[0003] Video coding (video encoding and video decoding) is used in a wide range of digital video applications, such as broadcast digital TV, video transmission over the Internet and mobile networks, real-time interactive applications such as video chat, video conferencing, DVD and Blu-ray® discs, video content collection and editing systems, and camcorders in security applications.

[0004] The amount of video data required to render even a relatively short video can be considerable, which can pose difficulties when the data is to be streamed or otherwise transmitted across communication networks with limited bandwidth capacity. Therefore, video data is generally compressed before being transmitted across modern telecommunications networks. Because memory resources may be limited, the size of the video can also be an issue when the video is stored on a storage device. Video compression devices often use software and / or hardware at the source to code the video data before transmission or storage, thereby reducing the amount of data needed to represent a digital video image. The compressed data is then received at the destination by a video decompression device, which decodes the video data. With limited network resources and an ever-increasing demand for higher video quality, improved compression and decompression techniques that improve compression ratios with little to no sacrifice in picture quality are desirable.

[0005] Weighted Prediction (WP) is a particularly useful tool for coding fades. Weighted prediction can compensate for lighting changes such as fade-ins, fade-outs, or crossfades. The WP tool is employed in the main and extended profiles of the H.264 video coding standard to improve coding efficiency by applying multiplicative weighting factors and additive offsets to motion-compensated predictions to form weighted predictions. In explicit mode, weighting factors and offsets may be coded in the slice header for each allowable reference picture index. In implicit mode, weighting factors are not coded but are derived based on the relative picture order count (POC) distance of two reference pictures.

[0006] The relationship of pictures in terms of ordering and distance when used for prediction is expressed by POC. The POC value is an index number that defines the output position of the current picture in the coded video sequence. The POC value is used to identify pictures in the decoded picture buffer. For identification, the POC values ​​strictly increase with the output order of the coded pictures. Summary of the Invention [Means for solving the problem]

[0007] According to a first aspect of the present disclosure, there is provided an encoding method, the method comprising: determining syntax elements to be coded, the syntax elements including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter; coding the at least one HLS weighted prediction parameter; and coding the reference picture list structure following the coding of the at least one HLS weighted prediction parameter. The syntax elements are reordered such that coding the reference picture list structure can be based on a value of the at least one HLS weighted prediction parameter.

[0008] In a first implementation form of the first aspect itself, a reference picture list derived from the reference picture list structure comprises reference pictures that have the same Picture Order Count (POC) parameter.

[0009] In any preceding implementation form of the first aspect or a second implementation form of the first aspect itself, the at least one HLS weighted prediction parameter comprises a sequence parameter set flag for weighted uni-prediction.

[0010] In any preceding implementation form of the first aspect or a third implementation form of the first aspect itself, the at least one HLS weighted prediction parameter comprises a sequence parameter set flag for weighted bi-prediction.

[0011] In a fourth implementation form of the method according to any preceding implementation form of the first aspect or the first aspect itself, the coding of the reference picture list structure comprises a restriction on binarization of at least a part of the reference picture list structure.

[0012] In a fifth implementation form of the fourth implementation form of the first aspect, the restriction on the binarization of at least a portion of the reference picture list structure comprises coding a modified delta POC value for an element of the reference picture list when the sequence parameter set flag for weighted uniprediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

[0013] In a sixth implementation form of the fourth implementation form of the first aspect, the restriction on binarization is: (i) coding a modified delta POC value for an element of a reference picture list derived from a reference picture list structure when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction, and the sequence parameter set flag for weighted bi-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process; or (ii) coding a modified delta POC value for an element of a reference picture list derived from a reference picture list structure when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and at least one of the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction is set to 0. (iii) coding a modified delta POC value for an element of a reference picture list derived from the reference picture list structure, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process; and (iv) when the at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and both the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction are set to 0, coding a modified delta POC value for an element of a reference picture list derived from the reference picture list structure, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

[0014] In a seventh implementation form of the fifth or sixth implementation form of the first aspect, the corrected delta POC value is one less than the delta POC value used in the coding process.

[0015] According to a second aspect of the present disclosure, there is provided an encoding method comprising: determining syntax elements to be coded, the syntax elements including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein a reference picture list derived from the reference picture list structure comprises reference pictures having the same Picture Order Count (POC) parameter; and coding the determined syntax elements in coding order with a restriction on binarization of syntax elements having a later position in coding order, wherein when the at least one HLS weighted prediction parameter is coded after the reference picture list structure in coding order, the restriction on binarization of the syntax elements comprises coding the at least one HLS weighted prediction parameter only when the reference picture list has at least one element with a delta POC value equal to 0. This has an advantage that the amount of weighted prediction parameters to be coded can be reduced.

[0016] According to a third aspect of the present disclosure, there is provided a decoding method by a decoder, comprising the steps of: receiving a bitstream; entropy decoding the bitstream to obtain syntax elements, the syntax elements comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein in the syntax elements, the at least one HLS weighted prediction parameter is entropy decoded before the reference picture list structure; performing prediction based on the obtained syntax elements to obtain a predictive block; reconstructing a reconstructed block based on the predictive block; and obtaining a decoded picture based on the reconstructed block.

[0017] In a first implementation form of the third aspect itself, the at least one HLS weighted prediction parameter includes at least one of a sequence parameter set flag for weighted uni-prediction and a sequence parameter set flag for weighted bi-prediction.

[0018] According to a fourth aspect of the present disclosure, there is provided a decoding method by a decoder, comprising the steps of: receiving a bitstream; entropy decoding the bitstream to obtain syntax elements, the syntax elements including a reference picture list structure and a preset flag, the value of the preset flag indicating whether the syntax element includes at least one high-level syntax (HLS) weighted prediction parameter; performing prediction based on the obtained syntax elements to obtain a predictive block; reconstructing a reconstructed block based on the predictive block; and obtaining a decoded picture based on the reconstructed block.

[0019] In a first implementation form of the fourth aspect itself, the value of the preset flag corresponds to whether the reference picture list derived from the reference picture list structure has at least one element with a delta POC value equal to 0.

[0020] In a second implementation form of the first implementation form of the fourth aspect, the value of the preset flag corresponding to the reference picture list has at least one element having a delta POC value equal to 0, and the syntax element includes at least one HLS weighted prediction parameter, or when the value of the preset flag corresponding to the reference picture list does not have any element having a delta POC value equal to 0, the syntax element does not include at least one HLS weighted prediction parameter.

[0021] In a third implementation form of the method according to any preceding implementation form of the fourth aspect or the fourth aspect itself, the at least one HLS weighted prediction parameter includes at least one of a sequence parameter set flag for weighted uni-prediction and a sequence parameter set flag for weighted bi-prediction.

[0022] In a fourth implementation form of the method according to any preceding implementation form of the fourth aspect or the fourth aspect itself, the preset flag is RestrictWPFlag, which is set to true in the coding process when a delta POC value (AbsDeltaPocSt) of 0 value appears during inspection of each element of the reference picture list.

[0023] According to a fifth aspect of the present disclosure, there is provided an encoder comprising a processing circuit for performing a method according to the first aspect, any one of the first to seventh implementation forms of the first aspect, or the second aspect.

[0024] According to a sixth aspect of the present disclosure, there is provided a decoder comprising a processing circuit for performing a method according to the third aspect, the first implementation form of the third aspect, the fourth aspect, or any one of the first to fourth implementation forms of the fourth aspect.

[0025] According to a seventh aspect of the present disclosure, there is provided a computer program product comprising program code for executing a method according to the first aspect, any one of the first to seventh implementation forms of the first aspect, the second aspect, the third aspect, the first implementation form of the third aspect, the fourth aspect, or any one of the first to fourth implementation forms of the fourth aspect.

[0026] According to an eighth aspect of the present disclosure, there is provided a decoder comprising: one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, the programming, when executed by the processors, configuring the decoder to perform a method according to the third aspect, the first implementation form of the third aspect, the fourth aspect, or any one of the first to fourth implementation forms of the fourth aspect.

[0027] According to a ninth aspect of the present disclosure, there is provided a decoder comprising: receiving means for receiving a bitstream; entropy decoding means for entropy decoding the bitstream to obtain syntax elements, the syntax elements comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein among the syntax elements, the at least one HLS weighted prediction parameter is entropy decoded before the reference picture list structure; prediction means for performing prediction based on the obtained syntax element to obtain a predictive block; reconstruction means for reconstructing a reconstructed block based on the predictive block; and acquisition means for obtaining a decoded picture based on the reconstructed block.

[0028] In a first implementation form of the ninth aspect itself, the value of the preset flag corresponds to whether the reference picture list derived from the reference list structure has at least one element with a delta POC value equal to 0.

[0029] In a second implementation form of the first implementation form of the ninth aspect, the value of the preset flag corresponding to the reference picture list has at least one element having a delta POC value equal to 0, and the syntax element includes at least one HLS weighted prediction parameter, or when the value of the preset flag corresponding to the reference picture list does not have any element having a delta POC value equal to 0, the syntax element does not include at least one HLS weighted prediction parameter.

[0030] In any preceding implementation form of the ninth aspect or a third implementation form of the ninth aspect itself, the at least one HLS weighted prediction parameter includes at least one of a sequence parameter set flag for weighted uni-prediction and a sequence parameter set flag for weighted bi-prediction.

[0031] In any preceding implementation form of the ninth aspect or a fourth implementation form of the ninth aspect itself, the preset flag is RestrictWPFlag, which is set to true in the coding process when a delta POC value (AbsDeltaPocSt) of 0 appears during inspection of each element of the reference picture list.

[0032] According to a tenth aspect of the present disclosure, there is provided an encoder comprising one or more processors and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, the programming, when executed by the processors, configuring the encoder to perform a method according to the first aspect, any one of the first to seventh implementation forms of the first aspect, or the second aspect.

[0033] According to an eleventh aspect of the present disclosure, there is provided an encoder comprising: determining means for determining syntax elements to be coded, the syntax elements including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter; and coding means for coding the at least one HLS weighted prediction parameter and for coding the reference picture list structure subsequent to coding the at least one HLS weighted prediction parameter.

[0034] In a first implementation form of the eleventh aspect itself, a reference picture list derived from the reference picture list structure comprises reference pictures that have the same picture order count (POC) parameter.

[0035] In a second implementation form of the eleventh aspect itself or the first implementation form of the eleventh aspect, the at least one HLS weighted prediction parameter comprises a sequence parameter set flag for weighted uni-prediction.

[0036] In a third implementation form of the eleventh aspect itself or any one of the preceding implementation forms of the eleventh aspect, the at least one HLS weighted prediction parameter comprises a sequence parameter set flag for weighted bi-prediction.

[0037] In a fourth implementation form of the eleventh aspect itself or any one of the preceding implementation forms of the eleventh aspect, the coding of the reference picture list structure includes a restriction on binarization of at least a portion of the reference picture list structure.

[0038] In a fifth implementation form of the fourth implementation form of the eleventh aspect, the restriction on the binarization of at least a portion of the reference picture list structure comprises signaling a modified delta POC value for an element of the reference picture list when the sequence parameter set flag for weighted uniprediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

[0039] In a sixth implementation form of the fourth implementation form of the eleventh aspect, the restriction on binarization is: (i) coding a modified delta POC value for an element of the reference picture list derived from the reference picture list structure when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction, and the sequence parameter set flag for weighted bi-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process; or (ii) coding a modified delta POC value for an element of the reference picture list derived from the reference picture list structure when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and at least one of the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction is set to 0. or (iii) when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and both the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction are set to 0, coding a modified delta POC value for an element of a reference picture list derived from the reference picture list structure, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

[0040] In a seventh implementation form of the fifth or sixth implementation form of the eleventh aspect, the corrected delta POC value is one less than the delta POC value used in the coding process.

[0041] According to an eleventh aspect of the present disclosure, there is provided a non-transitory computer-readable medium carrying program code that, when executed by a computer device, causes the computer device to perform a method according to the first aspect, any one of the first to seventh implementation forms of the first aspect, the second aspect, the third aspect, the first implementation form of the third aspect, the fourth aspect, or any one of the first to fourth implementation forms of the fourth aspect.

[0042] Embodiments provide a method for encoding and decoding video sequences using joint signaling of high-level syntax weighted prediction parameters and reference picture lists.

[0043] Embodiments provide efficient encoding and / or decoding that uses signal-related information in slice headers only for slices that allow or enable bidirectional inter-prediction, for example within bidirectional (B) predictive slices, also referred to as B slices.

[0044] These and other objects are achieved by the subject matter of the independent claims. Further implementation forms are evident from the dependent claims, the description and the figures.

[0045] The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, drawings, and claims.

[0046] In the following, embodiments of the invention will be explained in more detail with reference to the accompanying figures and drawings. [Brief explanation of the drawings]

[0047] [Figure 1A]1 is a block diagram illustrating an example of a video coding system configured to implement embodiments of the invention. [Figure 1B] FIG. 2 is a block diagram illustrating another example of a video coding system configured to implement embodiments of the invention. [Figure 2] FIG. 1 is a block diagram illustrating an example of a video encoder configured to implement embodiments of the invention. [Figure 3] FIG. 2 is a block diagram illustrating an example structure of a video decoder configured to implement an embodiment of the invention. [Figure 4] FIG. 1 is a block diagram illustrating an example of an encoding or decoding device. [Figure 5] FIG. 10 is a block diagram illustrating another example of an encoding or decoding device. [Figure 6] 10 is a flowchart for weighted predictive encoder side decision making and parameter estimation. [Figure 7] 1 is a flowchart of the proposed method in which the reference picture list is signaled after the weighted prediction parameters. [Figure 8] 1 is a flowchart of a proposed method in which weighted prediction parameters are conditionally signaled after a reference picture list. [Figure 9] 31 is a block diagram illustrating an example structure of a content supply system 3100 for implementing a content distribution service M. [Figure 10] FIG. 2 is a block diagram illustrating the structure of an example of a terminal device. [Figure 11] FIG. 2 is a block diagram illustrating an encoding method according to a first aspect of the present disclosure. [Figure 12] FIG. 2 is a block diagram illustrating an encoding method according to a second aspect of the present disclosure. [Figure 13] FIG. 10 is a block diagram illustrating a decoding method according to a third aspect of the present disclosure. [Figure 14] FIG. 10 is a block diagram illustrating a decoding method by a decoder according to a fourth aspect of the present disclosure. [Figure 15] FIG. 13 is a block diagram illustrating a decoder according to an eighth aspect of the present disclosure. [Figure 16] FIG. 13 is a block diagram illustrating a decoder according to a ninth aspect of the present disclosure. [Figure 17] FIG. 19 is a block diagram illustrating an encoder according to a tenth aspect of the present disclosure. [Figure 18] FIG. 19 is a block diagram illustrating an encoder according to an eleventh aspect of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0048] In the following, the same reference signs refer to identical or at least functionally equivalent features, unless explicitly specified otherwise.

[0049] In the following description, reference is made to the accompanying figures which form part of the disclosure and which show, by way of illustration, certain aspects of embodiments of the invention or in which embodiments of the invention may be used. It is understood that embodiments of the invention may be used in other ways and may have structural or logical changes not depicted in the figures. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0050] For example, it is understood that disclosure regarding a described method may also apply to a corresponding device or system configured to perform that method, and vice versa. For example, if one or more particular method steps are described, a corresponding device may include one or more units, e.g., functional units, for performing the described one or more method steps, even if such one or more units are not explicitly described or illustrated in a figure. On the other hand, for example, if a particular apparatus is described based on one or more units, e.g., functional units, a corresponding method may include one step for performing the function of one or more units (e.g., one step for performing the function of one or more units, or multiple steps that each perform the function of one or more units), even if such one or more steps are not explicitly described or illustrated in a figure. Furthermore, it is understood that features of various exemplary embodiments and / or aspects described herein may be combined with each other, unless specifically noted otherwise.

[0051] Video coding typically refers to the processing of a sequence of pictures to form a video or a video sequence. Instead of the term "picture," the terms "frame" or "image" may be used synonymously in the field of video coding. Video coding (or, in general, coding) comprises two parts: video encoding and video decoding. Video encoding is performed at the source side and typically comprises processing the original video picture (e.g., by compression) to reduce the amount of data required to represent the video picture (for more efficient storage and / or transmission). Video decoding is performed at the destination side and typically comprises the reverse process compared to the encoder to reconstruct the video picture. Embodiments referring to "coding" of a video picture (or, in general, a picture) shall be understood to relate to "encoding" or "decoding" of the video picture or the respective video sequence. The combination of the encoding and decoding parts is also called CODEC (Coding and Decoding).

[0052] In the case of lossless video coding, the original video picture can be reconstructed, i.e., the reconstructed video picture has the same quality as the original video picture (assuming there is no transmission loss or other data loss during storage or transmission). In the case of lossy video coding, further compression is performed, e.g., by quantization, to reduce the amount of data representing the video picture, and the video picture cannot be perfectly reconstructed at the decoder, i.e., the quality of the reconstructed video picture is lower or worse than the quality of the original video picture.

[0053] Some video coding standards belong to the group of "lossy hybrid video codecs" (i.e., combine spatial and temporal prediction in the sample domain with 2D transform coding to apply quantization in the transform domain). Each picture of a video sequence is typically partitioned into a set of non-overlapping blocks, and coding is typically performed at the block level. In other words, at an encoder, video is typically processed, i.e., encoded, at the block (video block) level, for example, by generating a predictive block using spatial (intra-picture) prediction and / or temporal (inter-picture) prediction, subtracting the predictive block from a current block (the block currently being processed / to be processed) to obtain a residual block, transforming the residual block, and quantizing the residual block in the transform domain to reduce the amount of data to be transmitted (compression); while at a decoder, an inverse process compared to the encoder is applied to the encoded, or compressed, block to reconstruct the current block for representation. Additionally, the encoder duplicates the decoder processing loop so that both generate the same predictions (eg, intra and inter predictions) and / or reconstructions for processing, i.e., coding, subsequent blocks.

[0054] In the following, embodiments of a video coding system 10, a video encoder 20, and a video decoder 30 are described based on FIGS.

[0055] 1A is a schematic block diagram illustrating an example coding system 10, e.g., video coding system 10 (or coding system 10 for short), that may utilize the techniques of the present application. A video encoder 20 (or encoder 20 for short) and a video decoder 30 (or decoder 30 for short) of video coding system 10 represent examples of devices that may be configured to perform techniques according to various examples described in the present application.

[0056] As shown in FIG. 1A, coding system 10 includes, for example, a source device 12 configured to provide encoded picture data 21 to a destination device 14 for decoding the encoded picture data 13.

[0057] Source device 12 comprises an encoder 20 and may additionally, i.e., optionally, comprise a picture source 16 , a preprocessor (or preprocessing unit) 18 , for example, a picture preprocessor 18 , and a communication interface or unit 22 .

[0058] Picture source 16 may comprise or be any kind of picture capture device, e.g., a camera for capturing real-world pictures, and / or any kind of picture generation device, e.g., a computer graphics processor for generating computer-animated pictures, or any kind of other device for obtaining and / or providing real-world pictures, computer-generated pictures (e.g., screen content, virtual reality (VR) pictures), and / or any combination thereof (e.g., augmented reality (AR) pictures). Picture source may be any kind of memory or storage device that stores any of the above-mentioned pictures.

[0059] To distinguish from the preprocessor 18 and the processing performed by the preprocessing unit 18, the picture or picture data 17 may also be referred to as an unprocessed picture or unprocessed picture data 17.

[0060] The pre-processor 18 is configured to receive (raw) picture data 17 and perform pre-processing on the picture data 17 to obtain a pre-processed picture 19 or pre-processed picture data 19. The pre-processing performed by the pre-processor 18 may comprise, for example, cropping, color format conversion (e.g., from RGB to YCbCr), color correction, or noise removal. It can be understood that the pre-processing unit 18 may be an optional component.

[0061] Video encoder 20 is configured to receive pre-processed picture data 19 and provide encoded picture data 21 (further details will be described below, eg, based on FIG. 2).

[0062] The communications interface 22 of the source device 12 may be configured to receive the encoded picture data 21 and transmit the encoded picture data 21 (or any further processed version thereof) over the communications channel 13 to another device, such as the destination device 14 or any other device, for storage or direct reconstruction.

[0063] The destination device 14 includes a decoder 30 (e.g., a video decoder 30), and may additionally, i.e. optionally, include a communication interface or communication unit 28, a post-processor 32 (or post-processing unit 32), and a display device 34.

[0064] The communications interface 28 of the destination device 14 is configured to receive the encoded picture data 21 (or any further processed version thereof), for example, directly from the source device 12 or from any other source, for example, a storage device, for example, an encoded picture data storage device, and to provide the encoded picture data 21 to the decoder 30.

[0065] The communication interface 22 and the communication interface 28 may be configured to transmit or receive the encoded picture data 21 or the encoded data 13 via a direct communication link between the source device 12 and the destination device 14, e.g., a direct wired or wireless connection, or via any type of network, e.g., a wired or wireless network or any combination thereof, or any type of private and public network, or any type of combination thereof.

[0066] The communications interface 22 may be configured, for example, to package the encoded picture data 21 in a suitable format, e.g., packets, and / or to process the encoded picture data using any type of transmission encoding or processing for transmission over a communications link or network.

[0067] Communications interface 28, which forms the counterpart to communications interface 22, may be configured, for example, to receive the transmitted data and process the transmitted data using any type of corresponding transmission decoding or processing and / or depackaging to obtain encoded picture data 21.

[0068] Both communication interface 22 and communication interface 28 may be configured as unidirectional communication interfaces, as indicated by the arrow for communication channel 13 in FIG. 1A pointing from source device 12 to destination device 14, or as bidirectional communication interfaces, and may be configured to send and receive messages, e.g., to set up a connection, to acknowledge and exchange any other information related to the communication link and / or data transmission, e.g., encoded picture data transmission.

[0069] The decoder 30 is configured to receive the encoded picture data 21 and provide decoded picture data 31 or decoded pictures 31 (further details will be described below, for example, based on Figure 3 or Figure 5).

[0070] Post-processor 32 of destination device 14 is configured to post-process decoded picture data 31 (also called reconstructed picture data), e.g., decoded picture 31, to obtain post-processed picture data 33, e.g., post-processed picture 33. The post-processing performed by post-processing unit 32 may comprise, e.g., color format conversion (e.g., from YCbCr to RGB), color correction, cropping, or resampling, or any other processing to prepare decoded picture data 31 for, e.g., display by display device 34.

[0071] A display device 34 of destination device 14 is configured to receive the post-processed picture data 33 for displaying the picture, for example, to a user or viewer. Display device 34 may be or comprise any type of display for presenting the reconstructed picture, for example, an integrated or external display or monitor. The display may comprise, for example, a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro-LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other type of display.

[0072] 1A depicts source device 12 and destination device 14 as separate devices, device embodiments may also include both source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such embodiments, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be realized using the same hardware and / or software, or by separate hardware and / or software, or any combination thereof.

[0073] As will be apparent to those skilled in the art based on the description, the functions of different units or the presence and (exact) division of functions within source device 12 and / or destination device 14 as depicted in FIG. 1A may vary depending on the actual device and application.

[0074] Encoder 20 (e.g., video encoder 20) or decoder 30 (e.g., video decoder 30), or both encoder 20 and decoder 30, may be implemented via processing circuitry as depicted in FIG. 1B , such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, dedicated video coding, or any combination thereof. Encoder 20 may be implemented via processing circuitry 46 to implement various modules as discussed with respect to encoder 20 of FIG. 2 and / or any other encoder system or subsystem described herein. Decoder 30 may be implemented via processing circuitry 46 to implement various modules as discussed with respect to decoder 30 of FIG. 3 and / or any other decoder system or subsystem described herein. The processing circuitry may be configured to perform various operations as discussed below. 5, if the techniques are implemented partially in software, a device may store instructions for the software on a suitable non-transitory computer-readable storage medium and execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Either video encoder 20 and video decoder 30 may be integrated within a single device as part of a combined encoder / decoder (CODEC), for example, as shown in FIG. 1B.

[0075] Source device 12 and destination device 14 may comprise any of a wide range of devices, including any type of handheld or fixed device, such as a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camera, a desktop computer, a set-top box, a television, a display device, a digital media player, a video game console, a video streaming device (such as a content service server or content distribution server), a broadcast receiver device, a broadcast transmitter device, or the like, and may use no operating system or any type of operating system. In some cases, source device 12 and destination device 14 may be equipped for wireless communication. Thus, source device 12 and destination device 14 may be wireless communication devices.

[0076] 1A is merely an example, and the techniques of the present application may be applied to a video coding setting (e.g., video encoding or video decoding) without necessarily including any data communication between the encoding and decoding devices. In other examples, data may be retrieved from local memory, streamed over a network, or the like. A video encoding device may encode data and store it in memory, and / or a video decoding device may retrieve data from memory and decode it. In some examples, encoding and decoding are performed by devices that do not communicate with each other, but simply encode data to memory and / or retrieve data from memory and decode it.

[0077] For ease of explanation, embodiments of the invention are described herein by reference to, for example, High-Efficiency Video Coding (HEVC) or to reference software for Versatile Video Coding (VVC), the next-generation video coding standard developed by the ITU-T Video Coding Experts Group (VCEG) and the ISO / IEC Joint Collaboration Team on Video Coding (JCT-VC) of the Motion Picture Experts Group (MPEG). Those skilled in the art will understand that embodiments of the invention are not limited to HEVC or VVC.

[0078] Encoders and encoding methods 2 illustrates a schematic block diagram of an exemplary video encoder 20 configured to implement the techniques of the present application. In the example of FIG. 2, the video encoder 20 includes an input 201 (or input interface 201), a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a loop filter unit 220, a decoded picture buffer (DPB) 230, a mode selection unit 260, an entropy encoding unit 270, and an output 272 (or output interface 272). The mode selection unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a partitioning unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The video encoder 20 illustrated in FIG. 2 may also be referred to as a hybrid video encoder or a video encoder using a hybrid video codec.

[0079] The residual calculation unit 204, the transform processing unit 206, the quantization unit 208, and the mode selection unit 260 may be referred to as forming a forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 may be referred to as forming a backward signal path of the video encoder 20, which corresponds to the signal path of a decoder (see video decoder 30 in FIG. 3 ). The inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 are also referred to as forming a “built-in decoder” of the video encoder 20.

[0080] Pictures and picture divisions (pictures and blocks) Encoder 20 may be configured to receive picture 17 (or picture data 17), e.g., a picture of a sequence of pictures forming a video or a video sequence, e.g., via input 201. The received picture or picture data may also be preprocessed picture 19 (or preprocessed picture data 19). For purposes of brevity, the following description refers to picture 17. Picture 17 may also be called a current picture or a picture to be coded (particularly in video coding, to distinguish the current picture from other pictures of the same video sequence, i.e., a video sequence that also comprises the current picture, e.g., previously encoded and / or decoded pictures).

[0081] A (digital) picture is, or can be considered as, a two-dimensional array or matrix of samples with intensity values. The samples in the array may also be called pixels (a short form of picture element) or pels. The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and / or resolution of the picture. For color representation, three color components are typically employed, i.e., a picture may be represented as or contain three sample arrays. In an RBG format or color space, a picture comprises corresponding red, green, and blue sample arrays. However, in video coding, each pixel is typically represented in a luminance and chrominance format or color space, such as YCbCr, which comprises a luminance component denoted by Y (sometimes L is also used instead) and two chrominance components denoted by Cb and Cr. The luminance (or luma for short) component Y represents brightness or gray-level intensity (e.g., as in a grayscale picture), while the two chrominance (or chroma for short) components Cb and Cr represent chromaticity or color information components. Thus, a picture in YCbCr format comprises a luminance sample array of luminance sample values ​​(Y) and two chrominance sample arrays of chrominance values ​​(Cb and Cr). A picture in RGB format may be converted or transformed to YCbCr format, or vice versa, a process also known as color conversion or transformation. If the picture is monochrome, the picture may comprise only a luminance sample array. Thus, a picture may be, for example, an array of luma samples in monochrome format, or an array of luma samples and two corresponding arrays of chroma samples in 4:2:0, 4:2:2, and 4:4:4 color formats.

[0082] Embodiments of video encoder 20 may comprise a picture partition unit (not depicted in FIG. 2 ) configured to partition picture 17 into multiple (typically non-overlapping) picture blocks 203. These blocks may also be called root blocks, macroblocks (H.264 / AVC), or coding tree blocks (CTBs) or coding tree units (CTUs) (H.265 / HEVC and VVC). The picture partition unit may be configured to use the same block size for all pictures of a video sequence and a corresponding grid defining the block sizes, or to vary the block size among pictures or subsets or groups of pictures, and to partition each picture into corresponding blocks.

[0083] In further embodiments, the video encoder may be configured to directly receive blocks 203 of picture 17, e.g., one, some, or all of the blocks that form picture 17. Picture blocks 203 may also be referred to as current picture blocks or picture blocks to be coded.

[0084] Like picture 17, picture block 203 again can be considered as a two-dimensional array or matrix of samples having intensity values ​​(sample values), but with smaller dimensions than picture 17. In other words, block 203 may comprise, for example, one sample array (e.g., a luma array in the case of a monochrome picture 17, or a luma or chroma array in the case of a color picture), or three sample arrays (e.g., a luma and two chroma arrays in the case of a color picture 17), or any other number and / or type of arrays depending on the applied color format. The number of samples in the horizontal and vertical directions (or axes) of block 203 defines the size of block 203. Thus, a block may be, for example, an M×N (M columns by N rows) array of samples, or an M×N array of transform coefficients.

[0085] An embodiment of video encoder 20 such as that depicted in FIG. 2 may be configured to encode picture 17 block by block, eg, encoding and prediction is performed for each block 203.

[0086] An embodiment of video encoder 20 such as that depicted in FIG. 2 may be further configured to partition and / or encode pictures by using slices (also referred to as video slices), where a picture may be partitioned into or encoded using one or more (typically non-overlapping) slices, each of which may comprise one or more blocks (e.g., CTUs).

[0087] An embodiment of video encoder 20 as depicted in FIG. 2 may further be configured to partition and / or encode a picture by using tile groups (also referred to as video tile groups) and / or tiles (also referred to as video tiles), where a picture may be partitioned into or encoded using one or more (typically non-overlapping) tile groups, each of which may comprise, for example, one or more blocks (e.g., CTUs) or one or more tiles, and each tile may be, for example, rectangular in shape and may comprise one or more blocks (e.g., CTUs), e.g., full or fragmentary blocks.

[0088] Residual calculation The residual calculation unit 204 may be configured to calculate the residual block 205 (also referred to as the residual 205) based on the picture block 203 and the prediction block 265 (further details about the prediction block 265 will be provided later), for example, by subtracting the sample values ​​of the prediction block 265 from the sample values ​​of the picture block 203 on a sample-by-sample (pixel-by-pixel) basis to obtain the residual block 205 in the sample domain.

[0089] conversion The transform processing unit 206 may be configured to apply a transform, such as a discrete cosine transform (DCT) or a discrete sine transform (DST), on the sample values ​​of the residual block 205 to obtain transform coefficients 207 in the transform domain. The transform coefficients 207, also called transform residual coefficients, may represent the residual block 205 in the transform domain.

[0090] The transform processing unit 206 may be configured to apply an integer approximation of a DCT / DST, such as the transform specified for H.265 / HEVC. Compared to an orthogonal DCT transform, such an integer approximation is typically scaled by a factor. To maintain the norm of the residual blocks processed by the forward and inverse transforms, an additional scaling factor is applied as part of the transform process. The scaling factor is typically chosen based on certain constraints, such as the scaling factor being a power of two due to shift operations, the bit depth of the transform coefficients, a trade-off between accuracy and implementation cost, etc. For example, a particular scaling factor may be specified for, e.g., the inverse transform by the inverse transform processing unit 212 (and the corresponding inverse transform by, e.g., the inverse transform processing unit 312 in the video decoder 30), and a corresponding scaling factor for the forward transform by, e.g., the transform processing unit 206 in the encoder 20 may be specified accordingly.

[0091] An embodiment of video encoder 20 (respectively, transform processing unit 206) may be configured to output transform parameters, e.g., one or more types of transform, encoded or compressed, e.g., directly or via entropy encoding unit 270, so that, for example, video decoder 30 may receive and use the transform parameters for decoding.

[0092] quantization The quantization unit 208 may be configured to quantize the transform coefficients 207, for example, by applying scalar quantization or vector quantization, to obtain quantized coefficients 209. The quantized coefficients 209 may also be referred to as quantized transform coefficients 209 or quantized residual coefficients 209.

[0093] The quantization process may reduce the bit depth associated with some or all of the transform coefficients 207. For example, an n-bit transform coefficient may be truncated to an m-bit transform coefficient during quantization, where n is greater than m. The degree of quantization may be modified by adjusting a Quantization Parameter (QP). For example, for scalar quantization, different scaling may be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to finer quantization, while a larger quantization step size corresponds to coarser quantization. The applicable quantization step size may be indicated by the quantization parameter (QP). The quantization parameter may, for example, be an index into a predefined set of applicable quantization step sizes. For example, a small quantization parameter may correspond to fine quantization (small quantization step size) and a large quantization parameter may correspond to coarse quantization (large quantization step size), or vice versa. Quantization may involve division by a quantization step size, and corresponding and / or inverse dequantization, e.g., by the inverse quantization unit 210, may involve multiplication by the quantization step size. Some standards, e.g., HEVC, embodiments may be configured to determine the quantization step size using a quantization parameter. Generally, the quantization step size may be calculated based on the quantization parameter using a fixed-point approximation of a formula involving division. Additional scaling factors may be introduced for quantization and dequantization to restore the norm of the residual block, which may be modified due to the scaling used in the fixed-point approximation of the formula for the quantization step size and quantization parameter. In one example implementation, the scaling of the inverse transform and dequantization may be combined. Alternatively, customized quantization tables may be used and signaled, e.g., in the bitstream, from the encoder to the decoder. Quantization is a lossy operation, and the loss increases with increasing quantization step size.

[0094] Embodiments of video encoder 20 (respectively, quantization unit 208) may be configured to output a quantization parameter (QP), e.g., encoded directly or via entropy encoding unit 270, so that, for example, video decoder 30 may receive and apply the quantization parameter for decoding.

[0095] inverse quantization Inverse quantization unit 210 is configured to apply the inverse quantization of quantization unit 208 on the quantized coefficients to obtain dequantized coefficients 211, e.g., by applying the inverse of the quantization scheme applied by quantization unit 208, based on or using the same quantization step size as quantization unit 208. The dequantized coefficients 211, also referred to as dequantized residual coefficients 211, may correspond to transform coefficients 207, although they are typically not identical to the transform coefficients due to loss due to quantization.

[0096] Inverse transformation The inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by the transform processing unit 206, such as an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), or other inverse transform, to obtain a reconstructed residual block 213 in the sample domain (or corresponding dequantized coefficients 213). The reconstructed residual block 213 may also be referred to as a transform block 213.

[0097] Reconstruction The reconstruction unit 214 (e.g., an adder or summator 214) is configured to add the transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the sample domain, for example, by adding the sample values ​​of the reconstructed residual block 213 and the sample values ​​of the prediction block 265, sample by sample.

[0098] Filtering The loop filter unit 220 (or “loop filter” 220 for short) is configured to filter the reconstructed block 215 to obtain a filtered block 221, or generally, to filter the reconstructed samples to obtain filtered samples. The loop filter unit is configured, for example, to smooth pixel transitions or otherwise improve video quality. The loop filter unit 220 may comprise one or more loop filters, such as a deblocking filter, a Sample-Adaptive Offset (SAO) filter, or one or more other filters, e.g., a bilateral filter, an Adaptive Loop Filter (ALF), a sharpening filter, a smoothing filter, or a collaborative filter, or any combination thereof. Although the loop filter unit 220 is depicted in FIG. 2 as being an in-loop filter, in other configurations, the loop filter unit 220 may be implemented as a post-loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221.

[0099] Embodiments of video encoder 20 (respectively, loop filter unit 220) may be configured to output loop filter parameters (such as sample adaptive offset information), e.g., directly or encoded via entropy encoding unit 270, such that decoder 30 may receive and apply the same loop filter parameters or respective loop filters for decoding, for example.

[0100] Decoded Picture Buffer Decoded picture buffer (DPB) 230 may be a memory that stores reference pictures, or reference picture data in general, for encoding video data by video encoder 20. DPB 230 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Decoded picture buffer (DPB) 230 may be configured to store one or more filtered blocks 221. The decoded picture buffer 230 may further be configured to store other previously filtered blocks, e.g., previously reconstructed, filtered blocks 221, e.g., previously reconstructed pictures, of the same current picture or of a different picture, and may provide, for example, for inter-prediction, a previously reconstructed, i.e., decoded, complete picture (and corresponding reference blocks and samples) and / or a partially reconstructed current picture (and corresponding reference blocks and samples). For example, if the reconstructed blocks 215 are not filtered by the loop filter unit 220 or are any other further processed versions of the reconstructed blocks or samples, the decoded picture buffer (DPB) 230 may also be configured to store one or more unfiltered reconstructed blocks 215, or in general, unfiltered reconstructed samples.

[0101] Mode Selection (Segmentation and Prediction) The mode selection unit 260 includes a partitioning unit 262, an inter prediction unit 244, and an intra prediction unit 254, and is configured to receive or obtain original picture data, e.g., original block 203 (current block 203 of current picture 17), and reconstructed picture data, e.g., filtered and / or unfiltered reconstructed samples or blocks, of the same (current) picture and / or from one or more previously decoded pictures, e.g., from the decoded picture buffer 230 or other buffers (e.g., line buffers, not shown). The reconstructed picture data is used as reference picture data for prediction, e.g., inter prediction or intra prediction, to obtain a prediction block 265 or predictor 265.

[0102] The mode selection unit 260 may be configured to determine or select a partition and a prediction mode (e.g., intra or inter prediction mode) for the current block prediction mode (which does not include partitions) and generate a corresponding prediction block 265 that is used for calculating the residual block 205 and for reconstructing the reconstructed block 215.

[0103] Embodiments of the mode selection unit 260 may be configured to select a partition and prediction mode (e.g., from those supported by or available to the mode selection unit 260) that provides the best match, or in other words, the smallest residual (smallest residual means better compression for transmission or storage), or the smallest signaling overhead (smallest signaling overhead means better compression for transmission or storage), or that considers or balances both. The mode selection unit 260 may be configured to determine the partition and prediction mode based on Rate Distortion Optimization (RDO), i.e., select a prediction mode that provides the smallest rate distortion. Terms such as “best,” “minimum,” “optimal,” etc. in this context do not necessarily refer to an overall “best,” “minimum,” “optimal,” etc., but may refer to the satisfaction of a termination or selection criterion, such as a value above or below a threshold or other constraint, potentially leading to a “suboptimal selection,” but reducing complexity and processing time.

[0104] In other words, the partitioning unit 262 may be configured to partition the block 203 into smaller block partitions or sub-blocks (which again form blocks), for example using quad-tree partitioning (QT), binary partitioning (BT), or triple-tree partitioning (TT), or any combination thereof, iteratively, and to perform prediction for each of the block partitions or sub-blocks, for example, wherein the mode selection comprises selecting a tree structure of the partitioned block 203, and a prediction mode is applied to each of the block partitions or sub-blocks.

[0105] Below, the partitioning (eg, by partitioning unit 260) and prediction processes (by inter-prediction unit 244 and intra-prediction unit 254) performed by example video encoder 20 will be described in more detail.

[0106] classification The partitioning unit 262 may partition (or divide) the current block 203 into smaller partitions, e.g., smaller blocks of square or rectangular size. These smaller blocks (which may also be called sub-blocks) may be further partitioned into even smaller partitions. This is also called tree partitioning or hierarchical tree partitioning; for example, a root block at root tree level 0 (hierarchical level 0, depth 0) may be recursively partitioned, e.g., into two or more blocks at the next lower tree level, e.g., nodes at tree level 1 (hierarchical level 1, depth 1), which may again be partitioned into two or more blocks at the next lower level, e.g., tree level 2 (hierarchical level 2, depth 2), etc., until, e.g., a termination criterion is met, e.g., the maximum tree depth or minimum block size is reached, and partitioning is terminated. Blocks that are not further partitioned are also called leaf blocks or leaf nodes of the tree. A tree that uses a partition into two partitions is called a Binary-Tree (BT), a tree that uses a partition into three partitions is called a Ternary-Tree (TT), and a tree that uses a partition into four partitions is called a Quad-Tree (QT).

[0107] As previously mentioned, the term "block" as used herein may refer to a portion of a picture, particularly a square or rectangular portion. For example, with reference to HEVC and VVC, a block may be or correspond to a coding tree unit (CTU), a coding unit (CU), a prediction unit (PU), and a transform unit (TU), and / or a corresponding block, such as a coding tree block (CTB), a coding block (CB), a transform block (TB), or a prediction block (PB).

[0108] For example, a coding tree unit (CTU) may be or comprise a CTB of luma samples for a picture having three sample arrays, two corresponding CTBs of chroma samples, or a CTB of samples for a monochrome picture or a picture coded using three separate color planes, and a syntax structure used to code the samples. Correspondingly, a coding tree block (CTB) may be an N×N block of samples for some values ​​of N such that the division of the components into CTBs is partitioned. A coding unit (CU) may be or comprise a coding block of luma samples for a picture having three sample arrays, two corresponding coding blocks of chroma samples, or a coding block of samples for a monochrome picture or a picture coded using three separate color planes, and a syntax structure used to code the samples. Correspondingly, a coding block (CB) may be an M×N block of samples for some values ​​of M and N such that the division of the CTB into coding blocks is partitioned.

[0109] For example, in an HEVC embodiment, a coding tree unit (CTU) may be divided into CUs by using a quadtree structure denoted as a coding tree. The decision of whether a picture area should be coded using (temporal) inter-picture prediction or (spatial) intra-picture prediction is made at the CU level. Each CU may be further divided into one, two, or four PUs according to a PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder for each PU. After obtaining residual blocks by applying a prediction process based on the PU partition type, the CU may be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU.

[0110] For example, in an embodiment according to the latest video coding standard currently under development, called Versatile Video Coding (VVC), a combined quad-tree and binary tree (QTBT) partitioning is used, for example, to partition coding blocks. In the QTBT block structure, a CU can have either a square or rectangular shape. For example, a coding tree unit (CTU) is first partitioned by a quad-tree structure. The quad-tree leaf node is further partitioned by a binary tree or ternary tree (or triple tree) structure. The partitioning tree leaf node is called a coding unit (CU), and its segmentation is used for prediction and transform processing without further partitioning. This means that CUs, PUs, and TUs have the same block size in the QTBT coding block structure. In parallel, multiple partitions, for example, triple tree partitioning, can be used with the QTBT block structure.

[0111] In one example, mode select unit 260 of video encoder 20 may be configured to perform any combination of the partitioning techniques described herein.

[0112] As described above, video encoder 20 is configured to determine or select a best or optimal prediction mode from a (e.g., predetermined) set of prediction modes, which may comprise, for example, intra-prediction modes and / or inter-prediction modes.

[0113] Intra prediction The set of intra prediction modes may, for example, comprise 35 different intra prediction modes, e.g., non-directional modes such as DC (or average) mode and planar mode, or directional modes, as defined in HEVC, or may, for example, comprise 67 different intra prediction modes, e.g., non-directional modes such as DC (or average) mode and planar mode, or directional modes, as defined for VVC.

[0114] The intra prediction unit 254 is configured to use reconstructed samples of neighboring blocks of the same current picture to generate an intra prediction block 265 according to an intra prediction mode of the set of intra prediction modes.

[0115] The intra prediction unit 254 (or generally the mode selection unit 260) is further configured to output the intra prediction parameters (or generally information indicating the selected intra prediction mode for the block) in the form of syntax elements 266 to the entropy encoding unit 270 for inclusion in the encoded picture data 21, so that, for example, the video decoder 30 may receive and use the prediction parameters for decoding.

[0116] Inter Prediction The set of inter prediction modes (or possible inter prediction modes) depends on the available reference pictures (i.e., previous pictures that have been at least partially decoded, e.g., stored in DBP 230) and other inter prediction parameters, such as whether the entire reference picture is used to search for the best matching reference block or whether only a portion of the reference picture, e.g., a search window area around the area of ​​the current block, is used, and / or whether pixel interpolation, e.g., half / semi-pel and / or quarter-pel interpolation, is applied.

[0117] In addition to the above prediction modes, skip mode and / or direct mode may be applied.

[0118] The inter prediction unit 244 may include a motion estimation (ME) unit and a motion compensation (MC) unit (both not shown in FIG. 2). The motion estimation unit may be configured to receive or obtain a picture block 203 (current picture block 203 of current picture 17) and a decoded picture 231, or at least one or more previously reconstructed blocks, e.g., reconstructed blocks of one or more other / different previously decoded pictures 231, for motion estimation. For example, a video sequence may comprise the current picture and the previously decoded picture 231, or in other words, the current picture and the previously decoded picture 231 may be part of or form a sequence of pictures that form a video sequence.

[0119] The encoder 20 may be configured to, for example, select a reference block from multiple reference blocks of the same or different pictures among multiple other pictures, and provide the reference picture (or reference picture index) and / or an offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block to the motion estimation unit as inter-prediction parameters. This offset is also called a motion vector (MV).

[0120] The motion compensation unit is configured to obtain, e.g., receive, inter prediction parameters and perform inter prediction based on or using the inter prediction parameters to obtain inter prediction block 265. The motion compensation performed by the motion compensation unit may involve fetching or generating a predictive block based on motion / block vectors determined by motion estimation, possibly performing interpolation to sub-pixel precision. Interpolation filtering may generate additional pixel samples from known pixel samples, thus potentially increasing the number of candidate predictive blocks that can be used to code the picture block. Upon receiving a motion vector for the PU of the current picture block, the motion compensation unit may locate the predictive block to which the motion vector points in one of the reference picture lists.

[0121] The motion compensation unit may also generate syntax elements associated with the blocks and video slices for use by video decoder 30 in decoding picture blocks of the video slices. In addition to, or as an alternative to, slices and their respective syntax elements, tile groups and / or tiles and their respective syntax elements may be generated or used.

[0122] Entropy Coding The entropy encoding unit 270 may encode the quantized coefficients 209, the inter-prediction parameters, the intra-prediction parameters, the loop filter parameters, and / or other syntax elements using, for example, an entropy encoding algorithm or scheme (e.g., a variable length coding (VLC) scheme, a context adaptive VLC scheme (CAVLC)), an arithmetic coding scheme, binarization, context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy, etc. 2. The video decoder 30 may be configured to apply a compression algorithm (e.g., a PIPE (High Entropy Encoding) coding, or another entropy encoding methodology or technique), or bypass (no compression) to obtain encoded picture data 21, which may be output via output 272, e.g., in the form of encoded bitstream 21, whereby, for example, video decoder 30 may receive and use the parameters for decoding. Encoded bitstream 21 may be transmitted to video decoder 30 or stored in memory for later transmission or retrieval by video decoder 30.

[0123] Other structural variations of the video encoder 20 can be used to encode the video stream. For example, a non-transform-based encoder 20 can quantize the residual signal directly for a block or frame without the transform processing unit 206. In another implementation, the encoder 20 can have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.

[0124] Decoder and decoding method 3 illustrates an example of a video decoder 30 configured to implement the techniques of the present application. The video decoder 30 is configured to receive encoded picture data 21 (e.g., encoded bitstream 21), for example, encoded by encoder 20, to obtain a decoded picture 331. The encoded picture data or bitstream comprises information for decoding the encoded picture data, for example, data representing picture blocks of an encoded video slice (and / or tile group or tile), and associated syntax elements.

[0125] 3, decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., summer 314), a loop filter 320, a decoded picture buffer (DBP) 330, a mode application unit 360, an inter prediction unit 344, and an intra prediction unit 354. Inter prediction unit 344 may be or may include a motion compensation unit. Video decoder 30 may, in some examples, perform a decoding path that is generally complementary to the encoding path described with respect to video encoder 100 from FIG. 2.

[0126] As described with respect to encoder 20, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, loop filter 220, decoded picture buffer (DPB) 230, inter prediction unit 344, and intra prediction unit 354 are also referred to as forming a “built-in decoder” of video encoder 20. Accordingly, inverse quantization unit 310 may be identical in function to inverse quantization unit 110, inverse transform processing unit 312 may be identical in function to inverse transform processing unit 212, reconstruction unit 314 may be identical in function to reconstruction unit 214, loop filter 320 may be identical in function to loop filter 220, and decoded picture buffer 330 may be identical in function to decoded picture buffer 230. Accordingly, the descriptions provided for the respective units and functions of video encoder 20 apply correspondingly to the respective units and functions of video decoder 30.

[0127] Entropy Decoding The entropy decoding unit 304 is configured to parse the bitstream 21 (or encoded picture data 21 in general), e.g., perform entropy decoding on the encoded picture data 21, e.g., to obtain quantized coefficients 309 and / or decoded coding parameters (not shown in FIG. 3 ), e.g., any or all of inter-prediction parameters (e.g., reference picture indices and motion vectors), intra-prediction parameters (e.g., intra-prediction modes or indices), transform parameters, quantization parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 may be configured to apply a decoding algorithm or scheme corresponding to an encoding scheme such as described with respect to the entropy encoding unit 270 of the encoder 20. The entropy decoding unit 304 may be further configured to provide the inter-prediction parameters, intra-prediction parameters, and / or other syntax elements to the mode application unit 360 and other parameters to other units of the decoder 30. The video decoder 30 may receive syntax elements at a video slice level and / or a video block level. In addition to or as an alternative to slices and their respective syntax elements, tile groups and / or tiles and their respective syntax elements may be received and / or used.

[0128] inverse quantization Inverse quantization unit 310 may be configured to receive a quantization parameter (QP) (or generally, information regarding inverse quantization) and quantized coefficients from encoded picture data 21 (e.g., by parsing and / or decoding by entropy decoding unit 304), and apply inverse quantization on decoded quantized coefficients 309 based on the quantization parameter to obtain dequantized coefficients 311, which may also be referred to as transform coefficients 311. The inverse quantization process may involve use of a quantization parameter determined by video encoder 20 for each video block in a video slice (or tile or tile group) to determine the degree of quantization, and similarly, the degree of inverse quantization to be applied.

[0129] Inverse transformation The inverse transform processing unit 312 may be configured to receive the dequantized coefficients 311, also referred to as transform coefficients 311, and apply a transform to the dequantized coefficients 311 to obtain the reconstructed residual block 213 in the sample domain. The reconstructed residual block 213 may also be referred to as the transform block 313. The transform may be an inverse transform, e.g., an inverse DCT, an inverse DST, an inverse integer transform, or a conceptually similar inverse transform process. The inverse transform processing unit 312 may further be configured to receive transform parameters or corresponding information from the encoded picture data 21 (e.g., by parsing and / or decoding by the entropy decoding unit 304) to determine the transform to be applied to the dequantized coefficients 311.

[0130] Reconstruction The reconstruction unit 314 (e.g., an adder or summator 314) may be configured to add the reconstructed residual block 313 to the prediction block 365, for example, by adding the sample values ​​of the reconstructed residual block 313 and the sample values ​​of the prediction block 365, to obtain a reconstructed block 315 in the sample domain.

[0131] Filtering Loop filter unit 320 (either in the coding loop or after the coding loop) is configured to filter reconstructed block 315 to obtain filtered block 321, e.g., to smooth pixel transitions or otherwise improve video quality. Loop filter unit 320 may comprise one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or one or more other filters, e.g., a bilateral filter, an adaptive loop filter (ALF), a sharpening filter, a smoothing filter, or a collaborative filter, or any combination thereof. Although loop filter unit 320 is depicted in FIG. 3 as being an in-loop filter, in other configurations, loop filter unit 320 may be implemented as a post-loop filter.

[0132] Decoded Picture Buffer The decoded video blocks 321 of the picture are then stored in a decoded picture buffer 330, which stores the decoded picture 331 as a reference picture for subsequent motion compensation for other pictures and / or for output respective display.

[0133] The decoder 30 is arranged to output the decoded pictures 311, for example via output 312, for presentation or viewing to a user.

[0134] prediction The inter prediction unit 344 may be identical to the inter prediction unit 244 (especially the motion compensation unit), and the intra prediction unit 354 may be identical in function to the inter prediction unit 254, performing the partition or partition decision and prediction based on the partition and / or prediction parameters or respective information received (e.g., by parsing and / or decoding by the entropy decoding unit 304) from the encoded picture data 21. The mode application unit 360 may be configured to perform prediction (intra or inter prediction) for each block based on the (filtered or unfiltered) reconstructed picture, block, or respective sample to obtain a prediction block 365.

[0135] When a video slice is coded as an intra-coded (I) slice, intra prediction unit 354 of mode application unit 360 is configured to generate predictive block 365 for a picture block of the current video slice based on the signaled intra prediction mode and data from previously decoded blocks of the current picture. When a video picture is coded as an inter-coded (i.e., B or P) slice, inter prediction unit 344 (e.g., a motion compensation unit) of mode application unit 360 is configured to produce predictive block 365 for a video block of the current video slice based on motion vectors and other syntax elements received from entropy decoding unit 304. For inter prediction, the predictive block may be produced from one of the reference pictures in one of the reference picture lists. Video decoder 30 may construct the reference frame lists, List 0 and List 1, using a default construction technique based on the reference pictures stored in DPB 330. The same or similar may apply to or with embodiments that use tile groups (e.g., video tile groups) and / or tiles (e.g., video tiles) in addition to or as an alternative to slices (e.g., video slices), e.g., video may be coded using I, P, or B tile groups and / or tiles.

[0136] Mode application unit 360 is configured to determine prediction information for video blocks of a current video slice by parsing motion vectors or related information and other syntax elements, and use the prediction information to produce predictive blocks for the current video block being decoded. For example, mode application unit 360 uses some of the received syntax elements to determine the prediction mode (e.g., intra- or inter-prediction) used to code the video blocks of the video slice, the inter-prediction slice type (e.g., B slice, P slice, or GPB slice), configuration information for one or more of the reference picture lists for the slice, motion vectors for each inter-encoded video block of the slice, inter-prediction status for each inter-coded video block of the slice, and other information to decode the video blocks in the current video slice. The same or similar may apply for or with embodiments that use tile groups (e.g., video tile groups) and / or tiles (e.g., video tiles) in addition to, or as an alternative to, slices (e.g., video slices); e.g., video may be coded using I, P, or B tile groups and / or tiles.

[0137] An embodiment of the video decoder 30 as depicted in FIG. 3 may be configured to partition and / or decode a picture by using slices (also referred to as video slices), where a picture may be partitioned into or decoded using one or more (typically non-overlapping) slices, each of which may comprise one or more blocks (e.g., CTUs).

[0138] An embodiment of video decoder 30 such as that depicted in FIG. 3 may be configured to partition and / or decode a picture by using tile groups (also referred to as video tile groups) and / or tiles (also referred to as video tiles), where a picture may be partitioned into or decoded using one or more (typically non-overlapping) tile groups, each of which may comprise, for example, one or more blocks (e.g., CTUs) or one or more tiles, and each tile may be, for example, rectangular in shape and may comprise one or more blocks (e.g., CTUs), e.g., full or fractional blocks.

[0139] Other variations of the video decoder 30 may be used to decode the encoded picture data 21. For example, the decoder 30 may produce an output video stream without a loop filtering unit 320. For example, a non-transform-based decoder 30 may inverse quantize the residual signal directly for a block or frame without an inverse transform processing unit 312. In another implementation, the video decoder 30 may have the inverse quantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0140] It should be understood that the processing result of the current step may be further processed and then output to the next step in the encoder 20 and the decoder 30. For example, after the interpolation filtering, motion vector derivation, or loop filtering, further operations such as clipping or shifting may be performed on the processing result of the interpolation filtering, motion vector derivation, or loop filtering.

[0141] It should be noted that further operations may be applied to the derived motion vectors of the current block (including, but not limited to, control point motion vectors in affine mode, sub-block motion vectors in affine, planar, and ATMVP modes, temporal motion vectors, etc.). For example, the value of a motion vector is constrained to a predetermined range according to its representation bits. If the representation bits of a motion vector are bitDepth, the range is -2^(bitDepth-1) to 2^(bitDepth-1)-1, where "^" means exponentiation. For example, if bitDepth is set equal to 16, the range is -32768 to 32767, and if bitDepth is set equal to 18, the range is -131072 to 131071. For example, the value of a derived motion vector (e.g., the MVs of four 4x4 sub-blocks in one 8x8 block) is constrained so that the maximum difference between the integer parts of the four 4x4 sub-block MVs is not greater than N pixels, such as not greater than 1 pixel. Here, we provide two methods for constraining motion vectors according to bitDepth.

[0142] Method 1: Remove the overflow MSB (Most Significant Bit) by flow operation. ux = ( mvx + 2 bitDepth ) % 2 bitDepth (1) mvx = ( ux >= 2 bitDepth-1 ) ? ( ux - 2 bitDepth ) : ux (2) uy = ( mvy + 2 bitDepth ) % 2 bitDepth (3) mvy = ( uy >= 2 bitDepth-1 ) ? ( uy - 2 bitDepth ) : uy (4) where mvx is the horizontal component of the motion vector of the image block or sub-block, mvy is the vertical component of the motion vector of the image block or sub-block, and ux and uy denote intermediate values.

[0143] For example, if the value of mvx is -32769, then after applying equations (1) and (2), the resulting value is 32767. In computer systems, decimal numbers are stored as two's complement numbers. The two's complement of -32769 is 1, 0111, 1111, 1111, 1111 (17 bits), then the MSB is discarded, so the resulting two's complement is 0111, 1111, 1111, 1111, which is the same as the output by applying equations (1) and (2) (decimal number is 32767). ux = ( mvpx + mvdx +2 bitDepth ) % 2 bitDepth (5) mvx = ( ux >= 2 bitDepth-1 ) ? ( ux - 2 bitDepth ) : ux (6) uy = ( mvpy + mvdy +2 bitDepth ) % 2 bitDepth (7) mvy = ( uy >= 2 bitDepth-1 ) ? ( uy - 2 bitDepth ) : uy (8)

[0144] As shown in equations (5) to (8), the operation can be applied between the sums of mvp and mvd.

[0145] Method 2: Remove the overflow MSB by clipping the value. vx = Clip3(-2 bitDepth-1 , 2 bitDepth-1 -1, vx) vy = Clip3(-2 bitDepth-1 , 2 bitDepth-1 -1, vy) where vx is the horizontal component of the motion vector of the image block or sub-block, vy is the vertical component of the motion vector of the image block or sub-block, x, y, and z correspond to the three input values ​​of the MV clipping process, respectively, and the definition of the function Clip3 is as follows:

[0146]

number

[0147] 4 is a schematic diagram of a video coding device 400 according to one embodiment of the disclosure. The video coding device 400 is suitable for implementing the disclosed embodiments as described herein. In one embodiment, the video coding device 400 may be a decoder, such as the video decoder 30 of FIG. 1A, or an encoder, such as the video encoder 20 of FIG. 1A.

[0148] Video coding device 400 comprises an ingress port 410 (or input port 410) and a receiver unit (Rx) 420 for receiving data, a processor, logic unit, or central processing unit (CPU) 430 for processing the data, a transmitter unit (Tx) 440 and an egress port 450 (or output port 450) for transmitting the data, and a memory 460 for storing the data. Video coding device 400 may also comprise optical-to-electrical (OE) and electrical-to-optical (EO) components coupled to ingress port 410, receiver unit 420, transmitter unit 440, and egress port 450 for the egress or ingress of optical or electrical signals.

[0149] The processor 430 is implemented in hardware and software. The processor 430 may be implemented as one or more CPU chips, cores (e.g., as a multi-core processor), FPGA, ASIC, and DSP. The processor 430 is in communication with the ingress port 410, the receiver unit 420, the transmitter unit 440, the egress port 450, and the memory 460. The processor 430 includes a coding module 470. The coding module 470 implements the disclosed embodiments described above. For example, the coding module 470 implements, processes, prepares, or provides various coding operations. Thus, the inclusion of the coding module 470 provides significant improvements to the functionality of the video coding device 400 and results in the transformation of the video coding device 400 into different states. Alternatively, the coding module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

[0150] Memory 460 may comprise one or more disks, tape drives, and solid-state drives, and may be used as an overflow data storage device for storing programs when such programs are selected for execution and for storing instructions and data read during program execution. Memory 460 may be, for example, volatile and / or non-volatile, and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random-access memory (SRAM).

[0151] FIG. 5 is a simplified block diagram of an apparatus 500 that may be used as either or both of source device 12 and destination device 14 from FIG. 1, according to an example embodiment.

[0152] The processor 502 in the apparatus 500 may be a central processing unit. Alternatively, the processor 502 may be any other type of device or devices, now existing or later developed, capable of manipulating or processing information. While the disclosed implementations may be implemented using a single processor, e.g., processor 502, as shown, advantages in speed and efficiency may be achieved using more than one processor.

[0153] The memory 504 in the apparatus 500 may be a read-only memory (ROM) device or a random access memory (RAM) device in one implementation. Any other suitable type of storage device may be used as the memory 504. The memory 504 may include code and data 506 that is accessed by the processor 502 using a bus 512. The memory 504 may further include an operating system 508 and application programs 510, which include at least one program that enables the processor 502 to perform the methods described herein. For example, the application programs 510 may include applications 1 through N, which further include a video coding application that performs the methods described herein.

[0154] The apparatus 500 may also include one or more output devices, such as a display 518. The display 518, in one example, may be a touch-sensitive display that combines a display with touch-sensitive elements operable to sense touch input. The display 518 may be coupled to the processor 502 via the bus 512.

[0155] Although depicted here as a single bus, bus 512 of device 500 may be comprised of multiple buses. Additionally, secondary storage 514 may be directly coupled to other components of device 500 or may be accessed over a network, and may comprise a single integrated unit such as a memory card, or multiple units such as multiple memory cards. Thus, device 500 may be implemented in a wide variety of configurations.

[0156] As discussed in the document "Weighted prediction in the H.264 / MPEG AVC video coding standard" by J.M. Boyce, "Weighted prediction in the H.264 / MPEG AVC video coding standard," IEEE International Symposium on Circuits and Systems, May 2004, Canada, pp. 789-792, weighted prediction (WP) is a particularly useful tool for coding fades. The WP tool is employed in the main and extended profiles of the H.264 video coding standard to improve coding efficiency by applying multiplicative weighting factors and additive offsets to motion-compensated prediction to form weighted predictions. In explicit mode, weighting factors and offsets may be coded in the slice header for each allowable reference picture index. In implicit mode, weighting factors are not coded but are derived based on the relative picture order count (POC) distance between two reference pictures. Experimental results are provided to measure the improvement in coding efficiency using WP. When coding a fade-out sequence, a bitrate reduction of up to 67% was achieved.

[0157] When applied to single prediction, such as in P pictures, WP is similar to leaky prediction, which has been previously proposed for error resilience. Leaky prediction is a special case of WP with a scaling factor restricted to the range 0 ≤ α ≤ 1. H.264 WP allows negative scaling factors and scaling factors greater than 1. For efficient compression of covered and uncovered regions, weighting factors are applied per pixel using a coded label field. An important difference of H.264's WP tool from previous proposals involving weighted prediction for compression efficiency is the association of reference picture indexes with weighting factor parameters, which allows efficient signaling of these parameters in a multiple reference picture environment. As described in the document "Accurate Parameter Estimation and Efficient Fade Detection for Weighted Prediction in H.264 Video Compression" by R. Zhang and G. Cote, 15th IEEE International Conference on Image Processing, San Diego, California, USA, October 2008, pp. 2836-2839, the procedure for applying WP in a real-time encoding system can be formulated as a sequence of steps shown in FIG. 6. First, several statistics 611 are generated through video analysis 610. The statistics 611 within a small window from several previous pictures to the current picture are then used to detect fades. Each picture is assigned a state value 631 indicating whether the picture is in a NORMAL state or a FADE state. Such state values ​​are saved for each picture. When encoding a picture, if either the current picture or one of its reference pictures has a FADE state, WP is used for this current reference pair, and the statistics of the current picture and the corresponding reference picture are processed in step 650 to estimate WP parameters. These parameters are then passed to the encoding engine 660 .Otherwise, normal encoding is performed.

[0158] As described in the document A. Leontaris and A.M. Tourapis, "Weighted prediction methods for improved motion compensation," 16th IEEE International Conference on Image Processing (ICIP), November 2009, Cairo, Egypt, pp. 1029-1032, macroblocks in H.264 are divided into macroblock partitions. For each macroblock partition, a reference is selected from each of the available reference lists (often denoted in the specification as RefPicList), List 0 for P- or B-coded slices, or Reference List 1 for B-coded slices. The references used may be different for each partition. These references are used to select a prediction block per list, i.e., P for single-list prediction and P for bi-prediction. O and P1 are generated using motion information, optionally with sub-pixel accuracy. The predicted blocks may be further processed depending on the availability of weighted prediction for the current slice. For P slices, WP parameters are signaled in the slice header. For B slices, there are two options: in explicit WP, the parameters are signaled in the slice header, and in implicit WP, the parameters are derived based on the Picture Order Count (POC) number signaled in the slice header. In this document, we only focus on explicit WP and how this method can be used to improve motion compensation performance. Note that in HEVC and VVC, PB is used similarly to macroblock partitioning in AVC.

[0159] For a P slice or a single-list explicit WP in a B slice, the prediction block is derived from a single reference. Let p denote the sample value in prediction block P. If weighted prediction is not used, the final inter-predicted sample is f=p. Otherwise, the predicted sample is

[0160]

number

[0161] The term w x and o x are the WP gain and offset parameters for reference list x. The term logWD is transmitted in the bitstream and controls the mathematical precision of the weighted prediction process. For logWD ≥ 1, the above expression is rounded up. Similarly, for bi-prediction, two prediction blocks are considered, one per reference list. Let p0 and p1 denote the samples in each of the two prediction blocks P0 and P1. If weighted prediction is not used, the prediction is f=(p0+p1+1)>>1 For weighted bi-prediction, the prediction is f=((p0×w0+p1×w1+2 logWD )>>(logWD+1))+((o0+o1+1)>>1) It is worth noting that weighted prediction can compensate for illumination changes such as fade-in, fade-out, or cross-fade.

[0162] At a high level in VVC, weighted prediction is signaled in the SPS, PPS, and slice header. In the SPS, the following syntax elements are used for it: sps_weighted_pred_flag equal to 1 specifies that weighted prediction may be applied to P slices that reference an SPS. sps_weighted_pred_flag equal to 0 specifies that weighted prediction is not applied to P slices that reference an SPS. sps_weighted_bipred_flag equal to 1 specifies that explicit weighted prediction may be applied to B slices that reference an SPS. sps_weighted_bipred_flag equal to 0 specifies that explicit weighted prediction is not applied to B slices that reference an SPS.

[0163] In PPS, the following syntax elements are used for this purpose: - pps_weighted_pred_flag equal to 0 specifies that weighted prediction is not applied to P slices that reference the PPS. pps_weighted_pred_flag equal to 1 specifies that weighted prediction is applied to P slices that reference the PPS. When sps_weighted_pred_flag is equal to 0, the value of pps_weighted_pred_flag shall be equal to 0. - pps_weighted_bipred_flag equal to 0 specifies that explicit weighted prediction is not applied to B slices that reference a PPS. pps_weighted_bipred_flag equal to 1 specifies that explicit weighted prediction is applied to B slices that reference a PPS. When sps_weighted_bipred_flag is equal to 0, the value of pps_weighted_bipred_flag shall be equal to 0.

[0164] Within the slice header, the weighted prediction parameters are signaled as pred_weight_table( ), which is structured as in Table 1 and contains the following elements:

[0165] luma_log2_weight_denom is the logarithm to the base 2 of the denominator for all luma weighting coefficients. The value of luma_log2_weight_denom shall be in the range from 0 to 7, inclusive.

[0166] delta_chroma_log2_weight_denom is the log base 2 delta of the denominators for all chroma weighting factors. When delta_chroma_log2_weight_denom is not present, it is inferred to be equal to 0.

[0167] The variable ChromaLog2WeightDenom is derived to be equal to luma_log2_weight_denom + delta_chroma_log2_weight_denom and shall have a value in the range 0 to 7, inclusive.

[0168] luma_weight_l0_flag[ i ] equal to 1 specifies that weighting factors for the luma component of list 0 prediction using RefPicList

[0000] [ i ] are present. luma_weight_l0_flag[ i ] equal to 0 specifies that these weighting factors are not present.

[0169] chroma_weight_l0_flag[ i ] equal to 1 specifies that weighting factors for chroma prediction values ​​for list 0 prediction using RefPicList

[0000] [ i ] are present. chroma_weight_l0_flag[ i ] equal to 0 specifies that these weighting factors are not present. When chroma_weight_l0_flag[ i ] is not present, it is inferred to be equal to 0.

[0170] delta_luma_weight_l0[ i ] is the delta weighting factor applied to the luma predicted value for list 0 prediction using RefPicList[ 0000 ][ i ].

[0171] The variable LumaWeightL0[ i ] is derived to be equal to ( 1 << luma_log2_weight_denom ) + delta_luma_weight_l0[ i ]. When luma_weight_l0_flag[ i ] is equal to 1, the value of delta_luma_weight_l0[ i ] shall be in the range from -128 to 127, inclusive. When luma_weight_l0_flag[ i ] is equal to 0, LumaWeightL0[ i ] shall be 2 luma_log2_weight_denom is assumed to be equal to

[0172] luma_offset_l0[ i ] is an additive offset applied to the luma prediction value for list 0 prediction using RefPicList

[0000] [ i ]. The value of luma_offset_l0[ i ] shall be in the range of -128 to 127, inclusive. When luma_weight_l0_flag[ i ] is equal to 0, luma_offset_l0[ i ] is inferred to be equal to 0.

[0173] delta_chroma_weight_l0[ i ][ j ] is the delta weighting factor applied to the chroma predicted value for list 0 prediction using RefPicList

[0000] [ i ], with j equal to 0 for Cb and j equal to 1 for Cr.

[0174] The variable ChromaWeightL0[ i ][ j ] is derived to be equal to ( 1 << ChromaLog2WeightDenom ) + delta_chroma_weight_l0[ i ][ j ]. When chroma_weight_l0_flag[ i ] is equal to 1, the value of delta_chroma_weight_l0[ i ][ j ] shall be in the range from -128 to 127, inclusive. When chroma_weight_l0_flag[ i ] is equal to 0, ChromaWeightL0[ i ][ j ] shall be 2ChromaLog2WeightDenom is assumed to be equal to

[0175] delta_chroma_offset_l0[ i ][ j ] is the additive offset differential applied to the chroma predicted value for list 0 prediction using RefPicList

[0000] [ i ], with j equal to 0 for Cb and 1 for Cr.

[0176] The variable ChromaOffsetL0[ i ][ j ] is derived as follows: ChromaOffsetL0[ i ][ j ] = Clip3( -128, 127, (128 + delta_chroma_offset_l0[ i ][ j ] - ( (128 * ChromaWeightL0[ i ][ j ] ) >> ChromaLog2WeightDenom ) ) )

[0177] The value of delta_chroma_offset_l0[ i ][ j ] shall be in the range of -4 * 128 to 4 * 127, inclusive. When chroma_weight_l0_flag[ i ] is equal to 0, ChromaOffsetL0[ i ][ j ] is inferred to be equal to 0.

[0178] luma_weight_l1_flag[ i ], chroma_weight_l1_flag[ i ], delta_luma_weight_l1[ i ], luma_offset_l1[ i ], delta_chroma_weight_l1[ i ][ j ], and delta_chroma_offset_l1[ i ][ j ] have the same semantics as luma_weight_l0_flag[ i ], chroma_weight_l0_flag[ i ], delta_luma_weight_l0[ i ], luma_offset_l0[ i ], delta_chroma_weight_l0[ i ][ j ], and delta_chroma_offset_l0[ i ][ j ], respectively, with l0, L0, List0, and List0 replaced by l1, L1, List1, and List1, respectively.

[0179] The variable sumWeightL0Flags is derived to be equal to the sum of luma_weight_l0_flag[ i ] + 2 * chroma_weight_l0_flag[ i ] for i = 0..NumRefIdxActive - 1.

[0180] When slice_type is equal to B, the variable sumWeightL1Flags is derived to be equal to the sum of luma_weight_l1_flag[ i ] + 2 * chroma_weight_l1_flag[ i ] for i = 0..NumRefIdxActive

[0001] - 1.

[0181] It is a bitstream conformance requirement that sumWeightL0Flags shall be less than or equal to 24 when slice_type is equal to P, and that the sum of sumWeightL0Flags and sumWeightL1Flags shall be less than or equal to 24 when slice_type is equal to B.

[0182] [Table 1A] [Table 1B]

[0183] In contribution JVET-O0244 (V. Seregin et al., "AHG17: On zero delta POC in reference picture structure," 15th JVET Meeting, Gothenburg, Sweden), it was pointed out that in the current VVC specification draft, reference pictures are signaled in the reference picture structure (RPS), and abs_delta_poc_st represents a delta POC value that can be equal to 0. The RPS can be signaled in the SPS and slice header. This functionality is needed to signal different weights for the same reference picture and is potentially needed if layered scalability, in which the same POC value is used across layers within an access unit, is supported. It is stated therein that repeating reference pictures is not required when weighted prediction is not enabled. Among other things, this contribution proposes not to allow a 0 delta POC value when weighted prediction is not enabled.

[0184] [Table 2A] [Table 2B] [Table 2C] [Table 2D] [Table 2E]

[0185] [Table 3]

[0186] The ref_pic_list_struct( listIdx, rplsIdx ) syntax structure can be present in the SPS or in the slice header. Depending on whether the syntax structure is included in the slice header or the SPS, the following applies: - If present in the slice header, the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure specifies the reference picture list listIdx of the current picture (the picture containing the slice). - Otherwise (present in the SPS), the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure specifies candidates for the reference picture list listIdx, and the term "current picture" in the semantics specified in the rest of this section refers to each picture that (1) has one or more slices with ref_pic_list_idx[ listIdx ] equal to an index into the list of ref_pic_list_struct( listIdx, rplsIdx ) syntax structures contained in the SPS, and (2) is in a CVS that references the SPS.

[0187] num_ref_entries[listIdx][rplsIdx] specifies the number of entries in the ref_pic_list_struct(listIdx,rplsIdx) syntax structure. The value of num_ref_entries[listIdx][rplsIdx] shall be in the inclusive range from 0 to sps_max_dec_pic_buffering_minus1 + 14.

[0188] ltrp_in_slice_header_flag[ listIdx ][ rplsIdx ] equal to 0 specifies that the POC LSB of the LTRP entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure is present in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure. ltrp_in_slice_header_flag[ listIdx ][ rplsIdx ] equal to 1 specifies that the POC LSB of the LTRP entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure is not present in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure.

[0189] inter_layer_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] equal to 1 specifies that the i-th entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure is an ILRP entry. inter_layer_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] equal to 0 specifies that the i-th entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure is not an ILRP entry. When not present, the value of inter_layer_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] is inferred to be equal to 0.

[0190] st_ref_pic_flag[listIdx][rplsIdx][i] equal to 1 specifies that the i-th entry in the ref_pic_list_struct(listIdx, rplsIdx) syntax structure is a STRP entry. st_ref_pic_flag[listIdx][rplsIdx][i] equal to 0 specifies that the i-th entry in the ref_pic_list_struct(listIdx, rplsIdx) syntax structure is an LTRP entry. When inter_layer_ref_pic_flag[listIdx][rplsIdx][i] equals 0 and st_ref_pic_flag[listIdx][rplsIdx][i] is not present, the value of st_ref_pic_flag[listIdx][rplsIdx][i] is inferred to be equal to 1.

[0191] The variables NumLtrpEntries[ listIdx ][ rplsIdx ] are derived as follows: for( i = 0, NumLtrpEntries[ listIdx ][ rplsIdx ] = 0; i < num_ref_entries[ listIdx ][ rplsIdx ]; i++ ) if(!inter_layer_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] && !st_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] ) NumLtrpEntries[ listIdx ][ rplsIdx ]++

[0192] abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] specifies the value of the variable AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] as follows: if( sps_weighted_pred_flag || sps_weighted_bipred_flag ) AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] else AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] + 1

[0193] The value of abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] shall be in the range from 0 to 215 - 1, inclusive.

[0194] strp_entry_sign_flag[ listIdx ][ rplsIdx ][ i ] equal to 1 specifies that the i-th entry in the syntax structure ref_pic_list_struct( listIdx, rplsIdx ) has a value greater than or equal to 0. strp_entry_sign_flag[ listIdx ][ rplsIdx ][ i ] equal to 0 specifies that the i-th entry in the syntax structure ref_pic_list_struct( listIdx, rplsIdx ) has a value less than 0. When not present, the value of strp_entry_sign_flag[ listIdx ][ rplsIdx ][ i ] is inferred to be equal to 1.

[0195] The list DeltaPocValSt[ listIdx ][ rplsIdx ] is derived as follows: for( i = 0; i < num_ref_entries[ listIdx ][ rplsIdx ]; i++ ) if( !inter_layer_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] && st_ref_pic_flag[ listIdx ][ rplsIdx ][ i ] ) DeltaPocValSt[ listIdx ][ rplsIdx ][ i ] = ( strp_entry_sign_flag[ listIdx ][ rplsIdx ][ i ] ) ? AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] : 0 - AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ]

[0196] rpls_poc_lsb_lt[ listIdx ][ rplsIdx ][ i ] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the picture referenced by the i-th entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure. The length of the rpls_poc_lsb_lt[ listIdx ][ rplsIdx ][ i ] syntax element is log2_max_pic_order_cnt_lsb_minus4 + 4 bits.

[0197] ilrp_idc[ listIdx ][ rplsIdx ][ i ] specifies the index into the list of directly dependent layers of the ILRP of the i-th entry in the ref_pic_list_struct( listIdx, rplsIdx ) syntax structure. The value of ilrp_idc[ listIdx ][ rplsIdx ][ i ] shall be in the inclusive range from 0 to GeneralLayerIdx[ nuh_layer_id ] - 1.

[0198] The present invention is a method for joint signaling of high-level syntax (HLS) weighted prediction parameters and a reference picture list, where the reference picture list may comprise reference pictures with the same Picture Order Count (POC) value. These reference pictures correspond to the same original picture being coded, but were coded using different parameters, e.g., when different parameters of weighted prediction are used. Signaling of a weighted prediction flag may depend on whether the reference list contains such an entry.

[0199] In one embodiment of the invention, when the weighted prediction flag is equal to 1, the reference picture list is restricted to non-zero values. However, in state-of-the-art video coding, weighted prediction parameters are signaled after the reference picture list signaling. In the table below, it is proposed to reorder these syntax elements and to restrict the binarization of the delta POC syntax element based on the value of the weighted prediction flag.

[0200] [Table 4A] [Table 4B]

[0201] The value of the delta POC (variable AbsDeltaPocSt) is then conditionally restored at the decoder side as follows:

[0202] abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] specifies the value of the variable AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] as follows: if( sps_weighted_pred_flag || sps_weighted_bipred_flag ) AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] else AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] + 1

[0203] The flowchart in Figure 7 illustrates the method described above. In step 701, weighted prediction parameters (in particular, sps_weighted_pred_flag and sps_weighted_bipred_flag) are signaled. Depending on their values, reference picture list signaling 702 is performed differently. In particular, when sps_weighted_pred_flag or sps_weighted_bipred_flag is true, AbsDeltaPocSt is allowed to have a value of 0. Otherwise, AbsDeltaPocSt is recovered from the bitstream using an incremented value of abs_delta_poc_st, which does not allow a 0-value AbsDeltaPocSt.

[0204] In yet another disclosed embodiment, the weighted prediction flags sps_weighted_pred_flag and sps_weighted_bipred_flag are signaled only if at least one reference picture list ref_pic_list_struct has at least one AbsDeltaPocSt value equal to zero.

[0205] [Table 5A] [Table 5B]

[0206] [Table 6]

[0207] 8 illustrates the method disclosed in this embodiment. According to the coding order defined in Table 5, a reference picture list 801 is signaled before the signaling of weighted prediction parameters 803. The weighted prediction parameters 803 are signaled only if the reference picture list contains at least one element with AbsDeltaPocSt equal to 0. This check is performed in step 802 by a variable RestrictWPFlag, which is initialized to false and set to true when a 0-value AbsDeltaPocSt appears during the check of each element of the reference picture list.

[0208] The following is a description of the encoding method and the decoding method as presented in the above-mentioned embodiment, and the application of the system using them.

[0209] 9 is a block diagram illustrating a content delivery system 3100 for implementing a content distribution service. The content delivery system 3100 includes a capture device 3102, a terminal device 3106, and optionally a display 3126. The capture device 3102 communicates with the terminal device 3106 over a communication link 3104. The communication link may include the communication channel 13 described above. The communication link 3104 includes, but is not limited to, WIFI, Ethernet, cable, wireless (3G / 4G / 5G), USB, or any type of combination thereof, or the like.

[0210] The capture device 3102 may generate data and encode the data by the encoding method as described in the above embodiment. Alternatively, the capture device 3102 may deliver the data to a streaming server (not shown), which encodes the data and transmits the encoded data to the terminal device 3106. The capture device 3102 may include, but is not limited to, a camera, a smartphone or pad, a computer or laptop, a video conferencing system, a PDA, a vehicle-mounted device, or any combination thereof, or the like. For example, the capture device 3102 may include the source device 12 described above. When the data includes video, a video encoder 20 included in the capture device 3102 may actually perform the video encoding process. When the data includes audio (i.e., voice), an audio encoder included in the capture device 3102 may actually perform the audio encoding process. For some practical scenarios, the capture device 3102 delivers the encoded video and audio data by multiplexing them together. In other practical scenarios, for example, in a video conferencing system, the encoded audio data and the encoded video data are not multiplexed, and the capture device 3102 delivers the encoded audio data and the encoded video data to the terminal device 3106 separately.

[0211] In the content delivery system 3100, a terminal device 3106 receives and plays the encoded data. The terminal device 3106 can be a device having data reception and recovery capabilities, such as a smartphone or pad 3108, a computer or laptop 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a set top box (STB) 3116, a video conferencing system 3118, a video surveillance system 3120, a personal digital assistant (PDA) 3122, a vehicle-mounted device 3124, or any combination thereof, capable of decoding the encoded data described above. For example, the terminal device 3106 may include the destination device 14 described above. When the encoded data includes video, the video decoder 30 included in the terminal device is prioritized to perform video decoding. When the encoded data includes audio, an audio decoder included within the terminal device is prioritized to perform the audio decoding process.

[0212] For a terminal device having a display, such as a smartphone or pad 3108, a computer or laptop 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a personal digital assistant (PDA) 3122, or a vehicle-mounted device 3124, the terminal device can provide the decoded data to its display. For a terminal device not equipped with a display, such as an STB 3116, a video conferencing system 3118, or a video surveillance system 3120, an external display 3126 is contacted thereto to receive and display the decoded data.

[0213] When each device in this system performs encoding or decoding, a picture encoding device or a picture decoding device can be used as shown in the above-mentioned embodiments.

[0214] 10 is a diagram illustrating the structure of an example of the terminal device 3106. After the terminal device 3106 receives a stream from the capture device 3102, a protocol progression unit 3202 analyzes the transmission protocol of the stream. The protocol may include, but is not limited to, Real Time Streaming Protocol (RTSP), HyperText Transfer Protocol (HTTP), HTTP Live streaming protocol (HLS), MPEG-DASH, Real-time Transport protocol (RTP), Real Time Messaging Protocol (RTMP), or any type of combination thereof, or the like.

[0215] After the protocol progression unit 3202 processes the stream, a stream file is generated. The file is output to the demultiplexing unit 3204. The demultiplexing unit 3204 can separate the multiplexed data into encoded audio data and encoded video data. As described above, in some practical scenarios, for example, in a video conferencing system, the encoded audio data and encoded video data are not multiplexed. In this situation, the encoded data is transmitted to the video decoder 3206 and the audio decoder 3208 without passing through the demultiplexing unit 3204.

[0216] Through the demultiplexing process, a video elementary stream (ES), an audio ES, and optionally subtitles are generated. The video decoder 3206, which includes the video decoder 30 as described in the above-mentioned embodiment, decodes the video ES by the decoding method as described in the above-mentioned embodiment to generate video frames and supplies this data to the synchronization unit 3212. The audio decoder 3208 decodes the audio ES to generate audio frames and supplies this data to the synchronization unit 3212. Alternatively, the video frames may be stored in a buffer (not shown in FIG. 10) before being supplied to the synchronization unit 3212. Similarly, the audio frames may be stored in a buffer (not shown in FIG. 10) before being supplied to the synchronization unit 3212.

[0217] The synchronization unit 3212 synchronizes the video and audio frames and provides the video / audio to the video / audio display 3214. For example, the synchronization unit 3212 synchronizes the presentation of video and audio information. The information may be coded in the syntax using timestamps related to the presentation of the coded audio and visual data and timestamps related to the delivery of the data stream itself.

[0218] If subtitles are included in the stream, a subtitle decoder 3210 decodes the subtitles, synchronizes them with the video and audio frames, and provides the video / audio / subtitles to a video / audio / subtitle display 3216 .

[0219] The present invention is not limited to the above-described system, and either the picture encoding device or the picture decoding device in the above-described embodiments can be incorporated into other systems, for example, automobile systems.

[0220] 11 illustrates an encoding method according to a first aspect of the present disclosure. The encoding method according to the first aspect includes: 1101. Determine syntax elements to be coded, the syntax elements including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter; 1102. Coding at least one HLS weighted prediction parameter; 1103. Coding a reference picture list structure following coding of at least one HLS weighted prediction parameter. Equipped with steps.

[0221] 12 illustrates an encoding method according to a second aspect of the present disclosure. 1201. Determine a syntax element to be coded, the syntax element including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, a reference picture list derived from the reference picture list structure comprising reference pictures having the same picture order count (POC) parameter; 1202. Coding the determined syntax elements in a coding order with a restriction on binarization of syntax elements having a later position in the coding order, wherein when at least one HLS weighted prediction parameter is coded after a reference picture list structure in the coding order, the restriction on binarization of the syntax elements comprises coding the at least one HLS weighted prediction parameter only when the reference picture list has at least one element with a delta POC value equal to 0; Equipped with steps.

[0222] 13 illustrates a decoding method according to a third aspect of the present disclosure. 1301. Receive a bitstream; 1302. Entropy decoding the bitstream to obtain syntax elements, the syntax elements comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein, in the syntax element, the at least one HLS weighted prediction parameter is entropy decoded before the reference picture list structure; 1303. Perform prediction based on the obtained syntax element to obtain a predicted block; 1304. Reconstructing a reconstructed block based on the predicted block; 1305. Obtain a decoded picture based on the reconstructed blocks. Be prepared.

[0223] 14 illustrates a decoding method by a decoder according to a fourth aspect of the present disclosure. 1401. Receive a bitstream; 1402. Entropy decode the bitstream to obtain syntax elements, the syntax elements including a reference picture list structure and a preset flag, a value of the preset flag indicating whether the syntax element includes at least one high-level syntax (HLS) weighted prediction parameter; 1403. Perform prediction based on the obtained syntax element to obtain a predicted block; 1404. Reconstructing a reconstructed block based on the predicted block; 1405. Obtain a decoded picture based on the reconstructed blocks. Be prepared.

[0224] 15 illustrates a decoder according to an eighth aspect of the present disclosure. The decoder 1500 includes one or more processors 1501 and a non-transitory computer-readable storage medium 1502 coupled to the one or more processors 1502 and storing programming for execution by the processors 1501, the programming, when executed by the processors 1501, configuring the decoder 1500 to perform a method according to the third aspect, the first implementation form of the third aspect, the fourth aspect, or any one of the first to fourth implementation forms of the fourth aspect.

[0225] 16 illustrates a decoder according to a ninth aspect of the present disclosure. The decoder 1600 includes: a receiving means 1601 for receiving a bitstream; an entropy decoding means 1602 for entropy decoding the bitstream to obtain syntax elements, the syntax elements comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, where the at least one HLS weighted prediction parameter is entropy decoded before the reference picture list structure; a predicting means 1603 for performing prediction based on the obtained syntax element to obtain a predictive block; a reconstructing means 1604 for reconstructing a reconstructed block based on the predictive block; and an obtaining means 1605 for obtaining a decoded picture based on the reconstructed block.

[0226] 17 illustrates an encoder according to a tenth aspect of the present disclosure. The encoder 1700 includes one or more processors 1701 and a non-transitory computer-readable storage medium 1702 coupled to the processors 1701 and storing programming for execution by the processors 1701, the programming, when executed by the processors 1701, configuring the encoder 1700 to perform a method according to the first aspect, any one of the first to seventh implementation forms of the first aspect, or the second aspect.

[0227] 18 illustrates an encoder according to an eleventh aspect of the present disclosure. The encoder 1800 includes a determining means 1801 for determining syntax elements to be coded, where the syntax elements include a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, and a coding means 1802 for coding the at least one HLS weighted prediction parameter and for coding the reference picture list structure following the coding of the at least one HLS weighted prediction parameter.

[0228] The present disclosure provides the following further exemplary embodiments.

[0229] 1. Exemplary embodiment: A method for joint signaling of high-level syntax (HLS) weighted prediction parameters and reference picture lists, where the reference picture lists comprise reference pictures having the same picture order count (POC) parameter, the method comprising: determining syntax elements to be signaled, the syntax elements including a reference picture list and at least one HLS weighted prediction parameter; signaling the determined syntax elements in coding order with a restriction on the binarization of syntax elements having a later position in coding order.

[0230] 2. Exemplary Embodiment: The method of exemplary embodiment 1, wherein the at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted uni-prediction.

[0231] 3. Exemplary Embodiment: The method of exemplary embodiment 1 or 2, wherein the at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction.

[0232] 4. Exemplary embodiment: When at least one HLS weighted prediction parameter is signaled before the reference picture list in coding order, the restriction on binarization of syntax elements is: The method of example embodiment 2, comprising signaling a modified delta POC value for an element of a reference picture list when a sequence parameter set flag for weighted uni-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

[0233] 5. Exemplary embodiment: When at least one HLS weighted prediction parameter is signaled before the reference picture list in coding order, the restriction on binarization of syntax elements is: signaling a modified delta POC value for an element of a reference picture list when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted bi-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process; or signaling a modified delta POC value for an element of a reference picture list when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and at least one of the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process; or signaling a modified delta POC value for an element of a reference picture list when at least one HLS weighted prediction parameter includes a sequence parameter set flag for weighted bi-prediction and a sequence parameter set flag for weighted uni-prediction, and both the sequence parameter set flag for weighted bi-prediction and the sequence parameter set flag for weighted uni-prediction are set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process. The method of exemplary embodiment 3, comprising:

[0234] 6. Exemplary Embodiment: The method of exemplary embodiment 4 or 5, wherein the modified delta POC value is one less than the delta POC value used in the coding process.

[0235] 7. Exemplary embodiment: When at least one HLS weighted prediction parameter is signaled after the reference picture list in coding order, the restriction on binarization of syntax elements is: 4. The method of any one of example embodiments 1 to 3, comprising signaling at least one HLS weighted prediction parameter only when the reference picture list has at least one element with a delta POC value equal to 0.

[0236] 8. Exemplary Embodiments: receiving a bitstream; entropy decoding the bitstream to obtain a syntax element, the syntax element including a reference picture list and at least one HLS weighted prediction parameter, wherein the at least one HLS weighted prediction parameter is presented in the element before the reference picture list; performing prediction based on the obtained syntax elements to obtain a predicted block; reconstructing a reconstructed block based on the predicted block; obtaining a decoded picture based on the reconstructed blocks; A decoding method by a decoder comprising:

[0237] 9. Exemplary Embodiment: The method of exemplary embodiment 8, wherein the at least one HLS weighted prediction parameter includes at least one of a sequence parameter set flag for weighted uni-prediction and a sequence parameter set flag for weighted bi-prediction.

[0238] 10. Exemplary Embodiments: receiving a bitstream; entropy decoding the bitstream to obtain syntax elements, the syntax elements including a reference picture list and a preset flag, a value of the preset flag indicating whether the syntax element includes at least one HLS weighted prediction parameter; performing prediction based on the obtained syntax elements to obtain a predicted block; reconstructing a reconstructed block based on the predicted block; obtaining a decoded picture based on the reconstructed blocks; A decoding method by a decoder comprising:

[0239] 11. Exemplary embodiment: The method of exemplary embodiment 10, wherein the value of the preset flag corresponds to whether the reference picture list has at least one element with a delta POC value equal to 0.

[0240] 12. Exemplary embodiment: When the value of the preset flag corresponding to the reference picture list has at least one element with a delta POC value equal to 0, the syntax element includes at least one HLS weighted prediction parameter; or The method of example embodiment 11, wherein the syntax element does not include at least one HLS weighted prediction parameter when the value of the preset flag corresponding to the reference picture list does not have any element with a delta POC value equal to 0.

[0241] 13. Exemplary Embodiment: The method of any one of exemplary embodiments 10 to 12, wherein the at least one HLS weighted prediction parameter includes at least one of a sequence parameter set flag for weighted uni-prediction and a sequence parameter set flag for weighted bi-prediction.

[0242] 14. Exemplary Embodiment: The method of any one of Exemplary Embodiments 10 to 13, wherein the preset flag is RestrictWPFlag as defined in the specification.

[0243] 15. Exemplary embodiment: An encoder (20) comprising processing circuitry for performing a method according to any one of exemplary embodiments 1 to 7.

[0244] 16. Exemplary embodiment: A decoder (30) comprising processing circuitry for performing the method according to any one of exemplary embodiments 8 to 14.

[0245] 17. Exemplary embodiment: A computer program product comprising a program code for performing the method according to any one of exemplary embodiments 1 to 14.

[0246] 18. Exemplary Embodiments: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform a method according to any one of exemplary embodiments 8 to 14.

[0247] 19. Exemplary Embodiments: one or more processors; and a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the encoder to perform a method according to any one of exemplary embodiments 1 to 7.

[0248] 20. Exemplary Embodiment: A non-transitory computer-readable medium bearing program code that, when executed by a computing device, causes the computing device to perform the method of any one of exemplary embodiments 1-14.

[0249] Mathematical Operators The mathematical operators used in this application are similar to those used in the C programming language. However, the results of integer division and arithmetic shift operations are more precisely defined, and additional operations such as exponentiation and real division are defined. Numbering and counting conventions generally start at 0, e.g., "first" is equivalent to 0th, "second" is equivalent to 1st, etc.

[0250] Arithmetic operators The following arithmetic operators are defined as follows: + Addition. - Subtraction (as an operator of two arguments) or negation (as a unary prefix operator). * Multiplication, including matrix multiplication. x y Exponentiation. Specifies x to the yth power. In other contexts, such notation is used to make a superscript not intended for interpretation as a power. / Integer division with truncation of the result towards 0. For example, 7 / 4 and -7 / -4 round down to 1, and -7 / 4 and 7 / -4 round down to -1. ÷ Used to denote division in mathematical expressions, where no truncation or rounding is intended.

[0251]

number

[0252] Used to denote division in mathematical expressions where no truncation or rounding is intended.

[0253]

number

[0254] The sum of f(i) for all integer values ​​of i from x to y inclusive. x % y modulo. The remainder when x is divided by y, defined only for integers x and y, with x>=0 and y>0.

[0255] Logical operators The following logical operators are defined as follows: x && y The Boolean logic "connection" of x and y. x || y The Boolean logic "disjunction" of x and y. ! "Not" in Boolean logic. x ? y : zIf x is TRUE, i.e. not equal to 0, evaluates to the value of y, otherwise evaluates to the value of z.

[0256] Relational operators The following relational operators are defined as follows: > Greater than. >= Greater than or equal to. < Less than. <= Less than or equal to. == Equal to. != Not equal to.

[0257] When a relational operator is applied to a syntax element or variable that has been assigned the value "na" (not applicable), the value "na" is treated as a special value for that syntax element or variable. The value "na" is not considered equal to any other value.

[0258] Bitwise Operators The following bitwise operators are defined as follows: & Bitwise "and". When operating on integer arguments, it operates on the two's complement representation of the integer value. When operating on a binary argument that contains fewer bits than another argument, the shorter argument is extended by appending the more significant bits equal to 0. Bitwise "logical or". When operating on integer arguments, it operates on the two's complement representation of the integer values. When operating on a binary argument that contains fewer bits than another argument, the shorter argument is extended by appending its more significant bits equal to 0. ^ Bitwise "exclusive or". When operating on integer arguments, it operates on the two's complement representation of the integer value. When operating on a binary argument that contains fewer bits than another argument, the shorter argument is extended by appending more significant bits equal to 0. x >> y Arithmetic right shift of the two's complement integer representation of x by y binary places. This function is defined only for non-negative integer values ​​of y. The bit shifted into the most significant bit (MSB) as a result of the right shift has a value equal to the MSB of x before the shift operation. x << y: Arithmetic left shift of the two's complement integer representation of x by y binary places. This function is defined only for non-negative integer values ​​of y. The bit that is shifted into the least significant bit (LSB) as a result of the left shift has value equal to 0.

[0259] assignment operator The following arithmetic operators are defined as follows: = assignment operator. ++ increment, i.e., x++ is equivalent to x = x + 1, and when used in an array index, evaluates to the value of the variable before the increment operation. -- Decrement, i.e., x--, is equivalent to x = x - 1, and when used in an array index, evaluates to the value of the variable before the decrement operation. += Increment by the specified amount, i.e., x += 3 is equivalent to x = x + 3 and x += (-3) is equivalent to x = x + (-3). -= Decrement by the specified amount, i.e., x -= 3 is equivalent to x = x - 3, and x -= (-3) is equivalent to x = x - (-3).

[0260] Range Notation The following notation is used to specify a range of values: x=y..zx takes integer values ​​starting from y up to and including z, where x, y, and z are integers and z is greater than y.

[0261] Mathematical Functions The following mathematical functions are defined:

[0262]

number

[0263] Asin(x) The trigonometric arc sine function, operating on an argument x in the range -1.0 to 1.0, inclusive, and with an output value in radians in the range -π÷2 to π÷2, inclusive. Atan(x) The trigonometric arctangent function, operating on the argument x, with output values ​​in the range -π÷2 to π÷2, inclusive, in radians.

[0264]

number

[0265] Ceil(x) The smallest integer greater than or equal to x. Clip1 Y ( x ) = Clip3( 0, ( 1 << BitDepthY ) - 1, x ) Clip1 C ( x ) = Clip3( 0, ( 1 << BitDepth C ) - 1, x )

[0266]

number

[0267] Cos(x) The trigonometric cosine function, operating on the argument x in radians. Floor(x) The largest integer less than or equal to x.

[0268]

number

[0269] Ln(x) The natural logarithm of x (logarithm to base e, where e is the base constant of the natural logarithm, 2.718 281 828...). Log2(x) The base 2 logarithm of x. Log10(x) The base 10 logarithm of x.

[0270]

number

[0271] Round( x ) = Sign( x ) * Floor( Abs( x ) + 0.5 )

[0272]

number

[0273] Sin(x) The trigonometric sine function, operating on the argument x in radians.

[0274]

number

[0275] Swap( x, y ) = ( y, x ) Tan(x) The trigonometric tangent function, operating on the argument x in radians.

[0276] Order of operation precedence When the order of precedence in an expression is not explicitly indicated by the use of parentheses, the following rules apply: - An operation with higher precedence is evaluated before any operation with lower precedence. - Operations of equal precedence are evaluated sequentially from left to right.

[0277] The following table specifies the precedence of operations from highest to lowest, with higher positions in the table indicating higher precedence.

[0278] For those operators that are also used in the C programming language, the order of precedence used in this specification is the same as that used in the C programming language.

[0279] [Table 7]

[0280] Logical operations in text In the text, statements of logical operations that are to be written mathematically in the following form: if(condition 0) Statement 0 else if(condition 1) Statement 1 ... else / * explanatory notes for remaining conditions * / Statement n can be explained in the following form: ...as follows / ...the following applies - If condition 0, then statement 0 - Otherwise, if condition 1, then statement 1 - ... - Otherwise (explanatory note in the remaining condition), statement n.

[0281] Each "if, otherwise, then, otherwise" statement in the text is introduced with "as follows" or "the following applies", followed immediately by an "if." The final condition of an "if, otherwise, then, otherwise" is always "otherwise." Interleaved "if, otherwise, then, otherwise" statements can be identified by matching the "as follows" or "the following applies" with the closing "otherwise."

[0282] In the text, statements of logical operations that are to be written mathematically in the following form: if(condition0a && condition0b) Statement 0 else if(condition 1a || condition 1b) Statement 1 ... else Statement n can be explained in the following form: ...as follows / ...the following applies - Statement 0 if all of the following conditions are true: - Condition 0a - Condition 0b - Otherwise, if one or more of the following conditions are true, then statement 1: - Condition 1a - Condition 1b - ... - Otherwise, statement n

[0283] In the text, statements of logical operations that are to be written mathematically in the following form: if(condition 0) Statement 0 if(condition1) Statement 1 can be explained in the following form: If condition 0, then statement 0 If condition 1, then statement 1.

[0284] For example, embodiments of the encoder 20 and the decoder 30, and functions described herein with reference to the encoder 20 and the decoder 30, may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on a computer-readable medium or transmitted over a communication medium as one or more instructions or code and executed by a hardware-based processing unit. The computer-readable medium may include a computer-readable storage medium, which corresponds to a tangible medium such as a data storage medium, or a communication medium, which includes any medium that facilitates transfer of a computer program from one place to another, for example, according to a communication protocol. In this form, the computer-readable medium may generally correspond to (1) a tangible computer-readable storage medium that is non-transitory, or (2) a communication medium such as a signal or carrier wave. The data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures for implementing the techniques described in this disclosure. A computer program product may include the computer-readable medium.

[0285] By way of example, and not limitation, such computer-readable storage media may comprise RAM, ROM, EEPROM, CD-ROM, or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but instead cover non-transitory tangible storage media. As used herein, disk and disc include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, where disks typically reproduce data magnetically while discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0286] The instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Accordingly, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided in dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Also, the techniques may be fully implemented within one or more circuits or logic elements.

[0287] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this disclosure to highlight functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit or provided by a collection of interoperable hardware units, including one or more processors as described above, along with suitable software and / or firmware. [Explanation of symbols]

[0288] 10. Video Coding System 12 Source Devices 13 Communication Channels 14 Destination Device 16 Picture Source 17 Picture, Picture Data, Raw Picture, Raw Picture Data 18 Preprocessor, preprocessing unit 19 Preprocessed Picture, Preprocessed Picture Data 20 Video Encoder 21 Encoded Picture Data 22 Communication interface, communication unit 28 Communication interface, communication unit 30 Video decoder, short decoder 31 Decoded Picture, Decoded Picture Data 32 Post-processor, post-processing unit 33 Post-Processed Picture, Post-Processed Picture Data 34 Display Devices 46 Processing Circuit 201 Input, input interface 203 Picture Block 204 Residual Calculation Unit 205 Residual Block, Residual 206 Conversion Processing Unit 207 Conversion Factor 208 quantization units 209 quantized coefficients, quantized transform coefficients, quantized residual coefficients 210 Inverse Quantization Unit 211 Dequantized Coefficients, Dequantized Residual Coefficients 212 Inverse Transformation Processing Unit 213 reconstructed residual block, corresponding dequantized coefficients, transform block 214 Reconstruction Unit 215 reconstructed blocks 220 Loop Filter Unit 221 filtered blocks, filtered reconstructed blocks 230 Decoded Picture Buffer 231 decoded pictures 244 Inter Prediction Units 254 intra prediction units 260 Mode Selection Unit 262 division units 265 prediction block, predictor 266 Syntax Elements 270 Entropy Encoding Unit 272 Output, Output Interface 304 Entropy Decoding Unit 309 Quantized Coefficients 310 Inverse Quantization Unit 311 transform coefficients, dequantized coefficients 312 Inverse Transformation Processing Unit 313 Reconstructed residual block, transform block 314 Reconstruction Unit, Adder 315 reconstructed blocks 320 Loop Filter Unit 321 filtered blocks, decoded video blocks of a picture 330 Decoded Picture Buffer (DPB) 331 Decoded Picture 332 Output 344 Inter Prediction Unit 354 intra prediction units 360 mode application unit 365 predicted blocks 400 Video Coding Device 410 inlet port, input port 420 receiver unit 430 Processors, Logic Units, Central Processing Units 440 transmitter unit 450 outlet port, output port 460 memory 470 Coding Module 500 devices 502 processor 504 memory 506 Code and Data 508 Operating Systems 510 Application Program 512 Bus 514 Secondary Storage 518 Display 610 Video Analysis 611 Statistics 631 Status Value 660 Encoding Engine 1500 decoder 1501 processor 1502 Non-transitory computer-readable storage medium 1600 decoder 1601 Receiving means 1602 Entropy Decoding Method 1603 Prediction Methods 1604 Reconstruction means 1605 Acquisition method 1700 Encoder 1701 processor 1702 Non-transitory computer-readable storage medium 1800 Encoder 1801 Decision-making means 1802 Coding Methods 3100 Contents Supply System 3102 Capture Device 3104 Communication Links 3106 Terminal Device 3108 Smartphone / Pad 3110 Computer / Laptop 3112 Network Video Recorder / Digital Video Recorder 3114 TV 3116 Set-top Box 3118 Video Conference System 3120 Video Surveillance System 3122 Mobile Information Terminals 3124 Vehicle-mounted devices 3126 Display 3202 Protocol Progression Unit 3204 Demultiplexing Unit 3206 Video Decoder 3208 Audio Decoder 3210 Subtitle Decoder 3212 Synchronous Unit 3214 Video / Audio Display 3216 Video / Audio / Subtitle Display

Claims

1. 1. An encoding method comprising: - determining syntax elements to be coded, the syntax elements including a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, the at least one HLS weighted prediction parameter comprising a sequence parameter set flag for weighted uni-prediction; - coding the at least one HLS weighted prediction parameter; - coding the reference picture list structure following the coding of the at least one HLS weighted prediction parameter; Equipped with the coding of the reference picture list structure comprises a restriction on binarization of at least a part of the reference picture list structure; The restriction is:

10. A method for coding a modified delta POC value for an element of a reference picture list derived from the reference picture list structure when the sequence parameter set flag for weighted uni-prediction is set to 0, wherein the modified delta POC value (abs_delta_poc_st) is smaller than the delta POC value (AbsDeltaPocSt) used in the coding process.

2. The method of claim 1 , wherein a reference picture list derived from the reference picture list structure comprises reference pictures having the same picture order count (POC) parameter.

3. The method of claim 1 or 2, wherein the modified delta POC value is one less than the delta POC value used in the coding process.

4. A decoding method by a decoder, comprising: receiving a bitstream; decoding the bitstream to obtain a syntax element, the syntax element comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein in the syntax element, the at least one HLS weighted prediction parameter is decoded before the reference picture list structure, and the at least one HLS weighted prediction parameter comprises a sequence parameter set flag for weighted uni-prediction; performing prediction based on the obtained syntax elements to obtain a predicted block; reconstructing a reconstructed block based on the predicted block; obtaining a decoded picture based on the reconstructed blocks; Equipped with performing prediction based on the obtained syntax elements to obtain a predicted block; obtaining a value of a delta picture order count (POC) based on the sequence parameter set flag for weighted uni-prediction and a syntax element in the reference picture list structure; performing a forecast based on said value of delta POC; Equipped with obtaining said value of delta POC, determining whether the value of delta POC is allowed to have a value of 0 based on the value of the at least one HLS weighted prediction parameter, wherein when the sequence parameter set flag for weighted uni-prediction is set to 0, the value of delta POC is not allowed to have a value of 0; when it is determined that the value of delta POC is not allowed to have a value of 0, restoring the value of delta POC using the incremented value of the syntax element in the reference picture list structure; A method comprising:

5. The method of claim 4, wherein decoding the bitstream to obtain syntax elements is performed by entropy decoding.

6. The syntax element in the reference picture list structure is abs_delta_poc_st, and the value of delta POC is: if( sps_weighted_pred_flag || sps_weighted_bipred_flag ) AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] else AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] = abs_delta_poc_st[ listIdx ][ rplsIdx ][ i ] + 1 where AbsDeltaPocSt[ listIdx ][ rplsIdx ][ i ] is the absolute value of delta POC, and abs_delta_poc_st[ listIdx ][ rplsIdx The method of claim 4 or 5, wherein [i] is the syntax element in the reference picture list structure.

7. A computer-readable storage medium having a program recorded thereon, the program causing a computer to execute a method according to any one of claims 1 to 3.

8. A computer-readable storage medium having a program recorded thereon, the program causing a computer to execute a method according to any one of claims 4 to 6.

9. A decoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform the method of any one of claims 4 to 6.

10. 1. An encoder comprising: one or more processors; and a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the encoder to perform the method of any one of claims 1 to 3.

11. A computer program stored on a medium configured to cause a computer to carry out the method according to any one of claims 1 to 3.

12. A computer program stored on a medium configured to cause a computer to carry out the method according to any one of claims 4 to 6.

13. A decoding device, a receiver configured to receive a bitstream comprising syntax elements and quantized coefficients, the syntax elements comprising a reference picture list structure and at least one high-level syntax (HLS) weighted prediction parameter, wherein the at least one HLS weighted prediction parameter is decoded before the reference picture list structure; a decoder according to claim 9; A decoding device comprising:

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