Analysis device, analysis method, and program

Abstract

This analysis device comprises: an input unit that receives input of a first temporal logic formula and a second temporal logic formula; and an output unit that outputs a screen that displays a first block diagram showing the first temporal logic formula and a second block diagram showing the second temporal logic formula in a manner enabling comparison therebetween.

Description

[Technical Field]

[0001] The present invention relates to an analysis device, an analysis method, and a program. [Background technology]

[0002] For example, in the product design process in the manufacturing industry, temporal logic expressions that can express the properties of time-series data are attracting attention. For example, Non-Patent Document 1 discloses an algorithm that automatically solves events or properties handled in product design by describing these events or properties in temporal logic expressions. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Masaki Waga, Etienne Andre, and Ichiro Hasuo, "Symbolic Monitoring Against Specifications Parametric in Time and Data", CAV 2019, LNCS 11561, pp. 520-539, 2019. Summary of the Invention [Problem to be solved by the invention]

[0004] Although description using temporal logic formulas has attracted attention as described above, there is a problem in that it is not easy to express events or properties in temporal logic formulas. One reason for this is that there are no tools that can display temporal logic formulas in a format that is easy for developers to understand.

[0005] In view of the above technical problems, one aspect of the present invention aims to provide an analysis device that can efficiently analyze temporal logic formulas. [Means for solving the problem]

[0006] In order to solve the above problem, an analysis device according to one aspect of the present invention includes an input unit that accepts input of a first temporal logic formula and a second temporal logic formula, and an output unit that outputs a screen that displays a first block diagram showing the first temporal logic formula and a second block diagram showing the second temporal logic formula so that they can be compared. [Effects of the Invention]

[0007] According to one aspect of the present invention, temporal logic formulas can be analyzed efficiently. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram showing an example of the overall configuration of a temporal logic formula analysis system. [Figure 2] FIG. 2 is a block diagram showing an example of the hardware configuration of a computer. [Figure 3] FIG. 3 is a block diagram showing an example of the functional configuration of the temporal logic expression analysis system. [Figure 4] FIG. 4 is a diagram showing an example of the analysis screen. [Figure 5] FIG. 5 is a diagram illustrating an example of an output block. [Figure 6] FIG. 6 is a diagram showing an example of a display area. [Figure 7] FIG. 7 is a diagram showing an example of a display area. [Figure 8] FIG. 8 is a flowchart showing an example of the analysis process. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0010] [Embodiment] One embodiment of the present invention is a temporal logic expression analysis system that provides an analysis tool for analyzing temporal logic expressions. Temporal logic expressions are a language that can express the properties of time-series data.

[0011] Temporal logic formulas are suitable for describing goals in data analysis or model analysis. Examples of goals in data analysis or model analysis include "finding out whether a certain property holds in a certain system" or "optimizing a certain system so that a certain property holds." To describe such goals in C, for example, would require hundreds to thousands of lines of code. Temporal logic formulas make it possible to describe such goals in just a few lines of code.

[0012] Equation (1) is an example of a temporal logic formula. Equation (1) describes an event in automobile control, such as "when the engine rpm exceeds 3500 while the transmission is in first gear, the gear will shift to second gear within one second."

[0013]

number

[0014] For example, in the product design process in the manufacturing industry, many analytical tasks appear at various stages. Examples of analytical tasks in the product design process include mining specific phenomena from big data and determining parameter values ​​to satisfy specific properties.

[0015] In analysis tasks, temporal logic has attracted attention as a formal language for describing "desirable events or properties" or "dangerous events or properties that require a response." In recent years, a group of algorithms has been proposed that can solve analysis tasks quickly and fully automatically by describing these events or properties in temporal logic (for example, Non-Patent Document 1).

[0016] However, in order to apply algorithms that use temporal logic, the developer needs to describe the events or properties he or she envisions in temporal logic. However, accurately describing a certain event or property in a temporal logic formula is not easy. For example, the question of "Does a given temporal logic formula have the semantic content that the developer intended?" is a difficult problem with no clear answer. To solve this problem, there is a need for an analysis tool that can explain or provide examples of the semantic content of a given temporal logic formula in an easy-to-understand way for developers, and suggest revisions as necessary.

[0017] The temporal logic expression analysis system of this embodiment aims to provide an analysis tool that can efficiently analyze temporal logic expressions. In particular, the temporal logic expression analysis system of this embodiment aims to realize a user interface that can display temporal logic expressions in a manner that is easy for the user to understand.

[0018] <Overall structure of the temporal logic formula analysis system> The overall configuration of the temporal logic expression analysis system in this embodiment will be described with reference to Fig. 1. Fig. 1 is a block diagram showing an example of the overall configuration of the temporal logic expression analysis system in this embodiment.

[0019] 1, a temporal logic expression analysis system 1 in this embodiment includes an analysis device 10 and a user terminal 20. The analysis device 10 and the user terminal 20 are connected to each other so as to be able to communicate data with each other via a communication network N1 such as a LAN (Local Area Network) or the Internet.

[0020] The analysis device 10 is an information processing device such as a personal computer, a workstation, or a server that provides an analysis tool for analyzing temporal logic expressions. The analysis device 10 receives a temporal logic expression to be analyzed from a user terminal 20, and transmits the analysis result of the temporal logic expression to the user terminal 20.

[0021] The user terminal 20 is an information processing terminal such as a personal computer, smartphone, or tablet terminal operated by a user of the analysis tool. The user of the analysis tool is, for example, a developer who develops a specific system using temporal logic expressions. The user terminal 20 transmits the temporal logic expressions input by the user to the analysis device 10 and displays the analysis results received from the analysis device 10 on the analysis tool.

[0022] The overall configuration of the temporal logic expression analysis system 1 shown in Fig. 1 is one example, and various system configuration examples are possible depending on the application and purpose. For example, the temporal logic expression analysis system 1 may include multiple analysis devices 10 and one or more user terminals 20. For example, the analysis device 10 may be realized by multiple computers, or may be realized as a cloud computing service. The division of devices such as the analysis device 10 and user terminal 20 shown in Fig. 1 is one example.

[0023] <Hardware configuration of the temporal logic formula analysis system> The hardware configuration of each device included in the temporal logic formula analysis system 1 in this embodiment will be described with reference to FIG.

[0024] <Computer hardware configuration> The analysis device 10 and the user terminal 20 in this embodiment are realized by, for example, a computer. Fig. 2 is a block diagram showing an example of the hardware configuration of a computer in this embodiment.

[0025] 2, a computer 500 in this embodiment includes a CPU (Central Processing Unit) 501, a ROM (Read Only Memory) 502, a RAM (Random Access Memory) 503, an HDD (Hard Disk Drive) 504, an input device 505, a display device 506, a communication I / F (Interface) 507, and an external I / F 508. The CPU 501, the ROM 502, and the RAM 503 form a so-called computer. The hardware components of the computer 500 are connected to each other via a bus line 509. The input device 505 and the display device 506 may be connected to the external I / F 508 for use.

[0026] The CPU 501 is a computing device that reads programs and data from a storage device such as the ROM 502 or the HDD 504 onto the RAM 503 and executes the processes, thereby realizing the overall control and functions of the computer 500. The computer 500 may have a GPU (Graphics Processing Unit) in addition to or instead of the CPU 501.

[0027] The ROM 502 is an example of a non-volatile semiconductor memory (storage device) that can retain programs and data even when the power is turned off. The ROM 502 functions as a main storage device that stores various programs, data, etc. required for the CPU 501 to execute various programs installed in the HDD 504. Specifically, the ROM 502 stores boot programs such as a Basic Input / Output System (BIOS) and an Extensible Firmware Interface (EFI) that are executed when the computer 500 starts up, as well as data such as OS (Operating System) settings and network settings.

[0028] The RAM 503 is an example of a volatile semiconductor memory (storage device) in which programs and data are erased when the power is turned off. The RAM 503 is, for example, a dynamic random access memory (DRAM) or a static random access memory (SRAM). The RAM 503 provides a working area in which various programs installed in the HDD 504 are expanded when executed by the CPU 501.

[0029] The HDD 504 is an example of a non-volatile storage device that stores programs and data. The programs and data stored in the HDD 504 include an OS, which is basic software that controls the entire computer 500, and applications that provide various functions on the OS. Note that the computer 500 may use a storage device that uses flash memory as a storage medium (e.g., an SSD (Solid State Drive)) instead of the HDD 504.

[0030] The input device 505 includes a touch panel, operation keys and buttons, a keyboard and mouse, a microphone for inputting sound data such as voice, and the like, which are used by the user to input various signals.

[0031] The display device 506 is configured with a display such as a liquid crystal display or organic EL (Electro-Luminescence) display for displaying a screen, a speaker for outputting sound data such as voice, and the like.

[0032] The communication I / F 507 is an interface that connects to a communication network and enables the computer 500 to perform data communication.

[0033] The external I / F 508 is an interface with external devices, such as a drive device 510.

[0034] The drive device 510 is a device for loading a recording medium 511. The recording medium 511 here includes media that record information optically, electrically, or magnetically, such as a CD-ROM, a flexible disk, or a magneto-optical disk. The recording medium 511 may also include semiconductor memories that record information electrically, such as ROMs and flash memories. This allows the computer 500 to read from and / or write to the recording medium 511 via the external I / F 508.

[0035] The various programs to be installed in the HDD 504 are installed, for example, by setting the distributed recording medium 511 in a drive device 510 connected to the external I / F 508 and reading out the various programs recorded on the recording medium 511 by the drive device 510. Alternatively, the various programs to be installed in the HDD 504 may be installed by being downloaded via the communication I / F 507 from a network different from the communication network.

[0036] <Functional configuration of the temporal logic formula analysis system> The functional configuration of the temporal logic expression analysis system in this embodiment will be described with reference to Fig. 3. Fig. 3 is a block diagram showing an example of the functional configuration of the temporal logic expression analysis system 1 in this embodiment.

[0037] <Functional configuration of the analysis device> As shown in FIG. 3, the analysis device 10 in this embodiment includes an input unit 11, a storage unit 12, a creation unit 13, an example unit 14, an explanation unit 15, and an output unit 16.

[0038] The input unit 11, memory unit 12, creation unit 13, example unit 14, explanation unit 15 and output unit 16 are realized, for example, by processing executed by the CPU 501 of a program expanded from the HDD 504 shown in FIG. 2 onto the RAM 503.

[0039] The input unit 11 accepts input of a temporal logic formula. The input unit 11 may accept input of a temporal logic formula by receiving the temporal logic formula from the user terminal 20. The input unit 11 may accept a temporal logic formula input by a user to the input device 505 of the analysis device 10.

[0040] The input unit 11 in this embodiment can accept input of two temporal logic formulas. The two temporal logic formulas may include, for example, a temporal logic formula input by a user (an example of a first temporal logic formula) and a temporal logic formula obtained by revising the first temporal logic formula (an example of a second temporal logic formula). For example, the two temporal logic formulas may be two temporal logic formulas input separately by the same user. For example, the two temporal logic formulas may be two temporal logic formulas input by different users.

[0041] Screen data for displaying an analysis screen provided by an analysis tool is pre-stored in the storage unit 12. The screen data is, for example, electronic data written in HTML (HyperText Markup Language) or the like, and may include an application written in JavaScript (registered trademark) or the like.

[0042] Furthermore, the storage unit 12 temporarily stores the temporal logic formula received by the input unit 11. The temporal logic formula stored in the storage unit 12 may be used as a first temporal logic formula or a second temporal logic formula according to a user instruction.

[0043] The creation unit 13 creates analysis results to be displayed on the analysis tool based on the temporal logic formulas received by the input unit 11 or read from the storage unit 12. The analysis results include data obtained by converting the temporal logic formulas into a display format that is easy for the user to understand. The analysis results may also include data generated by the exemplification unit 14 or the explanation unit 15.

[0044] The analysis result in this embodiment is a block diagram in which the temporal logic formula to be analyzed is expressed by connecting multiple functional blocks representing each element with links. When two temporal logic formulas are input, the analysis result in this embodiment includes two block diagrams for displaying the two temporal logic formulas in a comparable manner.

[0045] The exemplifying unit 14 generates a continuous time-varying signal (hereinafter referred to as an "exemplifying signal") that satisfies the temporal logic formula to be analyzed. The exemplifying signal generated by the exemplifying unit 14 is output to the user terminal 20 as part of the analysis result.

[0046] The exemplifying unit 14 in this embodiment realizes an exemplifying function that exemplifies the semantic content of a temporal logic formula. The exemplifying function is a function that takes a temporal logic formula φ as input and outputs a continuous time-varying signal σ that makes the temporal logic formula φ true. In other words, the exemplifying function is a function that generates a continuous time-varying signal σ such that [σ,φ]>0, where [σ,φ] represents the quantitative truth value of the temporal logic formula φ in the continuous time-varying signal σ.

[0047] The explanation unit 15 calculates a quantitative truth value (hereinafter referred to as "explanation information") of the temporal logic formula to be analyzed based on a continuous time-varying signal (hereinafter referred to as "explanation signal") selected by the user. The explanation information calculated by the explanation unit 15 is output to the user terminal 20 as part of the analysis result.

[0048] The explanation unit 15 in this embodiment realizes an explanation function that explains the meaning of a temporal logic formula. The explanation function receives a temporal logic formula φ and a continuous time-varying signal σ as input, and outputs a quantitative truth value [σ,φ] of the temporal logic formula φ in the continuous time-varying signal σ. The explanation function outputs the quantitative truth value [σ,φ], and may also output information indicating the reason for the quantitative truth value. The information indicating the reason may be, for example, an element of the continuous time-varying signal σ that has a large influence on the quantitative truth value [σ,φ].

[0049] The output unit 16 embeds the analysis results created by the creation unit 13 into screen data of the analysis screen read from the storage unit 12. The output unit 16 may embed the exemplification signal generated by the exemplification unit 14 or the explanation information generated by the explanation unit 15 into the screen data. The output unit 16 transmits the screen data in which the analysis results are embedded to the user terminal 20.

[0050] <Functional Configuration of User Terminal 20> As shown in FIG. 3, the user terminal 20 in this embodiment includes a transmission unit 21 and a display unit 22.

[0051] The transmission unit 21 and the display unit 22 are realized by, for example, processing that is executed by the CPU 501 in accordance with a program loaded from the HDD 504 onto the RAM 503 shown in FIG.

[0052] The transmitting unit 21 acquires a temporal logic formula that the user inputs to the input device 505 of the user terminal 20. The transmitting unit 21 transmits the acquired temporal logic formula to the analysis device 10.

[0053] The display unit 22 receives screen data of the analysis screen from the analysis device 10. Based on the received screen data, the display unit 22 displays on the display device 506 an analysis screen in which the analysis results of the temporal logic formula are embedded.

[0054] <Analysis screen> The analysis screen in this embodiment will be described with reference to Figures 4 to 7. Figure 4 is a diagram showing an example of the analysis screen in this embodiment.

[0055] As shown in FIG. 4, the analysis screen 100 in this embodiment has an input area 110 and a display area 120.

[0056] The input area 110 is an area where the user inputs a temporal logic formula. The input area 110 may be, for example, an editor specialized for temporal logic formulas. The editor has functions for efficiently inputting temporal logic formulas. The functions include, for example, a function for automatically completing predefined functions or operators, a function for improving visibility by formatting or color-coding the input temporal logic formula, and the like.

[0057] The display area 120 is an area that displays the analysis results of the temporal logic formula entered in the input area 110. The analysis results of the temporal logic formula include a block diagram that expresses the temporal logic formula by connecting functional blocks that represent each element of the temporal logic formula.

[0058] <Block diagram details> The block diagram includes, as functional blocks, an input block, a formula block, and an output block. The input block represents an input signal of a temporal logic formula. The formula block represents the contents of the temporal logic formula. The output block represents an output signal of the temporal logic formula. In this embodiment, both the input signal and the output signal of the temporal logic formula are continuous time-varying signals.

[0059] 4, two input blocks 31-1 and 31-2, one formula block 32, and three output blocks 33-1 to 33-3 are displayed in the display area 120. The input block 31-1 and the output block 33-1 are connected by a link 34-1. The input block 31-2 and the formula block 32 are connected by a link 34-2. The formula block 32 and the output block 33-2 are connected by a link 34-3. The input block 31-2 and the output block 33-3 are connected by a link 34-4.

[0060] The link 34 connecting the input block 31 and the formula block 32 indicates that the input signal set in the input block 31 is input to the temporal logic formula set in the formula block 32. The link 34 connecting the formula block 32 and the output block 33 indicates that the output signal shown in the output block 33 is output from the temporal logic formula set in the formula block 32. The link 34 connecting the input block 31 and the output block 33 indicates that the content of the input signal set in the input block 31 is shown in the output block 33.

[0061] <Output block details> The output block 33 displays the time change of the output signal on a graph with a time axis. Temporal logic is a language that expresses the properties of time-series data. Therefore, if the user can visually recognize the time change of the input signal or output signal, it becomes easier for the user to intuitively understand the meaning of the temporal logic.

[0062] Fig. 5 is a diagram showing an example of an output block in this embodiment. As shown in Fig. 5, the output block 33 in this embodiment displays a graph with time on the horizontal axis and value on the vertical axis. The graph displays the changes over time of variables x and y included in the temporal logic formula.

[0063] <<Comparison of temporal logic expressions>> Display area 120 displays two temporal logic formulas in a comparable manner when two temporal logic formulas are input into input area 110. Fig. 6 shows an example of a display area that displays two temporal logic formulas.

[0064] 6, when two temporal logic formulas are displayed, the display area 120 is divided into a first display area 121 and a second display area 122. The first display area 121 displays a first block diagram showing the first temporal logic formula (Formula φ). The second display area 122 displays a second block diagram showing the second temporal logic formula (Formula φ').

[0065] The first block diagram includes an input block 31-11 indicating an input signal (Signal σ), a formula block 32-11 indicating a first temporal logic formula (Formula φ), and an output block 33-11 indicating an output signal [φ, σ] when the input signal σ is input to the first temporal logic formula φ. The first block diagram further includes a plurality of output blocks 33-12 to 33-16 indicating output signals [φ1, σ], [φ2, σ], [φ11, σ], [φ12, σ], and [φ21, σ], respectively, of subformulas φ1, φ2, φ11, φ12, and φ21 included in the first temporal logic formula φ.

[0066] Output blocks 33-12 to 33-16 that indicate output signals of the sub-logical formulas are connected in a tree structure to output block 33-11 that indicates an output signal of the first temporal logic formula. The tree structure indicates the inclusion relationships of the sub-logical formulas in the first temporal logic formula. Figure 6 shows an example of a tree structure in which the first temporal logic formula φ includes sub-logical formulas φ1 and φ2, the sub-logical formula φ1 includes sub-logical formulas φ11 and φ12, and the sub-logical formula φ2 includes sub-logical formula φ21.

[0067] Similar to the first block diagram, the second block diagram includes an input block 31-21 representing an input signal (Signal σ), a formula block 32-21 representing a second temporal logic formula (Formula φ'), and an output block 33-21 representing an output signal [φ', σ] when the input signal σ is input to the second temporal logic formula φ'. The second block diagram further includes a plurality of output blocks 33-22 to 33-26 representing output signals [φ'1, σ], [φ'2, σ], [φ'11, σ], [φ'12, σ], and [φ'21, σ] of sub-logic formulas φ'1, φ'2, φ'11, φ'12, and φ'21 included in the second temporal logic formula φ', respectively. The output blocks 33-22 to 33-26 are connected in a tree structure indicating the inclusion relationships of the sub-logic formulas φ'1, φ'2, φ'11, φ'12, and φ'21.

[0068] The first and second block diagrams are displayed so that the relative positional relationships of the input block, formula block, and output block match. In the example of Fig. 6, the input block 31-11 in the first display area 121 and the input block 31-21 in the second display area 122 are arranged in the same relative position. The same relative position means that the relative positions (e.g., x and y coordinates) from an origin (e.g., the center of the display area) previously set in each display area match.

[0069] Similarly, the formula block 32-11 in the first display area 121 and the formula block 32-21 in the second display area 122 are arranged in the same relative position. Furthermore, the output blocks 33-11 to 33-16 in the first display area 121 and the output blocks 33-21 to 33-26 in the second display area 122 are arranged in the same relative position.

[0070] The tree structure indicating the inclusion relationships of the sub-logical expressions can be expanded or collapsed. When the user performs a predetermined operation (click, tap, etc.) on any of the output blocks, the expansion state of the tree structure changes. For example, when the tree structure of output blocks 33-11 to 33-16 is expanded, if the user clicks on output block 33-11 indicating the first temporal logic expression, the tree structure connected below output block 33-11 may be collapsed. Also, when the tree structure of output blocks 33-11 to 33-16 is collapsed, if the user clicks on output block 33-11 indicating the first temporal logic expression, the tree structure connected below output block 33-11 may be expanded.

[0071] The tree structure may be expanded or collapsed by expanding or collapsing all tree structures below the operated output block 33. Alternatively, the tree structure may be expanded or collapsed only by expanding or collapsing the tree structure immediately below the operated output block 33.

[0072] <Difference of temporal logic expressions> When two temporal logic formulas are displayed in a comparable manner, the display area 120 highlights the difference between the two temporal logic formulas. Fig. 7 shows an example of a display area that displays the difference between two temporal logic formulas.

[0073] As shown in Fig. 7, the output blocks 33-21 to 33-26 displayed in the second display area 122 are highlighted at points where their waveforms differ from those of the output blocks 33-11 to 33-16 displayed at the same relative positions in the first display area 121. The points where the waveforms of the output blocks 33-11 to 33-16 in the first display area 121 and the output blocks 33-21 to 33-26 in the second display area 122 differ are points that contribute to the difference in true / false values ​​between the first temporal logic formula φ and the second temporal logic formula φ'. In the example of Fig. 7, the range that contributes to the difference in true / false values ​​is highlighted by being enclosed in a dashed rectangle, but the highlighting method can be selected arbitrarily. For example, the points that contribute to the difference in true / false values ​​may be displayed with a thick line, or the points that contribute to the difference in true / false values ​​and other points may be displayed in different colors.

[0074] Compared with the more widely used method of displaying differences in propositional logic, displaying differences in output signals in temporal logic has the advantage of being able to trace the time intervals that contribute to the difference in detail. To analyze the difference between two temporal logic formulas, it is necessary to identify the parts of each subformula contained in the temporal logic formula that cause the difference in meaning by tracing the temporal causal relationships of the semantics of the temporal logic formula. The tracing of temporal causal relationships must be performed starting from the top-level temporal logic formulas φ,φ', and proceeding through the subformulas directly below them and further down, based on the semantics of temporal logic.

[0075] By highlighting the difference between two temporal logic formulas, the user can closely track the time intervals that contribute to the difference in the truth values ​​of the two temporal logic formulas. For example, in Fig. 7, the time intervals that contribute to the difference in truth values ​​are highlighted with dashed rectangles in the output blocks 33-21 to 33-26 displayed in the second display area 122. This configuration suggests to the user that, when analyzing the difference between two temporal logic formulas, it is sufficient to focus only on the highlighted time intervals.

[0076] The layout of each functional block diagram displayed in the display area 120 can be freely changed. When the user selects (clicks, taps, etc.) any functional block in the display area 120 and moves (drags, etc.) it to a desired position, the functional block is fixed at the destination position and is rearranged to a position where other functional blocks or links are easily visible.

[0077] When two block diagrams are displayed in a comparable manner in the display area 120, changing the position of any functional block in one block diagram may cause the corresponding functional block in the other block diagram to move to the same relative position.

[0078] <Processing procedure of the temporal logic formula analysis system> The analysis method executed by the temporal logic formula analysis system 1 in this embodiment will be described with reference to Fig. 8. Fig. 8 is a flowchart showing an example of the analysis method in this embodiment.

[0079] In step S1, the user terminal 20 displays the analysis screen 100 of the analysis tool on the display device 506. The user inputs a first temporal logic formula to be analyzed in the input area 110 of the analysis screen 100. The user may input the first temporal logic formula by reading electronic data in which a previously created temporal logic formula is recorded. Alternatively, the user may input the first temporal logic formula by operating the input device 505 of the user terminal 20.

[0080] The transmitting unit 21 of the user terminal 20 acquires the first temporal logic formula input by the user. Next, the transmitting unit 21 transmits the acquired first temporal logic formula to the analysis device 10.

[0081] In the analysis device 10, the input unit 11 receives a first temporal logic formula from the user terminal 20. Next, the input unit 11 accepts the received input of the first temporal logic formula. Subsequently, the input unit 11 stores the accepted first temporal logic formula in the storage unit 12. At this time, the input unit 11 generates unique identification information that does not overlap with other temporal logic formulas stored in the storage unit 12, and associates the unique identification information with the first temporal logic formula. Then, the input unit 11 sends the first temporal logic formula to the creation unit 13.

[0082] In step S2, the creation unit 13 of the analysis device 10 receives the first temporal logic formula from the input unit 11. Next, the creation unit 13 creates a first block diagram representing the first temporal logic formula. Then, the creation unit 13 sends the first block diagram to the output unit 16.

[0083] In step S3, the output unit 16 of the analysis device 10 receives the first block diagram from the creation unit 13. Next, the output unit 16 reads out screen data of the analysis screen 100 from the storage unit 12. Subsequently, the output unit 16 embeds the first block diagram in the read-out screen data. Next, the output unit 16 stores the screen data with the embedded first block diagram in the storage unit 12. Then, the output unit 16 transmits the screen data with the embedded first block diagram to the user terminal 20.

[0084] In the user terminal 20, the display unit 22 receives the screen data in which the first block diagram is embedded from the analysis device 10. Next, the display unit 22 updates the analysis screen 100 of the analysis tool based on the received screen data. As a result, the analysis screen 100 including the first block diagram is displayed on the display device 506 of the user terminal 20.

[0085] In step S4-1, the user performs an operation to execute an example function on the first block diagram displayed on the analysis screen 100. The transmitter 21 of the user terminal 20 transmits a control signal instructing the execution of the example function to the analysis device 10. The control signal includes the first temporal logic formula or identification information of the first temporal logic formula.

[0086] In the analysis device 10, the exemplification unit 14 receives a control signal instructing execution of an example function. If the control signal includes a first temporal logic formula, the exemplification unit 14 acquires the first temporal logic formula from the control signal. Furthermore, if the control signal includes identification information, the exemplification unit 14 reads out the first temporal logic formula stored in the storage unit 12 based on the identification information.

[0087] The example unit 14 generates an example signal that sets the acquired first temporal logic formula as true. Next, the example unit 14 sends the generated example signal to the creation unit 13.

[0088] The creation unit 13 receives the first temporal logic formula and the example signal from the example unit 14. Next, the creation unit 13 sets the received example signal in the input block of the first block diagram. As a result, the output block of the first block diagram is updated to indicate the output signal when the example signal is input to the first temporal logic formula. Then, the creation unit 13 sends the first block diagram in which the example signal has been set to the output unit 16.

[0089] The output unit 16 receives the first block diagram from the creation unit 13. Next, the output unit 16 embeds the first block diagram in the screen data of the analysis screen 100. Then, the output unit 16 transmits the screen data in which the first block diagram is embedded to the user terminal 20.

[0090] In the user terminal 20, the display unit 22 receives the screen data in which the first block diagram is embedded from the analysis device 10. Next, the display unit 22 updates the analysis screen 100 of the analysis tool based on the received screen data. As a result, the analysis screen 100 including the first block diagram in which the example signal is set is displayed on the display device 506 of the user terminal 20.

[0091] In step S4-2, the user performs an operation to execute the explanation function for the first block diagram displayed on the analysis screen 100. The transmitter 21 of the user terminal 20 transmits a control signal instructing the execution of the explanation function to the analysis device 10. The control signal includes the first temporal logic formula or identification information of the first temporal logic formula, and an explanation signal to be explained.

[0092] The explanatory signal is a continuous time-varying signal prepared in advance by the user. The explanatory signal may be actual data observed in the system being developed. The explanatory signal may be an example signal generated using the example function. The explanatory signal may be a signal artificially generated by the user using any tool, etc. The explanatory signal may be prepared by someone other than the user of the analysis tool (for example, a developer who is jointly developing the system).

[0093] In analysis device 10, explanation unit 15 receives a control signal instructing execution of an explanation function. If the control signal includes a first temporal logic formula, explanation unit 15 acquires the first temporal logic formula from the control signal. Furthermore, if the control signal includes identification information, explanation unit 15 reads out the first temporal logic formula stored in memory unit 12 based on the identification information.

[0094] The explanation unit 15 calculates the explanation information of the first temporal logic formula based on the explanation signal included in the control signal. Next, the explanation unit 15 sends the generated explanation information to the creation unit 13.

[0095] The creation unit 13 receives the first temporal logic formula and the explanation information from the explanation unit 15. Next, the creation unit 13 sets an explanation signal in the input block of the first block diagram, and sets the received explanation information in the output block of the first block diagram. Then, the creation unit 13 sends the first block diagram with the explanation information set to the output unit 16.

[0096] The output unit 16 receives the first block diagram from the creation unit 13. Next, the output unit 16 embeds the first block diagram in the screen data of the analysis screen 100. Then, the output unit 16 transmits the screen data in which the first block diagram is embedded to the user terminal 20.

[0097] In the user terminal 20, the display unit 22 receives the screen data in which the first block diagram is embedded from the analysis device 10. Next, the display unit 22 updates the analysis screen 100 of the analysis tool based on the received screen data. As a result, the analysis screen 100 including the first block diagram in which the explanatory information has been set is displayed on the display device 506 of the user terminal 20.

[0098] In step S5, the user inputs the second temporal logic formula to be analyzed in the input area 110 of the analysis screen 100. The user may input the second temporal logic formula by editing the first temporal logic formula that was input in the input area 110 of the analysis screen 100. Alternatively, the user may input the second temporal logic formula by reading electronic data in which a temporal logic formula created in advance is recorded.

[0099] The transmitting unit 21 of the user terminal 20 acquires the second temporal logic formula input by the user. Next, the transmitting unit 21 transmits the acquired second temporal logic formula to the analysis device 10.

[0100] In the analysis device 10, the input unit 11 receives a second temporal logic formula from the user terminal 20. Next, the input unit 11 accepts the received input of the second temporal logic formula. Subsequently, the input unit 11 stores the accepted second temporal logic formula in the storage unit 12. At this time, the input unit 11 generates unique identification information that does not overlap with other temporal logic formulas stored in the storage unit 12, and associates the unique identification information with the second temporal logic formula. Then, the input unit 11 sends the second temporal logic formula to the creation unit 13.

[0101] The user may select the second temporal logic formula from the temporal logic formulas stored in the storage unit 12 of the analysis device 10. In this case, the user terminal 20 first displays a list of the temporal logic formulas stored in the storage unit 12 of the analysis device 10 on the display device 506. In response to the user's operation to select a temporal logic formula, the transmission unit 21 transmits identification information associated with the selected temporal logic formula to the analysis device 10.

[0102] In the analysis device 10, the input unit 11 receives identification information of a temporal logic formula from the user terminal 20. Next, the input unit 11 reads out the temporal logic formula stored in the storage unit 12 based on the received identification information. Then, the input unit 11 sends the read out temporal logic formula to the creation unit 13.

[0103] In step S6, the creation unit 13 of the analysis device 10 receives the second temporal logic formula from the input unit 11. Next, the creation unit 13 creates a second block diagram representing the second temporal logic formula. Then, the creation unit 13 sends the second block diagram to the output unit 16.

[0104] In step S7, output unit 16 of analysis device 10 receives the second block diagram from creation unit 13. Next, output unit 16 reads the screen data in which the first block diagram is embedded from storage unit 12. Subsequently, output unit 16 embeds the second block diagram in the read screen data. Then, output unit 16 transmits the screen data in which the first and second block diagrams are embedded to user terminal 20.

[0105] In the user terminal 20, the display unit 22 receives the screen data in which the first and second block diagrams are embedded from the analysis device 10. Next, the display unit 22 updates the analysis screen 100 of the analysis tool based on the received screen data. As a result, the analysis screen 100 including the first and second block diagrams is displayed on the display device 506 of the user terminal 20.

[0106] On the analysis screen 100, the first block diagram and the second block diagram are displayed in a comparable manner in the display area 120. For example, the display area 120 of the analysis screen 100 displays an aligned first display area 121 displaying the first block diagram and a second display area 122 displaying the second block diagram. At this time, the first block diagram and the second block diagram are displayed so that the relative positional relationship between the input block, the mathematical formula block, and the output block in the first block diagram matches the relative positional relationship between the input block, the mathematical formula block, and the output block in the second block diagram.

[0107] <Effects of the embodiment> The analysis device 10 in this embodiment outputs an analysis screen that displays a first block diagram showing the semantics of a first temporal logic formula and a second block diagram showing the semantics of a second temporal logic formula so that they can be compared. Therefore, the analysis device 10 in this embodiment can easily compare two temporal logic formulas, thereby enabling efficient analysis of temporal logic formulas.

[0108] The first block diagram in this embodiment is a block diagram connecting an input block indicating an input signal, a formula block indicating a first temporal logic formula, and an output block indicating an output signal when an input signal is input to the first temporal logic formula. The second block diagram is a block diagram connecting an input block indicating an input signal, a formula block indicating a second temporal logic formula, and an output block indicating an output signal when an input signal is input to the second temporal logic formula. Therefore, the analysis device 10 in this embodiment allows intuitive comparison of two temporal logic formulas.

[0109] The analysis device 10 in this embodiment displays the first and second block diagrams so that the relative positional relationships between the input blocks, formula blocks, and output blocks in the first block diagram match the relative positional relationships between the input blocks, formula blocks, and output blocks in the second block diagram. Therefore, the analysis device 10 in this embodiment allows the user to intuitively understand the differences between the two temporal logic formulas.

[0110] In the analysis device 10 of this embodiment, the output block displays the time change of the output signal on a graph having a time axis. Because a temporal logic formula represents time-series data, being able to check the time change of the output signal helps the user understand the meaning of the temporal logic formula. Therefore, the analysis device 10 of this embodiment can output a screen that makes it easy for the user to understand the meaning of the temporal logic formula.

[0111] When the output block of the first block diagram and the output block of the second block diagram show different output signals, the analysis device 10 of this embodiment displays the difference in the output signals in a graph. Therefore, the analysis device 10 of this embodiment can output a screen that allows the user to easily understand the differences between the temporal logic expressions.

[0112] The analysis device 10 in this embodiment changes any of the input block, formula block, and output block to any position in response to a user operation. Therefore, the analysis device 10 in this embodiment allows the user to compare temporal logic formulas in a desired arrangement.

[0113] When the position of an input block, formula block, or output block is changed in the first block diagram, the analysis device 10 in this embodiment changes the position of the input block, formula block, or output block in the second block diagram so that the relative positional relationship in the first block diagram matches the relative positional relationship in the second block diagram. Therefore, according to the analysis device 10 in this embodiment, even if the user changes the layout as desired, it is possible to output a screen that makes it easy to understand the differences in temporal logic formulas.

[0114] The analysis device 10 in this embodiment includes an output block that indicates an output signal of a sub-logical formula included in a temporal logic formula. A temporal logic formula can include one or more sub-logical formulas. Therefore, when there is a problem with the output of a temporal logic formula, if the sub-logical formula causing the problem can be identified, the problem can be solved efficiently. Therefore, the analysis device 10 in this embodiment can efficiently solve problems in temporal logic formulas.

[0115] In the analysis device 10 of this embodiment, output blocks are connected in a tree structure that indicates the containment relationships of the sublogical formulas. Furthermore, the analysis device 10 of this embodiment switches the expansion state of the tree structure when a user performs a predetermined operation on the output blocks. Because a complex temporal logic formula contains many sublogical formulas, it is efficient to be able to switch the number of blocks to be displayed when checking the output signals of the sublogical formulas. Therefore, the analysis device 10 of this embodiment makes it possible to efficiently check the output signals of many sublogical formulas.

[0116] The analysis device 10 in this embodiment displays the differences between two temporal logic formulas in a manner that is easy for the user to understand, so that the user can easily understand the differences between, for example, a temporal logic formula before revision and a temporal logic formula after revision.The user can efficiently create an intended temporal logic formula by repeatedly revising the temporal logic formula while checking the analysis results.For example, if temporal logic formulas can be efficiently created in an analysis task that appears in a product design process, product design can be carried out efficiently and the lead time for product development can be shortened.

[0117] [supplement] Each function of the above-described embodiments can be realized by one or more processing circuits. Here, the term "processing circuit" in this specification includes a processor programmed to perform each function by software, such as a processor implemented by an electronic circuit, as well as devices such as an ASIC (Application Specific Integrated Circuit), a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), and conventional circuit modules designed to perform each of the above-described functions.

[0118] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to these embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims.

[0119] This application claims priority from Japanese Patent Application No. 2023-30334, filed with the Japan Patent Office on February 28, 2023, the entire contents of which are incorporated herein by reference. [Explanation of symbols]

[0120] 1 Temporal Logic Formula Analysis System 10 Analysis device 11 Input section 12 Storage section 13 Creation Department 14 Example Section 15 Explanation Section 16 Output section 20 User terminal 21 Transmitter 22 Display section

Claims

1. an input unit that accepts input of a first temporal logic formula and a second temporal logic formula; an output unit that outputs a screen that displays a first block diagram showing the first temporal logic formula and a second block diagram showing the second temporal logic formula so that they can be compared; An analysis device comprising:

2. The analysis device according to claim 1 , the first block diagram is connected to an input block indicating an input signal, a formula block indicating the first temporal logic formula, and an output block indicating an output signal when the input signal is input to the first temporal logic formula; the second block diagram is connected to an input block indicating the input signal, a formula block indicating the second temporal logic formula, and an output block indicating an output signal when the input signal is input to the second temporal logic formula; Analysis device.

3. The analysis device according to claim 2, the screen displays the first block diagram and the second block diagram so that a relative positional relationship between the input block, the formula block, and the output block in the first block diagram coincides with a relative positional relationship between the input block, the formula block, and the output block in the second block diagram. Analysis device.

4. The analysis device according to claim 2, the output block displays a time variation of the output signal on a graph having a time axis; Analysis device.

5. The analysis device according to claim 4, When the output block of the first block diagram and the output block of the second block diagram show different output signals, the screen displays the difference between the output signals on the graph. Analysis device.

6. The analysis device according to claim 3, the screen changes the position of any one of the input block, the formula block, and the output block in response to an operation by a user; Analysis device.

7. The analysis device according to claim 6, when the position of the input block, the formula block, or the output block is changed in the first block diagram, the screen changes the position of the input block, the formula block, or the output block in the second block diagram so that the relative positional relationship in the first block diagram and the relative positional relationship in the second block diagram coincide with each other. Analysis device.

8. 8. The analysis device according to claim 2, the first block diagram includes an output block indicating an output signal of a sub-logical formula included in the first temporal logic formula; the second block diagram includes an output block indicating an output signal of a sub-logical formula included in the second temporal logic formula; Analysis device.

9. The analysis device according to claim 8, output blocks indicating output signals of the sublogical formulas are connected in a tree structure indicating inclusion relationships of the sublogical formulas; Analysis device.

10. The analysis device according to claim 9, the screen switches the expansion state of the tree structure when a predetermined operation is performed on the output block by the user; Analysis device.

11. 8. The analysis device according to claim 2, The screen is displaying a continuous time-varying signal for which the first temporal logic formula is true at the output block of the first block diagram; or a continuous time-varying signal for which the second temporal logic formula is true is displayed in the output block of the second block diagram; Analysis device.

12. 8. The analysis device according to claim 2, The screen is A continuous time-varying signal is input, and a truth value of the first temporal logic formula calculated based on the continuous time-varying signal is displayed in the output block of the first block diagram; or the continuous time-varying signal is input, and the truth value of the second temporal logic formula calculated based on the continuous time-varying signal is displayed in the output block of the second block diagram; Analysis device.

13. The computer a step of receiving an input of a first temporal logic formula and a second temporal logic formula; a step of outputting a screen displaying a first block diagram showing the first temporal logic formula and a second block diagram showing the second temporal logic formula so as to be comparable; The analysis method to perform.

14. On the computer, a step of receiving an input of a first temporal logic formula and a second temporal logic formula; a step of outputting a screen displaying a first block diagram showing the first temporal logic formula and a second block diagram showing the second temporal logic formula so as to be comparable; A program to execute.

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