adhesive tape

Abstract

To provide an adhesive tape capable of accurately suppressing or preventing occurrence of an adhesive residue at an edge of a component caused by an expanding step and occurrence of jumping-out of the component in extension of the adhesive tape in the expanding step when obtaining the component such as a semiconductor chip, which is formed on the adhesive tape by individualizing a substrate such as a semiconductor wafer, by picking up after the expanding step of expanding the adhesive tape.SOLUTION: An adhesive tape comprises a base material 4 and an adhesive layer 2. When obtaining a plurality of components by individualizing a substrate, the adhesive tape is used while temporarily fixing the substrate and the components to the adhesive layer without cutting the adhesive layer by cutting the substrate in a thickness direction. The adhesive layer 2 satisfies a gel fraction after energy application of 90% or more and a peel strength A of 100 cN / 20 mm or more and 500 cN / 20 mm or less.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to an adhesive tape used for temporarily fixing a substrate and a component. [Background technology]

[0002] In response to the recent trend toward more sophisticated electronic devices and the expansion of mobile applications, there is a growing demand for higher density and integration of semiconductor devices, and IC packages are becoming larger in capacity and higher in density.

[0003] A method for manufacturing these semiconductor devices includes, for example, first applying a dicing tape to a semiconductor substrate (semiconductor wafer) as a substrate, and then, while the periphery of the semiconductor substrate is fixed with a wafer ring, a dicing process is performed using a dicing saw to cut the semiconductor substrate halfway through its thickness, forming a matrix of multiple grooves. The dicing tape is then peeled off from the semiconductor substrate with the grooves formed. Next, a grinding tape (adhesive tape) is applied to the side of the semiconductor substrate where the grooves are formed. A grinding process is performed using a grinder to grind the side opposite the side where the grooves are formed until the grooves are exposed on the opposite side, thereby cutting and separating (singulating) the semiconductor substrate with the grooves into individual semiconductor elements (semiconductor chips). Next, while the periphery of the multiple singulated semiconductor elements is fixed with a wafer ring, the grinding tape is radially stretched using the wafer ring to form gaps between adjacent semiconductor elements. This is followed by a pick-up process in which the singulated semiconductor elements are picked up in a raised state using a needle. Next, the picked-up semiconductor element is transferred to a mounting process for mounting it on a metal lead frame or a substrate (e.g., a tape substrate, an organic hard substrate, etc.). In the mounting process, the picked-up semiconductor element is adhered to the lead frame or the substrate via, for example, an underfill material, and then the semiconductor element is sealed on the lead frame or the substrate with a sealing part, thereby manufacturing a semiconductor device.

[0004] In the manufacture of such semiconductor devices, multiple semiconductor elements are obtained in one batch by dicing a semiconductor substrate, and the so-called dicing before back grinding (DBG) method is applied to this processing process. In recent years, various studies have been conducted on the grinding tape (adhesive tape) used in this DBG method (see, for example, Patent Document 1).

[0005] This grinding tape generally has a substrate (film substrate) and an adhesive layer formed on the substrate, and the adhesive layer fixes the semiconductor substrate with grooves formed thereon. Furthermore, the adhesive layer is usually composed of a resin composition containing an adhesive base resin and a photocurable resin, etc., so that the semiconductor element can be picked up after the grinding process, which grinds the surface opposite to the surface on which the grooves are formed of the semiconductor substrate. That is, when energy is applied to the adhesive layer after the grinding process, the resin composition hardens, reducing the adhesiveness of the adhesive layer. Therefore, in the pick-up process, when the semiconductor element is pushed up with a needle, the grinding tape can be peeled off from the semiconductor element, thereby enabling the semiconductor element to be picked up.

[0006] In the semiconductor device manufacturing method using abrasive tape, which involves the above-described steps, the abrasive tape is not adhered to the semiconductor substrate during the dicing process using a dicing saw. Therefore, the adhesive layer of the abrasive tape is not cut in its thickness direction by the dicing saw to correspond to the semiconductor elements formed by singulating the semiconductor substrate during the expanding process performed after the dicing process. Therefore, when the abrasive tape is radially expanded during the expanding process to form gaps between adjacent semiconductor elements, stress is generated in the adhesive layer laminated on the substrate, particularly in the adhesive layer located at the position corresponding to the gap. This stress in the adhesive layer then generates shear stress between the adhesive layer and the semiconductor element. As a result, the adhesive layer peels off from the semiconductor element at the edge of the semiconductor element, leaving a problem of adhesive residue, where part of the adhesive layer remains, in the area where the peeling occurred at the edge of the semiconductor element. Furthermore, if the adhesive strength of the adhesive layer (grinding tape) is too low, i.e., if the adhesive layer's ability to hold the semiconductor element is too low, the peeling of the adhesive layer from the semiconductor element as described above will not be limited to the edge of the semiconductor element, but will extend to the entire element, resulting in the problem of so-called chip fly-off.

[0007] Furthermore, this problem is not limited to when semiconductor elements, which are individualized components using the DBG method described above, are picked up after the expanding process of stretching the grinding tape, but can also occur in various component manufacturing methods that involve processes in which the adhesive layer is not cut by cutting the semiconductor substrate in the thickness direction as a substrate. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-156339 Summary of the Invention [Problem to be solved by the invention]

[0009] An object of the present invention is to provide an adhesive tape that can accurately suppress or prevent the occurrence of glue residue on the edges of components caused by undergoing an expanding step in which the adhesive tape is stretched, and the occurrence of components flying off when the adhesive tape is stretched in the expanding step, when components such as semiconductor chips formed on an adhesive tape by dividing a substrate such as a semiconductor wafer are obtained by picking them up. [Means for solving the problem]

[0010] Such objectives are as follows: (1) 9 This is achieved by the present invention described in (1) A substrate and an adhesive layer laminated on one surface of the substrate, An adhesive tape used in obtaining a plurality of components by dicing a substrate, in which the substrate and the components are temporarily fixed to the adhesive layer without the adhesive layer being cut by cutting the substrate in a thickness direction, the adhesive layer contains a base resin having adhesiveness and a curable resin that is cured by the application of energy, the base resin is an acrylic resin containing, as a monomer component, in addition to a (meth)acrylic acid ester, one or more copolymerizable monomers selected from the group consisting of acrylic acid, N,N-dimethylacrylamide, and vinyl acetate; The adhesive layer is The energy is ultraviolet intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 The adhesive tape has a gel fraction of 90% or more after irradiation with ultraviolet light, and the adhesive tape satisfies the following requirement A. Requirement A: The adhesive tape is such that, in accordance with JIS Z 0237, a 20 mm wide piece of the adhesive tape is attached to a #2000 polished silicon wafer with the adhesive layer facing the silicon wafer, the adhesive layer is then irradiated with ultraviolet light as the energy, and one end of the adhesive tape is then held and peeled off at a rate of 1000 mm / min at 25°C in a direction of 30°, resulting in a peel strength A measured at 100 cN / 20 mm or more and 500 cN / 20 mm or less.

[0011] (2) The adhesive tape according to (1), wherein the adhesive layer has a gel fraction of 50% or more and 80% or less before the application of energy.

[0012] (3) The adhesive tape according to (1) or (2) above, wherein the peel strength B measured when a 20 mm wide adhesive tape is applied to a #2000 polished silicon wafer in accordance with JIS Z 0237, with the adhesive layer facing the silicon wafer, and then, before the energy is applied to the adhesive layer, the adhesive tape is held at one end and peeled at a speed of 1000 mm / min in a direction of 30° at 25°C, is 700 cN / 20 mm or more and 1500 cN / 20 mm or less.

[0013] (4) The adhesive tape is an adhesive tape according to any one of (1) to (3) above, used for processing a semiconductor wafer having a plurality of grooves formed in a matrix in the thickness direction of the semiconductor wafer as the substrate, the grooves not reaching from one side of the semiconductor wafer to the other side.

[0014] (5) The adhesive tape according to (4) above is used to temporarily fix the semiconductor wafer and the semiconductor chips on the adhesive layer when the semiconductor wafer is individually divided into semiconductor chips by grinding the other surface to expose the grooves on the other surface after processing the semiconductor wafer to form the grooves in a matrix.

[0015] (6) The pressure-sensitive adhesive tape according to any one of (1) to (5) above, wherein the curable resin contains at least one of epoxy acrylate, urethane acrylate, and polyester acrylate.

[0017] ( 7 When the pressure-sensitive adhesive tape is viewed in plan view, bubbles formed at the interface between the substrate and the pressure-sensitive adhesive layer have an area of ​​100 μm 2 The number of the above is 15.0 pieces / mm 2 The above (1) to ( 6) The adhesive tape according to any one of the preceding claims.

[0018] ( 8 The substrate has a surface resistivity of 1.0×10 on one side thereof. 8 (Ω / □) and its volume resistivity is 1.0×10 16 (Ω·m) or less above (1) to ( 7 ) The adhesive tape according to any one of the preceding claims.

[0019] ( 9 ) The adhesive tape satisfies the following requirement B. 8 ) The adhesive tape according to any one of the preceding claims. Requirement B: A silicon substrate (6 inches in diameter, 500 μm thick, #2000 polishing) is subjected to a process of forming a plurality of grooves in a matrix pattern from one side to a position 200 μm in the thickness direction using a 30 μm thick blade, and then the one side is fixed with the adhesive tape. Then, the other side of the silicon substrate is ground using a #320 grinder until the grooves are exposed, thereby obtaining individual silicon chips measuring 2 mm long x 2 mm wide. After that, the ultraviolet intensity is 55 mW / cm. 2 , Irradiation intensity: 200mJ / cm 2 The adhesive tape is irradiated with ultraviolet light of 1.0% or less, the substrate is stretched to 110% of its original size in the surface direction of the substrate, and a needle is pushed up 1.5 mm from the surface of the substrate opposite the adhesive layer. When the silicon chip is then picked up using a vacuum collet and peeled off from the adhesive tape, the adhesive residue rate1 on the back surface of the silicon chip is 1.0% or less. [Effects of the Invention]

[0020] According to the present invention, when components such as semiconductor chips formed on adhesive tape by dividing a substrate such as a semiconductor wafer into individual pieces are obtained by picking up the components after an expanding step in which the adhesive tape is stretched, even if energy is applied to the adhesive layer prior to the expanding step, it is possible to reliably suppress or prevent the occurrence of adhesive residue at the edges of the components due to the expanding step.Furthermore, it is possible to reliably suppress or prevent the occurrence of components flying off when the adhesive tape is stretched in the expanding step. [Brief explanation of the drawings]

[0021] [Figure 1] 1 is a longitudinal sectional view showing an example of a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention. [Figure 2] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 3] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 4] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 5] 1 is a longitudinal sectional view showing an embodiment of a pressure-sensitive adhesive tape of the present invention. [Figure 6] 6 is a vertical cross-sectional view illustrating a method for producing the pressure-sensitive adhesive tape shown in FIG. 5. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0022] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The pressure-sensitive adhesive tape of the present invention will be described in detail below with reference to preferred embodiments shown in the accompanying drawings. First, before describing the pressure-sensitive adhesive tape of the present invention, an example of a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention will be described.

[0023] <Semiconductor device> Figure 1 is a longitudinal cross-sectional view showing an example of a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention. In the following description, the upper side in Figure 1 will be referred to as "top" and the lower side as "bottom." In addition, in each drawing referred to in this specification, dimensions in the left-right direction and / or thickness direction are exaggerated and differ significantly from the actual dimensions.

[0024] The semiconductor device 10 shown in Figure 1 has a semiconductor chip 20 (semiconductor element), an interposer 30 (substrate) that supports the semiconductor chip 20, a plurality of conductive bumps 70 (terminals), and a molded portion 17 (sealing portion) that seals the semiconductor chip 20.

[0025] The interposer 30 is an insulating substrate and is made of various resin materials such as polyimide, epoxy, cyanate, bismaleimide triazine (BT resin), etc. The planar shape of the interposer 30 is usually a quadrangle such as a square or rectangle.

[0026] On the upper surface (one surface) of the interposer 30, terminals 41 made of a conductive metal material such as copper are provided in a predetermined shape.

[0027] Furthermore, a plurality of vias (through holes) (not shown) are formed in the interposer 30 so as to penetrate through the interposer 30 in the thickness direction.

[0028] Each bump 70 has one end (upper end) electrically connected to a part of the terminal 41 through a respective via, and the other end (lower end) protrudes from the lower surface (other surface) of the interposer 30.

[0029] The portion of the bump 70 that protrudes from the interposer 30 is substantially spherical (ball-shaped).

[0030] The bumps 70 are mainly made of a brazing material such as solder, silver brazing, copper brazing, or phosphorus copper brazing.

[0031] Furthermore, terminals 41 are formed on the interposer 30. Terminals 21 of the semiconductor chip 20 are electrically connected to the terminals 41 via connecting portions 81.

[0032] In this embodiment, as shown in FIG. 1, the terminals 21 are configured to protrude from the surface formed on the semiconductor chip 20, and the terminals 41 are also configured to protrude from the interposer 30.

[0033] The gap between the semiconductor chip 20 and the interposer 30 is filled with an underfill material made of various resin materials, and the hardened underfill material forms a sealing layer 80. This sealing layer 80 has the function of improving the bonding strength between the semiconductor chip 20 and the interposer 30 and the function of preventing the intrusion of foreign matter, moisture, etc. into the gap.

[0034] Furthermore, on the upper side of the interposer 30, a molded portion 17 formed to cover the semiconductor chip 20 and the interposer 30 is made of a hardened semiconductor sealing material (sealant), thereby sealing the semiconductor chip 20 within the semiconductor device 10 and preventing the intrusion of foreign matter, moisture, etc. into the semiconductor chip 20.

[0035] 1, the semiconductor chip 20 (semiconductor element) has a semiconductor chip body 23 (semiconductor element body) and terminals 21 protruding from the lower surface of the semiconductor chip body 23. A circuit (not shown) is built into the upper surface of the semiconductor chip body 23, and the semiconductor chip body 23 is mainly made of a semiconductor material such as Si, SiC, GaN, or Ga2O3.

[0036] The semiconductor device 10 and the semiconductor chip 20 having such a configuration are manufactured as follows by, for example, a method for manufacturing a semiconductor device using an adhesive tape.

[0037] <Method of manufacturing a semiconductor device> 2 to 4 are longitudinal cross-sectional views illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the adhesive tape of the present invention. In the following description, the upper side in FIGS. 2 to 4 will be referred to as "top" and the lower side as "bottom." In addition, in each of the drawings referred to in this specification, the dimensions in the left-right direction and / or thickness direction are exaggerated and differ significantly from the actual dimensions.

[0038] [1A] First, prepare an adhesive tape 150 (dicing tape) composed of a laminate having a base material 154 and an adhesive layer 152 laminated on the upper surface of the base material 154. As shown in FIG. 2(a), a semiconductor substrate 7 (semiconductor wafer) is placed on the adhesive layer 152 of the adhesive tape 150 and then lightly pressed down, thereby laminating (attaching) the semiconductor substrate 7 to the adhesive tape 150.

[0039] Circuits to be included in the semiconductor chips 20 formed by singulation are formed in advance on the semiconductor substrate 7, and a plurality of these circuits are fabricated on the semiconductor substrate 7 so that the semiconductor chips 20 are arranged in a grid pattern. Therefore, the semiconductor substrate 7 is cut into a grid pattern in a plan view so that each circuit is independent, thereby obtaining the singulated semiconductor chips 20, and the lines along which the semiconductor substrate 7 is cut into a grid pattern are called lines to cut. Therefore, when the semiconductor substrate 7 is viewed in a plan view, a plurality of lines to cut are formed in a grid pattern (matrix pattern) along both the vertical and horizontal directions of the semiconductor substrate 7, corresponding to the circuits of the semiconductor chips 20 arranged in a grid pattern on the semiconductor substrate 7.

[0040] [2A] Next, the semiconductor substrate 7 attached to the adhesive tape 150 is cut along the intended cutting lines to form a plurality of grooves 73 deeper than the finished thickness of the semiconductor chips 20, in a grid pattern from the surface 71 of the semiconductor substrate 7 to partway through its thickness (see Figure 2(b)).

[0041] The grooves 73 can be formed in the surface 71 of the semiconductor substrate 7, for example, by scanning a dicing saw 221 provided in a cutting device in a grid pattern along the intended cutting lines, as shown in Figure 2(b).

[0042] [3A] Next, an adhesive tape 100 (grinding tape) having a base material 4 and an adhesive layer 2 laminated on the upper surface (one surface) of the base material 4 is prepared, and the adhesive tape 100 is pressed against the surface 71 of the semiconductor substrate 7, i.e., the surface 71 on which the groove portion 73 is formed, with the adhesive layer 2 of the adhesive tape 100 facing the surface 71, thereby laminating (affixing) the center portion 122 of the adhesive layer 2 (see Figure 2(c)).

[0043] That is, a semiconductor substrate 7 (semiconductor wafer) as a substrate is temporarily fixed with adhesive tape 100.

[0044] In this step, it is preferable that, prior to temporarily fixing the adhesive tape 100 to the semiconductor substrate 7, an elongation force is applied to the adhesive tape 100 to stretch the adhesive tape 100 in at least one direction, and then the adhesive tape 100 is temporarily fixed to the semiconductor substrate 7. This allows the adhesive tape 100 to be attached to the semiconductor substrate 7 without causing wrinkles in the adhesive tape 100. In this case, when the adhesive tape 100 is disc-shaped corresponding to the shape of the semiconductor substrate 7, the direction in which the elongation force is applied to the adhesive tape 100 may be a direction radially extending from the center of the adhesive tape 100, or a direction passing through the center of the adhesive tape 100. Furthermore, when the planar shape of the adhesive tape 100 is a rectangular sheet, the elongation force may be applied in either the longitudinal direction or the lateral direction, or both.

[0045] [4A] Next, the back surface 72 of the semiconductor substrate 7 opposite to the front surface 71 is ground or polished (back-grinded) with the adhesive tape 100 attached to the front surface 71 side (see FIG. 2(d)).

[0046] Grinding and polishing of the rear surface 72 of the semiconductor substrate 7 can be performed, for example, by placing the semiconductor substrate 7 with the adhesive tape 100 attached on a BG table 250 with the adhesive tape 100 facing downward, and further fixing the outer periphery 121 of the adhesive layer 2 with a wafer ring 9, using a grinder 231 provided in the grinding device, as shown in Figure 2(d).

[0047] Then, the grinding and polishing of the rear surface 72 of the semiconductor substrate 7 is carried out until the grooves 73 formed from the front surface 71 side of the semiconductor substrate 7 are reached, that is, until the grooves 73 are exposed.

[0048] As a result, the semiconductor substrate 7 is divided into individual pieces corresponding to the positions where the semiconductor chips 20 are fabricated, and as shown in Figure 2(e), multiple individual semiconductor chips 20 are formed as parts in a state where they are adhered to the adhesive layer 2 on the adhesive tape 100.

[0049] By grinding and polishing the rear surface 72 in this way, the thickness of the semiconductor chip 20 formed on the adhesive tape 100 varies depending on the electronic device to which the semiconductor device 10 is applied, but is preferably set to about 50 μm or more and 600 μm or less, and more preferably about 50 μm or more and 250 μm or less. This reduces the thickness of the formed semiconductor chip 20, and realizes miniaturization of the semiconductor device 10 including such semiconductor chip 20, and further miniaturization of the IC package.

[0050] [5A] Next, as shown in FIG. 3(a), the adhesive tape 100 on which the individual semiconductor chips 20 are laminated is placed on the pickup table 200 with the outer periphery 121 of the adhesive layer 2 fixed by the wafer ring 9, and then the adhesive layer 2 is irradiated with energy rays through the substrate 4 to reduce the adhesive force of the adhesive layer 2 to the semiconductor chips 20.

[0051] Examples of energy rays include ultraviolet rays, particle rays such as electron beams and ion beams, and combinations of two or more of these energy rays. Among these, ultraviolet rays are particularly preferred. Ultraviolet rays can efficiently reduce the adhesiveness of the adhesive layer 2 to the semiconductor chip 20.

[0052] [6A] Next, while maintaining the adhesive layer 2 fixed by the wafer ring 9 at the outer periphery 121, the adhesive tape 100 is expanded radially along its surface by pushing its center 210 upward against the outer periphery 220 of the pickup table 200, thereby forming gaps 25 with a fixed spacing between the individual semiconductor chips 20 (see Figure 3(b)).

[0053] In this way, in this step [6A], when the adhesive tape 100 having multiple semiconductor chips 20 formed on the adhesive layer 2 is radially stretched (expanded) along its surface direction, the adhesive tape of the present invention is used as the adhesive tape 100, thereby making it possible to accurately suppress or prevent the occurrence of glue residue at the edges of the semiconductor chips 20 as components resulting from undergoing this step [6A], and further making it possible to accurately suppress or prevent the semiconductor chips 20 from flying off when the adhesive tape 100 is stretched in this step [6A], a detailed explanation of which will be given later.

[0054] [7A] Next, with the gap 25 formed through step [6A], the semiconductor chip 20 is picked up by suction with a vacuum collet or air tweezers (pick-up step; see Figure 3(c)).

[0055] To pick up this semiconductor chip 20, after expanding the adhesive tape 100 radially in step [6A], a needle provided on the pickup table 200 is protruded in the thickness direction from the pickup table 200. As a result, the semiconductor chip 20 attached to the adhesive tape 100 is pushed up by the needle, and the semiconductor chip 20 is picked up in a state where it is peeled off from the adhesive tape 100, as shown in Figure 3(c).

[0056] By going through the above steps [1A] to [7A], the individual semiconductor chips 20 are separated from the semiconductor substrate 7 using the adhesive tapes 100, 150, and the processing process of the semiconductor chips 20 from the semiconductor substrate 7 in steps [1A] to [7A] is composed of so-called dicing before back grinding (DBG).

[0057] [8A] Next, the picked-up semiconductor chip 20 is transferred from the vacuum collet or air tweezers to a mounting probe or the like, and then, as shown in Figure 4(a), the terminals 21 of this semiconductor chip 20 and the terminals 41 of the interposer 30 are placed opposite each other via the solder bumps 85 provided on the terminals 41, and the semiconductor chip 20 (semiconductor element) is placed on the interposer 30 (substrate) with the surface of the semiconductor chip 20 on which the terminals 21 are formed facing downward.

[0058] [9A] Next, as shown in FIG. 4(b), the interposer 30 and the semiconductor chip 20 are brought close to each other while the solder bumps 85 interposed between the terminals 21 and 41 are heated.

[0059] As a result, the molten solder bump 85 comes into contact with both the terminal 21 and the terminal 41, and when cooled in this state, a connection portion 81 is formed, and as a result, the terminal 21 and the terminal 41 are electrically connected via the connection portion 81 (see Figure 4(c)).

[0060] [10A] Next, an underfill material (sealing material) made of various resin materials is filled into the gap formed between the semiconductor chip 20 and the interposer 30, and then the underfill material is hardened to form a sealing layer 80 made of the hardened underfill material (see Figure 4(d)).

[0061] [11A] Next, a molded portion 17 (sealing portion) is formed on the upper side of the interposer 30 so as to cover the semiconductor chip 20 and the interposer 30, thereby sealing the semiconductor chip 20 between the interposer 30 and the molded portion 17, and a bump 70 electrically connected to a portion of the terminal 41 through a via provided in the interposer 30 is formed so as to protrude from the underside of the interposer 30 (see Figure 4(e)).

[0062] Here, sealing with the molded portion 17 is performed, for example, by preparing a molding die having an internal space corresponding to the shape of the molded portion 17 to be formed, and filling the internal space with a powdered semiconductor encapsulating material so as to cover the semiconductor chip 20 and interposer 30 arranged in the internal space. Then, in this state, the semiconductor encapsulating material is heated to harden it, resulting in a hardened product of the semiconductor encapsulating material.

[0063] The semiconductor device manufacturing method having the steps described above produces a semiconductor device 10. More specifically, after performing the steps [1A] to [11A], the steps [7A] to [11A] are repeatedly performed, whereby a plurality of semiconductor devices 10 can be manufactured in a batch from one semiconductor substrate 7.

[0064] Of the adhesive tapes 100 and 150 used in the above-described method for manufacturing a semiconductor device, the adhesive tape of the present invention is applied to the adhesive tape 100 (grinding tape). Hereinafter, the adhesive tape 100 to which the adhesive tape of the present invention is applied will be described.

[0065] <Adhesive Tape 100> Figure 5 is a longitudinal cross-sectional view showing an embodiment of the pressure-sensitive adhesive tape of the present invention. In the following description, the upper side in Figure 5 will be referred to as "top" and the lower side as "bottom." In addition, in each drawing referred to in this specification, dimensions in the left-right direction and / or thickness direction are exaggerated and differ significantly from the actual dimensions.

[0066] In the manufacturing method of the semiconductor chip 20 as described above, if a conventional adhesive tape is used as the adhesive tape 100, the adhesive layer 2 may peel off from the semiconductor chip 20 at the edge of the surface 71 of the semiconductor chip 20 (semiconductor element) due to the expansion of the adhesive tape 100 along the surface direction in the step [6A], and a problem may arise in which part of the adhesive layer 2 remains as adhesive residue in the area where the peeling occurs at the edge of the semiconductor chip 20.Furthermore, if the adhesive strength of the adhesive layer 2 is too low, i.e., if the holding power of the adhesive layer 2 to the semiconductor chip 20 is too low, the peeling of the adhesive layer 2 from the semiconductor chip 20 as described above is not limited to the edge of the surface 71 of the semiconductor chip 20 but extends to the entire surface 71, resulting in the problem of so-called chip fly-off.

[0067] Here, in the processing process of semiconductor chips 20 from semiconductor substrate 7 through steps [1A] to [7A] using the DBG method, in step [2A] of forming grooves 73 in semiconductor substrate 7 using dicing saw 221, adhesive tape 150 (dicing tape) is attached to the back surface 72 of semiconductor substrate 7 (see FIG. 2(a)). Adhesive tape 100 (grinding tape) is not attached to semiconductor substrate 7, and is attached to front surface 71 of semiconductor substrate 7 for the first time in step [3A] (see FIG. 2(c)). Therefore, naturally, in step [6A] of expanding adhesive tape 100 along its surface direction, adhesive layer 2 of adhesive tape 100 is not cut in its thickness direction by the dicing saw to correspond to semiconductor chips 20 formed by singulating semiconductor substrate 7 (see FIG. 3(b)).

[0068] Therefore, in the step [6A], when the adhesive tape 100 is stretched radially along its surface direction to form gaps 25 between adjacent semiconductor chips 20, stress is generated in the adhesive layer 2 laminated on the base material 4, particularly in the adhesive layer 2 located at a position corresponding to the gap 25. This stress generated in the adhesive layer 2 generates shear stress between the adhesive layer 2 and the semiconductor chip 20. This shear stress generated between the adhesive layer 2 and the semiconductor chip 20 causes the adhesive layer 2 to peel off from the surface 71 of the semiconductor chip 20 at the edge of the surface 71 of the semiconductor chip 20, and furthermore, as described above, a problem occurs in that adhesive residue occurs in which part of the adhesive layer 2 remains in the region where peeling has occurred at the edge of the surface 71 of the semiconductor chip 20.

[0069] In consideration of these problems, the inventors have conducted extensive research and have found that the occurrence of adhesive residue, where part of the adhesive layer 2 remains at the edge of the surface 71 of the semiconductor chip 20, is related to the content of sol components contained in the adhesive layer 2 after energy is applied to the adhesive layer 2.

[0070] As a result of further investigation, the present inventors have found that it is possible to control the content of the sol component contained in the adhesive layer 2 to an appropriate level after applying energy to the adhesive layer 2, specifically, to achieve the following: ultraviolet intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 The inventors have found that the above problems can be solved by setting the gel fraction of the adhesive layer 2 after irradiation of the adhesive layer 2 with ultraviolet light to 90% or more, and have thus completed the present invention.

[0071] Here, the gel fraction was determined by using a predetermined solvent and using ultraviolet light intensity of 55 mW / cm as energy. 2 , Irradiation intensity: 200mJ / cm 2 When the adhesive layer 2 is irradiated with ultraviolet light and then dissolved, the portion that remains as a cross-linking component without dissolving is called a gel portion, and the mass is expressed as the ratio (percentage) of the mass of this gel portion to the mass of the adhesive layer 2 before it was dissolved using a solvent.

[0072] More specifically, in this embodiment, the gel fraction is determined by first using ultraviolet light with an energy intensity of 55 mW / cm. 2 , Irradiation intensity: 200mJ / cm 2 The adhesive layer 2 is irradiated with ultraviolet light, and then approximately 0.1 g of this adhesive layer 2 is prepared as a test piece and its mass is measured. Next, the mass of a Tetron mesh (#200) cut into an approximately 100 x 100 mm square is measured. The Tetron mesh is then folded so that the test piece is facing inward, and three sides are further folded and stapled together, and the mass of the entire sample is measured. The sample is then immersed in ethyl acetate as a solvent at 40°C for three days. The sample is then removed and dried by heating at 120°C for one hour.

[0073] The mass of the entire sample was then measured, and the mass of the Tetron mesh and stapler was subtracted to calculate the mass of the test piece after immersion in ethyl acetate. The gel fraction after application of energy to the adhesive layer 2 was then calculated using the following formula (A).

[0074] Gel fraction = {(mass of test piece after immersion in ethyl acetate)} / {(mass of test piece before immersion in ethyl acetate)} × 100 [%] … (A)

[0075] By setting the gel fraction of the adhesive layer 2 after application of energy to 90% or more, the content of the sol component contained in the adhesive layer 2 after application of energy can be appropriately set low, thereby appropriately suppressing or preventing the occurrence of adhesive residue, where part of the adhesive layer 2 remains, on the edge of the surface 71 of the semiconductor chip 20. Therefore, the multiple semiconductor chips 20 obtained in the step [7A] are highly reliable.

[0076] The magnitude of the gel fraction (%) can be adjusted by appropriately changing the types and contents of the base resin, curable resin, and crosslinking agent contained as constituent materials of the adhesive layer 2, which will be described later.

[0077] Furthermore, in the present invention, in the step [6A], after applying energy to the adhesive layer 2, the adhesive tape 100 is stretched radially along its surface direction to form a gap 25 between adjacent semiconductor chips 20, so as to prevent the peeling of the adhesive layer 2 from the semiconductor chip 20 as described above from occurring not only at the edge of the surface 71 of the semiconductor chip 20 but also over the entire surface 71, i.e., so-called chip flying. In order to prevent this, in the step [7A], the semiconductor chip 20 needs to be fixed with the adhesive tape 100 with excellent adhesiveness to the extent that the semiconductor chip 20 can be picked up, and the magnitude of this adhesive strength can be expressed by the following requirement A.

[0078] Requirement A: The adhesive tape 100 is prepared in accordance with JIS Z 0237 by adhering a 20 mm wide adhesive tape 100 to a silicon wafer polished to #2000 with the adhesive layer 2 facing the silicon wafer, and then applying ultraviolet light to the adhesive layer 2 as energy with an ultraviolet intensity of 55 mW / cm. 2 , Irradiation intensity: 200mJ / cm 2 The adhesive tape 100 is then irradiated with ultraviolet light of 1000 nm, and one end of the adhesive tape 100 is held and peeled at a speed of 1000 mm / min in a direction of 30° at 25°C. The peel strength A measured is 100 cN / 20 mm or more and 500 cN / 20 mm or less.

[0079] By satisfying this requirement A, in the step [6A], which is performed after applying energy to the adhesive layer 2, the adhesive tape 100 is stretched radially along its surface direction, so that when forming a gap 25 between adjacent semiconductor chips 20, peeling of the adhesive layer 2 from the surface 71 of the semiconductor chip 20 as described above can be accurately suppressed or prevented from occurring, causing chip flying that extends over the entire surface 71 of the semiconductor chip 20, and the semiconductor chip 20 can be reliably picked up in the step [7A].

[0080] The adhesive tape 100 to which the adhesive tape of the present invention is applied as described above is composed of a laminate including a sheet-shaped substrate 4 containing a resin material and an adhesive layer 2 laminated on the upper surface (one surface) of the substrate 4. The substrate 4 and adhesive layer 2 will be described below.

[0081] The adhesive tape 100 has a function of reducing the adhesiveness of the adhesive layer 2 to the semiconductor chip 20 by applying energy to the adhesive layer 2. Methods for applying energy to the adhesive layer 2 include irradiating the adhesive layer 2 with energy rays and heating the adhesive layer 2. Among these, the method of irradiating the adhesive layer 2 with energy rays is preferably used because it does not require the semiconductor chip 20 to undergo unnecessary thermal history. Therefore, the following description will be directed to an adhesive layer 2 whose adhesiveness is reduced by irradiation with energy rays.

[0082] <Base material 4> The substrate 4 is mainly made of a resin material, has a sheet shape, and has the function of supporting the adhesive layer 2 provided on the substrate 4. It also serves to realize the elongation when the adhesive tape 100 is stretched in the planar direction in the step [6A].

[0083] Such resin materials are not particularly limited, and examples thereof include thermoplastic resins such as olefin resins, polyester resins (ester polymers) such as polyethylene terephthalate, polyethylene naphthalate, polybutylene terephthalate, and polybutylene naphthalate, polyvinyl chloride resins, polyurethanes, polyimides, polyamides, polyether ketones such as polyether ether ketone, polyethersulfone, polystyrene, fluororesins, silicone resins, cellulose resins, styrene thermoplastic elastomers (styrene polymers), acrylic resins, polyester thermoplastic elastomers, polyvinyl isoprene, and polycarbonates (carbonate polymers), as well as mixtures of these thermoplastic resins.

[0084] These resin materials are materials that can transmit energy rays such as light (visible light, near-infrared light, ultraviolet light), X-rays, and electron beams, and are therefore preferably used when the energy rays are transmitted through the base material 4 from the base material 4 side and irradiated onto the adhesive layer 2. Therefore, by irradiating the adhesive layer 2 with energy rays from the base material 4 side, the adhesiveness of the adhesive layer 2 is reduced, and the semiconductor chip 20 can be easily picked up.

[0085] In particular, it is preferable to use an olefin-based resin as the resin material, since the use of an olefin-based resin can reliably impart extensibility (expandability) to the base material 4 in the expanding step.

[0086] Such olefin-based resins are not particularly limited, but examples thereof include polyethylene-based resins such as linear low-density polyethylene, low-density polyethylene, and very low-density polyethylene; ethylene-vinyl acetate copolymer (EVA), ethylene-methyl methacrylate copolymer (EMMA), and ethylene-methacrylate copolymer (EMAA); and ethylene copolymers such as ionomers such as ethylene-based ionomers crosslinked with zinc ions, sodium ions, or potassium ions; and these can be used alone or in combination of two or more.

[0087] Furthermore, the base material 4 preferably contains a conductive material having electrical conductivity. By including such a conductive material, the conductive material can function as an antistatic agent, and can appropriately suppress or prevent static electricity from being generated in the semiconductor chips 20 formed by grinding or polishing the semiconductor substrate 7 during grinding or polishing of the semiconductor substrate 7 in the step [4A].

[0088] The conductive material is not particularly limited as long as it is conductive, but examples thereof include surfactants, permanently antistatic polymers (IDPs), metal materials, metal oxide materials, and carbon-based materials, and one or more of these may be used in combination.

[0089] Among these surfactants, examples include anionic surfactants, cationic surfactants, nonionic surfactants, and amphoteric surfactants.

[0090] As the permanently antistatic polymer (IDP), any IDP such as polyether and polyolefin block polymer series, polyesteramide series, polyesteramide, polyetheresteramide, polyurethane series, etc. can be used.

[0091] Examples of metal materials include gold, silver, copper or silver-coated copper, and nickel, and powders of these metals are preferably used.

[0092] Examples of metal oxide materials include indium tin oxide (ITO), indium oxide (IO), antimony tin oxide (ATO), indium zinc oxide (IZO), tin oxide (SnO2), zinc oxide (ZnO), and the like, and powders of these metal oxides are preferably used.

[0093] Further, examples of carbon-based materials include carbon black, carbon nanotubes such as single-walled carbon nanotubes and multi-walled carbon nanotubes, carbon nanofibers, CN nanotubes, CN nanofibers, BCN nanotubes, BCN nanofibers, and graphene.

[0094] Among these, the conductive material is preferably at least one of surfactants, permanently antistatic polymers (IDPs), metal oxide materials, and carbon black. These materials have a small temperature dependency of resistivity, so that even if the base material 4 is heated during grinding or polishing of the semiconductor substrate 7 in step [4A], the change in surface resistance can be reduced.

[0095] In this case, the surface resistivity of the upper surface (one surface) of the substrate 4 is preferably 1.0×10 8(Ω / □), more preferably 1.0×10 8 (Ω / □) super 1.0×10 16 (Ω / □) or less, and the volume resistivity is preferably 1.0×10 16 (Ω·m) or less, more preferably 1.0×10 11 (Ω m) or more 1.0×10 13 (Ω·m) or less. By setting the surface resistivity of the upper surface (one surface) of the base material 4 and the volume resistivity of the base material 4 as described above, the conductive material contained in the base material 4 can suitably function as an antistatic agent, and when the semiconductor substrate 7 is ground and polished in the step [4A], static electricity can be more reliably suppressed or prevented from occurring in the semiconductor chip 20 formed by grinding and polishing this semiconductor substrate 7.

[0096] Furthermore, the substrate 4 may contain a softener such as mineral oil, a filler such as calcium carbonate, silica, talc, mica, or clay, an antioxidant, a light stabilizer, a lubricant, a dispersant, a neutralizer, a colorant, or the like.

[0097] The thickness of the substrate 4 is, for example, preferably 10 μm or more and 300 μm or less, and more preferably 30 μm or more and 200 μm or less. When the thickness of the substrate 4 is within this range, the substrate 4 can more reliably perform its function, and the grinding or polishing of the semiconductor substrate 7 in the step [4A] and the expanding of the pressure-sensitive adhesive tape 100 in the step [6A] can be carried out with excellent workability.

[0098] Furthermore, the substrate 4 may have a functional group, such as a carboxyl group, a hydroxyl group, or an amino group, exposed on its surface, which is reactive with the constituent material contained in the adhesive layer 2.

[0099] The substrate 4 may also be made of a laminate (multilayer body) in which a plurality of layers made of different resin materials are laminated together, or may be made of a blend film in which the resin materials are dry-blended.

[0100] <Adhesive layer 2> The adhesive layer 2 has the function of adhering and supporting the semiconductor substrate 7 when grinding and polishing the semiconductor substrate 7 in the step [4A]. Furthermore, in the step [5A], the adhesive layer 2 loses its adhesiveness to the semiconductor chip 20 when energy is applied thereto, thereby enabling easy separation between the adhesive layer 2 and the semiconductor chip 20 obtained by dividing the semiconductor substrate 7, and thus exerts adhesive strength sufficient to pick up the semiconductor chip 20 in the step [7A].

[0101] In particular, in the present invention, as described above, the adhesive layer 2 satisfies the requirement that the gel fraction after application of energy to the adhesive layer 2 be 90% or more. Therefore, the content of the sol component contained in the adhesive layer 2 after application of energy can be appropriately set low, thereby appropriately suppressing or preventing the occurrence of adhesive residue, in which part of the adhesive layer 2 remains, at the edge of the surface 71 of the semiconductor chip 20. Therefore, the obtained semiconductor chip 20 can be made highly reliable.

[0102] Furthermore, the adhesive strength of the adhesive tape 100 satisfies the requirement A after energy is applied to the adhesive layer 2. Therefore, by radially stretching the adhesive tape 100 along its surface direction in the step [6A], which is performed after energy is applied to the adhesive layer 2, when forming gaps 25 between adjacent semiconductor chips 20, peeling of the adhesive layer 2 from the surface 71 of the semiconductor chip 20 as described above can be reliably suppressed or prevented from occurring, causing chip flying across the entire surface 71 of the semiconductor chip 20, and the semiconductor chip 20 can be reliably picked up in the step [7A].

[0103] The adhesive layer 2 having such a function is composed of a resin composition containing, as its main materials, (1) a base resin having adhesive properties and (2) a curable resin that hardens the adhesive layer 2. By appropriately selecting the type and content of the constituent materials contained in this resin composition, it is possible to set the gel fraction after the application of energy to 90% or more and satisfy the above-mentioned requirement A. Below, each component contained in the resin composition will be explained in turn.

[0104] (1) Base resin The base resin has adhesiveness and is contained in the resin composition in order to impart adhesiveness to the semiconductor substrate 7 and ultimately to the semiconductor chip 20 to the adhesive layer 2 before the adhesive layer 2 is irradiated with energy rays.

[0105] Examples of such base resins include known adhesive layer components such as acrylic resins (adhesives), silicone resins (adhesives), polyester resins (adhesives), polyvinyl acetate resins (adhesives), polyvinyl ether resins (adhesives), styrene elastomer resins (adhesives), polyisoprene resins (adhesives), polyisobutylene resins (adhesives), and urethane resins (adhesives), but among these, acrylic resins are preferred. Acrylic resins are preferred as base resins because they have excellent heat resistance and are relatively easy and inexpensive to obtain.

[0106] Acrylic resins are those whose base polymer is a polymer (homopolymer or copolymer) whose main monomer component is (meth)acrylic acid ester.

[0107] The (meth)acrylic acid ester is not particularly limited, but examples thereof include methyl (meth)acrylate, ethyl (meth)acrylate, propyl (meth)acrylate, isopropyl (meth)acrylate, butyl (meth)acrylate, isobutyl (meth)acrylate, s-butyl (meth)acrylate, t-butyl (meth)acrylate, pentyl (meth)acrylate, hexyl (meth)acrylate, heptyl (meth)acrylate, octyl (meth)acrylate, isooctyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, nonyl (meth)acrylate, isononyl (meth)acrylate, and decyl (meth)acrylate. Examples of suitable acrylates include alkyl (meth)acrylates such as methyl (meth)acrylate, isodecyl (meth)acrylate, undecyl (meth)acrylate, dodecyl (meth)acrylate, tridecyl (meth)acrylate, tetradecyl (meth)acrylate, pentadecyl (meth)acrylate, hexadecyl (meth)acrylate, heptadecyl (meth)acrylate, and octadecyl (meth)acrylate; cycloalkyl (meth)acrylates such as cyclohexyl (meth)acrylate; and aryl (meth)acrylates such as phenyl (meth)acrylate. These acrylates may be used alone or in combination. Among these, alkyl (meth)acrylates such as methyl (meth)acrylate, ethyl (meth)acrylate, butyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, and octyl (meth)acrylate are preferred. Alkyl (meth)acrylates are particularly heat-resistant and can be obtained relatively easily and inexpensively.

[0108] In this specification, the term "(meth)acrylic acid ester" is used to include both acrylic acid ester and methacrylic acid ester.

[0109] The acrylic resin used may contain a copolymerizable monomer as a monomer component constituting the polymer, if necessary, for the purpose of improving properties such as cohesive strength and heat resistance.

[0110] Such copolymerizable monomers are not particularly limited, and examples thereof include hydroxyl group-containing monomers such as 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 4-hydroxybutyl (meth)acrylate, and 6-hydroxyhexyl (meth)acrylate; epoxy group-containing monomers such as glycidyl (meth)acrylate; carboxyl group-containing monomers such as (meth)acrylic acid, itaconic acid, maleic acid, fumaric acid, crotonic acid, and isocrotonic acid; acid anhydride group-containing monomers such as maleic anhydride and itaconic anhydride; amide monomers such as (meth)acrylamide, N,N-dimethyl(meth)acrylamide, N-butyl(meth)acrylamide, N-methylol(meth)acrylamide, N-methylolpropane(meth)acrylamide, N-methoxymethyl(meth)acrylamide, and N-butoxymethyl(meth)acrylamide; amino group-containing monomers such as aminoethyl (meth)acrylate, N,N-dimethylaminoethyl (meth)acrylate, and t-butylaminoethyl (meth)acrylate; Examples of such monomers include cyano group-containing monomers such as (meth)acrylonitrile, olefin-based monomers such as ethylene, propylene, isoprene, butadiene, and isobutylene, styrene-based monomers such as styrene, α-methylstyrene, and vinyltoluene, vinyl ester-based monomers such as vinyl acetate and vinyl propionate, vinyl ether-based monomers such as methyl vinyl ether and ethyl vinyl ether, halogen atom-containing monomers such as vinyl chloride and vinylidene chloride, alkoxy group-containing monomers such as methoxyethyl (meth)acrylate and ethoxyethyl (meth)acrylate, and monomers having a nitrogen atom-containing ring such as N-vinyl-2-pyrrolidone, N-methylvinylpyrrolidone, N-vinylpyridine, N-vinylpiperidone, N-vinylpyrimidine, N-vinylpiperazine, N-vinylpyrazine, N-vinylpyrrole, N-vinylimidazole, N-vinyloxazole, N-vinylmorpholine, N-vinylcaprolactam, and N-(meth)acryloylmorpholine. These monomers may be used alone or in combination of two or more.

[0111] The content of these copolymerizable monomers is preferably 40% by weight or less, and more preferably 10% by weight or less, based on the total monomer components constituting the acrylic resin.

[0112] The copolymerizable monomer may be contained at the terminal of the main chain of the polymer constituting the acrylic resin, or may be contained in the main chain, or may be contained both at the terminal of the main chain and in the main chain.

[0113] Furthermore, the copolymerizable monomer may contain a polyfunctional monomer for the purpose of crosslinking between polymers.

[0114] Examples of polyfunctional monomers include 1,6-hexanediol (meth)acrylate, (poly)ethylene glycol di(meth)acrylate, (poly)propylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, pentaerythritol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, dipentaerythritol hexa(meth)acrylate, glycerin di(meth)acrylate, epoxy (meth)acrylate, polyester (meth)acrylate, urethane (meth)acrylate, divinylbenzene, butyl di(meth)acrylate, and hexyl di(meth)acrylate, and these can be used alone or in combination of two or more.

[0115] Furthermore, ethylene-vinyl acetate copolymers and vinyl acetate polymers can also be used as copolymerizable monomer components.

[0116] Furthermore, the acrylic resin preferably has a glass transition point of not more than 20° C. This allows the adhesive layer 2 to exhibit excellent adhesiveness before the adhesive layer 2 is irradiated with energy rays.

[0117] Such an acrylic resin (polymer) can be produced by polymerizing a single monomer component or a mixture of two or more monomer components. The polymerization of these monomer components can be carried out using a polymerization method such as solution polymerization, emulsion polymerization, bulk polymerization, or suspension polymerization.

[0118] The acrylic resin preferably has a functional group (reactive functional group) that is reactive with a crosslinking agent or a photopolymerization initiator, such as a hydroxyl group or a carboxyl group (particularly a hydroxyl group). This allows the crosslinking agent or the photopolymerization initiator to be linked to the acrylic resin, which is a polymer component, thereby effectively suppressing or preventing leakage of the crosslinking agent or the photopolymerization initiator from the adhesive layer 2. As a result, the adhesiveness of the adhesive layer 2 to the semiconductor substrate 7 and ultimately to the semiconductor chip 20 is reliably reduced by the energy ray irradiation in the step [5A].

[0119] (2) Curing resin The curable resin has a curing property such that it is cured by irradiation with energy rays, for example. As a result of this curing, the base resin is incorporated into the crosslinked structure of the curable resin, and as a result, the adhesive strength of the adhesive layer 2 decreases.

[0120] Such curable resins are, for example, low molecular weight compounds having at least two polymerizable carbon-carbon double bonds in the molecule as functional groups that can be three-dimensionally crosslinked by irradiation with energy rays such as ultraviolet rays or electron beams.

[0121] Specifically, examples of the curable resin include trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, pentaerythritol tetra(meth)acrylate, tetramethylolmethane tetra(meth)acrylate, tetraethylene glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, neopentyl glycol di(meth)acrylate, dipentaerythritol hexa(meth)acrylate, and dipentaerythritol monohydroxypenta(meth)acrylate. (Meth)acrylate, esters of (meth)acrylic acid and polyhydric alcohol such as 1,4-butylene glycol di(meth)acrylate, polyethylene glycol di(meth)acrylate, and glycerin di(meth)acrylate, ester acrylate oligomers, cyanurate compounds having a carbon-carbon double bond-containing group such as 2-propenyl-di-3-butenyl cyanurate, tris(2-acryloxyethyl)isocyanurate, tris(2-methacryloxyethyl)isocyanurate, and 2-hydroxyethyl Examples of the urethane acrylate include isocyanurate compounds having a carbon-carbon double bond-containing group, such as bis(2-acryloxyethyl)isocyanurate, bis(2-acryloxyethyl)2-[(5-acryloxyhexyl)-oxy]ethyl isocyanurate, tris(1,3-diacryloxy-2-propyl-oxycarbonylamino-n-hexyl)isocyanurate, tris(1-acryloxyethyl-3-methacryloxy-2-propyl-oxycarbonylamino-n-hexyl)isocyanurate, and tris(4-acryloxy-n-butyl)isocyanurate; commercially available oligoester acrylates; epoxy acrylates, such as bisF-type epoxy acrylate and bisA-type epoxy acrylate; urethane acrylate; polyester acrylate; and aromatic and aliphatic urethane acrylates, and these may be used alone or in combination. Among these, it is preferable to contain at least one of epoxy acrylate, urethane acrylate, and polyester acrylate, and urethane acrylate is more preferable.This allows the adhesive layer 2 to be set relatively easily so that it has a gel fraction of 90% or more after energy is applied to the adhesive layer 2 and also satisfies the requirement A above.

[0122] The urethane acrylate is not particularly limited, but examples thereof include those obtained by reacting a terminal isocyanate urethane prepolymer obtained by reacting a polyester-type or polyether-type polyol compound with a polyvalent isocyanate compound (for example, 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, 1,3-xylylene diisocyanate, 1,4-xylylene diisocyanate, diphenylmethane 4,4-diisocyanate, etc.), with a (meth)acrylate having a hydroxyl group (for example, 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, polyethylene glycol (meth)acrylate, etc.).

[0123] Examples of polyester acrylates include polyester (meth)acrylates.

[0124] Furthermore, the curable resin is not particularly limited, but may be a mixture of two or more curable resins with different weight-average molecular weights. By using such a curable resin, the degree of crosslinking of the resin due to energy ray irradiation can be easily controlled, and the semiconductor chip 20 can be easily picked up from the adhesive layer 2. Furthermore, as such a curable resin, for example, a mixture of a first curable resin and a second curable resin having a weight-average molecular weight greater than that of the first curable resin may be used.

[0125] The curable resin is preferably blended in an amount of 5 to 100 parts by weight, more preferably 10 to 60 parts by weight, and even more preferably 20 to 50 parts by weight, per 100 parts by weight of the base resin. By adjusting the blending amount of the curable resin as described above, the semiconductor chip 20 can be easily picked up from the adhesive layer 2.

[0126] When a double-bond-introduced acrylic resin is used as the acrylic resin described above, that is, when one having a carbon-carbon double bond in a side chain, in the main chain, or at the end of the main chain is used, the addition of this curable resin to the resin composition may be omitted. This is because, when the acrylic resin is a double-bond-introduced acrylic resin, the adhesive layer 2 is cured by irradiation with energy rays due to the function of the carbon-carbon double bond contained in the double-bond-introduced acrylic resin, and as a result, the adhesive strength of the adhesive layer 2 is reduced.

[0127] For these reasons, a combination of urethane acrylate and an acrylic resin is preferred as the combination of the curable resin and the base resin, which makes it easier to set the adhesive layer 2 so that it has a gel fraction of 90% or more after application of energy to the adhesive layer 2 and satisfies the requirement A.

[0128] (3) Photopolymerization initiator Furthermore, the adhesive layer 2 loses adhesion to the semiconductor substrate 7 and ultimately to the semiconductor chip 20 when irradiated with energy rays. When ultraviolet rays or the like are used as the energy rays, it is preferable that the curable resin contain a photopolymerization initiator to facilitate the initiation of polymerization of the curable resin.

[0129] Examples of the photopolymerization initiator include 2,2-dimethoxy-1,2-diphenylethan-1-one, 1-[4-(2-hydroxyethoxy)-phenyl]-2-hydroxy-2-methyl-1-propan-1-one, 2-hydroxy-1-{4-[4-(2-hydroxy-2-methyl-propionyl)-benzyl]phenyl}-2-methyl-propan-1-one, benzyl diphenyl sulfide, tetramethylthiuram monosulfide, 4-(2-hydroxyethoxy)phenyl(2-hydroxy-2-propyl) ketone, α-hydroxy-α,α'- Dimethylacetophenone, 2-methyl-2-hydroxypropiophenone, 1-hydroxycyclohexyl phenyl ketone, Michler's ketone, acetophenone, methoxyacetophenone, 2,2-dimethoxy-2-phenylacetophenone, 2,2-diethoxyacetophenone, 2-methyl-1-[4-(methylthio)-phenyl]-2-morpholinopropane-1, benzoin methyl ether, benzoin ethyl ether, benzoin propyl ether, benzoin isopropyl ether, benzoin isobutyl ether, benzyl, benzoin, Dibenzyl, α-hydroxycyclohexyl phenyl ketone, benzil dimethyl ketal, 2-hydroxymethylphenylpropane, 2-naphthalenesulfonyl chloride, 1-phenone-1,1-propanedione-2-(o-ethoxycarbonyl)oxime, benzophenone, benzoylbenzoic acid, 4,4'-dimethylaminobenzophenone, 4,4'-diethylaminobenzophenone, 4,4'-dichlorobenzophenone, 3,3'-dimethyl-4-methoxybenzophenone, o-acryloxybenzophenone, p-acryloxybenzophenone Benzophenone-4-carboxylic acid esters of acrylates such as benzophenone, o-methacryloxybenzophenone, p-methacryloxybenzophenone, p-(meth)acryloxyethoxybenzophenone, 1,4-butanediol mono(meth)acrylate, 1,2-ethanediol mono(meth)acrylate, 1,8-octanediol mono(meth)acrylate, thioxanthone, 2-chlorothioxanthone, 2-methylthioxanthone, 2,4-dimethylthioxanthone, isopropylthioxanthone, 2,4-dichlorothioxanthone, 2,Examples include 4-diethylthioxanthone, 2,4-diisopropylthioxanthone, azobisisobutyronitrile, β-chloroanthraquinone, camphorquinone, halogenated ketones, acylphosphinoxides, acylphosphonates, polyvinylbenzophenone, chlorothioxanthone, dodecylthioxanthone, dimethylthioxanthone, diethylthioxanthone, 2-ethylanthraquinone, t-butylanthraquinone, and 2,4,5-triarylimidazole dimer, and these can be used alone or in combination of two or more.

[0130] Among these, benzophenone derivatives and alkylphenone derivatives are preferred. These compounds have a hydroxyl group as a reactive functional group in the molecule, and can be linked to a base resin or a curable resin via this reactive functional group, allowing them to more reliably function as a photopolymerization initiator.

[0131] The photopolymerization initiator is preferably blended in an amount of 0.1 to 50 parts by weight, and more preferably 0.5 to 10 parts by weight, per 100 parts by weight of the base resin. By adjusting the blending amount of the photopolymerization initiator as described above, the pickup properties of the semiconductor chip 20 can be optimized.

[0132] (4) Crosslinking agent Furthermore, the curable resin may contain a crosslinking agent, which improves the curability of the curable resin.

[0133] The crosslinking agent is not particularly limited, but examples thereof include isocyanate-based crosslinking agents, epoxy-based crosslinking agents, urea resin-based crosslinking agents, methylol-based crosslinking agents, chelate-based crosslinking agents, aziridine-based crosslinking agents, melamine-based crosslinking agents, polyvalent metal chelate-based crosslinking agents, acid anhydride-based crosslinking agents, polyamine-based crosslinking agents, carboxyl group-containing polymer-based crosslinking agents, etc. Among these, isocyanate-based crosslinking agents are preferred.

[0134] The isocyanate-based crosslinking agent is not particularly limited, but examples thereof include polyisocyanate compounds of polyvalent isocyanates, trimers of polyisocyanate compounds, trimers of isocyanate-terminated compounds obtained by reacting a polyisocyanate compound with a polyol compound, and blocked polyisocyanate compounds in which isocyanate-terminated urethane prepolymers are blocked with phenol, oximes, or the like.

[0135] Examples of polyisocyanates include 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, 1,3-xylylene diisocyanate, 1,4-xylylene diisocyanate, diphenylmethane-4,4'-diisocyanate, diphenylmethane-2,4'-diisocyanate, 3-methyldiphenylmethane diisocyanate, hexamethylene diisocyanate, isophorone diisocyanate, dicyclohexylmethane-4,4'-diisocyanate, dicyclohexylmethane-2,4'-diisocyanate, 4,4'-diphenylether diisocyanate, 4,4'-[2,2-bis(4-phenoxyphenyl)propane]diisocyanate, and 2,2,4-trimethyl-hexamethylene diisocyanate. These may be used alone or in combination of two or more. Among these, at least one polyisocyanate selected from the group consisting of 2,4-tolylene diisocyanate, diphenylmethane-4,4'-diisocyanate, and hexamethylene diisocyanate is preferred.

[0136] The crosslinking agent is preferably blended in an amount of 0.01 to 50 parts by weight, more preferably 5 to 50 parts by weight, per 100 parts by weight of the base resin. By adjusting the blending amount of the crosslinking agent as described above, the pick-up properties of the semiconductor chip 20 from the adhesive layer 2 can be made favorable.

[0137] (5) Plasticizer Furthermore, the resin composition constituting the adhesive layer 2 may contain a plasticizer. The inclusion of a plasticizer can improve the flexibility of the adhesive layer 2, whose adhesive strength decreases when energy is applied. Therefore, the adhesive layer 2 can be more easily designed to have a gel fraction of 90% or more after energy is applied to the adhesive layer 2 and to satisfy the above-mentioned requirement A.

[0138] The plasticizer is not particularly limited, but examples thereof include phthalate ester plasticizers such as DOP (dioctyl phthalate), DBP (dibutyl phthalate), DIBP (diisobutyl phthalate), and DHP (diheptyl phthalate), aliphatic dibasic acid ester plasticizers such as DOA (di-2-ethylhexyl adipate), DIDA (diisodecyl adipate), and DOS (di-2-ethylhexyl sebacate), aromatic carboxylic acid ester plasticizers such as ethylene glycol benzoates, and trimellitic acid ester plasticizers such as TOTM (trioctyl trimellitate), adipate ester plasticizers, and polyester plasticizers. While one or more of these may be used in combination, polyester plasticizers are preferred. By using a polyester plasticizer as the plasticizer, the effects obtained by including a plasticizer in the resin composition constituting the adhesive layer 2 can be more significantly exhibited.

[0139] Examples of polyester plasticizers include those obtained by a condensation polymerization reaction between a polycarboxylic acid such as adipic acid, azelaic acid, sebacic acid, phthalic acid, isophthalic acid, or terephthalic acid and a glycol such as ethylene glycol, propylene glycol, butylene glycol, neopentyl glycol, or hexanediol.

[0140] The content of the plasticizer in the adhesive layer 2, i.e., the resin composition, is not particularly limited, but is preferably 8% by weight to 60% by weight, more preferably 10% by weight to 58% by weight, and even more preferably 15% by weight to 55% by weight. This reliably improves the flexibility of the adhesive layer 2, thereby more significantly enhancing the effect of the adhesive layer 2 containing a plasticizer.

[0141] (6) Conductive materials (antistatic agents) Furthermore, it is preferable that the resin composition constituting the adhesive layer 2 contains a conductive material having electrical conductivity. By containing such a conductive material, the conductive material can function as an antistatic agent, thereby accurately suppressing or preventing the generation of static electricity in the semiconductor chip 20 in the above-described method for manufacturing the semiconductor chip 20.

[0142] This conductive material is not particularly limited as long as it is conductive, but similar to those described as the conductive materials contained in the substrate 4, examples include surfactants, permanently antistatic polymers (IDPs), metal materials, metal oxide materials, and carbon-based materials, and one or more of these can be used in combination.

[0143] When a conductive material is contained in either the base material 4 or the adhesive layer 2, it is preferable that the conductive material be contained in the base material 4. This makes it possible to more reliably suppress or prevent the generation of static electricity on the semiconductor chip 20 without having to reliably attach a conductive material to the semiconductor chip 20.

[0144] (7) Other ingredients Furthermore, the resin composition constituting the adhesive layer 2 may contain, in addition to the above-mentioned components (1) to (6), at least one of other components selected from the group consisting of a tackifier, an antioxidant, an adhesion adjuster, a filler, a colorant, a flame retardant, a softener, an antioxidant, and a surfactant as a leveling agent.

[0145] Among these, the tackifier is not particularly limited, but examples thereof include rosin resins, terpene resins, coumarone resins, phenolic resins, aliphatic petroleum resins, aromatic petroleum resins, and aliphatic-aromatic copolymer petroleum resins, and one or more of these may be used in combination.

[0146] The average thickness of the adhesive layer 2 is not particularly limited, but is preferably 1 μm to 30 μm, more preferably 5 μm to 30 μm, and even more preferably 10 μm to 20 μm. By setting the average thickness of the adhesive layer 2 within this range, the adhesive layer 2 exhibits good adhesive strength before energy is applied to the adhesive layer 2, and exhibits good peelability between the adhesive layer 2 and the semiconductor chip 20 after energy is applied to the adhesive layer 2.

[0147] The adhesive layer 2 may be formed as a laminate (multilayer body) in which a plurality of layers made of different resin compositions are laminated.

[0148] Here, the adhesive layer 2 has an ultraviolet intensity of 55 mW / cm as energy. 2 , Irradiation intensity: 200mJ / cm 2 After irradiation with ultraviolet light, i.e., after energy application, the gel fraction should be 90% or more, preferably 92% to 96%. This allows the content of the sol component contained in the adhesive layer 2 after energy application to be appropriately set low, more appropriately suppressing or preventing the occurrence of adhesive residue, where part of the adhesive layer 2 remains, at the edge of the surface 71 of the semiconductor chip 20. Therefore, the resulting semiconductor chip 20 can have superior reliability.

[0149] At this time, the degree of adhesive residue remaining on the surface 71 of the semiconductor chip 20 can be determined as follows: That is, a silicon substrate (diameter 6 inches, thickness 500 μm, #2000 polishing) is prepared, and a plurality of grooves are formed in a matrix from one surface (surface) of the silicon substrate to a position 200 μm in the thickness direction using a 30 μm thick blade, and then the one surface is fixed with adhesive tape 100, and then the other surface (back surface) of the silicon substrate is ground using a #320 coarseness grinder until the grooves are exposed, thereby obtaining individual silicon chips measuring 2 mm long x 2 mm wide, and then ultraviolet intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 When adhesive layer 2 is irradiated with ultraviolet light of 100 W, substrate 4 is stretched to 110% of its size in the surface direction of substrate 4, and a needle is used to push up 1.5 mm from the surface of substrate 4 opposite adhesive layer 2, and the silicon chip is picked up using a vacuum collet to peel it off from adhesive tape 100, the adhesive residue rate 1 on the back surface (front surface) of the silicon chip is preferably 1.0% or less, and more preferably 0.5% or less. When adhesive residue rate 1 on the back surface of the silicon chip is equal to or less than the upper limit, it can be said that the occurrence of adhesive residue, where part of adhesive layer 2 remains, at the edge of front surface 71 of semiconductor chip 20 is more reliably suppressed.

[0150] The adhesive layer 2 that can have a gel fraction of 90% or more after application of energy has a gel fraction that varies over a wide range of approximately 50% to 80% before application of energy. Therefore, the gel fraction after application of energy cannot be determined simply by knowing the gel fraction before application of energy. Therefore, in order to prevent adhesive residue, in which part of the adhesive layer 2 remains on the edge of the surface 71 of the semiconductor chip 20, it is preferable to specify the gel fraction of the adhesive layer 2 after application of energy, as in the present invention.

[0151] Furthermore, in the present invention, the adhesive tape 100 (adhesive layer 2) satisfies the above-mentioned requirement A. That is, in accordance with JIS Z 0237, the adhesive tape 100 having a width of 20 mm is attached to a silicon wafer polished to #2000, with the adhesive layer 2 facing the silicon wafer, and then the adhesive layer 2 is exposed to ultraviolet light having an energy of 55 mW / cm. 2 , Irradiation intensity: 200mJ / cm 2 The adhesive tape 100 is irradiated with ultraviolet light of 1000 nm, and then one end of the adhesive tape 100 is held and peeled at a speed of 1000 mm / min in a 30° direction at 25°C. The peel strength A measured is 100 cN / 20 mm or more and 500 cN / 20 mm or less, but this peel strength A is preferably 150 cN / 20 mm or more and 420 cN / 20 mm or less, and more preferably 200 cN / 20 mm or more and 320 cN / 20 mm or less. This makes it possible to more accurately suppress or prevent peeling of the adhesive layer 2 from the surface 71 of the semiconductor chip 20, which would otherwise occur across the entire surface 71 of the semiconductor chip 20, when forming gaps 25 between adjacent semiconductor chips 20 by radially stretching the adhesive tape 100 along its surface direction in step [6A], and also makes it possible to more reliably pick up the semiconductor chip 20 in step [7A].

[0152] Furthermore, the adhesive tape 100 (adhesive layer 2) is prepared in accordance with JIS Z 0237 by applying a 20 mm-wide adhesive tape 100 to a #2000 polished silicon wafer with the adhesive layer 2 facing the silicon wafer, and then, before applying energy to the adhesive layer 2, holding one end of the adhesive tape 100 and peeling it at a speed of 1000 mm / min in a 30° direction at 25°C. The peel strength B measured is preferably 700 cN / 20 mm or more and 1500 cN / 20 mm or less, and more preferably 750 cN / 20 mm or more and 1200 cN / 20 mm or less. This means that the adhesive layer 2 has excellent adhesive properties before applying energy to it. Therefore, during grinding and polishing of the back surface 72 of the semiconductor substrate 7 using the grinder 231 in the step [4A], displacement of the semiconductor substrate 7 from the adhesive tape 100 can be effectively suppressed or prevented.

[0153] In addition, in the adhesive tape 100, when the adhesive tape 100 is viewed in plan view, bubbles formed at the interface between the substrate 4 and the adhesive layer 2 have an area of ​​100 μm 2 The number of the above is 15.0 pieces / mm 2 It is preferable that the number of particles is 0.01 particles / mm or less. 2 More than 7.0 pieces / mm 2 It is more preferable that the following is true: In this way, when the gap 25 is formed between adjacent semiconductor chips 20 by radially stretching the adhesive tape 100 along its surface direction in the step [6A], it is possible to more effectively suppress or prevent adhesive residue from occurring at the edges of the surfaces 71 of the semiconductor chips 20.

[0154] Next, the adhesive tape 100 having such a configuration can be produced, for example, as follows.

[0155] <Adhesive tape manufacturing method> Fig. 6 is a vertical cross-sectional view for explaining a method for producing the adhesive tape shown in Fig. 5. In the following explanation, the upper side in Fig. 6 will be referred to as "top" and the lower side as "bottom".

[0156] [1B] First, prepare a substrate 4 (see FIG. 6(a)). The method for producing the substrate 4 is not particularly limited, and examples thereof include common molding methods such as extrusion molding methods such as a calendar method, an inflation extrusion method, and a T-die extrusion method, and a wet casting method. When the substrate 4 is formed as a laminate, molding methods such as a co-extrusion method and a dry lamination method are used as the method for producing the substrate 4 having such a configuration.

[0157] The substrate 4 can be used without stretching, or may be subjected to uniaxial or biaxial stretching treatment as required.

[0158] [2B] Next, an adhesive layer 2 is formed on the upper surface of the substrate 4 (see FIG. 6(b)). The surface (upper surface) of the substrate 4 may be subjected to a surface treatment such as corona treatment, chromic acid treatment, matte treatment, ozone exposure treatment, flame exposure treatment, high-voltage shock exposure treatment, ionizing radiation treatment, primer treatment, or anchor coat treatment in order to improve adhesion between the substrate 4 and the adhesive layer 2.

[0159] The adhesive layer 2 can also be obtained by applying or spraying onto the substrate 4 a liquid material in the form of a varnish, which is made by dissolving the resin composition that is the constituent material of the adhesive layer 2 in a solvent, and then evaporating the solvent to form the adhesive layer 2.

[0160] The solvent is not particularly limited, but examples thereof include methyl ethyl ketone, acetone, toluene, ethyl acetate, dimethyl formaldehyde, etc., and one or more of these can be used in combination.

[0161] Furthermore, the liquid material can be applied or sprayed onto the substrate 4 using methods such as die coating, curtain die coating, gravure coating, comma coating, bar coating, and lip coating.

[0162] [3B] Next, a portion of the adhesive layer 2 formed on the substrate 4 is removed in a circular shape while leaving the substrate 4 in the thickness direction of the adhesive layer 2 so that the central side and the peripheral side are separated, thereby forming the adhesive layer 2 having a central portion 122 and a peripheral portion 121 (see Figure 6(c)).

[0163] An example of a method for removing a portion of the adhesive layer 2 in a circular shape is to punch out a portion surrounding the area to be removed, and then remove the adhesive layer 2 located in the punched-out area.

[0164] The region to be removed can be punched out using, for example, a method using a roll-shaped mold or a method using a press mold. Among these, the method using a roll-shaped mold, which allows continuous production of the pressure-sensitive adhesive tape 100, is preferred.

[0165] In this step, a part of the adhesive layer 2 is punched out into a ring shape (circular shape) to form the central part 122 and the outer periphery 121, but the shape of the punched part of the adhesive layer 2 may be any shape as long as it is a shape that allows the outer periphery 121 of the adhesive layer 2 to be fixed with a wafer ring in the above-mentioned method for manufacturing a semiconductor device. Specifically, examples of the punched shape include the above-mentioned circular shape, as well as oval shapes such as an ellipse and a bale shape, and polygonal shapes such as a square shape and a pentagon.

[0166] [4B] Next, a separator 1 is laminated on the adhesive layer 2 formed on the substrate 4, thereby obtaining an adhesive tape 100 in which the adhesive layer 2 is covered with the separator 1 (see FIG. 6(d)).

[0167] The method for laminating the separator 1 on the adhesive layer 2 is not particularly limited, and may be, for example, a lamination method using a roll or a lamination method using a press. Among these, the lamination method using a roll is preferred from the viewpoint of productivity, which allows for continuous production.

[0168] The separator 1 is not particularly limited, but examples thereof include a polypropylene film, a polyethylene film, and a polyethylene terephthalate film.

[0169] Furthermore, the separator 1 may have its surface subjected to a release treatment so that it is peeled off when the pressure-sensitive adhesive tape 100 is used. Examples of release treatments include coating the surface of the separator 1 with a release agent and providing the surface of the separator 1 with fine irregularities. Examples of release agents include silicone-based, alkyd-based, and fluorine-based agents.

[0170] Through the steps described above, the adhesive tape 100 covered with the separator 1 can be formed.

[0171] The adhesive tape 100 covered with the separator 1 manufactured in this embodiment is used after peeling the adhesive tape 100 from the separator 1 in the method for manufacturing a semiconductor device using the adhesive tape 100 described above.

[0172] Furthermore, when peeling the separator 1 from the adhesive layer 2 that it covers, it is preferable to peel the separator 1 at an angle of 90° or more and 180° or less with respect to the surface of the adhesive layer 2. By setting the angle at which the separator 1 is peeled within this range, peeling can be reliably prevented at any point other than the interface between the adhesive layer 2 and the separator 1.

[0173] Although the pressure-sensitive adhesive tape of the present invention has been described above, the present invention is not limited thereto.

[0174] For example, any component capable of exerting the same function may be added to each layer of the adhesive tape of the present invention, or the substrate may be composed of a single layer as described in the above embodiment, or may be composed of multiple layers, and for example, the substrate may be provided with an antistatic layer on the surface opposite to the adhesive layer of the above-mentioned substrate.

[0175] Furthermore, the configuration of each layer of the adhesive tape can be replaced with any other layer that can exert the same function, or any other layer can be added.

[0176] Furthermore, the adhesive tape can be used when picking up semiconductor chips (semiconductor elements) as individual parts obtained using the DBG method described above after the expanding process of stretching the adhesive tape (grinding tape). However, it is not limited to this case and can also be used in various manufacturing methods that involve a process in which the adhesive layer is not cut by cutting the semiconductor substrate as a substrate in the thickness direction, and can also be used in the same way when, for example, cracks are formed as grooves using a laser.

[0177] Furthermore, depending on the configuration of the semiconductor device formed using the adhesive tape, it may be possible to omit the formation of the molded portion 17 provided in the semiconductor device 10.

[0178] The semiconductor chip 20 manufactured using the adhesive tape of the present invention can be widely used in, for example, mobile phones, digital cameras, video cameras, car navigation systems, personal computers, game consoles, LCD televisions, LCD displays, organic electroluminescence displays, printers, etc. [Example]

[0179] Next, specific examples of the present invention will be described. However, the present invention is not limited to the descriptions in these examples.

[0180] 1. Raw material preparation First, the raw materials used in the production of the pressure-sensitive adhesive tapes of the Examples and Comparative Examples are shown below.

[0181] (Polyolefin resin 1) As polyolefin resin 1, low-density polyethylene (LDPE, manufactured by Sumitomo Chemical Co., Ltd., "Sumikathen L200-0", MFR 2.0) was prepared.

[0182] (Antistatic Agent 1) As antistatic agent 1, a polyether-based antistatic agent (manufactured by Sanyo Chemical Industries, Ltd., "Pelectron PVL") was prepared.

[0183] (Base resin 1-3) Base resins 1 to 3 were prepared by mixing at least two of butyl acrylate, butyl methacrylate, 2-ethylhexyl acrylate, acrylic acid, 2-hydroxyethyl acrylate, N,N-dimethylacrylamide, and vinyl acetate, and then solution polymerizing the mixture in a toluene solvent using a conventional method to produce acrylic copolymers (acrylic resins).

[0184] The glass transition points and weight average molecular weights of base resins (acrylic copolymers) 1 to 3 were as shown below.

[0185] Base resin 1 (glass transition temperature: -37°C, weight average molecular weight: 600,000) Base resin 2 (glass transition temperature: -14°C, weight average molecular weight: 500,000) Base resin 3 (glass transition temperature: -10°C, weight average molecular weight: 650,000)

[0186] (curable resin 1) As the curable resin 1, a bisphenol A-based epoxy acrylate (bis A-type epoxy acrylate) 1 (manufactured by Daicel Allnex Corporation, product number: EBECRYL3708) was prepared.

[0187] (Curable resin 2) As the curable resin 2, urethane acrylate 1 (manufactured by Miwon Specialty Chemical Co., Ltd., product number: SC2152) was prepared.

[0188] (Curable resin 3) As the curable resin 3, urethane acrylate 2 (manufactured by Nippon Kayaku Co., Ltd., product number: UX-5103) was prepared.

[0189] (Crosslinker 1) As a crosslinking agent 1, polyisocyanate (manufactured by Tosoh Corporation, product number: Coronate L) was prepared.

[0190] (Photopolymerization initiator 1) As a photopolymerization initiator 1, benzyl dimethyl ketal (manufactured by Tokyo Chemical Industry Co., Ltd.) was prepared.

[0191] (Plasticizer 1) As plasticizer 1, a polyester plasticizer (manufactured by DIC Corporation, product number: W-230H) was prepared.

[0192] 2. Preparation of Adhesive Tape [Example 1] A resin composition containing polyolefin resin 1 (80% by weight) and antistatic agent 1 (20% by weight) was extruded using an extruder to prepare a substrate 4 having a thickness of 80 μm.

[0193] Next, a liquid material was prepared containing a resin composition containing base resin 2 (100 parts by weight), curable resin 2 (40 parts by weight), crosslinker 1 (2 parts by weight), and photopolymerization initiator 1 (5 parts by weight). This liquid material was bar-coated onto substrate 4 so that the thickness of adhesive layer 2 after drying would be 5 μm, and then dried at 80°C for 1 minute to form adhesive layer 2 on the upper surface (one side) of substrate 4.

[0194] [Examples 2 to 4, Comparative Examples 1 to 3] Pressure-sensitive adhesive tapes of Examples 2 to 4 and Comparative Examples 1 to 3 were obtained in the same manner as in Example 1, except that the types and contents of the constituent materials in the resin composition were changed as shown in Table 1.

[0195] 3. Evaluation <Gel fraction test (gel fraction (after energy application))> The adhesive layer 2 of the adhesive tape 100 of each example and each comparative example was exposed to ultraviolet light with an energy intensity of 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2After that, for each adhesive tape 100 of each Example and Comparative Example, 2 g of the adhesive layer (approximately 0.1 g) was prepared as a test piece, and the mass of the test piece was measured. Next, the mass of a Tetron mesh (#200) cut into an approximately 100 x 100 mm square was measured. Next, the Tetron mesh was folded so that the test piece was facing inward, and three sides were further folded and stapled, and the mass of the entire sample was measured. Next, the sample was immersed in ethyl acetate as a solvent at 40°C for 3 days. The sample was then removed and dried by heating at 120°C for 1 hour.

[0196] The mass of the entire sample was then measured, and the mass of the Tetron mesh and stapler was subtracted to calculate the mass of the test piece after immersion in ethyl acetate. The gel fraction after application of energy to the adhesive layer 2 was then calculated using the formula (A). The calculated gel fractions are shown in Table 1.

[0197] <Gel fraction test (gel fraction (before energy application))> A test specimen was prepared from the adhesive layer of each Example and Comparative Example, weighing approximately 0.1 g. The mass of the test specimen was then measured. Next, the mass of a Tetron mesh (#200) cut into a square of approximately 100 x 100 mm was measured. The Tetron mesh was then folded so that the test specimen was facing inward, and three sides were further folded and stapled together, and the mass of the entire sample was measured. The sample was then immersed in ethyl acetate as a solvent at 40°C for three days. The sample was then removed and dried by heating at 120°C for one hour.

[0198] The mass of the entire sample was then measured, and the mass of the Tetron mesh and stapler was subtracted to calculate the mass of the test piece after immersion in ethyl acetate. The gel fraction before application of energy to the adhesive layer 2 was then calculated using the formula (A). The calculated gel fractions are shown in Table 1.

[0199] <Peel test (peel strength A)> The adhesive tape 100 having a width of 20 mm in each of the Examples and Comparative Examples was attached to a silicon wafer (manufactured by SUMCO Corporation) polished to #2000 so that the adhesive layer 2 faced the silicon wafer side, and then ultraviolet light was irradiated onto the adhesive layer 2 as energy (ultraviolet light intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 The peel strength A [cN / 20 mm] measured by holding one edge of the adhesive tape and peeling it at a rate of 1000 mm / min in a direction of 30° at 25°C in accordance with JIS Z 0237 was measured using a peel analyzer ("VPA-H100" manufactured by Kyowa Interface Science Co., Ltd.). The measurement results are shown in Table 1.

[0200] <Peel test (peel strength B)> Each adhesive tape 100 having a width of 20 mm in each of the Examples and Comparative Examples was attached to a #2000 polished silicon wafer (manufactured by SUMCO Corporation) with adhesive layer 2 facing the silicon wafer side, and then, before applying the energy to adhesive layer 2, one end of the adhesive tape was held and peeled at a rate of 1000 mm / min at a 30° angle at 25°C, in accordance with JIS Z 0237. The peel strength B [cN / 20 mm] was measured using a peel analyzer (manufactured by Kyowa Interface Science Co., Ltd., "VPA-H100") The measurement results are shown in Table 1.

[0201] <Surface resistivity of substrate> For each adhesive tape 100 of each example and each comparative example, the surface resistivity of one side of the substrate 4, which is the adhesive layer 2 side, was measured using a surface resistivity measuring device (manufactured by Trek Japan, "152P-CR") in accordance with IEC-61340.

[0202] <Volume resistivity of substrate> For the pressure-sensitive adhesive tapes 100 of each of the Examples and Comparative Examples, the volume resistivity of the substrate 4 was measured in accordance with JIS K 6911 using a volume resistivity measuring device (manufactured by Advantest Corporation, "R12702B").

[0203] <Whether or not adhesive remains on the silicon chip after picking up> The presence or absence of adhesive residue on the silicon chip after picking up was evaluated as follows.

[0204] That is, first, a silicon substrate (silicon wafer, manufactured by SUMCO Corporation, 6-inch diameter, 500 μm thick, #2000 polishing) was prepared, and then a matrix of grooves was formed on one side of the silicon substrate up to a position 200 μm in the thickness direction using a 30 μm thick blade. Next, the silicon substrate was placed on adhesive layer 2 of the adhesive tape of each Example and Comparative Example, with the one side facing adhesive layer 2, and then pressure-bonded to bond the silicon wafer to the adhesive tape.

[0205] Then, using a grinder with a roughness of #320, the other surface of the silicon substrate was ground until the grooves were exposed, thereby obtaining individual silicon chips with dimensions of 2 mm length x 2 mm width. Thereafter, the adhesive layer 2 was irradiated with ultraviolet light (ultraviolet light intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 ) was measured. Next, the substrate 4 was stretched 110% in the surface direction of the substrate 4, and a needle was pushed up 1.5 mm from the surface of the substrate 4 opposite the adhesive layer 2. The silicon chip was then picked up using a vacuum collet and peeled from the adhesive tape. The adhesive residue rate 1 on the backside of the picked-up silicon chip was calculated as follows. That is, the backsides of 10 silicon chips randomly selected from the silicon chips after picking up were observed with a polarizing microscope, and the area where adhesive residue, i.e., contaminants, were confirmed at the edge of each silicon chip was defined as S1, and the area of ​​the backside of each silicon chip was defined as S2. The adhesive residue rate 1 on the backside of the silicon chip was then calculated by averaging S1 / S2 × 100 [%] for the 10 chips. The adhesive residue rate 1 on the backside of the silicon chip was then evaluated based on the evaluation criteria shown below. The evaluation results are shown in Table 1.

[0206] [Evaluation criteria] ◎: The adhesive residue rate on the backside of the silicon chip is 0.5% or less. ○: The adhesive residue rate 1 on the backside of the silicon chip is more than 0.5% and 1.0% or less. ×: The adhesive residue rate 1 on the back surface of the silicon chip is more than 1.0%

[0207] <Whether or not chips fly off during expansion> The occurrence of chipping during expanding was evaluated as follows.

[0208] That is, first, a silicon substrate (silicon wafer, manufactured by SUMCO Corporation, 6-inch diameter, 500 μm thick, #2000 polishing) was prepared, and then a matrix of grooves was formed on one side of the silicon substrate up to a position 200 μm in the thickness direction using a 30 μm thick blade. Next, the silicon substrate was placed on adhesive layer 2 of the adhesive tape of each Example and Comparative Example, with the one side facing adhesive layer 2, and then pressure-bonded to bond the silicon wafer to the adhesive tape.

[0209] Then, using a grinder with a roughness of #320, the other surface of the silicon substrate was ground until the grooves were exposed, thereby obtaining individual silicon chips with dimensions of 2 mm length x 2 mm width. Thereafter, the adhesive layer 2 was irradiated with ultraviolet light (ultraviolet light intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 Next, the substrate 4 was stretched in the plane direction of the substrate 4 to 110% of its original size, and the presence or absence of chipping of the silicon chip from the adhesive tape at this time was checked and evaluated based on the evaluation criteria shown below. The evaluation results are shown in Table 1.

[0210] [Evaluation criteria] ◎: 0 to less than 3 chips were found to have come off the adhesive tape ○: 3 or more but less than 5 chips were observed flying off the adhesive tape ×: Five or more chips were found to have come off the adhesive tape.

[0211] [Table 1]

[0212] As shown in Table 1, in each example, the gel fraction after energy application was 90% or more, and requirement A was satisfied, so that when the adhesive tape 100 was radially stretched (expanded) along the surface direction after irradiation with ultraviolet light (after energy application), it was possible to effectively prevent adhesive residue from occurring on the edge of the semiconductor chip 20, and it was also possible to effectively prevent chip fly-off when the adhesive tape 100 was stretched.

[0213] In contrast, in each comparative example, due to the gel fraction being below either the lower limit value or the numerical range of requirement A, the results showed that when the adhesive tape 100 is stretched (expanded) radially along the surface direction after irradiation with ultraviolet rays (after application of energy), it was not possible to accurately prevent glue residue from occurring on the edge of the semiconductor chip 20, or to accurately prevent chip flying when the adhesive tape 100 is stretched. [Explanation of symbols]

[0214] 1 Separator 2 Adhesive layer 4 Base material 7. Semiconductor substrate 71 Surface 72 Back side 73 Groove 9 Wafer ring 10 Semiconductor device 17 Mold section 20 Semiconductor chips 21 terminals 23 Semiconductor chip body 25 Gap 30 Interposer 41 terminals 70 Bump 80 Sealing layer 81 Connection 85 Solder bumps 100 adhesive tape 150 adhesive tape 152 Adhesive layer 154 Base material 221 Dicing Saw 231 Grinder 250 BG table 121 Outer periphery 122 Center 200 Pickup Table 210 Center 220 Outer periphery

Claims

1. A substrate and an adhesive layer laminated on one surface of the substrate, An adhesive tape used in obtaining a plurality of components by dicing a substrate, in which the substrate and the components are temporarily fixed to the adhesive layer without the adhesive layer being cut by cutting the substrate in a thickness direction, the adhesive layer contains a base resin having adhesiveness and a curable resin that is cured by the application of energy, the base resin is an acrylic resin containing, as a monomer component, in addition to a (meth)acrylic acid ester, one or more copolymerizable monomers selected from the group consisting of acrylic acid, N,N-dimethylacrylamide, and vinyl acetate; The adhesive layer has an ultraviolet intensity of 55 mW / cm as the energy. 2 , Irradiation intensity: 200mJ / cm 2 1. A pressure-sensitive adhesive tape characterized in that the gel fraction after irradiation with ultraviolet light is 90% or more, and the pressure-sensitive adhesive tape satisfies the following requirement A. Requirement A: The adhesive tape is prepared in accordance with JIS Z 0237 by applying a 20 mm wide adhesive tape to a #2000 polished silicon wafer with the adhesive layer facing the silicon wafer, irradiating the adhesive layer with ultraviolet light as the energy, and then holding one end of the adhesive tape and peeling it at a speed of 1000 mm / min at 25°C in a direction of 30°, resulting in a peel strength A of 100 cN / 20 mm or more and 500 cN / 20 mm or less.

2. The adhesive tape according to claim 1 , wherein the adhesive layer has a gel fraction of 50% or more and 80% or less before the application of the energy.

3. 3. The pressure-sensitive adhesive tape according to claim 1 or 2, wherein the pressure-sensitive adhesive tape is attached to a silicon wafer polished to #2000 in accordance with JIS Z 0237, with the pressure-sensitive adhesive layer facing the silicon wafer, and then, before the energy is applied to the pressure-sensitive adhesive layer, one end of the pressure-sensitive adhesive tape is held and the tape is peeled off at a speed of 1000 mm / min in a direction of 30° at 25°C, and the peel strength B measured is 700 cN / 20 mm or more and 1500 cN / 20 mm or less.

4. 4. The adhesive tape according to claim 1, which is used for processing a semiconductor wafer having a plurality of grooves formed in a matrix in the thickness direction of the semiconductor wafer as the substrate, the grooves not reaching from one side of the semiconductor wafer to the other side.

5. 5. The adhesive tape according to claim 4, wherein the adhesive tape is used to temporarily fix the semiconductor wafer and the semiconductor chips onto the adhesive layer when the semiconductor wafer is individually diced to obtain semiconductor chips as components by grinding the other surface to expose the grooves on the other surface after processing the semiconductor wafer to form the grooves in a matrix pattern.

6. The pressure-sensitive adhesive tape according to claim 1 , wherein the curable resin contains at least one of epoxy acrylate, urethane acrylate, and polyester acrylate.

7. When the pressure-sensitive adhesive tape is viewed in a plan view, bubbles formed at the interface between the substrate and the pressure-sensitive adhesive layer have an area of ​​100 μm ２ The number of the above is 15.0 pieces / mm ２ The adhesive tape according to any one of claims 1 to 6, wherein:

8. The substrate has a surface resistivity of 1.0×10 on one side of the substrate. ８ (Ω / □) and its volume resistivity is 1.0 × 10 １６ The pressure-sensitive adhesive tape according to any one of claims 1 to 7, wherein the strength is Ω·m or less.

9. The adhesive tape according to any one of claims 1 to 8, which satisfies the following requirement B: Requirement B: A silicon substrate (diameter 6 inches, thickness 500 μm, #2000 polishing) was subjected to a process of forming a plurality of grooves in a matrix pattern from one surface to a position 200 μm in the thickness direction using a 30 μm thick blade, and then the one surface was fixed with the adhesive tape. Thereafter, the other surface of the silicon substrate was ground using a #320 grinder until the grooves were exposed, thereby obtaining individual silicon chips measuring 2 mm long x 2 mm wide. After that, ultraviolet light intensity: 55 mW / cm 2 , Irradiation intensity: 200mJ / cm 2 The adhesive tape is irradiated with ultraviolet light of 1.00 W at 1 ...

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