Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device and an electronic apparatus that can prevent a situation where the influence of a scan signal extends to a temperature detection element, which causes a reduction in detection accuracy.SOLUTION: In an electro-optical device, a first substrate 10 is provided with a scan line drive circuit 104 along a first side 10w1 extending in a first direction Y, and provided with a temperature detection element 11 in the first direction Y with respect to the scan line drive circuit 104. The temperature detection element 11 and pieces of wiring L0 (first wiring La, and second wiring Lc) electrically connected with the temperature detection element 11 can thus be separated from scan lines 3a. The temperature detection element 11 has a plurality of diodes D including semiconductor layers arranged in a second direction X, and the dimension L11 in the first direction Y of the temperature detection element 11 is smaller than the dimension L103 in the first direction Y of a wiring area 103 between the scan line drive circuit 104 and a display area 10a.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to an electro-optical device provided with a temperature detection element, and an electronic device. [Background technology]

[0002] In electro-optical devices such as liquid crystal devices, a technology has been proposed in which a temperature detection element is provided outside the display area, and driving conditions are corrected based on the detection results of the temperature detection element (see Patent Document 1). In Patent Document 1, a diode constituting the temperature detection element is arranged between the display area and a scanning line driving circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-194666 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, since scanning lines extend between the display area and the scanning line driving circuit, if a temperature detection element is placed between the display area and the scanning line driving circuit, the scanning signal supplied to the scanning line will affect the temperature detection element, resulting in a problem of reduced detection accuracy. [Means for solving the problem]

[0005] In order to solve the above problem, one aspect of the electro-optical device of the present invention comprises a scanning line driving circuit arranged along a first direction, and a temperature detection element arranged in the first direction relative to the scanning line driving circuit, and is characterized in that the temperature detection element has a plurality of semiconductor layers arranged side by side in a certain direction.

[0006] The electro-optical device according to the present invention is used in electronic equipment. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view showing an example of the configuration of an electro-optical device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is an explanatory diagram schematically showing a cross section of the electro-optical device shown in FIG. [Figure 3] FIG. 2 is a circuit block diagram showing the electrical configuration of the first substrate and the like shown in FIG. [Figure 4] FIG. 4 is an explanatory diagram of the temperature detection circuit shown in FIG. 3. [Figure 5] FIG. 5 is an explanatory diagram showing a planar configuration of the temperature detection circuit and the like shown in FIG. 4. [Figure 6] FIG. 6 is a plan view schematically showing the planar configuration of the temperature detection element shown in FIG. 5. [Figure 7] FIG. 7 is a cross-sectional view schematically showing a cross section of the temperature detection element shown in FIG. 6. [Figure 8] 6 is a plan view schematically showing another planar configuration of the temperature detection element shown in FIG. 5. [Figure 9] FIG. 9 is a cross-sectional view schematically showing a cross section of the temperature detection element shown in FIG. 8. [Figure 10] 10 is a graph showing an example of the relationship between drive current and the influence of noise. [Figure 11] FIG. 4 is an explanatory diagram of an electro-optical device according to a second embodiment of the present invention. [Figure 12] 1 is a block diagram showing an example of the configuration of a projection display device to which the present invention is applied. [Figure 13] FIG. 13 is an explanatory diagram of the light path shift element shown in FIG. 12. DETAILED DESCRIPTION OF THE INVENTION

[0008] An embodiment of the present invention will be described with reference to the drawings. In the drawings referred to in the following description, each layer and each component is shown at a different scale so that they can be recognized on the drawing. Furthermore, a plan view refers to a view from the normal direction to the first substrate 10 or the second substrate 20. In the following description, one of two directions intersecting each other in the plane of the first substrate 10 will be referred to as a first direction Y, and the other will be referred to as a second direction X.

[0009] 1. Embodiment 1-1. Overall configuration of the electro-optical device 100 FIG. 1 is a plan view illustrating an example of the configuration of an electro-optical device 100 according to a first embodiment of the present invention. FIG. 2 is an explanatory diagram schematically illustrating a cross section of the electro-optical device 100 illustrated in FIG. 1. The electro-optical device 100 illustrated in FIGS. 1 and 2 is a liquid crystal device and includes an electro-optical panel 100p. In the electro-optical device 100, a first substrate 10 and a second substrate 20 are bonded together with a predetermined gap therebetween by a sealant 107. The sealant 107 is provided in a frame shape along the outer edge of the second substrate 20. The sealant 107 is an adhesive made of a photocurable resin, a thermosetting resin, or the like, and contains a gap material 107a such as glass fiber or glass beads to maintain a predetermined distance between the two substrates. In the electro-optical device 100, an electro-optical layer 50 made of a liquid crystal layer is provided between the first substrate 10 and the second substrate 20 within a region surrounded by the sealant 107. The sealant 107 has a discontinuous portion 107c formed therein to serve as a liquid crystal injection port, and this discontinuous portion 107c is sealed with a sealing material 108 after the liquid crystal material is injected. Note that if the liquid crystal material is injected using a dropping method, the discontinuous portion 107c is not formed. The first substrate 10 and the second substrate 20 are both rectangular, and a display area 10a is provided as a rectangular area approximately in the center of the electro-optical device 100. Corresponding to this shape, the sealant 107 is also provided in a substantially rectangular shape, and the outside of the display area 10a is a rectangular frame-shaped peripheral area 10c.

[0010] In the following description, the side of the first substrate 10 extending in the first direction Y is referred to as the first side 10w1, and the side adjacent to the first side 10w1 and extending in the second direction X is referred to as the second side 10w2. Also, the side of the first substrate 10 extending in the first direction Y so as to face the first side 10w1 in the second direction X is referred to as the third side 10w3, and the side extending in the second direction X so as to face the second side 10w2 in the first direction Y is referred to as the fourth side 10w4.

[0011] In the peripheral region 10c of the first substrate 10, scanning line driving circuits 104 are provided between the first side 10w1 of the first substrate 10 and the display region 10a, and between the third side 10w3 of the first substrate 10 and the display region 10a. A data line driving circuit 101 is provided between the second side 10w2 of the first substrate 10 and the display region 10a, and an inspection circuit 105 is provided between the fourth side 10w4 of the first substrate 10 and the second side 10a2 of the display region 10a. A plurality of mounting terminals 102 are arranged along the second side 10w2 of the first substrate 10 between the second side 10w2 and the data line driving circuit 101, and a wiring board 70 is connected to the terminals 102. A driving IC 75 that outputs image signals and the like to the electro-optical panel 100p is mounted on the wiring board 70. The wiring board 70 is electrically connected to a higher-level circuit 60 via a connector 61. The upper circuit 60 is provided with an image control circuit 65 that outputs image data and the like to the drive IC 75. The upper circuit 60 also is provided with a temperature detection drive circuit 66 that drives a temperature detection circuit 1, which will be described later. The upper circuit 60 is provided in a higher-level device relative to the electro-optical device 100 in an electronic device, which will be described later.

[0012] The first substrate 10 has a light-transmitting substrate body 10w such as a quartz substrate or a glass substrate, and on one surface 10s of the first substrate 10 facing the second substrate 20, a plurality of pixel transistors and pixel electrodes 9a electrically connected to each of the plurality of pixel transistors are formed in a matrix in a display region 10a. A first alignment film 16 is formed on the upper layer side of the pixel electrodes 9a. On the one surface 10s side of the first substrate 10, a rectangular frame-shaped region 10b extending along the outer edge of the display region 10a between the sealing material 107 and the sealing material 107 has dummy pixel electrodes 9b formed simultaneously with the pixel electrodes 9a in portions extending along each side of the display region 10a.

[0013] The second substrate 20 has a translucent substrate body 20w such as a quartz substrate or a glass substrate. A common electrode 21 is formed on one surface 20s of the second substrate 20, facing the first substrate 10. A second alignment film 26 is laminated on the surface of the common electrode 21. The common electrode 21 is formed on substantially the entire surface of the one surface 20s of the second substrate 20. In the frame region 10b on the one surface 20s of the second substrate 20, a display edge light-shielding region 29 made of a light-shielding layer is formed below the common electrode 21, and the inner edge of the display edge light-shielding region 29 defines the display region 10a. A translucent planarization film 22 is formed between the display edge light-shielding region 29 and the common electrode 21. The light-shielding layer constituting the display edge light-shielding region 29 may be formed as a black matrix portion that overlaps, in plan view, with the inter-pixel region 10f sandwiched between adjacent pixel electrodes 9a. The display edge light-shielding region 29 overlaps with the dummy pixel electrodes 9b in plan view. The display edge light-shielding region 29 is made of a light-shielding metal film or black resin.

[0014] The first alignment film 16 and the second alignment film 26 are made of SiO X The electro-optical device 100 is an inorganic alignment film made of an obliquely evaporated film of TiO2, MgO, Al2O3, etc. (x≦2), and is made of a columnar structure layer in which pillar-shaped bodies called columns are formed obliquely with respect to the first substrate 10 and the second substrate 20. Therefore, the first alignment film 16 and the second alignment film 26 align the nematic liquid crystal molecules with negative dielectric anisotropy used in the electro-optical layer 50 at an oblique angle with respect to the first substrate 10 and the second substrate 20, imparting a pretilt to the liquid crystal molecules. In this way, the electro-optical device 100 is configured as a normally black VA (Vertical Alignment) mode liquid crystal device.

[0015] On the first substrate 10, outside the sealing material 107, an inter-substrate conduction electrode 14t is formed at a position overlapping the vicinity of four corner portions 24t of the second substrate 20. A common potential wiring 6g is electrically connected to the inter-substrate conduction electrode 14t, and the common potential wiring 6g is electrically connected to a terminal 102g for applying a common potential among the terminals 102. An inter-substrate conductive material 109 containing conductive particles is disposed between the inter-substrate conduction electrode 14t and the common electrode 21, and the common electrode 21 of the second substrate 20 is electrically connected to the first substrate 10 side via the inter-substrate conduction electrode 14t and the inter-substrate conductive material 109. Therefore, a common potential LCCOM is applied to the common electrode 21 from the first substrate 10 side.

[0016] The electro-optical device 100 of this embodiment is a transmissive liquid crystal device. Therefore, the pixel electrodes 9a and the common electrode 21 are formed of a light-transmitting conductive film such as an ITO (Indium Tin Oxide) film or an IZO (Indium Zinc Oxide) film. In such a transmissive liquid crystal device, for example, light from a light source incident from the second substrate 20 side is modulated while being emitted from the first substrate 10 to display an image.

[0017] 1-2. Electrical configuration of the electro-optical device 100 FIG. 3 is a circuit block diagram showing the electrical configuration of the first substrate 10 and other components shown in FIG. 1. As shown in FIG. 3, the first substrate 10 used in the electro-optical panel 100p of the electro-optical device 100 includes a display area 10a in its central region, in which a plurality of pixel circuits 100a are arranged in a matrix. Inside the display area 10a, a plurality of scanning lines 3a extending in the second direction X from a scanning line driving circuit 104 and a plurality of data lines 6a extending in the first direction Y from a data line driving circuit 101 are provided, and pixel circuits 100a are configured corresponding to intersections of the scanning lines 3a and the data lines 6a. The plurality of data lines 6a are electrically connected to an inspection circuit 105. The inspection circuit 105 is a transistor array, and one source and drain of each transistor is electrically connected to the data line 6a, the other source and drain is electrically connected to an inspection line (not shown), and the gate is electrically connected to a control signal wiring.

[0018] Each of the plurality of pixel circuits 100a includes a pixel transistor 30, which is formed of a field-effect transistor or the like, and a pixel electrode 9a electrically connected to the pixel transistor 30. A data line 6a is electrically connected to the source of the pixel transistor 30, a scanning line 3a is electrically connected to the gate of the pixel transistor 30, and a pixel electrode 9a is electrically connected to the drain of the pixel transistor 30. An image signal is supplied to the data line 6a, and a scanning signal is supplied to the scanning line 3a.

[0019] In each pixel circuit 100a, the pixel electrode 9a faces the common electrode 21 of the second substrate 20 described with reference to FIG. 2 via the electro-optical layer 50, forming a liquid crystal capacitance 50a. To prevent fluctuations in the image signal stored in the liquid crystal capacitance, a storage capacitance 55 is added to each pixel circuit 100a in parallel with the liquid crystal capacitance 50a. In this embodiment, to form the storage capacitance 55, a capacitance line 8a extending across the multiple pixel circuits 100a is formed on the first substrate 10, and a common potential LCCOM is supplied to the capacitance line 8a. The capacitance line 8a is arranged to overlap at least one of the scanning line 3a and the data line 6a. FIG. 3 illustrates an example in which the capacitance line 8a overlaps both the scanning line 3a and the data line 6a. Although not shown, the capacitance line 8a is electrically connected to the common potential wiring 6g described with reference to FIG. 1.

[0020] A temperature detection circuit 1 is configured outside the display area 10a on the first substrate 10. Therefore, the multiple terminals 102 include a first terminal 102a and a second terminal 102c electrically connected to the temperature detection circuit 1.

[0021] Furthermore, the multiple terminals 102 are arranged in the following order from the first side 10w1 of the first substrate 10 toward the third side 10w3: terminals 102g, 102t, 102s, the first terminal 102a, the second terminal 102c, terminals 102e, 102f, and 102h. The terminal 102g is a terminal 102 for supplying a common potential LCCOM. The terminal 102t is a terminal for supplying a high-level constant potential VDDY to the scanning line driving circuit 104. The terminal 102s is a terminal for supplying a low-level constant potential VSSY to the scanning line driving circuit 104. The terminals 102e and 102f are terminals for testing, and the terminal 102h is a terminal for applying a constant potential to the dummy pixel electrode 9b.

[0022] 1-3. Configuration of temperature detection circuit 1, etc. FIG. 4 is an explanatory diagram of the temperature detection circuit 1 shown in FIG. 3. As shown in FIG. 4, the temperature detection circuit 1 includes a temperature detection element 11. The temperature detection element 11 includes, for example, a plurality of diodes D connected in series. FIG. 4 illustrates an example in which five diodes D are electrically connected in series. Hereinafter, the five diodes D are referred to as a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, and a fifth diode D5. A first wiring La extending from the first terminal 102a is electrically connected to an anode 11a of the first diode D1 of the temperature detection element 11. A second wiring Lc extending from the second terminal 102c is electrically connected to a cathode 11c of the fifth diode D5 of the temperature detection element 11.

[0023] Therefore, when detecting the temperature of the electro-optical device 100 mounted in an electronic device, a minute forward drive current IF of approximately 10 nA to several μA is supplied from the temperature detection drive circuit 66 to the five temperature detection elements 11 of the temperature detection circuit 1 via the first terminal 102a and the second terminal 102c via the wiring board 70 connected to the first substrate 10. The forward voltage of the temperature detection elements 11 varies with temperature in a substantially linear manner. Therefore, the temperature of the electro-optical panel 100p can be detected by detecting the voltage between the first terminal 102a and the second terminal 102c. Since the temperature detection elements 11 are disposed near the display area 10a, the temperature detection elements 11 can accurately detect the temperature of the display area 10a. Therefore, by correcting the image signal based on the temperature detected by the temperature detection circuit 1, the electro-optical device 100 can be driven under appropriate conditions corresponding to the temperature of the display area 10a, thereby displaying high-quality images.

[0024] The temperature detection drive circuit 66 includes a constant current circuit 661 and a stabilizing capacitor 662 between the constant current circuit 661 and ground. The stabilizing capacitor 662 is electrically connected to a wiring electrically connected to the first terminal 102a and a wiring electrically connected to the second terminal 102c, and stabilizes the measured value of the output voltage VF. The capacitance of the stabilizing capacitor 662 is, for example, 0.1 μF.

[0025] In the temperature detection circuit 1, a first resistor R1 and a second resistor R2 are provided as protective resistors on the first wiring La and the second wiring Lc. The temperature detection circuit 1 has an electrostatic protection circuit 12 for protecting the temperature detection element 11.

[0026] The electrostatic discharge protection circuit 12 includes a transistor Tr connected between the first wiring La and the second wiring Lc, and the transistor Tr is electrically connected in parallel to the temperature detection element 11. One source / drain of the transistor Tr is electrically connected between the first terminal 102a of the first wiring La and the temperature detection element 11, and the other source / drain of the transistor Tr is electrically connected between the second terminal 102c of the second wiring Lc and the temperature detection element 11. In this embodiment, the transistor Tr is an N-channel thin film transistor, similar to the pixel transistor 30.

[0027] The electrostatic protection circuit 12 includes a first capacitance element C1 and a second capacitance element C2 electrically connected in series between a first wiring La and a second wiring Lc. More specifically, one end of the first capacitance element C1 is electrically connected to the first wiring La, one end of the second capacitance element C2 is electrically connected to the second wiring Lc, and the other end of the first capacitance element C1 and the other end of the second capacitance element C2 are electrically connected.

[0028] In the electrostatic protection circuit 12, a connection node Cn between the first capacitance element C1 and the second capacitance element C2 is electrically connected to the gate of the transistor Tr. The electrostatic protection circuit 12 has a third resistance unit R3 electrically connected in parallel to the first capacitance element C1. More specifically, a gate wiring Lg extending from the gate of the transistor Tr is electrically connected to the connection node Cn between the first capacitance element C1 and the second capacitance element C2, and is electrically connected to the second wiring Lc via the third resistance unit R3.

[0029] In the temperature detection circuit 1, the first resistance section R1 is inserted in the first wiring La between the first terminal 102a and the connection position between the first wiring La and the first capacitance element C1, and the second resistance section R2 is inserted in the second wiring Lc between the second terminal 102c and the connection position between the second wiring Lc and the second capacitance element C2.

[0030] In this embodiment, the sizes of the circuit elements used in the temperature detection circuit 1 are as follows, for example: However, these are not limited to the following conditions. Transistor Tr: Channel width W = 800 μm, channel length L = 5 μm The capacitance of the first capacitance element C1=5 pF The capacitance of the second capacitance element C2=5 pF Resistance of the first resistor R1 = 10 kΩ Resistance of the second resistor R2 = 10 kΩ Resistance value of the third resistor R3 = 500kΩ

[0031] In the electro-optical device 100 configured as described above, when a surge current caused by static electricity intrudes from the first terminal 102a, the electrostatic protection circuit 12 protects the temperature detection element 11 from static electricity. More specifically, in the electrostatic protection circuit 12, in a static state, the gate-source voltage of the transistor Tr is 0V, and the transistor Tr is off. In contrast, when a surge current caused by static electricity intrudes from the first terminal 102a, the first resistor R1 suppresses voltage fluctuations, while the gate potential of the transistor Tr, which is the potential of the connection node Cn between the first capacitance element C1 and the second capacitance element C2, rises. As a result, the transistor Tr turns on, and the surge current flows to the second terminal 102c via the transistor Tr and the second wiring Lc. At this time, the first resistor R1 attenuates the surge current intruding from the first terminal 102a, and the second resistor R2 attenuates the surge current intruding from the second terminal 102c. The period during which the transistor Tr is on is determined by the first capacitance element C1, the second capacitance element C2, the third resistance element R3, and the gate capacitance of the transistor Tr. After discharging, the gate potential of the transistor Tr returns to the off potential via the third resistance element R3. Therefore, the surge current flowing through the temperature detection element 11 is suppressed by the electrostatic protection circuit 12, thereby protecting the temperature detection element 11. The first resistance element R1 and the second resistance element R2 generate a voltage drop due to the drive current It of the temperature detection element 11. However, because the drive current It is extremely small, the effect of the voltage drop due to the first resistance element R1 and the second resistance element R2 can be almost ignored.

[0032] 1-4. Layout of temperature detection circuit 1, etc. Fig. 5 is an explanatory diagram showing the planar configuration of the temperature detection circuit 1 etc. shown in Fig. 4. Fig. 5 illustrates an example in which five diodes D are electrically connected in series in the temperature detection element 11. As shown in Fig. 5, the first substrate 10 has a scanning line driving circuit 104 arranged along the first direction Y between the display area 10a and the first side 10w1, and an inter-substrate conduction electrode 14t that connects the first substrate 10 and the second substrate 20 to each other is provided between the scanning line driving circuit 104 and the second side 10w2.

[0033] The first substrate 10 also has a data line driving circuit 101 arranged along the second direction X between the display region 10a and the second side 10w2, and the multiple data lines 6a extend from the data line driving circuit 101 in the first direction Y and are electrically connected to the pixel circuits 100a in the display region 10a described with reference to Fig. 3. Therefore, between the data line driving circuit 101 and the display region 10a, a wiring region 103 is formed in which the multiple data lines 6a extend from the data line driving circuit 101 to the display region 10a.

[0034] In this embodiment, the data line driving circuit 101 includes a selection circuit 101a constituting a demultiplexer at the end closest to the display region 10a. The data lines 6a extend from the selection circuit 101a toward the display region 10a in the first direction Y. The selection circuit 101a includes a transistor 30e that controls the electrical connection between the data lines 6a and the image signal wiring 6j. In this embodiment, the demultiplexer includes, for example, eight selection circuits 101a. The data line driving circuit 101 receives an image signal VID from the driving IC 75 shown in FIG. 3 via the terminal 102 and the image signal wiring 6j. The transistors 30e of the selection circuit 101a time-divisionally supply the image signal VID to each data line 6a based on selection signals SEL1, SEL2, ..., SEL8 supplied from the driving IC 75 via the control signal wiring 6i.

[0035] The temperature detection element 11 is disposed in the first direction Y relative to the scanning line driving circuit 104. More specifically, the temperature detection element 11 is disposed adjacent to the scanning line driving circuit 104 in the first direction Y between the scanning line driving circuit 104 and the second side 10w2. The temperature detection element 11 is also disposed adjacent to the data line driving circuit 101 or the wiring region 103 in the second direction X. In this embodiment, the temperature detection element 11 is disposed adjacent to the wiring region 103 on the first side 10w1 in the direction along the second direction X. Here, the multiple diodes D constituting the temperature detection element 11 are arranged in a fixed direction. In this embodiment, the multiple diodes D constituting the temperature detection element 11 are arranged in the second direction X. Therefore, the dimension L11 of the temperature detection element 11 in the first direction Y is smaller than the dimension L103 of the wiring region 103 in the first direction Y.

[0036] In this embodiment, as will be described below, the first wiring La and the second wiring Lc are routed together as wiring L0 electrically connected to the electrostatic protection circuit 12, and the first resistance unit R1 and the second resistance unit R2 are arranged together as resistance unit R0 electrically connected to the wiring L0. Note that, in electrically connecting the first wiring La to the first terminal 102a and the second wiring Lc to the second terminal 102c, the first wiring La and the second wiring Lc are made to cross each other while ensuring insulation by utilizing a multilayer wiring structure.

[0037] The entire electrostatic protection circuit 12 is arranged collectively. Therefore, the first capacitance element C1 and the second capacitance element C2 are arranged collectively as the capacitance element C0 of the electrostatic protection circuit 12, and the capacitance element C0, the transistor Tr, and the third resistance unit R3 are arranged collectively.

[0038] More specifically, the electrostatic protection circuit 12 is disposed between the inter-substrate conduction electrode 14t and the second side 10w2. In this embodiment, when viewed in the first direction Y, the electrostatic protection circuit 12 is disposed at a position shifted from the inter-substrate conduction electrode 14t toward the opposite side from the first side 10w1 in the second direction X, but when viewed in the second direction X, the electrostatic protection circuit 12 is provided between the inter-substrate conduction electrode 14t and the second side 10w2. In this embodiment, the capacitance element C0 (first capacitance element C1, second capacitance element C2), the transistor Tr, and the third resistance unit R3 that constitute the electrostatic protection circuit 12 are disposed in this order from the inter-substrate conduction electrode 14t side toward the second side 10w2 side. In addition, in the capacitance element C0(, the first capacitance element C1 and the second capacitance element C2 are arranged to be aligned in the second direction X. In this embodiment, the first capacitance element C1 is arranged on the first side 10w1 side with respect to the second capacitance element C2.

[0039] In a transistor Tr, a plurality of unit transistor elements Tr0 are formed using an integrally formed semiconductor layer, and the transistor Tr is configured by electrically connecting a plurality of unit transistor elements Tr0 in parallel. Note that while Fig. 5 shows an example in which a total of four unit transistor elements Tr0 are electrically connected in parallel, the number of unit transistor elements Tr0 electrically connected in parallel is not limited to four.

[0040] In the wiring L0 electrically connected to the electrostatic protection circuit 12, a resistance portion R0 is also provided between the inter-substrate conduction electrode 14t and the second side 10w2. More specifically, the resistance portion R0 is disposed between the electrostatic protection circuit 12 and the first side 10w1. In this embodiment, the wiring L0 includes a first wiring La and a second wiring Lc electrically connected to the temperature detection element 11. The resistance portion R0 includes a first resistance portion R1 electrically connected to the first wiring La and a second resistance portion R2 electrically connected to the second wiring Lc. The first resistance portion R1 and the second resistance portion R2 are disposed side by side in the first direction Y between the electrostatic protection circuit 12 and the first side 10w1. In this embodiment, the first resistance portion R1 is disposed closer to the inter-substrate conduction electrode 14t than the second resistance portion R2.

[0041] In the electro-optical device 100 configured in this manner, the first substrate 10 includes a first constant potential wiring 6h extending in the first direction Y at a position adjacent to the temperature detection element 11 on the opposite side of the first side 10w1. The first constant potential wiring 6h is, for example, a constant potential wiring for sharing a common potential LCCOM with the dummy pixel electrode 9b shown in FIG. 2. The first substrate 10 also includes inspection wirings 6e and 6f extending in the first direction Y between the first constant potential wiring 6h and the temperature detection element 11 and reaching the inspection circuit 105. In this embodiment, the first constant potential wiring 6h extends in the second direction X between the data line driving circuit 101 and the electrostatic protection circuit 12, and between the wiring region 103 and the temperature detection element 11.

[0042] The first substrate 10 includes a second constant potential wiring 6s extending in the second direction X between the temperature detection element 11 and the scanning line driving circuit 104. The second constant potential wiring 6s is a constant potential wiring that supplies a low-level constant potential VSSY to the scanning line driving circuit 104, and extends from the terminal 102s between the first resistor portion R1 and the first side 10w1, then extends in the second direction X between the temperature detection element 11 and the scanning line driving circuit 104, and further extends in the first direction Y toward the scanning line driving circuit 104.

[0043] On the first side 10w1 side of the second constant potential wiring 6s, there are provided a constant potential wiring 6t that supplies a high-level constant potential VDDY to the scanning line driving circuit 104 and a common potential wiring 6g that supplies a common potential LCCOM to the inter-substrate conduction electrode 14t. The common potential wiring 6g is electrically connected to the capacitance line 8a by a multilayer wiring structure. The capacitance line 8a is also used as a relatively wide wiring outside the display region 10a for shading and shielding.

[0044] 1-5. Configuration example of temperature detection element 11 FIG. 6 is a plan view schematically illustrating the planar configuration of the temperature detection element 11 shown in FIG. 5. FIG. 7 is a cross-sectional view schematically illustrating the cross section of the temperature detection element 11 shown in FIG. 6. FIG. 7 corresponds to the A1-A1′ cross section of FIG. 6. FIGS. 6 and 7 illustrate an example of the temperature detection element 11 in which six diodes D are electrically connected in series. Note that in FIGS. 6 and 7, one of the N-type and P-type regions provided in the semiconductor layer 31h constituting the temperature detection element 11 corresponds to a first impurity region of a first conductivity type, and the other corresponds to a second impurity region of a second conductivity type. In this embodiment, of the N-type and P-type regions provided in the semiconductor layer 31h, the N-type region corresponds to the first impurity region, and the P-type region corresponds to the second impurity region. In FIG. 7, layers and the like above the temperature detection element 11 formed on the first substrate 10 are omitted to the extent that they do not interfere with explanation.

[0045] In this embodiment, when configuring the temperature detection element 11 shown in FIG. 5, as shown in FIGS. 6 and 7, a plurality of semiconductor layers 31h separated from one another in an island-like shape are arranged in a fixed direction, and a diode D is configured using each of the plurality of semiconductor layers 31h. In this embodiment, six semiconductor layers 31h1 to 31h6 are arranged in a fixed direction in the second direction X, and six diodes D are configured using each of the six semiconductor layers 31h. More specifically, an N-type region and a P-type region are arranged side by side in the second direction X in each of the six semiconductor layers 31h. In this embodiment, the N-type region includes a high-concentration N-type region 31n1 and a low-concentration N-type region 31n2, and the P-type region includes a high-concentration P-type region 31p1 and a low-concentration P-type region 31p2, and the connection portion between the low-concentration N-type region 31n2 and the low-concentration P-type region 31p2 configures a PN junction surface. Note that the configuration of the junction is not limited to this configuration.

[0046] A relay electrode 6b that electrically connects the diode D is formed on the upper layer of the insulating film 45. In this embodiment, the five relay electrodes 6b1 to 6b5 are electrically connected to the high-concentration P-type region 31p1 of the semiconductor layer 31h and the high-concentration N-type region 31n1 of the adjacent semiconductor layer 31h via contact holes 45p and 45n that penetrate the gate insulating film 32 and the insulating films 42, 43, 44, and 45. In addition, the first wiring La and the second wiring Lc are electrically connected to two of the semiconductor layers 31h located at both ends via contact holes 45p and 45n that penetrate the gate insulating film 32 and the insulating films 42, 43, 44, and 45.

[0047] In this embodiment, the first wiring La has a first connection portion La1 extending in the first direction Y and a first extension portion La2 extending in the second direction X from an end of the first connection portion La1, and the first connection portion La1 is electrically connected to one electrode of the temperature detection element 11. The second line Lc has a second connection portion Lc2 extending in the first direction Y and a second extension portion Lc2 extending from the second connection portion Lc2 in the second direction X, and the second connection portion Lc1 is electrically connected to the other electrode of the temperature detection element 11. In this embodiment, one electrode of the temperature detection element 11 is the anode 11a, and the other electrode of the temperature detection element 11 is the cathode 11c.

[0048] The first wiring La, the second wiring Lc, and the relay electrode 6b are wirings formed in the same layer as the data line 6a, similar to the first constant potential wiring 6h, the second constant potential wiring 6s, the constant potential wiring 6t, the common potential wiring 6g, the control signal wiring 6i, and the image signal wiring 6j shown in FIG. 5, and are low-resistance wirings mainly made of aluminum.

[0049] In the temperature detection element 11, the semiconductor layers 31h include an N-type region and a P-type region between the first connection portion La1 and one of the relay electrodes 6b adjacent to the first connection portion La1, and an N-type region and a P-type region between the second connection portion Lc1 and one of the relay electrodes 6b adjacent to the second connection portion Lc1. The semiconductor layers 31h also include an N-type region and a P-type region between two adjacent relay electrodes 6b among the relay electrodes 6b. That is, the width of the relay electrodes 6b in the second direction X is narrow. Therefore, the parasitic capacitance between the relay electrodes 6b and the noise source is small.

[0050] 1-5. Another example of the configuration of the temperature detection element 11 FIG. 8 is a plan view schematically showing another planar configuration of the temperature detection element 11 shown in FIG. 5. FIG. 9 is a cross-sectional view schematically showing a cross section of the temperature detection element 11 shown in FIG. 8. FIG. 9 corresponds to the A2-A2′ cross section of FIG. 8. For reasons that will be described later with reference to FIG. 10, FIGS. 8 and 9 are included. By using the six semiconductor layers 31h shown in FIGS. 6 and 7 as they are and changing only the formation area of ​​the first connection portion La1 of the first wiring La, the temperature detection element 11 in which six diodes D are electrically connected in series (see FIGS. 6 and 7) is changed to a temperature detection element 11 in which five diodes D are electrically connected in series.

[0051] More specifically, as shown in FIGS. 8 and 9, the formation area of ​​the first connection portion La1 of the first wiring La is expanded in the second direction X to form a short-circuit portion La0 that electrically shorts the N-type region and P-type region of the semiconductor layer 31h6 that overlaps with the first connection portion La1 in a planar view. As a result, the temperature detection element 11 (see FIGS. 6 and 7) in which six diodes D are electrically connected in series can be changed to a temperature detection element 11 in which five diodes D are electrically connected in series. This makes it easy to configure a temperature detection element 11 in which an appropriate number of diodes D are electrically connected in series. The other configurations are the same as those in FIGS. 6 and 7, so their description will be omitted.

[0052] In this embodiment, the first connection portion La1 of the first wiring La is extended in the second direction X to reduce the number of diodes D electrically connected in series in the temperature detection element 11. However, the number of diodes D electrically connected in series in the temperature detection element 11 may also be reduced by extending the second connection portion Lc1 of the second wiring Lc and providing a short-circuit portion that electrically shorts the N-type region and P-type region of the semiconductor layer 31h1 that overlaps with the second connection portion Lc1 in a planar view.

[0053] In addition, the number of diodes D electrically connected in series in the temperature detection element 11 may be reduced by extending the relay electrode 6b in the second direction X and providing a short-circuit portion that electrically shorts the N-type region and the P-type region of the semiconductor layer 31h6 that overlaps with the relay electrode 6b in a planar view.

[0054] However, in a temperature detection element 11 in which multiple diodes D are electrically connected in series, the parasitic capacitance between the relay electrode 6b and the noise source has a greater effect on the output voltage VF from the temperature detection element 11 than the parasitic capacitance between the first wiring La and the noise source and the parasitic capacitance between the second wiring Lc and the noise source. Therefore, the configuration in which the first connection portion La1 of the first wiring La is extended and the configuration in which the second connection portion Lc1 of the second wiring Lc is extended have the advantage of being less affected by noise than the configuration in which the relay electrode 6b is extended.

[0055] 1-6. Number of diodes D in the temperature detection element 11 Fig. 10 is a graph showing an example of the relationship between the drive current I and the influence of noise. Fig. 10 shows the magnitude of the drive current I and the change (ΔVF) in the output voltage VF of the temperature detection element 11 depending on whether or not precharging is performed in the electro-optical device 100.

[0056] When electrically connecting the capacitance line 8a shown in FIG. 3 to the common potential wiring 6g, if the capacitance line 8a is extended outside the display area 10a as a relatively wide wiring for light blocking or shielding, a parasitic capacitance occurs between the capacitance line 8a and the temperature detection element 11. Here, because the capacitance line 8a overlaps with the data line 6a in a planar view, a large parasitic capacitance occurs between the capacitance line 8a and the data line 6a. Therefore, although a common potential LCCOM is applied to the capacitance line 8a, noise occurs in the capacitance line 8a due to a voltage change in the data line 6a when precharging. As a result, the noise in the capacitance line 8a affects the output voltage VF from the temperature detection element 11 via the parasitic capacitance between the capacitance line 8a and the relay electrode 6b of the temperature detection element 11, causing the output voltage VF to fluctuate.

[0057] As shown in FIG. 10, the influence of such noise tends to be mitigated by increasing the drive current IF. For example, in the example shown in FIG. 10, increasing the drive current IF to 600 nA can mitigate the influence of noise. However, increasing the drive current IF increases the output voltage VF from the temperature detection element 11, which increases the burden on the temperature detection drive circuit 66 shown in FIG. 3. Furthermore, the output voltage VF from the temperature detection element 11 is higher when six diodes D are electrically connected in series than when five diodes D are electrically connected in series. Therefore, in the temperature detection element 11, a configuration in which five diodes D are electrically connected in series may be preferable to a configuration in which six diodes D are electrically connected in series. On the other hand, the sensitivity improves when the number of diodes D electrically connected in series increases.

[0058] In view of this situation, in this embodiment, as described with reference to Figures 6, 7, 8 and 9, by appropriately setting the width in the second direction X of the first connection portion La1 of the first wiring La without changing the basic configuration of the temperature detection element 11, it is possible to easily realize a temperature detection element 11 in which six diodes D are electrically connected in series and a temperature detection element 11 in which five diodes D are electrically connected in series, and therefore a temperature detection element 11 in which an appropriate number of diodes D are electrically connected in series can be used in the electro-optical device 100.

[0059] 1-7. Main Effects of the Present Embodiment As described above, in the electro-optical device 100 of this embodiment, the temperature detection element 11 is disposed adjacent to the scanning line driving circuit 104 between the scanning line driving circuit 104 and the second side 10w2, so that the temperature detection element 11 can be disposed near the display region 10a. This allows the temperature of the electro-optical layer 50 in the display region 10a to be detected appropriately. Furthermore, the temperature detection element 11 and the wiring L0 (first wiring La and second wiring Lc) electrically connected to the temperature detection element 11 can be separated from the scanning lines 3a, so that the influence of noise from the scanning lines 3a on the wiring L0 can be reduced. This results in high detection accuracy by the temperature detection element 11.

[0060] Furthermore, the electrostatic protection circuit 12 is disposed between the inter-substrate conduction electrode 14t and the second side, and the resistance portion R0 is disposed in the wiring L0 between the electrostatic protection circuit 12 and the first side 10w1. Therefore, of the region that separates the resistance portion R0 from the terminal 102, the resistance portion R0 can be disposed in an empty region near the first side 10w1, and therefore the presence of the resistance portion R0 does not significantly affect the layout of the wiring, thereby preventing the electro-optical device 100 from becoming larger.

[0061] Furthermore, the first resistor portion R1 and the second resistor portion R2 of the resistor portion R0 are arranged side by side along the first direction Y between the electrostatic protection circuit 12 and the first side 10w1, and between the inter-substrate conduction electrode 14t and the second side 10w2. Therefore, the resistor portion R0 can be arranged in a narrow range in the second direction X. Therefore, the presence of the resistor portion R0 does not have a significant effect on the wiring layout.

[0062] Furthermore, the transistor Tr, the capacitance element C0, and the third resistance portion R3 that constitute the electrostatic protection circuit 12 are arranged side by side along the first direction Y between the inter-substrate conduction electrode 14t and the second side 10w2. Therefore, the electrostatic protection circuit 12 can be arranged in a narrow range in the second direction X. Therefore, the presence of the electrostatic protection circuit 12 does not significantly affect the wiring layout.

[0063] Furthermore, since the temperature detection element 11 has a plurality of diodes D electrically connected in series, it is susceptible to the effects of noise, but the first constant potential wiring 6h and the second constant potential wiring 6s extend near the temperature detection element 11. Therefore, the first constant potential wiring 6h and the second constant potential wiring 6s can be used as a shield, so the temperature detection element 11 is less susceptible to the effects of noise from signal lines such as the data line 6a.

[0064] Furthermore, since the temperature detection element 11 has multiple semiconductor layers 31h arranged side by side in a fixed direction, it is relatively easy to electrically connect multiple diodes D in series in the temperature detection element 11. Furthermore, since the multiple semiconductor layers 31h are arranged side by side in the second direction X, even when increasing the number of diodes D electrically connected in series, there are few spatial constraints. Furthermore, since the multiple semiconductor layers 31h are arranged side by side in the second direction X, the dimension L11 of the temperature detection element 11 in the first direction Y can be made smaller than the dimension L103 of the wiring region 103 in the first direction Y. Therefore, the entire temperature detection element 11 can be disposed near the display region 10a.

[0065] 2. Embodiment 2 11 is an explanatory diagram of an electro-optical device 100 according to a second embodiment of the present invention. Note that the basic configuration of this embodiment is similar to that of the first embodiment, so the same reference numerals are used for common parts and their description will be omitted. In the first embodiment, in the data line driving circuit 101, the control signal lines 6i extending in the second direction X are arranged in parallel in the first direction Y. However, as shown in FIG. 11, the present invention may also be applied to an electro-optical device 100 in which the image signal lines 6j extending in the second direction X are arranged in parallel in the first direction Y.

[0066] 3. Another embodiment of the electro-optical device The electro-optical device 100 of the present invention is not limited to a liquid crystal device, and the present invention may be applied to electro-optical devices 100 other than liquid crystal devices, such as organic electroluminescence devices.

[0067] 4. Electronic device configuration examples Fig. 12 is a block diagram showing an example of the configuration of a projection type display device 1000 to which the present invention is applied. Fig. 13 is an explanatory diagram of the light path shift element 110 shown in Fig. 12. Note that polarizing plates and the like are omitted from Fig. 12. The projection type display device 1000 shown in Fig. 12 is an example of an electronic device to which the present invention is applied, and includes an illumination device 190, a separation optical system 170, three electro-optical devices 100R, 100G, and 100B, and a projection optical system 160. Each of the electro-optical devices 100R, 100G, and 100B is formed by the electro-optical device 100 described with reference to Figs. 1 to 11.

[0068] The illumination device 190 is a white light source, and for example, a laser light source or a halogen lamp is used. The separation optical system 170 includes three mirrors 171, 172, and 175 and dichroic mirrors 173 and 174. The separation optical system 170 separates the white light emitted from the illumination device 190 into three primary colors: red (R), green (G), and blue (B). Specifically, the dichroic mirror 174 transmits light in the red (R) wavelength range and reflects light in the green (G) and blue (B) wavelength ranges. The dichroic mirror 173 transmits light in the blue (B) wavelength range and reflects light in the green (G) wavelength range. The light corresponding to red (R), green (G), and blue (B) is guided to the electro-optical devices 100R, 100G, and 100B, respectively.

[0069] The light beams modulated by the electro-optical devices 100R, 100G, and 100B are incident on the dichroic prism 161 from three directions. The dichroic prism 161 constitutes a synthesis optical system that synthesizes red (R), green (G), and blue (B) images. Therefore, the projection lens system 162 enlarges and projects the synthesized image emitted from the light path shift element 110 onto a projection target such as a screen 180, thereby displaying a color image on the projection target such as the screen 180.

[0070] In this case, the control unit 150 can correct the image signals supplied to the electro-optical devices 100R, 100G, and 100B based on the temperature detection results of the temperature detection circuit 1. This allows high-quality projection images to be displayed even when the ambient temperature fluctuates. Furthermore, if a light path shift element 110 (shown by a dashed line) is provided in the projection optical system 160 on the side from which light is emitted from the dichroic prism 161, shifting the position at which the projected pixel is viewed every predetermined period to enhance resolution, it becomes necessary to drive the liquid crystal layer at high speed. Even in this case, the electro-optical layer 50 can be driven at high speed by correcting the image signals supplied to the electro-optical devices 100R, 100G, and 100B based on the temperature detection results of the temperature detection circuit 1 or by adjusting the temperature of the electro-optical panel 100p of the electro-optical devices 100R, 100G, and 100B.

[0071] As shown in Fig. 13, the light path shift element 110 is an optical element that shifts light emitted from the dichroic prism 161 in a predetermined direction. Fig. 13 illustrates an example in which the position of a projection pixel Pi, at which light emitted from each pixel circuit 100a of the electro-optical panel 100p is visible, is shifted by the light path shift element 110 by a distance equivalent to 0.5 pixel pitches (=P / 2) to one side X1 in the X direction and a distance equivalent to 0.5 pixel pitches (=P / 2) to one side Y1 in the Y direction. The light path shift element 110 includes a light-transmitting plate, and an actuator, under the command of the control unit 150, swings the light-transmitting plate around an axis extending in the first direction and / or around an axis extending in the second direction, thereby shifting the light path of the light emitted from each pixel circuit 100a of the electro-optical panel 100p to light path LA and light path LB.

[0072] 5. Other embodiments of electronic devices The projection display device may be configured to use an LED light source or the like that emits light of each color as the light source unit, and supply each color light emitted from the LED light source to a separate liquid crystal device.

[0073] The electronic device equipped with the electro-optical device 100 according to the present invention is not limited to the projection display device 1000 of the above embodiment. For example, the present invention may be used in electronic devices such as a HUD (head-up display), an HMD (head-mounted display), a personal computer, a digital still camera, and an LCD television. [Explanation of symbols]

[0074] 1...temperature detection circuit, 3a...scanning line, 6a...data line, 6b, 6b1 to 6b5...relay electrodes, 6e, 6f...inspection wiring, 6g...common potential wiring, 6h...first constant potential wiring, 6i...control signal wiring, 6j...image signal wiring, 6s...second constant potential wiring, 6t...constant potential wiring, 8a...capacitance line, 9a...pixel electrode, 9b...dummy pixel electrode, 10...first substrate, 10a...display area, 11...temperature detection element, 11a...anode, 11c...cathode, 12...electrostatic protection circuit, 14t...between substrates Conductive electrode, 20... second substrate, 21... common electrode, 30... pixel transistor, 31h, 31h1 to 31h5... semiconductor layer, 45n, 45p... contact hole, 50... electro-optical layer, 60... upper circuit, 61... connector, 65... image control circuit, 66... ​​temperature detection drive circuit, 70... wiring board, 75... drive IC, 100, 100B, 100G, 100R... electro-optical device, 100a... pixel circuit, 100p... electro-optical panel, 101... data line drive circuit, 101a ...selection circuit, 102, 102e, 102f, 102g, 102h, 102s, 102t...terminal, 102a...first terminal, 102c...second terminal, 103...wiring area, 104...scanning line driving circuit, 105...inspection circuit, 110...light path shift element, 150...controller, 160...projection optical system, 161...dichroic prism, 190...illumination device, 1000...projection type display device, C0...capacitance element, C1...first capacitance element, C2...second capacitance element, D...diode, L0...wiring line, La...first wiring, Lc...second wiring, R0...resistance section, R1...first resistance section, R2...second resistance section, R3...third resistance section, LA, LB...optical path, X...second direction, Y...first direction, La0...short circuit section, La1...first connection section, Lc1...second connection section, Cn...connection node, VID...image signal, Lg...gate wiring, SEL...selection signal, Pi...projection pixel, Tr, 30e...transistor, Tr0...unit transistor element, LCCOM...common potential, VDDY, VSSY...constant potential

Claims

1. a scanning line driving circuit arranged along a first direction; a temperature detection element disposed in the first direction relative to the scanning line driving circuit; a first wiring having a first connection portion electrically connected to one electrode of the temperature detection element; a second wiring having a second connection portion electrically connected to the other electrode of the temperature detection element; Equipped with the temperature detection element includes: a plurality of semiconductor layers each having a first impurity region of a first conductivity type and a second impurity region of a second conductivity type, and arranged side by side in a second direction intersecting the first direction; and a plurality of relay electrodes electrically connecting, in a plan view, the first impurity region of one of the semiconductor layers and the second impurity region of the other of the semiconductor layers adjacent to each other in the second direction between the first connection portion and the second connection portion; the plurality of semiconductor layers have, in a plan view, the first impurity region and the second impurity region respectively between the relay electrode adjacent to the first connection portion and the first connection portion, between two adjacent relay electrodes, and between the relay electrode adjacent to the second connection portion and the second connection portion; an electro-optical device characterized in that at least one of the first connection portion, the relay electrode, and the second connection portion has a short-circuit portion that electrically short-circuits the first impurity region and the second impurity region provided in a semiconductor layer that overlaps at least one of the first connection portion, the relay electrode, and the second connection portion in a planar view.

2. 2. The electro-optical device according to claim 1, An electro-optical device comprising a plurality of data lines extending in the first direction and arranged along the second direction.

3. 3. The electro-optical device according to claim 2, a data line driving circuit arranged along the second direction; and a wiring region in which the plurality of data lines extend between the data line driving circuit and a display region, The electro-optical device, wherein the temperature detection element is disposed adjacent to the data line driving circuit or the wiring region in the second direction.

4. 4. The electro-optical device according to claim 3, the temperature detection elements are arranged adjacent to the wiring region in the second direction, The electro-optical device, wherein the dimension of the temperature detection element in the first direction is smaller than the dimension of the wiring region in the first direction.

5. a scanning line driving circuit arranged along a first direction; a temperature detection element arranged adjacent to the scanning line driving circuit in the first direction and including a plurality of semiconductor layers arranged side by side in a second direction intersecting the first direction; a first wiring electrically connected to a semiconductor layer arranged at one end of the plurality of semiconductor layers, and extending along the plurality of semiconductor layers in the second direction between the scanning line driving circuit and the temperature detection element in a plan view; a second wiring electrically connected to a semiconductor layer disposed at the other end of the plurality of semiconductor layers and extending along the first wiring in the second direction; a constant potential wiring extending along the second direction between the scanning line driving circuit and the first wiring in a plan view; An electro-optical device comprising:

6. 6. The electro-optical device according to claim 5, The electro-optical device, wherein the temperature detection element is disposed in an area narrower than the width of the scanning line driving circuit in the second direction.

7. 6. The electro-optical device according to claim 5, a data line driving circuit arranged along the second direction; a wiring region in which a plurality of data lines extend between the data line driving circuit and a display region in a plan view; another constant potential wiring extending in the first direction between the temperature detection element and the wiring region in a plan view; an inspection wiring extending in the first direction between the other constant potential wiring and the temperature detection element.

8. An electronic device comprising the electro-optical device according to claim 1 .

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