CONTROL CIRCUIT FOR CONVERTER CIRCUIT AND CONTROL METHOD FOR CONVERTER CIRCUIT

Abstract

A control circuit (2) comprises: a first comparator (61), a first peak hold circuit (71), a first A / D conversion unit, a first control unit, and a first D / A conversion unit (212). The first comparator (61) outputs a first switching signal (Sig1) by comparing a detection voltage (Vd) and a first reference potential (DA1). The first peak hold circuit (71) holds a first peak value that is either the maximum value or the minimum value of the detection voltage (Vd). The first A / D conversion unit performs A / D conversion on the first peak value. The first control unit determines a digital value of the first reference potential (DA1) on the basis of the voltage output by the first A / D conversion unit. The first D / A conversion unit (212) performs D / A conversion on the digital value of the first reference potential (DA1), and outputs the converted value as the first reference potential (DA1) to the first comparator (61).

Description

[Technical Field]

[0001] The present invention relates to a control circuit for a converter circuit that converts an input voltage into a desired voltage and outputs the converted voltage, and a control method for the converter circuit. [Background technology]

[0002] Patent Document 1 discloses a DC-DC converter that converts DC power between an input wire and an output wire. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-057203 Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention provides a control circuit for a converter circuit that can easily control a desired reactor current even when the converter circuit is controlled at a relatively high frequency. [Means for solving the problem]

[0005] A control circuit for a converter circuit according to one aspect of the present invention includes a reactor, a first switch element, and a second switch element connected to the reactor. The control circuit converts an input voltage into a desired voltage by alternately turning on and off the first switch element and the second switch element, and outputs the desired voltage. The control circuit includes a first comparator, a first peak hold circuit, a first A / D converter, a first control unit, and a first D / A converter. The first comparator compares a detected voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential, and outputs a first switching signal for switching on and off the first switch element and the second switch element. The first peak hold circuit holds a first peak value, which is either the maximum or minimum value of the detected voltage. The first A / D converter performs A / D conversion on the first peak value held by the first peak hold circuit. The first control unit determines a digital value of the first reference potential based on the voltage output by the first A / D converter. The first D / A conversion unit D / A converts the digital value of the first reference potential determined by the first control unit and outputs the converted value to the first comparator as the first reference potential. Here, the control circuit of the converter circuit includes: a second comparator that compares the detection voltage with a second reference potential to output a second switching signal for switching on / off each of the first switch element and the second switch element; a second peak hold circuit that holds a second peak value different from the first peak value among the maximum and minimum values ​​of the detection voltage; a second A / D conversion unit that performs A / D conversion on the second peak value held by the second peak hold circuit; a second control unit that determines a digital value of the second reference potential based on the voltage output by the second A / D conversion unit; and a second D / A conversion unit that performs D / A conversion on the digital value of the second reference potential determined by the second control unit and outputs the digital value to the second comparator as the second reference potential, and the first peak hold circuit is reset by the second switching signal, and the second peak hold circuit is reset by the first switching signal.

[0006] A control method for a converter circuit according to one aspect of the present invention is a control method for a converter circuit having a reactor, a first switch element, and a second switch element connected to the reactor, which converts an input voltage into a desired voltage by alternately turning on and off the first switch element and the second switch element. The control method compares a detected voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential, and outputs a first switching signal for switching on and off the first switch element and the second switch element. The control method holds a first peak value, which is either a maximum value or a minimum value of the detected voltage. The control method performs A / D conversion on the held first peak value. The control method determines a digital value of the first reference potential based on the A / D converted voltage. The control method also performs D / A conversion on the determined digital value of the first reference potential, thereby setting the first reference potential. Here, the control method for the converter circuit includes comparing the detected voltage with a second reference potential to output a second switching signal for switching on / off of each of the first switch element and the second switch element, holding a second peak value different from the first peak value among the maximum and minimum values ​​of the detected voltage, A / D converting the held second peak value, determining a digital value of the second reference potential based on the obtained voltage, D / A converting the determined digital value of the second reference potential to use it as the second reference potential, resetting the holding of the first peak value by the second switching signal, and resetting the holding of the second peak value by the first switching signal. [Effects of the Invention]

[0007] The control circuit and the like of the converter circuit of the present invention have the advantage that they can easily control the reactor current at a desired value even when controlling the converter circuit at a relatively high frequency. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram showing the configuration of a converter circuit and a basic control circuit. [Figure 2] FIG. 2 is a waveform diagram when the converter circuit operates as a boost chopper. [Figure 3] FIG. 3 is a circuit diagram showing the configuration of a control circuit of a converter circuit according to an embodiment. [Figure 4] FIG. 4 is a waveform diagram of the detected voltage. [Figure 5] FIG. 5 is a waveform diagram of the output of the peak hold circuit. [Figure 6] FIG. 6 is a circuit diagram showing the configuration of a control circuit of a converter circuit according to a first modified example of the embodiment. [Figure 7] FIG. 7 is a circuit diagram showing the configuration of a control circuit of a converter circuit according to a second modification of the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] (Embodiment) [1.Technical background] First, the technical background that led to the invention of the control circuit of the converter circuit according to the embodiment will be described using a converter circuit 200 and a basic control circuit 20 shown in Fig. 1. Fig. 1 is a circuit diagram showing the configuration of the converter circuit 200 and the basic control circuit 20.

[0010] The converter circuit 200 is a synchronous rectification bidirectional converter circuit. As shown in Fig. 1, when a power supply 3 is connected between a first high potential terminal P11 and a first low potential terminal P12 and a load 4 is connected between a second high potential terminal P21 and a second low potential terminal P22, the converter circuit 200 performs a boost chopper operation to boost the input voltage supplied from the power supply 3 and output it to the load 4, thereby functioning as a boost converter circuit. When the load 4 is connected between the first high potential terminal P11 and the first low potential terminal P12 and the power supply 3 is connected between the second high potential terminal P21 and the second low potential terminal P22, the converter circuit 200 performs a buck chopper operation to buck the input voltage supplied from the power supply 3 and output it to the load 4, thereby functioning as a buck converter circuit.

[0011] The potential of the first low potential terminal P12 is lower than the potential of the first high potential terminal P11, and the potential of the second low potential terminal P22 is lower than the potential of the second high potential terminal P21. The first low potential terminal P12 and the second low potential terminal P22 are connected and have the same potential.

[0012] The converter circuit 200 includes a first capacitor C1, a second capacitor C2, a reactor L1, a first switch element S1, a second switch element S2, a first gate resistor Rg1, a second gate resistor Rg2, a first drive circuit 11, a second drive circuit 12, and a current detector 5. The converter circuit 200 is controlled by a basic control circuit 20.

[0013] The first capacitor C1 is connected between the first high potential terminal P11 and the first low potential terminal P12. The second capacitor C2 is connected between the second high potential terminal P21 and the second low potential terminal P22. The first capacitor C1 and the second capacitor C2 are both aluminum electrolytic capacitors, for example.

[0014] The reactor L1 has a first end (left end in FIG. 1) connected to the first high potential terminal P11, and a second end (right end in FIG. 1) connected to the connection point of the first switch element S1 and the second switch element S2.

[0015] The first switch element S1 and the second switch element S2 are both transistors such as normally-off MOSFETs (Metal Oxide Semiconductor Field-Effect Transistors) and are connected in series. The drain of the first switch element S1 is connected to the second high potential terminal P21, and the source of the second switch element S2 is connected to the first low potential terminal P12 and the second low potential terminal P22. The source of the first switch element S1 and the drain of the second switch element S2 are connected to the second end of the reactor L1. The gate of the first switch element S1 is connected to the first drive circuit 11 via a first gate resistor Rg1, and the gate of the second switch element S2 is connected to the second drive circuit 12 via a second gate resistor Rg2.

[0016] The first switch element S1 and the second switch element S2 are not limited to MOSFETs, but may be other transistors such as an IGBT (Insulated Gate Bipolar Transistor) or a GaN (Gallium Nitride) transistor.

[0017] The first drive circuit 11 receives a first control signal Sig10 from the basic control circuit 20 and outputs a first drive signal Sig11 for applying a drive voltage to the gate of the first switch element S1 via the first gate resistor Rg1. The first control signal Sig10 is a signal that instructs the first switch element S1 to be turned on or off. In other words, the first drive circuit 11 receives the first control signal Sig10 from the basic control circuit 20 and outputs the first drive signal Sig11 to drive the first switch element S1.

[0018] Specifically, when the first drive signal Sig11 is at a high level, the gate capacitance (input capacitance) of the first switch element S1 is charged, turning the first switch element S1 on. On the other hand, when the first drive signal Sig11 is at a low level, the charge accumulated in the gate capacitance of the first switch element S1 is discharged, turning the first switch element S1 off.

[0019] The second drive circuit 12 is an IC that receives a second control signal Sig20 from the basic control circuit 20 and outputs a second drive signal Sig21 for applying a drive voltage to the gate of the second switch element S2 via the second gate resistor Rg2. The second control signal Sig20 is a signal that instructs the second switch element S2 to be turned on or off. In other words, the second drive circuit 12 receives the second control signal Sig20 from the basic control circuit 20 and drives the second switch element S2.

[0020] Specifically, when the second drive signal Sig21 is at a high level, the gate capacitance (input capacitance) of the second switch element S2 is charged, turning the second switch element S2 on. On the other hand, when the second drive signal Sig21 is at a low level, the charge accumulated in the gate capacitance of the second switch element S2 is discharged, turning the second switch element S2 off.

[0021] The current detector 5 detects a reactor current IL, which is a current flowing through the reactor L1. The detection result of the current detector 5 is output to the basic control circuit 20 as a detection voltage Vd corresponding to the detected reactor current IL.

[0022] The basic control circuit 20 is realized by, for example, a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the basic control circuit 20 are realized by hardware such as a microcomputer or processor that constitutes the basic control circuit 20 executing a computer program (software) stored in memory.

[0023] When the converter circuit 200 operates as a step-up chopper, the basic control circuit 20 alternately turns on the first switch element S1 and the second switch element S2 to boost the input voltage. When the converter circuit 200 operates as a step-down chopper, the basic control circuit 20 alternately turns on the first switch element S1 and the second switch element S2 to step down the input voltage. In either case, the basic control circuit 20 controls the first switch element S1 and the second switch element S2 by PWM (Pulse Width Modulation) control. That is, the basic control circuit 20 boosts or lowers the input voltage to a desired output voltage by adjusting the duty ratio of the first control signal Sig10 output to the first drive circuit 11 and the second control signal Sig20 output to the second drive circuit 12.

[0024] Specifically, the basic control circuit 20 calculates the average value of the detected voltage Vd (in other words, the average value of the reactor current IL) and adjusts the duty ratios of the first control signal Sig10 and the second control signal Sig20 so that the calculated average value of the detected voltage Vd becomes a target value, which is set appropriately according to the desired output voltage.

[0025] 2 is a waveform diagram when the converter circuit 200 operates as a boost chopper. In FIG. 2, "IL" indicates the reactor current flowing through the reactor L1. Also in FIG. 2, "S1" indicates the drive voltage applied to the gate of the first switch element S1, and "S2" indicates the drive voltage applied to the gate of the second switch element S2. In each of "S1" and "S2," "H" indicates that the drive voltage is at a high level and the switch element is in an on state, and "L" indicates that the drive voltage is at a low level and the switch element is in an off state. Note that FIG. 2 omits the dead time during which both the first switch element S1 and the second switch element S2 are off.

[0026] As shown in FIGS. 1 and 2, in the converter circuit 200, a basic control circuit 20 alternately turns on / off a first switch element S1 and a second switch element S2 to control a reactor current IL, thereby converting an input voltage into a desired voltage and outputting it.

[0027] In recent years, there has been a demand for smaller reactors in converter circuits. One possible way to achieve this is to control the converter circuit's switching at a relatively high frequency, for example, 100 kHz or higher. This is because such switching control reduces the inductance required for the reactor.

[0028] However, when the converter circuit is switched at a relatively high frequency as described above, the reactor current changes quickly (steeply), which creates the problem that it becomes difficult to control the reactor current to the desired peak current.

[0029] For example, in the basic control circuit 20 described above, the on / off of the first switch element S1 and the second switch element S2 is controlled based on the average value of the reactor current IL. Therefore, even if the reactor current IL changes suddenly, the on / off of the first switch element S1 and the second switch element S2 cannot be controlled based on the instantaneous value of the reactor current IL, and therefore control that follows the sudden change in the reactor current IL cannot be performed. In this way, if control that follows the sudden change in the reactor current IL cannot be performed, for example, control that suppresses an excessive current that momentarily flows through the reactor L1 cannot be performed.

[0030] Here, it is conceivable to control the first switch element S1 and the second switch element S2 based on the instantaneous value of the reactor current IL. However, the sampling speed of an A / D (Analog to Digital) converter included in a general control circuit used as a control circuit for a converter circuit, such as a microcomputer, is not fast enough to follow a sudden change in the reactor current IL.

[0031] For this reason, in such a control circuit, the instantaneous value of the reactor current IL is acquired with a delay from the time when the reactor current IL reaches its peak, which again results in the problem that control that follows sudden changes in the reactor current IL cannot be performed and control at the desired reactor current IL cannot be performed.

[0032] In view of the above, the inventors have come up with the present disclosure.

[0033] Hereinafter, the embodiments will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component placement and connection forms, steps, step order, etc. shown in the following embodiments are merely examples and are not intended to limit the present invention. Furthermore, among the components in the following embodiments, components not recited in independent claims will be described as optional components.

[0034] It should be noted that the drawings are schematic diagrams and are not necessarily strict illustrations. In addition, in the drawings, substantially the same components are denoted by the same reference numerals, and overlapping descriptions may be omitted or simplified.

[0035] [2. Configuration] A control circuit 2 of a converter circuit according to an embodiment (hereinafter also simply referred to as "control circuit 2") will be described below with reference to Fig. 3. Fig. 3 is a circuit diagram showing the configuration of the control circuit 2 of the converter circuit according to an embodiment. In Fig. 3, the converter circuit is not shown except for the current detector 5. In the embodiment, the converter circuit to be controlled by the control circuit 2 is the same as the converter circuit 200 that performs a boost chopper operation, and therefore a description thereof will be omitted here.

[0036] As shown in FIG. 3, the control circuit 2 includes a first control circuit 21, a second control circuit 22, a first comparator 61, a second comparator 62, a first peak hold circuit 71, and a second peak hold circuit 72.

[0037] The first comparator 61 compares the detection voltage Vd with a first reference potential DA1 to output a first switching signal Sig1 for switching the first switch element S1 and the second switch element S2 on / off. Here, the first switching signal Sig1 is a signal for turning off the second switch element S2 and turning on the first switch element S1. Specifically, the first comparator 61 outputs the first switching signal Sig1 when the detection voltage Vd exceeds the first reference potential DA1.

[0038] Here, the detected voltage Vd is obtained by detecting the reactor current IL flowing through the reactor L1 using the current detector 5. FIG. 4 is a waveform diagram of the detected voltage Vd. In FIG. 5, "DA1" indicates a first reference potential DA1, and "DA2" indicates a second reference potential DA2 (described later). The current detector 5 converts the detected value of the reactor current IL into a level-shifted voltage signal so that the detected voltage Vd falls roughly within a range between the first reference potential DA1 and the second reference potential DA2, and outputs the detected voltage Vd.

[0039] The second comparator 62 compares the detection voltage Vd with the second reference potential DA2 to output a second switching signal Sig2 for switching the first switch element S1 and the second switch element S2 on / off. Here, the second switching signal Sig2 is a signal for turning off the first switch element S1 and turning on the second switch element S2. Specifically, the second comparator 62 outputs the second switching signal Sig2 when the detection voltage Vd falls below the second reference potential DA2.

[0040] The first peak hold circuit 71 holds a first peak value, which is either the maximum value or the minimum value of the detected voltage Vd. In this embodiment, the first peak hold circuit 71 holds the first peak value, which is the maximum value of the detected voltage Vd. In other words, it can be said that the first peak hold circuit 71 holds the maximum peak value of the reactor current IL.

[0041] The first peak hold circuit 71 is reset by the first reset signal Re1. That is, when the first reset signal Re1 is input while the first peak hold circuit 71 is holding the first peak value, the first peak hold circuit 71 releases the first peak value. In this embodiment, the first reset signal Re1 is the second switching signal Sig2 output by the second comparator 62. Therefore, the first peak hold circuit 71 is reset by the second switching signal Sig2.

[0042] The second peak hold circuit 72 holds a second peak value that is different from the first peak value among the maximum and minimum values ​​of the detection voltage Vd. In this embodiment, the second peak hold circuit 72 holds the second peak value that is the minimum value of the detection voltage Vd. In other words, it can be said that the second peak hold circuit 72 holds the minimum peak value of the reactor current IL.

[0043] The second peak hold circuit 72 is reset by the second reset signal Re2. That is, when the second reset signal Re2 is input while the second peak hold circuit 72 is holding the second peak value, the second peak hold circuit 72 releases the second peak value. In this embodiment, the second reset signal Re2 is the first switching signal Sig1 output by the first comparator 61. Therefore, the second peak hold circuit 72 is reset by the first switching signal Sig1.

[0044] 5 is an output waveform diagram of the peak hold circuits (first peak hold circuit 71 and second peak hold circuit 72). In FIG. 5, "V1" indicates the output voltage of the first peak hold circuit 71, and "V2" indicates the output voltage of the second peak hold circuit 72.

[0045] 5, when the detection voltage Vd reaches its maximum value at time t1, in other words, when the reactor current IL reaches its maximum peak value, the output voltage V1 of the first peak hold circuit 71 is held at this maximum value (i.e., the first peak value). Thereafter, when the second switch signal Sig2 (i.e., the first reset signal Re1) is input to the first peak hold circuit 71 at time t2, the first peak hold circuit 71 is reset. The input timing of the second switch signal Sig2 is approximately the same as the timing when the detection voltage Vd reaches its minimum value, in other words, when the reactor current IL reaches its minimum peak value.

[0046] 5, when the detection voltage Vd reaches its minimum value, in other words, when the reactor current IL reaches its minimum peak value, at time t2, the output voltage V2 of the second peak hold circuit 72 is held at that minimum value (i.e., the second peak value). Thereafter, when the first switch signal Sig1 (i.e., the second reset signal Re2) is input to the second peak hold circuit 72 at time t3, the second peak hold circuit 72 is reset. The input timing of the first switch signal Sig1 is approximately the same as the timing when the detection voltage Vd reaches its maximum value, in other words, when the reactor current IL reaches its maximum peak value.

[0047] The first control circuit 21 is realized by, for example, a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the first control circuit 21 are realized by hardware such as a microcomputer or processor constituting the first control circuit 21 executing a computer program (software) stored in a memory.

[0048] The first control circuit 21 includes a control unit 210, an A / D conversion unit 211, a first D / A (Digital to Analog) conversion unit 212, and a second D / A conversion unit 213.

[0049] The A / D conversion unit 211 A / D converts and acquires the output voltage of the first peak hold circuit 71. The A / D conversion unit 211 also A / D converts and acquires the output voltage of the second peak hold circuit 72. The sampling speed of the A / D conversion unit 211 is set to a speed that allows sampling during the periods when the first peak hold circuit 71 and the second peak hold circuit 72 are holding the first peak value and the second peak value, respectively.

[0050] Therefore, the A / D conversion unit 211 functions as a first A / D conversion unit that A / D converts the first peak value held by the first peak hold circuit 71. The A / D conversion unit 211 also functions as a second A / D conversion unit that A / D converts the second peak value held by the second peak hold circuit 72. The A / D conversion unit 211 outputs to the control unit 210 a first voltage value obtained by A / D converting the output voltage of the first peak hold circuit 71 and a second voltage value obtained by A / D converting the output voltage of the second peak hold circuit 72, separately.

[0051] The control unit 210 determines the digital value of the first reference potential DA1 based on the first voltage value output by the A / D conversion unit 211. That is, the control unit 210 functions as a first control unit that determines the digital value of the first reference potential DA1 based on the voltage output by the first A / D conversion unit. The control unit 210 also determines the digital value of the second reference potential DA2 based on the second voltage value output by the A / D conversion unit 211. That is, the control unit 210 functions as a second control unit that determines the digital value of the second reference potential DA2 based on the voltage output by the second A / D conversion unit.

[0052] Specifically, the control unit 210 refers to the maximum peak value and the minimum peak value of the reactor current IL by referring to the first voltage value, i.e., the first peak value held by the first peak hold circuit 71, and the second voltage value, i.e., the second peak value held by the second peak hold circuit 72. In this way, the control unit 210 determines the digital value of the first reference potential DA1 and the digital value of the second reference potential DA2 based on the maximum peak value and the minimum peak value of the reactor current IL so that the reactor current IL has a desired magnitude.

[0053] The first D / A conversion section 212 performs D / A conversion on the digital value of the first reference potential DA1 determined by the control section 210 (first control section), and outputs the converted value to the first comparator 61 as the first reference potential DA1 which is an analog value.

[0054] The second D / A converter 213 performs D / A conversion on the digital value of the second reference potential DA2 determined by the control unit 210 (second control unit), and outputs the converted value to the second comparator 62 as the second reference potential DA2, which is an analog value.

[0055] The second control circuit 22 is realized by, for example, a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the second control circuit 22 are realized by hardware such as a microcomputer or processor constituting the second control circuit 22 executing a computer program (software) stored in a memory.

[0056] The second control circuit 22 outputs a first control signal Sig10 and a second control signal Sig20 based on the first switching signal Sig1 output from the first comparator 61. Specifically, when the first switching signal Sig1 is input, the second control circuit 22 outputs a low-level second control signal Sig20 to turn off the second switch element S2. After counting the dead time, the second control circuit 22 outputs a high-level first control signal Sig10 to turn on the first switch element S1.

[0057] Furthermore, the second control circuit 22 outputs a first control signal Sig10 and a second control signal Sig20 based on the second switching signal Sig2 output from the second comparator 62. Specifically, when the second control circuit 22 receives the second switching signal Sig2, it outputs a low-level first control signal Sig10 to turn off the first switch element S1. After counting the dead time, the second control circuit 22 outputs a high-level second control signal Sig20 to turn on the second switch element S2.

[0058] In each of the first control signal Sig1 and the second control signal Sig2, the high level and the low level may be reversed.

[0059] [advantage] As described above, in the control circuit 2 according to the embodiment, the first peak value, which is either the maximum value or the minimum value of the detection voltage Vd, is held by the first peak hold circuit 71. Therefore, the A / D conversion unit 211 (first A / D conversion unit) performs A / D conversion on the first peak value held by the first peak hold circuit 71, thereby being able to indirectly obtain either the maximum peak value or the minimum peak value of the reactor current IL.

[0060] That is, in the control circuit 2 according to the embodiment, even if the sampling speed of the first A / D conversion unit is not high enough to follow a rapid change in the reactor current IL, it is possible to control the reactor current IL by referring to either the maximum peak value or the minimum peak value of the reactor current IL. Therefore, the control circuit 2 according to the embodiment has an advantage that it is easy to control the reactor current IL at a desired value even when controlling the converter circuit 200 at a relatively high frequency.

[0061] Furthermore, in the control circuit 2 according to the embodiment, the second peak hold circuit 72 holds a second peak value, which is different from the first peak value, among the maximum and minimum values ​​of the detection voltage Vd. Therefore, the A / D conversion unit 211 (first A / D conversion unit and second A / D conversion unit) performs A / D conversion on the first peak value held by the first peak hold circuit 71 and the second peak value held by the second peak hold circuit 72, respectively, thereby making it possible to indirectly obtain both the maximum peak value and the minimum peak value of the reactor current IL.

[0062] That is, in the control circuit 2 according to the embodiment, even if the sampling speeds of both the first A / D conversion unit and the second A / D conversion unit are not high enough to follow a rapid change in the reactor current IL, it is possible to control the reactor current IL by referring to both the maximum peak value and the minimum peak value of the reactor current IL. Therefore, the control circuit 2 according to the embodiment has an advantage that it is easier to control the reactor current IL with a desired accuracy even when controlling the converter circuit 200 at a relatively high frequency.

[0063] (Variation) Although the embodiment has been described above, the present invention is not limited to the above embodiment. Modifications of the embodiment will be listed below.

[0064] (First Modification) 6 is a circuit diagram showing the configuration of a control circuit 2A (hereinafter simply referred to as "control circuit 2A") of a converter circuit according to a first modified example of the embodiment. As shown in FIG. 6, the control circuit 2A according to this modified example differs from the control circuit 2 according to the embodiment in that, instead of including a second comparator 62, a second peak hold circuit 72, and a second D / A conversion unit 213, it includes a signal output unit 214 that outputs a second switch signal Sig2.

[0065] The signal output unit 214 calculates the average value of the detected voltage Vd (in other words, the average value of the reactor current IL), and outputs the second switch signal Sig2 when the calculated average value of the detected voltage Vd reaches a target value.

[0066] That is, in this modification, the control circuit 2A controls the reactor current IL by referring to only one of the maximum peak value and the minimum peak value of the reactor current IL (here, only the maximum peak value). In this modification, the reactor current IL is controlled by referring to either the maximum peak value or the minimum peak value of the reactor current IL, which has the advantage that it is easy to control the reactor current IL at a desired value even when the converter circuit 200 is controlled at a relatively high frequency.

[0067] 6, the control circuit 2A includes a signal output unit 214 that outputs the second switching signal Sig2 instead of the second comparator 62, the second peak hold circuit 72, and the second D / A conversion unit 213, but is not limited to this. For example, the control circuit 2A may include a signal output unit that outputs the first switching signal Sig1 instead of the first comparator 61, the first peak hold circuit 71, and the first D / A conversion unit 212. In this case, the signal output unit may be configured to calculate the average value of the detection voltage Vd and output the first switching signal Sig1 when the calculated average value of the detection voltage Vd reaches a target value.

[0068] (Second Modification) 7 is a circuit diagram showing the configuration of a control circuit 2B (hereinafter simply referred to as "control circuit 2B") of a converter circuit according to a second modified example of the embodiment. As shown in FIG. 7, the control circuit 2B according to this modified example differs from the control circuit 2A according to the first modified example of the embodiment in that it further includes a differential amplifier 8 and a third D / A conversion unit 215.

[0069] The differential amplifier 8 amplifies the difference between the detection voltage Vd and a third reference potential DA3 that is higher than the first reference potential DA1 input to the first comparator 61, and outputs the amplified difference to the first comparator 61. That is, in this modification, instead of the detection voltage Vd, the output voltage Vd' of the differential amplifier 8 is input to the first comparator 61. The output voltage Vd' is not the detection voltage Vd itself, but is a voltage that changes depending on the magnitude of the detection voltage Vd and is a voltage that depends on the detection voltage Vd.

[0070] The third D / A conversion unit 215 D / A converts the digital value of the third reference potential DA3, which is determined based on the digital value of the first reference potential DA1 determined by the control unit 210 (first control unit), and outputs the third reference potential DA3, which is an analog value, to the differential amplifier 8.

[0071] The control circuit 2B according to this modification has the advantage that the resolution for controlling the reactor current IL can be increased by increasing the resolution of the detection voltage Vd input to the control circuit 2B. The above advantage will be specifically described below.

[0072] Generally, in microcomputers and the like used in the control circuits of converter circuits, the resolution of the D / A conversion section is lower than the resolution of the A / D conversion section. For example, the resolution of the A / D conversion section may be 12 bits, while the resolution of the D / A conversion section may be 8 bits. When the resolution of the D / A conversion section is lower than the resolution of the A / D conversion section, the resolution of the control circuit to control the reactor current IL is limited by the resolution of the D / A conversion section.

[0073] Therefore, the control circuit 2B according to this modification solves the above problem by using a differential amplifier 8. As a specific example, the description will be given assuming that the resolution of the first D / A conversion unit 212 and the third D / A conversion unit 215 is 0.1 V. Here, the control circuit 2A according to the first modification can only change the first reference potential DA1 in increments of 0.1 V at the smallest, and therefore cannot control the reactor current IL in response to changes in the detection voltage Vd that are smaller than 0.1 V.

[0074] On the other hand, in the control circuit 2B according to this modification, the difference between the detection voltage Vd and the third reference potential DA3 is amplified by the differential amplifier 8, and the resulting detection voltage Vd′ is compared with the first reference potential DA1 by the first comparator 61. Therefore, in this modification, even if the first reference potential DA1 can only be changed in increments of 0.1 V at the smallest, it is possible to control the reactor current IL in response to changes in the detection voltage Vd that are smaller than 0.1 V.

[0075] For example, assume that the first reference potential DA1 is 0.1 V, the third reference potential DA3 is 1 V, the gain of the differential amplifier 8 is 4, and the detected voltage Vd is 1.025 V. In this case, the output voltage Vd′ of the differential amplifier 8 is Vd′=(1.025−1)×4=0.1 V. Therefore, in the control circuit 2B according to this modification, by comparing the output voltage Vd′ with the first reference potential DA1 using the first comparator 61, it is possible to control the reactor current IL with a resolution doubled in accordance with the gain of the differential amplifier 8, even if the change in the detected voltage Vd is smaller than 0.1 V.

[0076] 7, the control circuit 2B is configured to include a differential amplifier 8 in the upstream stage of the first comparator 61, but this is not limiting. For example, the control circuit 2B may include a differential amplifier in the upstream stage of the second comparator 62, instead of the first comparator 61. In this case, the differential amplifier may be configured to amplify the difference between a fourth reference potential higher than the second reference potential DA2 input to the second comparator 62 and the detection voltage Vd, and output the amplified difference to the second comparator 62. In this case, the control unit 21 may include a fourth D / A conversion unit that outputs the fourth reference potential, instead of the third D / A conversion unit 215.

[0077] Furthermore, for example, the configuration of the control circuit 2B can also be applied to the control circuit 2 according to the embodiment. That is, in the control circuit 2 according to the embodiment, not only the differential amplifier 8 is provided in the stage preceding the first comparator 61, but also a differential amplifier may be provided in the stage preceding the second comparator 62. In this case, the control unit 21 only needs to include not only the third D / A conversion unit 215 but also a fourth D / A conversion unit.

[0078] (Other variations) In the above embodiment, the control unit 210 serves as both the first control unit and the second control unit, but this is not limited to this. For example, the first control unit and the second control unit may be circuits independent of each other.

[0079] In the above embodiment, the A / D conversion unit 211 serves as both the first A / D conversion unit and the second A / D conversion unit, but this is not limiting. For example, the first A / D conversion unit and the second A / D conversion unit may be circuits independent of each other.

[0080] In the above embodiment, the current detector 5 is arranged in a stage preceding the reactor L1, but this is not limiting. For example, the current detector 5 may be arranged in a stage following the reactor L1. Alternatively, there may be two current detectors 5, one connected in series to the first switch element S1 and the other connected in series to the second switch element S2. In this case, one current detector 5 indirectly detects the reactor current IL by detecting the current flowing through the first switch element S1, and the other current detector 5 indirectly detects the reactor current IL by detecting the current flowing through the second switch element S2.

[0081] In the above embodiment, the converter circuit 200 is a bidirectional converter circuit, but is not limited to this. For example, the converter circuit 200 may be a step-up converter circuit or a step-down converter circuit.

[0082] In the above embodiment, the converter circuit 200 is a half-bridge switching converter circuit having a first switch element S1 and a second switch element S2, but is not limited to this. For example, the converter circuit 200 may be a full-bridge switching converter circuit configured by connecting two arms in parallel, each arm consisting of two switch elements connected in series. In this case, too, the control circuit 2 may control a pair of switch elements corresponding to the first switch element S1 and another pair of switch elements corresponding to the second switch element S2 to alternately turn on and off.

[0083] In addition, the present invention also includes forms obtained by applying various modifications to each embodiment that a person skilled in the art would think of, or forms realized by arbitrarily combining the components and functions of each embodiment within the scope that does not deviate from the spirit of the present invention.

[0084] (summary) As described above, the control circuits 2, 2A, and 2B of the converter circuit 200 according to the first aspect include a reactor L1 and first and second switch elements S1 and S2 connected to the reactor L1. The control circuits 2, 2A, and 2B convert an input voltage into a desired voltage and output the voltage by alternately turning on and off the first and second switch elements S1 and S2. The control circuits 2, 2A, and 2B include a first comparator 61, a first peak hold circuit 71, a first A / D converter (A / D converter 211), a first control unit (control unit 210), and a first D / A converter 212. The first comparator 61 compares a detection voltage Vd obtained by detecting a reactor current IL flowing through the reactor L1 with a first reference potential DA1, and outputs a first switching signal Sig1 for switching on and off the first and second switch elements S1 and S2. The first peak hold circuit 71 holds a first peak value, which is either the maximum or minimum value of the detection voltage Vd. The first A / D conversion unit A / D converts the first peak value held by the first peak hold circuit 71. The first control unit determines a digital value of the first reference potential DA1 based on the voltage output by the first A / D conversion unit. The first D / A conversion unit 212 D / A converts the digital value of the first reference potential DA1 determined by the first control unit, and outputs it to the first comparator 61 as the first reference potential DA1.

[0085] This has the advantage that even when the converter circuit 200 is controlled at a relatively high frequency, it is easy to control the reactor current IL at a desired value.

[0086] Moreover, in the first embodiment, the control circuit 2 of the converter circuit 200 according to the second aspect further includes a second comparator 62, a second peak hold circuit 72, a second A / D conversion unit (A / D conversion unit 211), a second control unit (control unit 210), and a second D / A conversion unit 213. The second comparator 62 compares the detection voltage Vd with a second reference potential DA2 to output a second switching signal Sig2 for switching on / off of each of the first switch element S1 and the second switch element S2. The second peak hold circuit 72 holds a second peak value different from the first peak value among the maximum and minimum values ​​of the detection voltage Vd. The second A / D conversion unit A / D converts the second peak value held by the second peak hold circuit 72. The second control unit performs the second A / D conversion. Department The second D / A converter 213 determines the digital value of the second reference potential DA2 based on the output voltage. The second D / A converter 213 D / A converts the digital value of the second reference potential DA2 determined by the second control unit, and outputs the converted value to the second comparator 62 as the second reference potential DA2.

[0087] This has the advantage that even when the converter circuit 200 is controlled at a relatively high frequency, it is easier to control the reactor current IL at a desired value with higher accuracy.

[0088] In addition, in the control circuit 2 of the converter circuit 200 according to the third aspect, in the second aspect, the first peak hold circuit 71 is reset by the second switching signal Sig2, and the second peak hold circuit 72 is reset by the first switching signal Sig1.

[0089] This has the advantage that the first peak hold circuit 71 can be reset at an appropriate timing in synchronization with the on / off timing of the first switch element S1 and the second switch element S2.

[0090] Moreover, the control circuit 2B of the converter circuit 200 according to the fourth aspect is in any one of the first to third aspects, and further includes a differential amplifier 8. The differential amplifier 8 amplifies the difference between a third reference potential DA3, which is higher than the first reference potential DA1 input to the first comparator 61, and the detection voltage Vd, and outputs the amplified difference to the first comparator 61.

[0091] This has the advantage that the resolution for controlling the reactor current IL can be increased by increasing the resolution of the detected voltage Vd input to the control circuit 2B.

[0092] A fifth aspect of the present invention relates to a control method for a converter circuit 200. The converter circuit 200 includes a reactor L1 and first and second switch elements S1 and S2 connected to the reactor L1. The converter circuit 200 converts an input voltage into a desired voltage by alternately turning on and off the first and second switch elements S1 and S2. The control method compares a detected voltage Vd obtained by detecting a reactor current IL flowing through the reactor L1 with a first reference potential DA1, thereby outputting a first switching signal Sig1 for switching on and off the first and second switch elements S1 and S2. The control method also holds a first peak value, which is either the maximum or minimum value of the detected voltage Vd. The control method also performs A / D conversion on the held first peak value. The control method also determines a digital value of the first reference potential DA1 based on the first A / D converted voltage. The control method also performs D / A conversion on the determined digital value of the first reference potential DA1 to obtain the first reference potential DA1.

[0093] This has the advantage that even when the converter circuit 200 is controlled at a relatively high frequency, it is easy to control the reactor current IL at a desired value. [Explanation of symbols]

[0094] 2, 2A, 2B control circuit 200 Converter Circuit 210 control unit (first control unit, second control unit) 211 A / D conversion unit (first A / D conversion unit, second A / D conversion unit) 212 First D / A conversion unit 213 Second D / A conversion unit 5 Current detector 61 First comparator 62 Second comparator 71 First peak hold circuit 72 Second peak hold circuit 8 Differential Amplifier DA1 First reference potential DA2 2nd reference potential DA3 3rd reference potential IL Reactor current L1 reactor S1 First switch element S2 Second switch element Sig1 First switching signal Sig2 Second switching signal Vd detection voltage

Claims

1. A control circuit for a converter circuit includes a reactor, and a first switch element and a second switch element connected to the reactor, and converts an input voltage into a desired voltage by alternately turning on and off the first switch element and the second switch element, a first comparator that compares a detection voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential to output a first switching signal for switching on / off each of the first switch element and the second switch element; a first peak hold circuit that holds a first peak value that is either a maximum value or a minimum value of the detected voltage; a first A / D conversion unit that performs A / D conversion on the first peak value held by the first peak hold circuit; a first control unit that determines a digital value of the first reference potential based on a voltage output by the first A / D conversion unit; a first D / A conversion unit that D / A converts the digital value of the first reference potential determined by the first control unit and outputs the converted value to the first comparator as the first reference potential; a second comparator that compares the detected voltage with a second reference potential to output a second switching signal for switching on / off each of the first switch element and the second switch element; a second peak hold circuit that holds a second peak value different from the first peak value among the maximum and minimum values ​​of the detected voltage; a second A / D converter that performs A / D conversion on the second peak value held by the second peak hold circuit; a second control unit that determines a digital value of the second reference potential based on a voltage output by the second A / D conversion unit; a second D / A conversion unit that D / A converts the digital value of the second reference potential determined by the second control unit and outputs the converted value to the second comparator as the second reference potential, the first peak hold circuit is reset by the second switching signal, the second peak hold circuit is reset by the first switching signal; Control circuit of converter circuit.

2. a differential amplifier that amplifies a difference between the detection voltage and a third reference potential that is higher than the first reference potential input to the first comparator, and outputs the amplified difference to the first comparator; 2. A control circuit for a converter circuit according to claim 1.

3. A control method for a converter circuit having a reactor, and a first switch element and a second switch element connected to the reactor, which converts an input voltage into a desired voltage and outputs the desired voltage by alternately turning on / off the first switch element and the second switch element, outputting a first switching signal for switching on / off of each of the first switch element and the second switch element by comparing a detected voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential; a first peak value that is either a maximum value or a minimum value of the detected voltage is held; A / D converting the held first peak value; determining a digital value of the first reference potential based on the A / D converted voltage; The digital value of the determined first reference potential is D / A converted to the first reference potential; outputting a second switching signal for switching on / off of each of the first switch element and the second switch element by comparing the detected voltage with a second reference potential; a second peak value different from the first peak value among the maximum and minimum values ​​of the detected voltage; A / D converting the second peak value that is held, and determining a digital value of the second reference potential based on the obtained voltage; The digital value of the determined second reference potential is D / A converted to the second reference potential; The holding of the first peak value is reset by the second switching signal, The holding of the second peak value is reset by the first switching signal. A method for controlling a converter circuit.

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