Multilayer inductors
The laminated inductor design with parallelized main and detour patterns reduces inductance value and enhances electrical performance by positioning the main line pattern higher and using symmetrical detour patterns to avoid cracks, thus maintaining element characteristics.
Patent Information
- Application Number
- JP2022050281
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-25
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2042-03-25
AI Technical Summary
Conventional laminated inductors face challenges in reducing their inductance value effectively.
The laminated inductor design incorporates a main line pattern and detour patterns that are connected in parallel, with the detour patterns branching and merging with the main line pattern to reduce the overall inductance value, and the main line pattern is positioned higher than the element body's middle to avoid cracks and maintain element characteristics.
This design achieves a reduced inductance value while maintaining element integrity and improving electrical connectivity and Q value, even under flexural deformation.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a laminated inductor. [Background technology]
[0002] Conventionally, laminated inductors have been known in which a conductor pattern is provided within an insulating laminated element having a laminate structure in which multiple insulating layers are stacked, and the following cited document 1 discloses a laminated inductor in which a strip-shaped conductor pattern is provided within an insulating laminated element. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-86216 Summary of the Invention [Problem to be solved by the invention]
[0004] The inventors have conducted extensive research into the inductance value of the above-mentioned laminated inductor, and as a result have discovered a new technique that can reduce the inductance value.
[0005] An object of the present invention is to provide a laminated inductor that can reduce the inductance value. [Means for solving the problem]
[0006] A laminated inductor according to one embodiment of the present invention has a laminated structure in which a plurality of insulating layers are stacked, and comprises: a base body having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between the pair of side surfaces of the base body, with both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and merging with the main line pattern at a position away from the pair of side surfaces of the base body; and a pair of terminal electrodes provided on the pair of side surfaces of the base body, respectively, and electrically connected to the main line pattern.
[0007] In the above-mentioned laminated inductor, the main line pattern and the detour pattern are used to parallelize inductance within the element body, and the inductance value of the entire laminated inductor (i.e., the combined inductance value) is reduced compared to when only the main line pattern is provided.
[0008] A laminated inductor according to another embodiment has a plurality of insulating layers laminated in a second direction that is orthogonal to the first direction and parallel to the mounting surface.
[0009] In a laminated inductor according to another embodiment, the height position of the main line pattern is higher than the height position of the middle of the element body with respect to the mounting surface.
[0010] In a laminated inductor according to another embodiment, the detour pattern is located on the mounting surface side of the main line pattern.
[0011] In a laminated inductor according to another embodiment, the detour pattern is made up of smoothly continuous curved portions and straight portions, and has no corners.
[0012] In a laminated inductor according to another embodiment, the width of the main line pattern on both sides of the position where the detour pattern branches and merges is wider than the width of the main line pattern between the positions where the detour pattern branches and merges.
[0013] In a laminated inductor according to another embodiment, the width of the main line patterns on both sides of the position where the detour patterns branch and merge is wider than the width of the detour patterns.
[0014] A laminated inductor according to another embodiment includes a plurality of detour patterns.
[0015] In a laminated inductor according to another embodiment, the plurality of detour patterns are symmetrical with respect to the main line pattern. [Effects of the Invention]
[0016] According to the present invention, it is possible to provide a multilayer inductor that can reduce the inductance value. [Brief explanation of the drawings]
[0017] [Figure 1] 1 is a schematic side view showing a laminated inductor according to an embodiment. [Figure 2] FIG. 2 is an exploded perspective view of the element body shown in FIG. [Figure 3] FIG. 2 is a diagram showing an internal conductor provided in an insulating layer of the element body. [Figure 4] FIG. 10 is a schematic side view showing a crack occurring in the element body. [Figure 5] 10A and 10B are diagrams showing internal electrodes of different shapes; [Figure 6] 10A and 10B are diagrams showing internal electrodes of different shapes; DETAILED DESCRIPTION OF THE INVENTION
[0018] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same elements or elements having the same functions will be denoted by the same reference numerals, and redundant description will be omitted.
[0019] The configuration of a laminated inductor 1 according to one embodiment will be described with reference to Figures 1 to 3. The laminated inductor 1 is configured to include an element body 10, a pair of terminal electrodes 20A, 20B provided on the surface of the element body 10, and an internal conductor 30 provided inside the element body 10.
[0020] The element body 10 has a substantially rectangular parallelepiped outer shape. The element body 10 has an upper surface 10a, a lower surface 10b, a pair of side surfaces 10c and 10d facing each other, and a pair of side surfaces 10e and 10f facing each other. In this embodiment, the lower surface 10b of the element body 10 is the mounting surface that faces the mounting substrate 5 on which the laminated inductor 1 is mounted. For ease of explanation, the facing direction between the upper surface 10a and the lower surface 10b will be referred to as the Z direction, the facing direction between the side surfaces 10c and 10d will be referred to as the Y direction (first direction), and the facing direction between the side surfaces 10e and 10f will be referred to as the X direction (second direction).
[0021] The element body 10 has a layered structure in which multiple insulating layers 12 are stacked in the X direction. Each insulating layer 12 extends perpendicular to the bottom surface 10b of the element body 10 and parallel to the facing direction of the side surfaces 10c and 10d. The number of insulating layers 12 is, for example, seven, but this can be increased or decreased as appropriate. In an actual element body 10, the insulating layers 12 may be integrated to the extent that their boundaries are not visible. The insulating layers 12 are made of an insulating material and may also be made of a non-magnetic material. The non-magnetic material may be, for example, a material containing at least one of a glass ceramic material and a dielectric material.
[0022] A pair of terminal electrodes 20A, 20B are provided on a pair of side surfaces 10c, 10d, respectively. In this embodiment, the pair of terminal electrodes 20A, 20B cover the entire pair of side surfaces 10c, 10d, respectively, and extend around to the upper surface 10a, the lower surface 10b, and the side surfaces 10e, 10f to cover parts of each surface 10a, 10b, 10e, 10f. The terminal electrodes 20A, 20B can be formed by a dipping method, which includes a step of immersing the side surfaces 10c, 10d of the element body 10 in a conductive paste. Each of the terminal electrodes 20A, 20B may have a single-layer structure or a multi-layer structure.
[0023] An internal conductor 30 is provided in one insulating layer 12A of the multiple insulating layers 12 that make up the element body 10. The internal conductor 30 is made of a conductive material, and can be made of a metal material (or an alloy material) such as Ag. The internal conductor 30 is patterned, for example, by printing a conductive paste. As shown in FIG. 3, the internal conductor 30 includes a main line pattern 40 and a pair of detour patterns 50A and 50B.
[0024] The main line pattern 40 extends linearly in one direction. Specifically, it extends in the Y direction between the sides 12c, 12d of the insulating layer 12A, which correspond to the side surfaces 10c, 10d of the element body 10. The main line pattern 40 has an axisymmetric shape with respect to its center line C, which extends in the Y direction. The main line pattern 40 is designed so that the height position of the center line C (i.e., the height position relative to the lower surface 10b of the element body 10) is higher than the middle height position H of the element body 10, and is located in the upper half of the element body 10. The main line pattern 40 has a first portion 41, a second portion 42, and a third portion 43, which are arranged in order from the side closest to the side 12c of the insulating layer 12A, which corresponds to the side surface 10c of the element body 10. The first portion 41 has a uniform width D1 and extends in the Y direction from the side 12c of the insulating layer 12A, which corresponds to the side surface 10c of the element body 10. The second portion 42 has a uniform width D2 narrower than width D1 and extends continuously along the Y direction from the first portion 41. The third portion 43 has a uniform width D3 wider than width D2 and extends continuously along the Y direction from the second portion 42 to reach the side 12d of the insulating layer 12A that corresponds to the side surface 10d of the element body 10. In this embodiment, the width D3 of the third portion 43 of the main line pattern 40 is the same as the width D1 of the first portion 41.
[0025] The first portion 41 and the third portion 43, which correspond to both ends of the main line pattern 40, are exposed from a pair of side surfaces 10c, 10d of the base body 10 and are electrically connected to a pair of terminal electrodes 20A, 20B provided on the pair of side surfaces 10c, 10d, respectively.
[0026] Point P, where the main line pattern 40 changes from the first portion 41 to the second portion 42, is spaced apart from side 12c of the insulating layer 12A, which corresponds to side 10c of the element body 10. Point Q, where the main line pattern 40 changes from the second portion 42 to the third portion 43, is spaced apart from side 12d of the insulating layer 12A, which corresponds to side 10d of the element body 10.
[0027] The pair of detour patterns 50A, 50B each have a substantially U-shape. Each of the detour patterns 50A, 50B branches off from the main line pattern 40 at point P on the main line pattern 40 and merges with the main line pattern 40 at point Q on the main line pattern 40. In the following description, P will be referred to as the branch point, and Q will be referred to as the merge point. Each of the detour patterns 50A, 50B has a first portion 51, a second portion 52, and a third portion arranged in order from closest to the branch point P.
[0028] The second portion 52 extends parallel to the main line pattern 40 (i.e., in the Y direction) between PQ. The second portion 52 of the detour pattern 50A is located closer to the bottom surface 10b of the element body 10 (lower side in FIG. 3) than the main line pattern 40, and is spaced a predetermined distance from the second portion 42 of the main line pattern 40. The second portion 52 of the detour pattern 50B is located closer to the top surface 10a of the element body 10 (upper side in FIG. 3) than the main line pattern 40, and is spaced a predetermined distance from the second portion 42 of the main line pattern 40. The distance between the second portion 52 of the detour pattern 50A and the second portion 42 of the main line pattern 40 and the distance between the second portion 52 of the detour pattern 50B and the second portion 42 of the main line pattern 40 may be the same or different.
[0029] The first portion 51 extends linearly from the branch point P of the main line pattern 40 to the end of the second portion 52 on the side 12c side. The third portion 53 extends linearly from the end of the second portion 52 on the side 12d side to the junction Q of the main line pattern 40.
[0030] In this embodiment, each of the detour patterns 50A, 50B has a uniform width d across the first portion 51, the second portion 52, and the third portion 53. The width d of the detour patterns 50A, 50B can be designed to be narrower than the widths D1, D2, and D3 of the main line pattern 40. The pair of detour patterns 50A, 50B is symmetrical with respect to the main line pattern 40. More specifically, the pair of detour patterns 50A, 50B is symmetrical with respect to the center line C of the main line pattern 40.
[0031] 1, the above-described laminated inductor 1 is mounted on a mounting substrate 5 with the lower surface 10b of the element body 10 facing the mounting substrate 5. A pair of land electrodes 5A, 5B is provided on the mounting substrate 5, and the pair of land electrodes 5A, 5B and a pair of terminal electrodes 20A, 20B are connected by, for example, solder 7. A voltage can be applied between the pair of terminal electrodes 20A, 20B of the laminated inductor 1 via the land electrodes 5A, 5B of the mounting substrate 5.
[0032] In the multilayer inductor 1, for example, when a current flows from one terminal electrode 20A to the other terminal electrode 20B, the current flowing through the first portion 41 of the main line pattern 40 branches at branch point P into three currents: one flowing to the second portion 42 and one flowing to the pair of detour patterns 50A and 50B. The current that has flowed into the second portion 42 of the main line pattern 40 flows to the third portion 43 at junction point Q, and the current that has flowed into the pair of detour patterns 50A and 50B also merges with the main line pattern 40 at junction point Q. In this case, the main line pattern 40 and the pair of detour patterns 50A and 50B can be considered as three inductors connected in parallel within the element body 10. That is, in the multilayer inductor 1, the main line pattern 40 and the pair of detour patterns 50A and 50B realize parallelization of inductance within the element body 10. Therefore, the inductance value of the laminated inductor 1 as a whole (i.e., the combined inductance value) is reduced, and the inductance value is lower than when only the main line pattern 40 is provided without the detour patterns 50A and 50B.
[0033] When the mounting substrate 5 is flexurally deformed, stress can be generated in the laminated inductor 1 due to the flexural deformation. The stress tends to concentrate at the tip of the terminal electrode 20B on the bottom surface 10b, and it is conceivable that a crack 11 originating from this position will be generated in the element body 10. As shown in FIG. 4, the crack 11 extends from the bottom surface 10b of the element body 10 toward the side surface 10d, and may even reach the side surface 10d. As shown in FIG. 4, a reduction in inductance value can be expected by positioning the main line pattern 40 near the bottom surface 10b of the element body 10, but the crack 11 may damage or break the main line pattern 40A, resulting in a significant deterioration in the element characteristics.
[0034] In the multilayer inductor 1, the height position of the main line pattern 40 is higher than the height position H of the middle of the element body 10, and even if a crack 11 as shown in Fig. 4 occurs, the crack 11 is unlikely to reach the main line pattern 40, so that the element characteristics can be maintained. In other words, the multilayer inductor 1 achieves a reduced inductance value while avoiding the influence of the crack 11. The height position of the main line pattern 40 may be higher than the height position H of the middle of the element body 10, and may be, for example, near the height position H.
[0035] Furthermore, in the laminated inductor 1, the pair of detour patterns 50A, 50B are in a line-symmetric relationship with respect to the center line C of the main line pattern 40, so that changes in element characteristics are unlikely to occur even when the element body 10 is turned upside down. The pair of detour patterns 50A, 50B may be in a point-symmetric relationship with respect to any point on the center line C of the main line pattern 40. The pair of detour patterns 50A, 50B do not necessarily need to share the branch point P and the junction point Q, and the pair of detour patterns 50A, 50B may branch at different branch points or different junction points.
[0036] In the multilayer inductor 1, since the width D1 of the first portion 41 and the width D3 of the third portion of the main line pattern 40 are designed to be wider than the width D2 of the second portion 42 (D1 > D2, D3 > D2), reduction of the electrical resistance (R dc ) at both ends of the main line pattern 40 is achieved. Both ends of the main line pattern 40 can be locally designed to be wider at the locations exposed on the side surfaces 10c, 10d. In this case, improvement in the connectivity between the main line pattern 40 and the terminal electrodes 20A, 20 is achieved. Further, since the width D2 of the second portion 42 of the main line pattern 40 is designed to be wider than the width d of the bypass patterns 50A, 50B, compared with the case where the width d of the bypass patterns 50A, 50B is larger than the width D (d > D2), the electrical length becomes shorter, and reduction of the electrical resistance (R dc ) is achieved.
[0037] Furthermore, in the multilayer inductor 1, when comparing the sum of the widths of the internal conductor 30 before branching (i.e., the width D1 of the first portion 41 of the main line pattern 40) with the sum of the widths of the internal conductor 30 after branching (i.e., the width D2 of the second portion 42 of the main line pattern 40 and the sum of the widths d of the pair of bypass patterns 50A, 50B, which is D2 + d + d), the sum of the widths of the internal conductor 30 after branching is larger (D1 < D2 + d + d), whereby reduction of the electrical resistance (R dc ) is achieved, and a high Q value can be realized.
[0038] The internal conductor 30 is not limited to the above-described pattern, and various other patterns may be employed. The number of detour patterns may be one, or a pattern including either one of a pair of detour patterns 50A and 50B may be employed. A configuration including a detour pattern 50A located on the lower surface 10b and a main line pattern 40, as shown in FIG. 5, can achieve a lower inductance value than a configuration including a detour pattern 50B located on the upper surface 10a and a main line pattern 40. The number of detour patterns may be three or more. The detour patterns 50A and 50B are not limited to the above-described shape that defines a trapezoid between the detour patterns 50A and 50B and the second portion 42 of the main line pattern 40. They may also have a shape that defines a semicircle between the detour patterns 50A and 50B and the second portion 42 of the main line pattern 40 (i.e., a semicircular ring), or a shape that defines a polygon (e.g., a triangle, a rectangle, etc.) between the detour patterns 50A and 50B and the second portion 42 of the main line pattern 40.
[0039] The internal conductor 30 may have no corners, as shown in FIG. 6. In the detour patterns 50A and 50B shown in FIG. 6, the first portion 51 branches off from the main line pattern 40 while maintaining smooth continuity, and the third portion 53 merges with the main line pattern 40 while maintaining smooth continuity. The junctions between the first portion 51 and the second portion 52 and between the second portion 52 and the third portion 53 are curved and smoothly continuous with each other. That is, the detour patterns 50A and 50B are composed of smoothly continuous curved and straight portions and have no corners. In this case, the Q value, which is one of the element characteristics of the multilayer inductor 1, is improved.
[0040] The internal conductors 30 may be provided on multiple insulating layers 12A rather than on one insulating layer 12A among the multiple insulating layers 12 constituting the element body 10. In this case, the internal conductors 30 provided on the multiple insulating layers 12A may have exactly the same shape and dimensions and may completely overlap when viewed from the X direction. Furthermore, the internal conductors 30 provided on different insulating layers 12A may have different shapes. [Explanation of symbols]
[0041] 1... laminated inductor, 5... mounting substrate, 10... element body, 11... crack, 12... insulating layer, 20A, 20B... terminal electrode, 30... internal conductor, 40... main line pattern, 50A, 50B... detour pattern.
Claims
1. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with a laminated inductor, wherein the plurality of insulating layers are laminated in a second direction that is orthogonal to the first direction and parallel to the mounting surface;
2. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with A laminated inductor, wherein the height position of the main line pattern is higher than the height position of the middle of the element body, with respect to the height position based on the mounting surface.
3. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with The multilayer inductor, wherein the detour pattern is located on the mounting surface side of the main line pattern.
4. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with A laminated inductor, wherein the detour pattern is made up of smoothly continuous curved portions and straight portions and has no corners.
5. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with A laminated inductor, wherein the width of the main line pattern on both sides of a position where the detour pattern branches and merges is wider than the width of the main line pattern between the positions where the detour pattern branches and merges.
6. A substrate having a laminated structure in which a plurality of insulating layers are stacked, and having a mounting surface and a pair of side surfaces facing each other in a first direction parallel to the mounting surface; a main line pattern made of a conductive material, extending linearly in the first direction between a pair of side surfaces of the element body, and having both ends exposed from the pair of side surfaces; a detour pattern made of a conductive material, branching off from and joining the main line pattern at positions away from a pair of side surfaces of the element body; a pair of terminal electrodes provided on a pair of side surfaces of the element body, respectively, and electrically connected to the main line pattern; Equipped with A laminated inductor, wherein the width of the main line pattern on both sides of a position where the detour pattern branches and merges is wider than the width of the detour pattern.
7. The laminated inductor according to claim 1, comprising a plurality of the detour patterns.
8. The laminated inductor according to claim 7 , wherein the plurality of detour patterns are symmetrical with respect to the main line pattern.
Citation Information
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