Power Conversion Device

Abstract

In the power conversion device (100) according to the present disclosure, when the control device (50) calculates input power based on the detected AC voltage value (Vac) and the detected reactor current value (IL) and operates the power conversion device in each of the continuous mode, the critical mode, and the discontinuous mode, it selects a minimum-loss operation mode in which the power loss in the input power is smallest, sets a carrier frequency (fsw) of a gate signal so that the power conversion device is operated in the minimum-loss operation mode, and generates a gate signal having this carrier frequency.

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] There has long been a demand for higher efficiency in power supply systems. For example, in power supply systems that convert AC power to DC power, there is a demand for reduced loss in the PFC (Power Factor Correction) circuit, which suppresses deterioration of the power factor and the generation of harmonics caused by a phase shift between the input current and the input voltage from the AC power source.

[0003] In various switching power supply circuits including a PFC circuit, losses in semiconductor elements, particularly losses during switching, are large. Patent Document 1 below shows that in a PFC circuit, a control unit predicts the off time of a switching element for each switching period to control the switching element in critical mode based on the voltage value of an input voltage detected by an input voltage detection unit, the voltage value of an output voltage detected by an output voltage detection unit, and the current value of a coil current detected by a coil current detection unit, and controls the on / off of the switching element based on the prediction result.

[0004] By performing the above-described control, it is possible to perform power factor correction control in critical mode without requiring a zero current detection circuit to detect the zero point of the coil current during switching, which makes it possible to reduce the size of the power factor correction device and ultimately simplify and miniaturize the overall configuration of the power supply device that uses this power factor correction device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-91981 Summary of the Invention [Problem to be solved by the invention]

[0006] In the method of Patent Document 1, although power factor correction can be achieved by operating in critical mode, the reduction of power loss in the PFC circuit is not taken into consideration. Therefore, there is room for further improvement from the viewpoint of power loss reduction. Therefore, an object of the present disclosure is to provide a power conversion device that can reduce power loss as much as possible in a power conversion device that employs each operation mode (continuous mode, critical mode, and discontinuous mode). [Means for solving the problem]

[0007] The power conversion device according to the present disclosure is a power conversion device that receives power from an AC power source at its input terminals, converts the power into DC power, and outputs it from its output terminals, and includes: a power converter having a reactor connected to the input terminals; a switching unit that receives power via the reactor, converts the power using a semiconductor switching element, and outputs it from the output terminals; and a capacitor connected between the output terminals; an AC voltage detection unit that outputs a detected value of the AC voltage of the AC power source; a reactor current detection unit that outputs a detected value of the reactor current flowing in the reactor; and a control device that generates a gate signal to control the semiconductor switching element and outputs it to the semiconductor switching element, wherein the control device calculates the input power based on the detected AC voltage value and the detected reactor current value, and when the power conversion device is operated in each of the continuous mode, critical mode, and discontinuous mode, selects a minimum-loss operation mode that has the smallest power loss in the input power, sets a carrier frequency of the gate signal so that the power conversion device is operated in the minimum-loss operation mode, and generates a gate signal having this carrier frequency. [Effects of the Invention]

[0008] In the power conversion device according to the present disclosure, the control device calculates the input power based on the detected AC voltage value and the detected reactor current value, and when the power conversion device is operated in each of the continuous mode, critical mode, and discontinuous mode, selects the minimum-loss operating mode in which the power loss in the input power is smallest, sets the carrier frequency of the gate signal so that the power conversion device is operated in the minimum-loss operating mode, and generates a gate signal having this carrier frequency, thereby minimizing power loss. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a diagram showing a circuit configuration of a power conversion device according to a first embodiment. [Figure 2] 5A and 5B are diagrams showing waveforms of reactor currents in each operation mode of the power conversion device according to the first embodiment. [Figure 3] 5 is a diagram showing the relationship between the input power to the power converter and the overall loss in the power converter when the power converter is operated in each operation mode in the power conversion device according to the first embodiment. FIG. [Figure 4] 5 is a diagram showing the relationship between the input power to the power converter and the harmonic current margin in the power converter when the power converter is operated in each operation mode in the power conversion device according to the first embodiment. FIG. [Figure 5] 2 is a diagram showing a hardware configuration related to a control device in the power conversion device according to the first embodiment. FIG. [Figure 6] FIG. 10 is a diagram showing a circuit configuration of a power conversion device according to a second embodiment. [Figure 7] FIG. 10 is a diagram showing a circuit configuration of a power conversion device according to a third embodiment. [Figure 8] FIG. 10 is a diagram showing a circuit configuration of a power conversion device according to a third embodiment. [Figure 9] FIG. 10 is a diagram showing a circuit configuration of a power conversion device according to a third embodiment. [Figure 10] FIG. 10 is a diagram showing a circuit configuration of a power conversion device according to a third embodiment. [Figure 11]10A and 10B are diagrams showing waveforms of reactor currents in each operation mode of the power conversion device according to the fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, preferred embodiments of a power conversion device according to the present disclosure will be described with reference to the drawings. Note that the same reference numerals are used to designate the same contents and corresponding parts, and detailed description thereof will be omitted.

[0011] Embodiment 1 <Circuit configuration> FIG. 1 is a diagram illustrating a schematic configuration of a power conversion device 100 according to a first embodiment of the present disclosure. The power conversion device 100 is configured with a power converter 10 and a control device 50 that controls the power converter 10. AC power is full-wave rectified by a rectifier and input to the P and N sides of input terminals 1 of the power converter 10. The AC power is then converted to DC in the power converter 10, and the DC power is output from output terminals 2. A DC-AC converter and a motor (M) serving as a load are connected downstream of the power converter 10. Note that, although a rectifier that full-wave rectifies the AC power is arranged upstream of the power converter 10 in FIG. 1, this rectifier is not necessarily required, and the AC power may be directly connected to input terminal 1 in some cases.

[0012] The power converter 10 is composed of a reactor 3, a switching unit 4, and a capacitor 5. In this circuit, the switching unit 4 is composed of a semiconductor switching element 6 and a diode 7. The semiconductor switching element 6 may be an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0013] One end of a reactor 3 is connected to an input terminal 1 of a power converter 10, and the other end of the reactor 3 and the input terminal 1 are connected to a switching unit 4, which receives the output power from the rectifier. A capacitor 5 is connected between the P side and N side of an output terminal 2 and is also connected to the output terminal of the switching unit 4, and has the function of smoothing the output current. Note that although Fig. 1 shows a configuration in which the reactor 3 is placed after the rectifier, it may also be placed before the rectifier.

[0014] Furthermore, in order to detect the voltage and current of each part, the power conversion device 100 is provided with an AC voltage detection unit 21 that detects the AC voltage of the AC power, a reactor current detection unit 22 that detects the reactor current flowing through the reactor 3, and a DC voltage detection unit 23 that detects the DC voltage between the output terminals 2, and these detected values ​​are output to the control device 50. Although the reactor current detection unit 22 is arranged on the N side in FIG. 1, it may also be arranged on the P side. As an alternative method, the AC current in the stage preceding the rectifier may be detected.

[0015] <Control device> Next, the control device 50 will be described. The control device 50 calculates the duty ratio and carrier frequency of the gate signal required to generate the gate signal to be supplied to the semiconductor switching element 6 that constitutes the switching unit 4, generates the gate signal, and outputs it to the gate terminal of the semiconductor switching element 6.

[0016] First, the method of calculating the duty ratio will be described. The deviation of the DC voltage detection value Vdc detected by the DC voltage detection unit 23 from the DC voltage command value Vdc* input from an external source (not shown) is input to the voltage control unit 51, which calculates and outputs a control output value Irms* as a voltage control output signal for performing PID (proportional, integral, derivative) control to reduce this deviation.

[0017] Meanwhile, a PLL (phase-locked loop) 52 calculates the phase (θ) of the AC power supply based on the AC voltage detection value Vac detected by the AC voltage detection unit 21. This phase and the PID control output value Irms* calculated by the voltage control unit 51 are used to set a reactor current command value IL*. The deviation of the reactor current detection value IL detected by the reactor current detection unit 22 from the reactor current command value IL* set here is calculated, and PID control is performed in the current control unit 53 to reduce this deviation, thereby determining the duty ratio of the gate signal. Note that while a feedback control method has been described for current control here, feedforward control, repetitive control, or both may also be used. Repetitive control will be described later.

[0018] Next, a method for calculating the carrier frequency will be described. The carrier frequency calculation unit 61 can calculate the carrier frequency fsw that can achieve the critical mode based on the reactor current command value IL* (or the reactor current detection value IL), the AC voltage detection value Vac, the DC voltage command value Vdc* (or the DC voltage detection value Vdc), and the inductance L of the reactor 3, for example, using the following equation. fsw=(Vac / ILpk / L)×(Vdc-Vac) / Vdc (1) Here, ILpk represents the peak value of the reactor current detection value IL. Note that a method other than the above may be used to calculate fsw as appropriate.

[0019] The limiter 62 can set upper and lower limits for the carrier frequency. Therefore, the carrier frequency can be changed within the range of the upper and lower limits set here. The carrier generation unit 63 sets the carrier frequency based on the carrier frequency fsw that can achieve the critical mode calculated by the carrier frequency calculation unit 61 and the upper and lower limits of the carrier frequency set by the limiter 62, and generates a carrier wave to be compared with the duty ratio.

[0020] The control device 50 of the power conversion device 100 according to this embodiment may perform digital control. In this case, a command value is sent to perform control by repeatedly performing various calculations. The frequency at which this repeated series of controls is performed is defined as the control frequency. If this control frequency is set to a frequency lower than the carrier frequency determined by the carrier generation unit 63 of the control device 50, the frequency can be set low without depending on the carrier frequency, thereby reducing the amount of calculation required for control. However, when the carrier frequency is changed in the critical mode, the control frequency may be higher than the carrier frequency.

[0021] The control device 50 of the power conversion device 100 according to this embodiment may be provided with a function for performing repetitive control for each cycle of the AC power supply in order to reduce the deviation of the reactor current detection value IL from the reactor current command value IL*. Here, repetitive control refers to a control system that uses the deviation from one cycle before to accurately track a periodic target input. The reactor current detection value IL has a pulsating waveform in which an AC component is superimposed on a DC component that is the average value. Performing repetitive control to reduce the deviation of the pulsating reactor current detection value IL from the reactor current command value IL* can reduce not only the fundamental wave component of the AC component of the reactor current detection value IL, but also harmonic components having a frequency n times the fundamental wave component (n is a natural number equal to or greater than 2). Therefore, adding the repetitive control function described above to the control device 50 of the power conversion device 100 makes it possible to reduce harmonic components.

[0022] <Selection of minimum loss operating mode> The three operating modes of the power conversion device 100 according to this embodiment will be described with reference to FIG. 2. FIG. 2A shows a current waveform when the device is operated in continuous mode, which is an operating mode in which the reactor current IL is continuous. FIG. 2B shows a case in which the device is operated in critical mode, which is an operating mode in which the semiconductor switching element 6 is turned on when the reactor current IL becomes zero. FIG. 2C shows a case in which the device is operated in discontinuous mode, which is an operating mode in which the reactor current IL is discontinuous. If the current detection values ​​(shown by dashed lines in FIG. 2) of the AC power supply detected by an AC current detection unit (not shown in FIG. 1) are set equal in the three operating modes, the peak current is smallest in continuous mode, followed by the peak current in critical mode and then the peak current in discontinuous mode. The power factor is also best in critical mode.

[0023] As shown in Fig. 1, the control device 50 is provided with a first lookup table 64. This lookup table associates the relationship shown in the graph of Fig. 3, and correlates the input power to the power converter 10, shown on the horizontal axis of Fig. 3, with the total power loss generated in the power converter 10 at that time, shown on the vertical axis of the same figure, for each of the continuous mode, the critical mode, and the discontinuous mode. Once the circuit configuration and element selection of the power converter 10 are determined, the total power loss shown in this first lookup table 64 can be calculated in advance using a theoretical formula or a circuit simulator using the input power at that time.

[0024] As another method for determining the total power loss shown in the first lookup table 64, the power converter 10 can be operated to obtain the total power loss as an actual measurement value in the form shown in FIG. 3 . Specifically, the total power loss can be evaluated as the difference between the input power, calculated by multiplying the detected AC voltage Vac by the detected reactor current IL, and the output power, calculated by multiplying the input current to the DC-AC converter to which the output of the power converter 10 is input, by the detected DC voltage Vdc. Alternatively, the total power loss can be determined from the difference between the input power and the motor power, calculated by multiplying the three-phase voltages and three-phase currents of the motor, which is the final load, or the dq-axis voltages and dq-axis currents (the dq axes define the rotating coordinate system of the rotating electric machine). Whether the calculation method or the actual measurement method described above is used, the total power loss in each mode can be determined when the AC power supply is operated in continuous mode, critical mode, or discontinuous mode over one or more cycles.

[0025] As described above, the input power to the power converter 10 can be calculated using the reactor current detection value IL output from the reactor current detection unit 22 and the AC voltage detection value Vac output from the AC voltage detection unit 21. By reading the corresponding power value or the closest power value for the input power obtained here in the first lookup table 64 corresponding to Fig. 3, it is possible to obtain the total loss values ​​for each of the continuous mode, critical mode, and discontinuous mode corresponding to this input power. Among these, the operating mode that results in the smallest total loss is selected, and this operating mode is called the minimum-loss operating mode.

[0026] In the above, the input power and the total power loss are associated with each other by using the first lookup table 64. However, it is also possible to prepare a relational expression relating the power and the total loss for each of the continuous mode, the critical mode, and the discontinuous mode, as shown in FIG. 3, and use this relational expression to determine the total loss from the input power.

[0027] For example, if a curve of the total loss for each operating mode as shown in Figure 3 is obtained, when the input power is below point A, the operating mode with the smallest total loss among continuous mode, critical mode, and discontinuous mode is discontinuous mode. Therefore, in this case, discontinuous mode is selected as the operating mode with the smallest loss. When the input power is exactly at point A, either discontinuous mode or continuous mode can be selected, but it is sufficient to decide which mode to select in advance.

[0028] Next, when the input power is above point A but below point B, continuous mode has the smallest overall loss, so continuous mode is selected as the minimum-loss operating mode. When the input power is exactly at point B, either continuous mode or critical mode can be selected from the perspective of total loss, but critical mode is selected as the minimum-loss operating mode from the perspective of power factor improvement. Finally, when the input power is above point B, critical mode has the smallest overall loss, so critical mode is selected as the minimum-loss operating mode.

[0029] For the minimum-loss operating mode selected based on the above considerations, the carrier generator 63 sets the carrier frequency within the range of the upper and lower limits of the limiter 62 so that the power conversion device 100 can operate in this operating mode. Here, when the critical mode is selected as the minimum-loss operating mode, the carrier frequency can be determined according to Equation (1). When the discontinuous mode is selected as the minimum-loss operating mode, the carrier frequency is lowered by setting it to the lower limit specified by the limiter 62. On the other hand, when the continuous mode is selected, the carrier frequency can be raised by setting it to the upper limit specified by the limiter 62. The upper and lower limits of the limiter 62 can be set in advance so that the power loss is appropriate. By selecting the operating mode in this way, it is possible to select the operating mode that minimizes the overall loss even when the input power changes, thereby reducing power loss.

[0030] <Consideration of harmonic margin> Figure 4 shows the harmonic margin, or the margin for harmonic components generated when the power conversion device 100 is operated in each of the operating modes, continuous mode, critical mode, and discontinuous mode, relative to standard values ​​for harmonic current limits (e.g., IEC 6100-3-2), with input power on the horizontal axis. The continuous mode and critical mode, in which the current is not held at zero for a certain period, generally have smaller harmonic components and a higher harmonic margin than the discontinuous mode, in which the current is held at zero for a certain period. Furthermore, in continuous mode, the current approaches a sine wave as the frequency increases, so the harmonic margin may be higher than in critical mode.

[0031] Here, the harmonic components in each of the continuous, critical and discontinuous operating modes can be calculated by previously obtaining the characteristics of the harmonic components according to the switching frequency of the semiconductor switching elements using a theoretical formula or a circuit simulator. Alternatively, the power conversion device 100 can be actually operated in each operating mode for one or more cycles of the AC power supply, and the reactor current detection value data obtained at that time can be analyzed by Fourier transforming this data.

[0032] Therefore, as shown in Figure 4, the harmonic margin for each operating mode shows that operation in continuous mode provides the greatest margin relative to the standard value, followed by critical mode and discontinuous mode, in that order. On the other hand, discontinuous mode has a low overall margin, but the margin is relatively high, especially at low input power. If you try to operate in continuous or critical mode at such low input power, you will need to set the switching frequency very high, which will increase overall losses. On the other hand, if you use discontinuous mode at such low input power, you can achieve a relatively high margin for harmonic components, and you can also reduce the switching frequency, which will reduce overall losses. Therefore, discontinuous mode can be considered for use when the load is light and the current is low.

[0033] If the margin of harmonic components for each operation mode as shown above is also taken into consideration, it is possible to further improve the above-mentioned method of selecting an operation mode based on the idea of ​​reducing power loss. As shown in Fig. 1, the control device 50 also has a second lookup table 65 which predetermines the relationship between the input power to the power converter and the harmonic margin as shown in Fig. 4, and by referring to this second lookup table 65, it is possible to perform control while referring to the harmonic margin.

[0034] For example, in Figure 3, when the input power falls below point A, the discontinuous mode is selected as the operating mode to minimize losses. However, if the harmonic margin in this discontinuous mode decreases as the input power increases, it is possible that the harmonic current limit will exceed the standard value. Therefore, if the harmonic margin falls below a predetermined design margin, it is possible to select another operating mode, such as continuous mode or critical mode, which has a higher harmonic margin. In this way, by taking the harmonic margin into consideration, it is possible to operate the power conversion device 100 while taking into account both power loss reduction and the standard value for harmonic components. Note that the design margin can be determined appropriately, taking into account factors such as temporal fluctuations in harmonic components.

[0035] <Control device hardware configuration> As shown in FIG. 5, the hardware configuration of the control device 50 includes a processing circuit such as a central processing unit (CPU) 200 (processor), a memory device 201 connected to the processing device 200 via a signal line such as a bus, an input circuit 202 that inputs external signals to the processing device 200, and an output circuit 203 that outputs signals from the processing device 200 to the outside.

[0036] The arithmetic processing device 200 may be a single microcontroller, or an ASIC (Application Specific Integrated Circuit), an IC (Integrated Circuit), a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), various logic circuits, various signal processing circuits, etc. Furthermore, the arithmetic processing device 200 may be a plurality of the same or different types of devices, and each processing may be shared and executed. Here, configuring the control device 50 using a microcontroller offers various advantages, such as the ability to reduce the size of the control device 50, shorten product development time, and flexibly change operation.

[0037] The functions of each unit of the control device 50 are realized by the arithmetic processing device 200 executing software (programs) stored in a storage device 201 such as a ROM, and cooperating with other hardware of the control device 50, such as the storage device 201, input circuit 202, and output circuit 203. Setting data such as control gains used by each unit of the control device 50 is stored in the storage device 201 such as a ROM as part of the software (programs). The arithmetic processing device 200 may output data such as calculation results to a volatile storage device (RAM) of the storage device 201, or may store the data in an auxiliary storage device via the volatile storage device (RAM).

[0038] As described above, the power conversion device according to this embodiment is a power conversion device 100 that receives power from an AC power supply at input terminal 1, converts the power into DC power, and outputs it from output terminal 2, and includes a reactor 3 connected to input terminal 1, a switching unit 4 that receives power via reactor 3, converts the power using semiconductor switching element 6, and outputs the converted power from output terminal 2, and a power converter 10 that has a capacitor 5 connected between the output terminals, an AC voltage detection unit 21 that outputs an AC voltage detection value Vac of the AC power supply, and a reactor current detection unit 22 that outputs a reactor current detection value IL flowing in reactor 3. The power conversion device 100 includes a control unit 22, and a control device 50 that generates a gate signal to control the semiconductor switching element 6 and outputs the gate signal to the semiconductor switching element 6. The control device 50 calculates the input power based on the AC voltage detection value Vac and the reactor current detection value IL, and when the power conversion device 100 is operated in each of the continuous mode, critical mode, and discontinuous mode, selects a minimum-loss operation mode in which the power loss in the input power is smallest, sets a carrier frequency of the gate signal so that the power conversion device is operated in the minimum-loss operation mode, and generates a gate signal having this carrier frequency.

[0039] In the power conversion device according to this embodiment, the control device 50 calculates the input power based on the detected AC voltage value Vac and the detected reactor current value IL, and when the power conversion device 100 is operated in each of the continuous mode, critical mode, and discontinuous mode, the control device 50 selects the minimum-loss operation mode in which the power loss in the input power is smallest, sets the carrier frequency of the gate signal so that the power conversion device is operated in the minimum-loss operation mode, and generates a gate signal having this carrier frequency, thereby minimizing power loss.

[0040] Furthermore, in conventional operation mode switching, chattering can occur near the boundary between mode switching due to measurement errors in current and voltage values ​​or the inclusion of external noise, and the control response can be slow when mode switching is performed by switching the control gain, making it difficult to perform mode switching smoothly.In contrast, with power conversion device 100 according to the present disclosure, switching between continuous mode, critical mode, and discontinuous mode is performed simply by changing the carrier frequency as described above, making it possible to achieve seamless mode switching and preventing the chattering and control delays that occurred in conventional mode switching.

[0041] Embodiment 2 In the first embodiment, no particular details are mentioned regarding the inductance L of the reactor 3 in the above equation (1). Inductance L is often formed by a winding with an iron core. In this case, as the reactor current detection value IL flowing through the reactor 3 increases, the iron core becomes magnetically saturated, and the inductance L decreases. Regarding the DC superposition characteristics of the inductance L of the reactor 3, the inductance L may be stored in advance in the control device 50 as a third lookup table 66 for the reactor current detection value IL. FIG. 6 shows the configuration of the power conversion device 100 when the control device 50 is provided with the above-described third lookup table 66.

[0042] By considering the DC bias characteristics of the inductance L of the reactor 3 in this way, the inductance L can be accurately evaluated. Therefore, the carrier frequency fsw at which the critical mode can be achieved can be calculated more accurately based on equation (1) compared to when the dependency of the inductance L on the reactor current detection value IL is not considered. This allows for more accurate operation in the critical mode, thereby ensuring a reduced power factor. While the above example relates the reactor current detection value IL flowing through the reactor to the inductance using the third lookup table 66 that takes the DC bias characteristics into account, other methods may also be used. For example, a function L(IL) that represents the DC bias characteristics may be used. In this case, the third lookup table 66 in FIG. 6 may be replaced with this function.

[0043] Embodiment 3 FIG. 7 is a diagram showing the circuit configuration of a power conversion device 100 in which the reactors 3 and switching units 4 are configured in two stages. While FIG. 7 shows an example of a two-stage configuration, a multi-stage configuration may be used, with the required number of stages depending on the power level to be converted by the power conversion device 100 as a whole and the power capacity of each semiconductor switching element 6. In this case, if the current of each reactor 3 is detected individually, a current detector and its detection circuit must be separately provided, which is cumbersome. Therefore, as shown in FIG. 7, if a combined current IL′, which is the combined value of the reactor currents, is detected collectively, the reactor current detection unit 22 and the detection circuit can be eliminated. The location where the combined current is measured may be after the rectifier, as shown in FIG. 7A, or before the rectifier, as shown in FIG. 7B.

[0044] Fig. 1 shows a configuration in which one semiconductor switching element 6 and one diode 7 are connected as the switching unit 4. In addition to this, other possible configurations are possible, such as a configuration in which two series-connected semiconductor switching elements 6 are connected in parallel as shown in Fig. 8, a configuration in which a series-connected semiconductor switching element 6 and a diode 7 are connected in parallel as shown in Fig. 9, and a configuration in which a series-connected semiconductor switching element 6 and a series-connected diode 7 are connected in parallel as shown in Fig. 10, and in any case, the power conversion device 100 according to this embodiment can operate. Note that the configurations shown in Figs. 8 to 10 do not include a rectifier, as described above, and AC power is directly connected to the input terminal of the power converter 10.

[0045] Embodiment 4 In Figure 2, only a single operating mode (continuous, critical, or discontinuous) is included in the half cycle of the AC current indicated by the dashed line. However, multiple operating modes may also be included. Figure 11 shows a current waveform diagram for a case in which multiple operating modes are included. Figure 11A shows a case in which two operating modes, continuous mode and discontinuous mode, coexist within a half cycle of the AC current, with discontinuous mode being used in the zero-cross phase of the AC current and continuous mode being used in the peak phase of the AC current. By using discontinuous mode in the zero-cross phase, the increase in carrier frequency can be suppressed, thereby reducing the gate drive capacity of the semiconductor switching element 6. Furthermore, by using continuous mode in the peak phase of the AC current, the peak value of the reactor current detection value IL can be suppressed, which has the advantage of allowing the use of elements with low withstand current.

[0046] FIG. 11B shows a case where two operating modes, the critical mode and the discontinuous mode, coexist in a half cycle of AC current. The discontinuous mode is employed at the zero-crossing phase of AC current, and the critical mode is employed at the peak value phase of AC current. As mentioned above, the discontinuous mode is employed at the zero-crossing phase of AC current. The critical mode employed at the peak value phase of AC current has the advantage of suppressing harmonics compared to the continuous mode. Furthermore, as shown in FIG. 11C, three operating modes may be coexisted in a half cycle of AC current. The case of FIG. 11C is similar to FIG. 11A in that the discontinuous mode is employed at the zero-crossing phase and the continuous mode is employed at the peak value phase of AC current. However, the critical mode is used when transitioning from the zero-crossing phase to the peak value phase. The same effect as described above can also be obtained in this case.

[0047] As described above, the power conversion device 100 according to this embodiment includes an AC current detection unit that outputs an AC current detection value of AC power, and the control device sets the carrier frequency of a gating signal and generates the gating signal having the carrier frequency so as to operate the power conversion device in discontinuous mode at the zero-cross phase of the AC current detection value and in continuous mode or critical mode at the peak phase of the AC current detection value. This has the advantage of reducing the switching frequency of the semiconductor switching element 6 at the zero-cross phase of the AC current detection value, thereby reducing switching loss and suppressing the peak current at the peak phase of the AC current detection value.

[0048] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless variations not exemplified are conceivable within the scope of the technology disclosed in this specification, including, for example, cases where at least one component is modified, added, or omitted, and cases where at least one component is extracted and combined with components of another embodiment. [Explanation of symbols]

[0049] 1: Input terminal, 2: Output terminal, 3: Reactor, 4: Switching unit, 5: Capacitor, 6: Semiconductor switching element, 7: Diode, 10: Power converter, 21: AC voltage detection unit, 22: Reactor current detection unit, 23: DC voltage detection unit, 50: Control device, 51: Voltage control unit, 52: PLL (phase locked loop), 53: Current control unit, 61: Carrier frequency calculation unit, 62: Limiter, 63: Carrier generation unit, 64: First lookup table, 65: Second lookup table, 66: Third lookup table, 100: Power conversion device, 200: Processing unit, 201: Storage device, 202: Input circuit, 203: Output circuit

Claims

1. A power conversion device that receives power from an AC power supply at an input terminal, converts the power into DC power, and outputs the DC power from an output terminal, a power converter including a reactor connected to the input terminal, a switching unit that receives the power via the reactor, converts the power using a semiconductor switching element, and outputs the converted power from the output terminal, and a capacitor connected between the output terminal and the switching unit; an AC voltage detection unit that outputs a detected AC voltage value of the AC power supply; a reactor current detection unit that outputs a detection value of a reactor current flowing through the reactor; a control device that generates a gate signal for controlling the semiconductor switching element and outputs the gate signal to the semiconductor switching element; the control device calculates input power based on the detected AC voltage value and the detected reactor current value, and when the power conversion device is operated in each of a continuous mode, a critical mode, and a discontinuous mode, selects a minimum-loss operation mode in which power loss in the input power is smallest, sets a carrier frequency of the gating signal so that the power conversion device is operated in the minimum-loss operation mode, and generates the gating signal having the carrier frequency.

2. 2. The power conversion device according to claim 1, wherein the control device has a first lookup table in which a relationship between the input power to the power converter and the power loss of the power converter is determined in advance for each of the operation modes, and the control device selects the minimum-loss operation mode based on the first lookup table.

3. 2. The power conversion device according to claim 1, wherein the control device has a relational expression that is a pre-determined relationship between the input power to the power converter and the power loss of the power converter for each of the operation modes, and selects the minimum-loss operation mode based on the relational expression.

4. a DC voltage detection unit that outputs a DC voltage detection value between the output terminals, 4. The power conversion device according to claim 1, wherein the control device obtains a voltage control output signal from a deviation of the DC voltage detection value from a DC voltage command value, determines a reactor current command value based on the voltage control output signal, and determines a duty ratio of the gate signal from a deviation of the reactor current detection value from the reactor current command value.

5. 4. The power conversion device according to claim 1, wherein the control device includes a second lookup table in which a relationship between a harmonic margin, which is a margin with respect to a standard value for harmonic components included in the reactor current detection value, and the input power to the power converter is determined in advance when the power conversion device is operated in each of the continuous mode, the critical mode, and the discontinuous mode, calculates the input power based on the AC voltage detection value and the reactor current detection value, reads the harmonic margin for the minimum-loss operation mode and the input power from the second lookup table, and, if the harmonic margin is below a predetermined design margin, makes it possible to select another operation mode in which the harmonic margin for the input power is greater than the harmonic margin.

6. 5. The power conversion device according to claim 4, wherein the control device repeatedly performs control in a cycle of the AC power supply so as to reduce a deviation of the reactor current detection value from the reactor current command value.

7. 4. The power conversion device according to claim 1, wherein the control device is configured using a microcomputer.

8. 4. The power conversion device according to claim 1, wherein the control device includes a third lookup table in which DC superposition characteristics relating to a relationship between an inductance of the reactor and the reactor current detection value are determined in advance, the control device determines the inductance from the reactor current detection value using the third lookup table, and sets the carrier frequency of the gate signal using the inductance.

9. The reactor and the switching unit are configured in a multi-stage configuration of two or more stages, 4. The power conversion device according to claim 1, wherein the reactor current detection unit detects a combined current that is a combined value of currents flowing through the reactors in the multiple stages.

10. 4. The power conversion device according to claim 1, wherein the switching section is configured by a connection of the semiconductor switching element and a diode.

11. 4. The power conversion device according to claim 1, wherein the switching section is configured by connecting in parallel series connected bodies of the semiconductor switching elements.

12. 4. The power conversion device according to claim 1, wherein the switching section is configured by connecting in parallel a series connection of the semiconductor switching element and a diode.

13. 4. The power conversion device according to claim 1, wherein the switching section is configured by connecting in parallel a series-connected body of the semiconductor switching elements and a series-connected body of diodes.

14. an AC current detection unit that outputs an AC current detection value of the AC power supply; 4. The power conversion device according to claim 1, wherein the control device sets the carrier frequency of the gate signal and generates the gate signal having the carrier frequency so as to operate the power conversion device in the discontinuous mode at a zero-cross phase of the AC current detection value and in the continuous mode at a peak value phase of the AC current detection value.

15. an AC current detection unit that outputs an AC current detection value of the AC power supply; 4. The power conversion device according to claim 1, wherein the control device sets the carrier frequency of the gate signal and generates the gate signal having the carrier frequency so as to operate the power conversion device in the discontinuous mode at a zero-cross phase of the AC current detection value and in the critical mode at a peak value phase of the AC current detection value.

16. 15. The power conversion device according to claim 14, wherein the control device sets the carrier frequency of the gate signal and generates the gate signal having the carrier frequency so as to operate the power conversion device in the critical mode when the AC current detection value transitions from a zero-cross phase to a peak value phase.

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