Display substrate and display device

The display substrate integrates cameras into the display by using high and low pixel density areas with transparent connecting wires, enhancing light transmittance and display performance for full-screen devices.

JP7808033B2Active Publication Date: 2026-01-28BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
JP2022533190
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-06-04
Filing Date
2021-05-17
Publication Date
2026-01-28
Estimated Expiration
2041-05-17

AI Technical Summary

Technical Problem

The increasing demand for higher screen-to-body ratios in display devices is hindered by the presence of functional elements like front cameras, which require a solution that integrates cameras into the display substrate while maintaining display functionality.

Method used

A display substrate design with high and low pixel density areas, allowing light transmission through low pixel density areas to accommodate cameras, featuring transparent connecting wires and optimized wiring arrangements to enhance light transmittance and display performance.

Benefits of technology

The design improves light transmittance and display effectiveness, enabling full-screen functionality with integrated cameras by optimizing pixel and wiring arrangements.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display substrate and a display device are disclosed. The display substrate has a first side and a second side, and includes first to third display regions. The first display region includes a first pixel repeat unit and allows light from the first side to be at least partially transmitted to the second side. The second display region includes a second pixel repeat unit and a fourth pixel repeat unit, and the third display region includes a third pixel repeat unit. A line connecting the centers of each first pixel repeat unit and the corresponding fourth pixel repeat unit is approximately parallel to a first direction, and each first pixel repeat unit is electrically connected to the corresponding fourth pixel repeat unit via t transparent connecting wires. The pitch of the first pixel repeat unit and the second pixel repeat unit in the second direction is b1, the pitch of the third pixel repeat unit in the second direction is b2, and the pitch of the transparent connecting wires in the second direction is D. The maximum number s of first pixel repeat units included in the first display region in the first direction is Meet TIFF2023529037000020.tif28149.
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Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority from Chinese Patent Application No. 202010498559.7, filed on June 4, 2020, the entire contents of which are incorporated herein by reference.

[0002] The embodiments of the present disclosure relate to a display substrate and a display device. [Background technology]

[0003] With the development of display electronic products such as mobile phones, increasing the screen-to-body ratio of display screens has become a product trend, but functional elements essential to mobile phones, such as front cameras, have become a factor limiting the increase in screen-to-body ratio. To address this issue, the industry has proposed a solution known as a "camera-on-screen" that combines a camera and a display substrate into a display device. In this solution, the display device includes a display substrate and a camera located below the display substrate. The area of ​​the display device with the camera on the screen can emit light and display like other areas, and simultaneously has an imaging function. Summary of the Invention [Means for solving the problem]

[0004] At least one embodiment of the present disclosure provides a display substrate, the display substrate having a first side for displaying and a second side opposite to the first side, the display substrate including a first display region, a second display region, and a third display region, the first display region including a plurality of first pixel repeat units arranged in an array along a first direction and a second direction, each of the first pixel repeat units including a first light-emitting element, the first display region including a light-transmitting region for allowing light transmission between the first side and the second side of the display substrate, the second display region including a plurality of second pixel repeat units and a plurality of fourth pixel repeat units arranged in an array along the first direction and the second direction, each of the second pixel repeat units including a second pixel circuit and a second light-emitting element, the second pixel circuit and the second light-emitting element being electrically connected, each of the fourth pixel repeat units including a first pixel circuit, the third display region including a plurality of third pixel repeat units arranged in an array along the first direction and the second direction, each of the third pixel repeat units including a a third pixel circuit and a third light-emitting element, the third pixel circuit and the third light-emitting element being electrically connected, the third display area at least partially surrounding the second display area, the second display area at least partially surrounding the first display area, and the second display area being axially symmetrical with respect to a center line of the first display area in the second direction, each of the first pixel repeat units corresponds to one fourth pixel repeat unit, a line connecting the centers of each of the first pixel repeat units and the corresponding fourth pixel repeat unit is approximately parallel to the first direction, the first light-emitting element of each of the first pixel repeat units is electrically connected to the first pixel circuit of the corresponding fourth pixel repeat unit via t transparent connecting wires, t is a positive integer and t≧1, a pitch of the first pixel repeat units in the second direction is b1, a pitch of the second pixel repeat units in the second direction is b1, and a pitch of the third pixel repeat units in the second direction is b2;

number

number

[0005] For example, in a display substrate according to some embodiments of the present disclosure, the pitch of the first pixel repeat unit in the first direction is a1, the pitch of the second pixel repeat unit in the first direction is a1, and the pitch of the third pixel repeat unit in the first direction is a2;

number

number

[0006] For example, in a display substrate according to some embodiments of the present disclosure, the size of the first display region in the second direction is approximately equal to the size of the first display region in the first direction.

[0007] For example, in some embodiments of the display substrate of the present disclosure, the first display area includes a circular display area and an annular wiring area surrounding the circular display area, a gate line for driving the first light-emitting element of a first pixel repeat unit of each row in the first direction is electrically connected to a corresponding first pixel circuit of a fourth pixel repeat unit of the same row in the first direction, at least a portion of the gate line extends along the first direction, at least another portion of the gate line is located in the annular wiring area, and the gate line does not penetrate the circular display area, a data line for driving the first light-emitting element of a first pixel repeat unit of each column in the second direction is electrically connected to a corresponding first pixel circuit of a fourth pixel repeat unit of a certain column in the second direction, at least a portion of the data line extends along the second direction, at least another portion of the data line is located in the annular wiring area, the data line does not penetrate the circular display area, and the gate line and the data line are located in different layers.

[0008] For example, in some embodiments of the display substrate of the present disclosure, the number of gate lines corresponding to each of the third pixel repeat units is the same as the number of gate lines corresponding to each of the first pixel repeat units, the number of gate lines corresponding to each of the first pixel repeat units is x, the pitch of the gate lines in the annular wiring region is c1, the sum of the radial widths of the gate lines in the annular wiring region is approximately x*c1*Floor(L1 / b2) / 2, the number of data lines corresponding to each of the first pixel repeat units is y, the pitch of the data lines in the annular wiring region is c2, and the sum of the radial widths of the data lines in the annular wiring region is approximately y*c2*s / 2.

[0009] For example, in some embodiments of the display substrate of the present disclosure, the orthogonal projection on the display substrate of the main body portion extending along the circumferential direction of the gate lines in the annular wiring region does not overlap with the orthogonal projection on the display substrate of the main body portion extending along the circumferential direction of the data lines in the annular wiring region, and the radial width of the annular wiring region is approximately x*c1*Floor(L1 / b2) / 2+y*c2*s / 2.

[0010] For example, in display substrates according to some embodiments of the present disclosure, the diameter of the circular display area is approximately s*a1-x*c1*Floor(L1 / b2)-y*c2*s / 2.

[0011] For example, in some embodiments of the display substrate of the present disclosure, the orthogonal projection on the display substrate of the main body portion extending in the circumferential direction of the gate lines in the annular wiring region at least partially overlaps with the orthogonal projection on the display substrate of the main body portion extending in the circumferential direction of the data lines in the annular wiring region, and the radial width of the annular wiring region is approximately max(x*c1*Floor(L1 / b2) / 2, y*c2*s / 2), where max( ) is a maximum value function.

[0012] For example, in display substrates according to some embodiments of the present disclosure, the diameter of the circular display area is approximately s*a1-max(x*c1*Floor(L1 / b2), y*c2*s).

[0013] For example, in a display substrate according to some embodiments of the present disclosure, the size L2 of the second display area in the first direction is:

number

[0014] For example, in a display substrate according to some embodiments of the present disclosure, the size of the second display area in the second direction is approximately equal to the size of the first display area in the second direction.

[0015] For example, in some embodiments of the display substrate of the present disclosure, the size of the second display area in the second direction is larger than the size of the first display area in the second direction, and the difference between the size of the second display area in the second direction and the size of the first display area in the second direction is approximately equal to 4b1.

[0016] For example, in a display substrate according to some embodiments of the present disclosure, the pitch of the fourth pixel repeat unit in the first direction is equal to the pitch of the second pixel repeat unit in the first direction.

[0017] For example, in some embodiments of the display substrate of the present disclosure, each of the first pixel repeat units includes eight first light-emitting elements arranged in a GGRB pixel arrangement manner, where t=8, the number of gate lines corresponding to each of the first pixel repeat units is four, and the number of data lines corresponding to each of the first pixel repeat units is four.

[0018] For example, in some embodiments of the display substrate of the present disclosure, each of the first pixel repeating units includes 12 first light-emitting elements arranged in an RGB pixel arrangement manner, where t=12, the number of gate lines corresponding to each of the first pixel repeating units is 2, and the number of data lines corresponding to each of the first pixel repeating units is 6.

[0019] For example, in a display substrate according to some embodiments of the present disclosure, the first direction and the second direction are perpendicular to each other.

[0020] For example, in some embodiments of the display substrate of the present disclosure, the display substrate includes an anode layer, a source / drain electrode layer, and a transparent connecting wiring layer located between the anode layer and the source / drain electrode layer, the anode of the first light-emitting element is located on the anode layer, the transparent connecting wiring is located on the transparent connecting wiring layer, the first pixel circuit includes a thin film transistor, the thin film transistor includes a source and a drain, at least one of the source and the drain of the thin film transistor is located on the source / drain metal layer, and the anode of the first light-emitting element is electrically connected to at least one of the source and the drain of the thin film transistor via the transparent connecting wiring.

[0021] For example, in the display substrate according to some embodiments of the present disclosure, the anode of the first light-emitting element is a transparent electrode.

[0022] At least one embodiment of the present disclosure further provides a display device including a display substrate according to any embodiment of the present disclosure.

[0023] For example, a display device according to some embodiments of the present disclosure further includes a sensor, the sensor being disposed on a second side of the display substrate, the orthogonal projection of the sensor on the display substrate at least partially overlapping with the first display area, and the sensor being configured to receive light from the first side. [Brief explanation of the drawings]

[0024] In order to more clearly describe the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It is obvious that the drawings described below are only related to some embodiments of the present disclosure and are not intended to limit the present disclosure.

[0025] [Figure 1A] FIG. 1A is a schematic plan view of a display substrate. [Figure 1B] FIG. 1B is a partially enlarged schematic view of the display substrate. [Figure 2] FIG. 2 is a schematic cross-sectional view of the display substrate taken along line AA in FIG. 1B. [Figure 3] FIG. 3 is a schematic plan view of a display substrate according to at least one embodiment of the present disclosure. [Figure 4] FIG. 4 is a partially enlarged schematic diagram of a display substrate according to at least one embodiment of the present disclosure. [Figure 5A] FIG. 5A is a schematic plan view of a first pixel repeating unit in accordance with at least one embodiment of the present disclosure. [Figure 5B] FIG. 5B is a schematic plan view of another first pixel repeating unit in accordance with at least one embodiment of the present disclosure. [Figure 6] FIG. 6 is a schematic block diagram of a display device in accordance with at least one embodiment of the present disclosure. [Figure 7] FIG. 7 is a schematic cross-sectional view of a display device according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0026] In order to clarify the objectives, technical solutions, and advantages of the embodiments of the present disclosure, the technical solutions of the embodiments of the present disclosure will be described below clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is obvious that the described embodiments are only some embodiments of the present disclosure, but not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments that a person skilled in the art can obtain without creative work fall within the scope of protection of the present disclosure.

[0027] Unless otherwise defined, technical or scientific terms used in this disclosure have common meanings understood by those skilled in the art. The terms "first," "second," and similar terms used in this disclosure do not denote any order, number, or importance, but merely distinguish between different components. Similar terms such as "comprise" or "comprise" mean that the element or item described before the term includes the element or item listed after the term and its equivalents, but do not exclude other elements or items. Similar terms such as "connect" or "coupled" are not limited to physical or mechanical connections and may include electrical connections, regardless of whether they are direct or indirect connections. Terms such as "top," "bottom," "left," and "right" are merely used to indicate relative positional relationships, and if the absolute position of the objects being described changes, the relative positional relationships may correspondingly change. For clarity and conciseness of the following description of the embodiments of the present disclosure, this disclosure omits detailed descriptions of some known functions and components.

[0028] In a "camera-on-screen" design scheme, the display substrate may be designed to have high pixel density areas and low pixel density areas to allow more light to enter the camera located below the display substrate, with the camera located below the low pixel density area that allows more light to pass through.

[0029] For example, Fig. 1A shows a schematic plan view of a display substrate, Fig. 1B is a partially enlarged schematic view of the display substrate shown in Fig. 1A, and Fig. 2 is a schematic cross-sectional view of the display substrate taken along line AA in Fig. 1B. As shown in Figs. 1A, 1B, and 2, the display region of the display substrate includes a light-transmitting display region 1, a transition display region 2, and a main display region 3.

[0030] For example, the main display area 3 is the main display area and has a high resolution (PPI, Pixel Per Inch). In other words, the main display area 3 has a high density of display sub-pixels. Each sub-pixel includes a light-emitting element and a pixel circuit for driving the light-emitting element. The light-transmitting display area 1 allows light incident from the display side of the display substrate to pass through the display substrate and reach the back side of the display substrate, thereby enabling the normal operation of components such as sensors located on the back side of the display substrate. Naturally, the light-transmitting display area 1 also allows light emitted from the back side of the display substrate to pass through the display substrate and reach the display side of the display substrate. The light-transmitting display area 1 and the transition display area 2 also include multiple sub-pixels for display. However, because the pixel circuits of the sub-pixels usually do not transmit light, the light-emitting elements of the sub-pixels in the light-transmitting display area 1 and the pixel circuits for driving the light-emitting elements may be physically separated to improve the light transmittance of the light-transmitting display area 1. For example, the pixel circuits of the subpixels of the light-transmitting display region 1 (e.g., shown as blocks in the light-transmitting display region 1 in FIG. 1B ) may be arranged in the transition display region 2, as shown by the gray blocks in the transition display region 2, thereby occupying part of the space of the transition display region 2, and the remaining space of the transition display region 2 is used to arrange the subpixels of the transition display region 2. For example, each white block in the transition display region 2 represents one subpixel. In this case, the subpixels of the transition display region 2 (white blocks in FIG. 1B ) and the pixel circuits of the subpixels of the light-transmitting display region 1 (gray blocks in FIG. 1B ) are arranged in an array in the transition display region 2. As a result, the resolution of the light-transmitting display region 1 and the transition display region 2 is smaller than that of the main display region 3, i.e., the density of the display subpixels arranged in the light-transmitting display region 1 and the transition display region 2 is smaller than that of the main display region 3.

[0031] 2, the light-emitting element 4 of one sub-pixel in the light-transmitting display area 1 includes an anode 4A, a cathode 4C, and a light-emitting layer 4B between the anode 4A and the cathode 4C, and the anode 4A is connected to a pixel circuit 5 in the transition display area 2 via a wiring 6. For example, the pixel circuit 5 includes structures such as a thin film transistor (T) and a capacitor (C), and the pixel circuit 5 may be realized as a general pixel driving circuit such as a 2T1C, 4T1C, 4T2C, or 7T1C.

[0032] To improve the light transmittance of the light-transmitting display region 1, the wiring 6 is typically a transparent connecting wiring, or at least the portion of the wiring 6 located in the light-transmitting display region 1 is transparent (in this case, even if other portions of the wiring 6 are opaque, the wiring 6 is considered to be a transparent connecting wiring in the present disclosure). For example, the transparent connecting wiring may be made of a transparent conductive material such as a transparent metal oxide, e.g., indium tin oxide (ITO), thereby achieving high light transmittance. Note that, in the present disclosure, "transparent" and "light-transmitting" refer to a certain light transmittance, e.g., a light transmittance greater than 0, and do not necessarily require a light transmittance of 100%. For example, if the light transmittance of a structure or region is greater than a certain value (e.g., 40%, 45%, 50%, etc.), the structure or region is generally considered to be "transparent" and "light-transmitting."

[0033] In an actual process, the minimum width of the wiring 6 is limited (for example, 1.5 μm to 2.5 μm). When multiple wirings 6 are arranged densely, the minimum distance between adjacent wirings 6 is also limited (for example, 1.5 μm to 2.5 μm), which limits the pitch of the wirings 6 (for example, 3 μm to 5 μm). Because the pitch of the wirings 6 is limited, the size of the light-transmitting display region 1 and the resolution of the light-transmitting display region 1 are mutually limited. In this disclosure, "pitch" refers to the center-to-center distance between adjacent similar structures.

[0034] At least one embodiment of the present disclosure provides a display substrate, the display substrate having a first side for displaying and a second side opposite to the first side, and including a first display region, a second display region, and a third display region, the first display region including a plurality of first pixel repeat units arranged in an array along a first direction and a second direction, each first pixel repeat unit including a first light-emitting element, the first display region including a light-transmitting region allowing transmission of light between the first side and the second side of the display substrate, the second display region including a plurality of second pixel repeat units and a plurality of fourth pixel repeat units arranged in an array along the first direction and the second direction, each second pixel repeat unit including a second pixel circuit and a second light-emitting element, the second pixel circuit being electrically connected to the second light-emitting element, each fourth pixel repeat unit including a first pixel circuit, the third display region including a plurality of third pixel repeat units arranged in an array along the first direction and the second direction, each third pixel repeat unit including a third pixel circuit and a third light-emitting element, the third pixel circuit providing electricity to the third light-emitting element, the third display area at least partially surrounds the second display area, the second display area at least partially surrounds the first display area, and the second display area is axially symmetrical with respect to a center line of the first display area in the second direction, each first pixel repeat unit corresponds to one fourth pixel repeat unit, and a line connecting the center of each first pixel repeat unit and the corresponding fourth pixel repeat unit is approximately parallel to the first direction, the first light-emitting element of each first pixel repeat unit is electrically connected to the first pixel circuit of the corresponding fourth pixel repeat unit via t transparent connecting wires, where t is a positive integer and t≧1, the pitch of the first pixel repeat units in the second direction is b1, the pitch of the second pixel repeat units in the second direction is b1, and the pitch of the third pixel repeat units in the second direction is b2;

number

number

[0035] Some embodiments of the present disclosure further provide a display device corresponding to the display substrate.

[0036] The display substrate according to the embodiment of the present disclosure can optimize the arrangement of the transparent connecting wiring and the arrangement of the first light-emitting element in the first display area, thereby improving the display effect of the first display area and the light transmittance of the first display area, which is advantageous to further improve the performance of the full-screen display device.

[0037] Hereinafter, some embodiments and examples of the present disclosure will be described in detail with reference to the drawings. It should be understood that the embodiments described herein are only for explaining and interpreting the present disclosure, and are not intended to limit the present disclosure.

[0038] At least one embodiment of the present disclosure provides a display substrate, and Fig. 3 shows a schematic plan view of the display substrate. As shown in Fig. 3, the display substrate has a first side (i.e., display side) for displaying and a second side (i.e., non-display side) opposite the first side. The display substrate includes a display region, which includes a first display region 10 (shown by a dashed box), a second display region 20, and a third display region 30.

[0039] 3, the third display area at least partially surrounds the second display area 20, the second display area 20 at least partially surrounds the first display area 10, and the second display area 20 is axially symmetrical with respect to the center line of the first display area 10 in the second direction Y. For example, as shown in FIG. 3, the second display areas 20 are symmetrically distributed on both sides of the first display area 10 in the first direction X, for example, the first direction X and the second direction Y are perpendicular to each other, and embodiments of the present disclosure include, but are not limited to, this.

[0040] For example, as shown in FIG. 3 , the first display region 10 may include a circular display region 10A and an annular wiring region 10B surrounding the circular display region 10A. In FIG. 3 , the annular wiring region 10B is indicated by a black ring, and the circular display region 10A is indicated by a white circle within the annular wiring region 10B. For example, the first display region 10 may allow light from the first side to at least partially transmit to the second side. For example, in some embodiments, at least the circular display region 10A may allow light from the first side to at least partially transmit to the second side. That is, at least the circular display region 10A may be a transparent display region, allowing light rays to pass through the transparent display region from the display side of the display substrate to reach the non-display side. A sensor, such as a camera or an infrared guide, may be located on the non-display side, and the sensor may operate using light rays transmitted to the non-display side. In some embodiments, light emitted from a device on the non-display side of the display substrate may be configured to pass through a transparent display region (e.g., the circular display region 10A) and transmit to the display side of the display substrate.

[0041] Figure 4 is a partially enlarged schematic diagram of the display substrate shown in Figure 3. For example, as shown in Figure 4, the first display region 10 includes a plurality of first pixel repeat units Q1 arranged in an array along the first direction X and the second direction Y, the second display region 20 includes a plurality of second pixel repeat units Q2 and a plurality of fourth pixel repeat units Q4 arranged in an array along the first direction X and the second direction Y, and the third display region 30 includes a plurality of third pixel repeat units Q3 arranged in an array along the first direction X and the second direction Y.

[0042] For example, the first pixel repeat unit Q1 includes a first light-emitting element but does not include a first pixel circuit for driving the first light-emitting element. For example, there is no pixel circuit in the first display area 10, and the first pixel circuit for driving the first light-emitting element is located in the second display area 20, thereby reducing the metallization area of ​​the first display area 10 and improving the light transmittance of the first display area 10.

[0043] For example, the second pixel repeat unit Q2 includes a second pixel circuit and a second light-emitting element, the second pixel circuit and the second light-emitting element are electrically connected, and the second pixel circuit is used to drive the second light-emitting element. For example, in some examples, the second pixel circuit and the second light-emitting element in each pixel repeat unit Q2 correspond one-to-one. Note that the embodiments of the present disclosure do not limit the specific number of second pixel circuits and second light-emitting elements included in each pixel repeat unit Q2.

[0044] For example, the third pixel repeat unit Q3 includes a third pixel circuit and a third light-emitting element, the third pixel circuit and the third light-emitting element are electrically connected, and the third pixel circuit is used to drive the third light-emitting element. For example, in some examples, the third pixel circuit and the third light-emitting element in each pixel repeat unit Q3 correspond one-to-one. Note that the embodiments of the present disclosure do not limit the specific number of third pixel circuits and third light-emitting elements included in each pixel repeat unit Q3.

[0045] For example, the fourth pixel repeat unit Q4 includes a first pixel circuit, and the first pixel circuit is used to drive a first light-emitting element. For example, each first pixel repeat unit Q1 corresponds to one fourth pixel repeat unit Q4, and the line connecting the centers of each first pixel repeat unit Q1 and the corresponding fourth pixel repeat unit Q4 is approximately parallel to the first direction X, that is, the light-emitting element of the first pixel repeat unit Q1 in each row in the first direction X is driven by the first pixel circuit of the fourth pixel repeat unit in the same row in the first direction X.

[0046] For example, as shown in Figure 4, the first light-emitting element of each first pixel repeat unit Q1 is electrically connected to the first pixel circuit of the corresponding fourth pixel repeat unit Q4 via t transparent connecting wires TL, where t is a positive integer and t >= 1. For example, the number of first light-emitting elements in each first pixel repeat unit Q1 is t, and the number of first pixel circuits in the corresponding fourth pixel repeat unit Q4 is also t, so that each first light-emitting element is electrically connected to a corresponding first pixel circuit via a single transparent connecting wire TL. For convenience and simplicity, the t transparent connecting wires TL are indicated by a single dashed line in Figure 4.

[0047] 4, the first pixel repeat units Q1 in the first display area 10 are uniformly arranged, thereby realizing uniform light emission and display in the first display area 10. For example, as shown in FIG. 4, the pitch of the first pixel repeat units Q1 in the first direction X is a1, and the pitch in the second direction Y is b1.

[0048] 4, the second pixel repeat units Q2 in the second display area 20 are uniformly arranged, thereby realizing uniform light emission and display in the second display area 20. For example, as shown in FIG. 4, the pitch of the second pixel repeat units Q2 in the first direction X is a1, and the pitch in the second direction Y is b1, that is, overall, the first pixel repeat units Q1 and the second pixel repeat units Q2 are uniformly arranged in the first display area 10 and the second display area 20, thereby realizing uniform light emission and display in the entire first display area 10 and the second display area 20.

[0049] 4 , the fourth pixel repeat units Q4 in the second display region 20 may be uniformly arranged, thereby optimizing the arrangement of wiring (including the transparent connecting lines TL and the subsequent gate lines GL and data lines DL, etc.). For example, the pitch of the fourth pixel repeat units Q4 in the first direction X may be equal to the pitch of the second pixel repeat units Q2 in the first direction X, and the pitch of the fourth pixel repeat units Q4 in the second direction Y may be equal to the pitch of the second pixel repeat units Q2 in the second direction Y. That is, the pitch of the fourth pixel repeat units Q4 in the first direction X may be a1, and the pitch of the fourth pixel repeat units Q4 in the second direction Y may be b1. Note that in some other examples, the fourth pixel repeat units Q4 may be non-uniformly arranged in the second display region 20, and this is not a limitation of the embodiments of the present disclosure.

[0050] 4, the third pixel repeat units Q3 in the third display region 30 are uniformly arranged, thereby realizing uniform light emission and display in the third display region 30. For example, as shown in FIG. 4, the pitch of the third pixel repeat units Q3 in the first direction X is a2, and the pitch in the second direction Y is b2.

[0051] for example,

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[0052] 4, the main body of the transparent connecting wire TL is substantially parallel to the first direction X and is used to electrically connect the first light-emitting element (located in the first pixel repeat unit Q1 in the first display area 10) and the first pixel circuit (located in the fourth pixel repeat unit Q4 in the second display area 20) in the same row in the first direction X. For example, when the transparent connecting wires TL are arranged densely, the pitch of the main body of the transparent connecting wire TL in the second direction Y is D, that is, the pitch of the transparent connecting wires TL in the second direction Y is D, and for example, the value of D is usually in the range of 3 μm to 5 μm, which includes but is not limited to, the embodiments of the present disclosure.

[0053] For example, in a display substrate according to an embodiment of the present disclosure, the maximum number s of first pixel repeat units Q1 included in the first display region 10 in the first direction X is:

number

[0054] For example, the size L1 of the first display area 10 in the first direction X is

number

number

[0055] For example, the size of the first display area 10 in the second direction Y is approximately equal to the size L1 of the first display area 10 in the first direction X, i.e., the shape of the first display area 10 is approximately square, thereby preventing the area of ​​the first display area 10 from being too large when the circular display area 10A has an area as large as possible.

[0056] 4, the first pixel repeat unit Q1 in the first display region 10 may use a left-half control scheme, and is controlled by a fourth pixel repeat unit Q4 in the second display region 20 that is axially symmetrical with respect to the center line in the second direction Y of the first display region 10. For example, as shown in FIG. 4, the first pixel repeat unit Q1 in the left half region of the first display region 10 is controlled by a fourth pixel repeat unit Q4 in the second display region 20 on the left side of the first display region 10, and the first pixel repeat unit Q1 in the right half region of the first display region 10 is controlled by a fourth pixel repeat unit Q4 in the second display region 20 on the right side of the first display region 10. For example, as shown in FIG. 4, the first display region 10 includes a circular display region 10A (shown as a gray circle) and an annular wiring region 10B surrounding the circular display region 10A. For example, as shown in FIG. 4, the wiring for driving the first light-emitting element in the circular display region 10A is arranged in the annular wiring region 10B so as to be densely arranged, allowing the circular display region 10A to have as large an area as possible.

[0057] 5A is a schematic plan view of a first pixel repeat unit according to at least one embodiment of the present disclosure. For example, as shown in FIG. 5A, each first pixel repeat unit 01 includes eight first light-emitting elements arranged in a GGRB pixel arrangement manner, and correspondingly, each fourth pixel repeat unit includes eight first pixel circuits for driving the eight first light-emitting elements. Each first light-emitting element is connected to one first pixel circuit via one transparent connecting wire TL, so that t=8.

[0058] 5A, each first pixel repeating unit 01 includes two sets of first light-emitting elements, and the first light-emitting elements of each set include one red light-emitting element R, two green light-emitting elements G, and one blue light-emitting element B. For example, in each set of first light-emitting elements, the red light-emitting element R and one green light-emitting element G may share one gate line, and the blue light-emitting element B and the other green light-emitting element G may also share one gate line, so that the number of gate lines corresponding to the first pixel repeating unit 01 shown in FIG. 5A is x=4. For example, in each set of first light-emitting elements, the red light-emitting element R and the blue light-emitting element B may share one data line, and the two green light-emitting elements G may also share one data line, so that the number of data lines corresponding to the first pixel repeating unit 01 shown in FIG. 5A is y=4.

[0059] 5B is a schematic plan view of another first pixel repeat unit according to at least one embodiment of the present disclosure. For example, as shown in FIG. 5B, each first pixel repeat unit 01 includes 12 first light-emitting elements arranged in an RGB pixel arrangement manner, and each fourth pixel repeat unit includes 12 first pixel circuits for driving the 12 first light-emitting elements. Each first light-emitting element is connected to one first pixel circuit via one transparent connecting wire TL, so that t=12.

[0060] For example, as shown in Figure 5B, the 12 first light-emitting elements of each first pixel repeating unit 01 include four red light-emitting elements R, four green light-emitting elements G, and four blue light-emitting elements B. For example, as shown in Figure 5B, the 12 first light-emitting elements of each first pixel repeating unit 01 are arranged in two rows and six columns. For example, the six first light-emitting elements in each row may share one gate line, so that the number of gate lines corresponding to the first pixel repeating unit 01 shown in Figure 5B is x = 2, and for example, the two first light-emitting elements in each column may share one data line, so that the number of data lines corresponding to the first pixel repeating unit 01 shown in Figure 5B is y = 6.

[0061] Note that the first pixel repeat units shown in Figures 5A and 5B are both illustrative, and the embodiments of the present disclosure do not limit the specific structure of the first pixel repeat unit (i.e., the type, number, and arrangement method of the first light-emitting elements included in the first pixel repeat unit, etc.).

[0062] For example, the first pixel circuit of the fourth pixel repeat unit may use, but is not limited to, a common pixel driving circuit such as 2T1C, 4T1C, 4T2C, or 7T1C, etc. The embodiments of the present disclosure do not limit the specific structure of the first pixel circuit.

[0063] Note that the embodiments of the present disclosure do not limit the specific structure of the second pixel repeat unit (i.e., the specific structure of the second pixel circuit and the type, number, and arrangement of the second light-emitting element, etc.), and similarly, the embodiments of the present disclosure do not limit the specific structure of the third pixel repeat unit (i.e., the specific structure of the third pixel circuit and the type, number, and arrangement of the third light-emitting element, etc.). In addition, to simplify the design and facilitate manufacturing, the type, number, and arrangement of the first light-emitting element of the first pixel repeat unit may be the same as the second light-emitting element of the second pixel repeat unit and the third light-emitting element of the third pixel repeat unit, and the specific structure of the first pixel circuit of the fourth pixel repeat unit may be the same as the second pixel circuit of the second pixel repeat unit and the third pixel circuit of the third pixel repeat unit.

[0064] 4, a gate line GL for driving a first light-emitting element of a first pixel repeat unit Q1 in each row in the first direction X is electrically connected to a first pixel circuit of a corresponding fourth pixel repeat unit Q4 in the same row in the first direction X, with at least a portion of the gate line GL extending along the first direction X, and at least another portion of the gate line GL being located in an annular wiring region, and the gate line GL not penetrating the circular display region 10A. By arranging at least another portion of the gate line GL in the annular wiring region, the gate line GL bypasses the circular display region 10A, thereby improving the light transmittance of the circular display region 10A. For example, the gate line GL may be further electrically connected to a second pixel circuit of a second pixel repeat unit and a third pixel circuit of a third pixel repeat unit in the same row in the first direction X. For example, the gate line GL is used to provide drive control signals to each pixel circuit (e.g., the first pixel circuit to the third pixel circuit), and the drive control signals include, but are not limited to, a reset control signal, a scanning signal, an emission control signal, etc. Correspondingly, the gate line GL includes, but is not limited to, a reset control line, a scanning signal line (commonly also referred to as a "gate line"), an emission control line, etc.

[0065] For example, a data line DL for driving a first light-emitting element of a first pixel repeat unit Q1 in each column in the second direction Y is electrically connected to a corresponding first pixel circuit of a fourth pixel repeat unit Q4 in a certain column in the second direction Y, with at least a portion of the data line DL extending along the second direction Y and at least another portion of the data line DL being located in the annular wiring region 10B, and the data line DL not penetrating the circular display region 10A. By arranging at least another portion of the data line DL in the annular wiring region, the data line DL bypasses the circular display region 10A, thereby improving the light transmittance of the circular display region 10A. For example, the data line GL may be further electrically connected to a third pixel circuit of a third pixel repeat unit in the same column as the first pixel repeat unit Q1 in each column in the second direction Y. In some examples, the second display region 20 completely surrounds the first display region 10, in which case the data line GL is further electrically connected to a second pixel circuit of a second pixel repeat unit in the same column as the first pixel repeat unit Q1 in each column in the second direction Y. For example, the data line DL is used to provide a data signal to each pixel circuit (for example, the first pixel circuit to the third pixel circuit), and further controls the light emission brightness of each light emitting element (for example, the first light emitting element to the third light emitting element).

[0066] For example, in the display substrate according to the embodiment of the present disclosure, the gate lines GL and the data lines DL may be located on different layers.

[0067] For example, in some embodiments, the number of gate lines corresponding to each third pixel repeating unit Q3 is the same as the number of gate lines corresponding to each first pixel repeating unit Q1, the number of gate lines GL corresponding to each first pixel repeating unit Q1 is x, the pitch when the gate lines GL are densely arranged in the annular wiring region 10B is c1, for example, the value of c1 may usually be about 3 μm, and the total radial width R1 of the gate lines GL in the annular wiring region 10B is approximately x*c1*Floor(L1 / b2) / 2, where Floor(L1 / b2) represents the maximum number of third pixel repeating units Q3 corresponding to the size of the first display region 10 in the second direction Y. As shown in FIG. 4, for the gate lines GL that need to bypass (i.e., not pass through) the circular display region 10A of the first display region 10, half of the gate lines GL may bypass the circular display region 10A by detouring around the upper half of the annular wiring region 10B, and the other half of the gate lines GL may bypass the circular display region 10A by detouring around the lower half of the annular wiring region 10B.

[0068] For example, in some embodiments, the number of data lines DL corresponding to each first pixel repeat unit Q1 is y, and the pitch when the data lines DL are densely arranged in the annular wiring region 10B is c2. For example, the value of c2 may typically be about 4 μm. Because the first pixel repeat unit Q1 in the first display region 10 uses the left-half control scheme, the total radial width R2 of the data lines DL in the annular wiring region 10B is approximately y*c2*s / 2. Note that, as shown in FIG. 4 , for the data lines DL corresponding to the first display region 10, half of the data lines DL may detour around the left half of the annular wiring region 10B, bypassing the circular display region 10A, and finally electrically connected to the first pixel circuits in the second display region 20 on the left side of the first display region 10, and the other half of the data lines DL may detour around the right half of the annular wiring region 10B, bypassing the circular display region 10A, and finally electrically connected to the first pixel circuits in the second display region 20 on the right side of the first display region 10.

[0069] 4, the orthogonal projection of the main body portion extending along the circumferential direction of the gate lines GL in the annular wiring region 10B onto the display substrate does not overlap with the orthogonal projection of the main body portion extending along the circumferential direction of the data lines DL in the annular wiring region 10B onto the display substrate, thereby reducing parasitic capacitance. In this case, the radial width R of the annular wiring region 10B is approximately x*c1*Floor(L1 / b2) / 2+y*c2*s / 2, and the diameter of the circular display region 10A is approximately s*a1-x*c1*Floor(L1 / b2)-y*c2*s / 2, which is the maximum allowable diameter of the circular display region 10A in this case.

[0070] For example, in some other embodiments, the orthogonal projection onto the display substrate of the main body portion extending along the circumferential direction of the gate lines GL in the annular wiring region 10B at least partially overlaps with the orthogonal projection onto the display substrate of the main body portion extending along the circumferential direction of the data lines DL in the annular wiring region 10B. In this case, the radial width R of the annular wiring region 10B is approximately max(x*c1*Floor(L1 / b2) / 2, y*c2*s / 2), and the diameter of the circular display region 10A is approximately s*a1-max(x*c1*Floor(L1 / b2), y*c2*s), which is the maximum allowable diameter of the circular display region 10A in this case.

[0071] For example, in some embodiments, a1=b1 may be set to simplify the design and facilitate manufacturing. As a result, when the orthogonal projection onto the display substrate of the main body portion extending along the circumferential direction of the gate lines GL in the annular wiring region 10B does not overlap with the orthogonal projection onto the display substrate of the main body portion extending along the circumferential direction of the data lines DL in the annular wiring region 10B, the radial width R of the annular wiring region 10B is approximately (x*c1*n+y*c2)*s / 2, and the diameter of the circular display region 10A is approximately (a 1-x*c1*ny*c2)*s, and when the orthogonal projection on the display substrate of the main body part extending circumferentially of the gate lines GL in the annular wiring region 10B at least partially overlaps with the orthogonal projection on the display substrate of the main body part extending circumferentially of the data lines DL in the annular wiring region 10B, the radial width R of the annular wiring region 10B is approximately max(x*c1*n, y*c2)*s / 2, and the diameter of the circular display region 10A is approximately (a1-max(x*c1*n, y*c2))*s.

[0072] For example, in some embodiments, the size L2 of the second display area 20 in the first direction X is:

number

[0073] For example, in some embodiments, as shown in FIGS. 3 and 4 , the size of the second display region 20 in the second direction Y is approximately equal to the size of the first display region 10 in the second direction Y. For example, in other embodiments, the size of the second display region 20 in the second direction Y may be slightly larger than the size of the first display region 10 in the second direction Y, in which case the second display region 20 can completely surround the first display region 10. For example, the difference between the size of the second display region 20 in the second direction Y and the size of the first display region 10 in the second direction Y is approximately equal to 4b1, i.e., there are two rows of second pixel repeat units Q2 on the upper and lower sides of the first display region 10, as included in embodiments of the present disclosure, but is not limited to this. As described above, the display substrate according to the embodiments of the present disclosure allows the sizes of the first display region 10 and the second display region 20 to be reasonably determined when the area of ​​the circular display region 10A is as large as possible. In actual applications, the first display area 10 other than the annular wiring area 10B may be designed or manufactured to coincide with the second display area 20, in which case the circular display area 10A may be the only light-transmitting display area. That is, the circular display area 10A in the embodiment of FIG. 4 may be regarded as the effective first display area, and the first display area other than the circular display area 10A in the embodiment of FIG. 4 may be regarded as part of the second display area.

[0074] For example, in some embodiments, a local cross-sectional structure of a display substrate according to an embodiment of the present disclosure is shown in FIG. 2. For example, the structures of all of the light-emitting elements (e.g., the first to third light-emitting elements) of the display substrate according to the embodiment of the present disclosure can refer to light-emitting element 4 in FIG. 2. For example, in the display substrate according to the embodiment of the present disclosure, each light-emitting element includes an anode, a cathode, and an emitting layer between the anode and the cathode. For example, in some examples, the anode may include a three-layer structure such as ITO / Ag / ITO, and the embodiment of the present disclosure does not limit the specific structure of the anode. For example, the cathode may be formed as a common cathode over the entire layer. For example, the material of the common cathode may include a metal material such as lithium (Li), aluminum (Al), magnesium (Mg), or silver (Ag). For example, the common cathode can be formed as a very thin single layer, so that the common cathode has high light transmittance.

[0075] For example, the display substrate according to the embodiments of the present disclosure may be an organic light emitting diode (OLED) display substrate or a quantum dot light emitting diode (QLED) display substrate, etc., and the embodiments of the present disclosure do not limit the specific type of the display substrate.

[0076] For example, when the display substrate is an organic light-emitting diode display substrate, the light-emitting layer may include a small molecule organic material or a polymer molecule organic material, may be a fluorescent material or a phosphorescent material, and may emit red light, green light, blue light, or white light. According to different actual needs, in different examples, the light-emitting layer may further include functional layers such as an electron injection layer, an electron transport layer, a hole injection layer, a hole transport layer, etc.

[0077] For example, when the display substrate is a quantum dot light-emitting diode (QLED) display substrate, the light-emitting layer may include quantum dot materials, such as silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, indium phosphide quantum dots, and indium arsenide quantum dots, and the particle size of the quantum dots is, for example, 2 to 20 nm.

[0078] For example, the structures of the pixel circuits (e.g., the first pixel circuit to the third pixel circuit) of the display substrate according to the embodiment of the present disclosure can all refer to pixel circuit 5 in FIG. 2. For example, in the display substrate according to the embodiment of the present disclosure, each pixel circuit includes structures such as a thin film transistor (T), a capacitor (C), etc. For example, the thin film transistor includes an active layer, a gate, and a source / drain electrode (the source and drain are shown as source / drain electrodes 7 in FIG. 2).

[0079] 2, the display substrate includes an anode layer, a source / drain electrode layer, and a transparent connecting wiring layer located between the anode layer and the source / drain electrode layer, the anode of the first light-emitting element (shown as anode 4A in FIG. 2) is located on the anode layer, the transparent connecting wiring (shown as wiring 6 in FIG. 2) is located on the transparent connecting wiring layer, at least one of the source and drain of the thin film transistor (shown as source / drain electrode 7 in FIG. 2) is located on the source / drain metal layer, and the anode of the first light-emitting element is electrically connected to at least one of the source and drain of the thin film transistor through the transparent connecting wiring. As will be understood, an insulating layer is usually provided between the anode layer and the transparent connecting wiring layer and between the source / drain electrode layer and the transparent connecting wiring layer, and via holes are usually provided in the insulating layer to form electrical connections.

[0080] For example, in some embodiments, to improve the light transmittance of the first display region, the anode of the first light-emitting element may be a transparent electrode, and the anode of the first light-emitting element may be electrically connected to the first pixel circuit in the second display region via a transparent connecting wire. Note that in embodiments of the present disclosure, only the portion of the transparent connecting wire located in the light-transmitting display region 1 needs to be transparent. For example, the transparent connecting wire may be made of a transparent conductive material such as a transparent metal oxide, e.g., indium tin oxide (ITO), thereby achieving high light transmittance.

[0081] The display substrate according to the embodiment of the present disclosure can optimize the arrangement of the transparent connecting wiring and the arrangement of the first light-emitting element in the first display area, thereby improving the display effect of the first display area and the light transmittance of the first display area, which is advantageous to further improve the performance of the full-screen display device.

[0082] At least one embodiment of the present disclosure further provides a display device. FIG. 6 is a schematic block diagram of a display device according to at least one embodiment of the present disclosure. For example, as shown in FIG. 6, the display device 100 includes a display substrate 110, which may be a display substrate according to any embodiment of the present disclosure, such as the display substrate shown in FIG. 3 or FIG. 4. The display device 100 may be any electronic device with a display function, such as a smartphone, a laptop, a tablet PC, a television, etc. For example, if the display device 100 is a smartphone or a tablet PC, the smartphone or tablet PC has a full-screen design, i.e., there is no peripheral area surrounding the third display area 30. The smartphone or tablet PC may also have an in-screen sensor (e.g., a camera, an infrared sensor, etc.) to perform operations such as image capture, distance detection, and light intensity detection.

[0083] In addition, the display substrate 110 and other components of the display device 100 (e.g., image data encoding / decoding device, clock circuit, etc.) may use any applicable components, which should be understood by those skilled in the art, and detailed description thereof will be omitted here and should not be construed as limiting the embodiments of the present disclosure.

[0084] 7 is a schematic cross-sectional view of a display device according to at least one embodiment of the present disclosure. For example, as shown in FIG. 7, the display device 100 includes a display substrate 110, which may be a display substrate according to any embodiment of the present disclosure, such as the display substrate shown in FIG. 3 or 4. For example, the display device 100 may further include a sensor 120.

[0085] 7, the display substrate 110 includes a first side F1 for displaying and a second side F2 opposite to the first side F1. That is, the first side F1 is the display side, and the second side F2 is the non-display side. The display substrate 110 is configured to perform a display operation on the first side F1, that is, the first side F1 of the display substrate 110 is the light-emitting side of the display substrate 110, and the first side F1 faces the user. The first side F1 and the second side F2 are opposite to each other in the normal direction of the display surface of the display substrate 110.

[0086] 7, the sensor 120 is disposed on the second side F2 of the display substrate 110, and is configured to receive light from the first side F1. For example, the sensor 120 and the first display region 10 overlap in a normal direction of the display surface of the display substrate 110 (e.g., a direction perpendicular to the display substrate 110), and the sensor 120 can receive and process optical signals passing through the first display region 10. The optical signals may be visible light, infrared light, or the like. For example, the first display region 10 allows light from the first side F1 to at least partially transmit to the second side F2. For example, the first display region 10 does not have pixel circuits disposed therein, and in this case, the optical transmittance of the first display region 10 can be improved. For example, in some examples, the sensor 120 and the circular display region 10A of the first display region 10 overlap in a normal direction of the display surface of the display substrate 110 (e.g., a direction perpendicular to the display substrate 110), and in this case, the circular display region 10A can be considered an effective first display region.

[0087] For example, the orthogonal projection of sensor 120 on the display substrate at least partially overlaps with the first display region 10. For example, in some examples, when a direct-type installation configuration is used, the orthogonal projection of sensor 120 on the display substrate 110 is located within the first display region 10. For example, in some other examples, when light rays are made incident on sensor 320 from the side using another light guide element (e.g., a light guide plate, a light guide tube, etc.), the orthogonal projection of sensor 120 on the display substrate 110 partially overlaps with the first display region 10. In this case, since light rays can propagate to sensor 120 laterally, it is not necessary for sensor 120 to be completely located at a position corresponding to the first display region 10.

[0088] For example, by placing the first pixel circuit in the second display region 20 and overlapping the sensor 120 and the first display region 10 in the normal direction of the display surface of the display substrate 110, it is possible to reduce the blocking of the optical signal incident on the first display region 10 and irradiating the sensor 120 by the elements of the first display region 10, thereby improving the signal-to-noise ratio of the image output from the sensor 120. For example, the first display region 10 may be called a high-light-transmitting region in the low-resolution region of the display substrate 110 (the second display region 20 may be called a low-light-transmitting region or a non-light-transmitting region in the low-resolution region of the display substrate 110).

[0089] For example, the sensor 120 may be an image sensor that can collect images of the external environment facing the light-collecting surface of the sensor 120, and may be, for example, a CMOS image sensor or a CCD image sensor. The sensor 120 may also be an infrared sensor, a distance sensor, or the like. For example, if the display device 100 is a mobile terminal such as a mobile phone or a laptop, the sensor 120 may be implemented as a camera of the mobile terminal, and may include an optical device, such as a lens, a reflector, or an optical waveguide, to modulate the light path as needed. For example, the sensor 120 may include photosensitive pixels arranged in an array. For example, each photosensitive pixel may include a photosensitive detector (e.g., a photodiode or a phototransistor) and a switch transistor (e.g., a thin-film transistor). For example, the photodiode can convert an irradiated optical signal into an electrical signal, and the switch transistor is electrically connected to the photodiode and can control whether the photodiode is in a state to collect the optical signal and the time for collecting the optical signal.

[0090] In some examples, only the anode of the first light-emitting element in the first display region 10 may be non-light-transmitting, i.e., wiring for driving the first light-emitting element bypasses the first display region 11 or is provided as transparent wiring. In this case, not only can the light transmittance of the first display region 11 be further improved, but diffraction by each element in the first display region 10 can also be reduced. For example, in other examples, the anode of the first light-emitting element may also be provided as a transparent electrode.

[0091] It should be noted that in the embodiments of the present disclosure, the display device 100 may include more components and structures, and the embodiments of the present disclosure are not limited thereto. For technical effects and detailed descriptions of the display device 100, please refer to the above description of the display substrate, and detailed descriptions will be omitted here.

[0092] The following points need further explanation with respect to this disclosure. (1) The drawings of the embodiments of the present disclosure relate only to the structure of the embodiments of the present disclosure, and other structures may refer to conventional designs. (2) For clarity, the thickness and size of layers or structures are exaggerated in the drawings illustrating the embodiments of the present invention. As can be understood, when an element such as a layer, film, region, or substrate is described as being located "on" or "under" another element, the element may be located "directly" "on" or "under" the other element, or intermediate elements may be present. (3) Where not inconsistent, embodiments and features of embodiments of the present disclosure may be combined with each other to obtain new embodiments.

[0093] The above is merely an embodiment of the present disclosure, and the scope of protection of the present disclosure is not limited thereto, and should be in accordance with the scope of protection of the claims.

Claims

1. a display substrate having a first side for displaying and a second side opposite to the first side, and including a first display area, a second display area, and a third display area; the first display area includes a plurality of first pixel repeat units arranged in an array along a first direction and a second direction, each of the first pixel repeat units including a first light emitting element, and the first display area includes a light transmissive area that allows light to be transmitted between a first side and a second side of the display substrate; the second display area includes a plurality of second pixel repeat units and a plurality of fourth pixel repeat units arranged in an array along the first direction and the second direction, each of the second pixel repeat units includes a second pixel circuit and a second light emitting element, the second pixel circuit and the second light emitting element are electrically connected, and each of the fourth pixel repeat units includes a first pixel circuit; the third display area includes a plurality of third pixel repeat units arranged in an array along the first direction and the second direction, each of the third pixel repeat units includes a third pixel circuit and a third light emitting element, and the third pixel circuit and the third light emitting element are electrically connected; the third display area at least partially surrounds the second display area, the second display area at least partially surrounds the first display area, and the second display area is axially symmetrical with respect to a center line of the first display area in the second direction; Each of the first pixel repeat units corresponds to one fourth pixel repeat unit, a line connecting the center of each of the first pixel repeat units and the corresponding fourth pixel repeat unit is approximately parallel to the first direction, and the first light-emitting element of each of the first pixel repeat units is electrically connected to the first pixel circuit of the corresponding fourth pixel repeat unit via t transparent connecting wires, where t is a positive integer and t≧1; a pitch of the first pixel repeat unit in the second direction is b1, a pitch of the second pixel repeat unit in the second direction is b1, and a pitch of the third pixel repeat unit in the second direction is b2; [Equation 1] n is a positive integer and n≧2; The pitch of the transparent connecting wires in the second direction is D, and the maximum number s of the first pixel repeating units included in the first display area in the first direction is [Equation 2] where Floor() represents the truncation function, the first display area includes a circular display area and an annular wiring area surrounding the circular display area, a gate line for driving the first light-emitting element of a first pixel repeat unit in each row in the first direction is electrically connected to a corresponding first pixel circuit of a fourth pixel repeat unit in the same row in the first direction, at least a portion of the gate line extends along the first direction, at least another portion of the gate line is located in the annular wiring region, and the gate line does not pass through the circular display region; a data line for driving the first light-emitting element of a first pixel repeat unit in each column in the second direction is electrically connected to a corresponding first pixel circuit of a fourth pixel repeat unit in a certain column in the second direction, at least a portion of the data line extends along the second direction, at least another portion of the data line is located in the annular wiring region, and the data line does not pass through the circular display region; the number of gate lines corresponding to each of the third pixel repeat units is the same as the number of gate lines corresponding to each of the first pixel repeat units, the number of gate lines corresponding to each of the first pixel repeat units is x, the pitch of the gate lines in the annular wiring region is c1, the size of the first display region in the first direction is L1, the total radial width of the gate lines in the annular wiring region is x*c1*Floor(L1 / b2) / 2, the number of data lines corresponding to each of the first pixel repeat units is y, the pitch of the data lines in the annular wiring region is c2, and the total radial width of the data lines in the annular wiring region is y*c2*s / 2; The number of columns of the second pixel repeat unit in the second display area is two columns more than the number of columns of the first pixel repeat unit in the first display area, and these two columns of the second pixel repeat unit are respectively located in the second display area on both left and right sides of the first display area, and are spaced apart from the first display area. Display board.

2. a pitch of the first pixel repeat unit in the first direction is a1, a pitch of the second pixel repeat unit in the first direction is a1, and a pitch of the third pixel repeat unit in the first direction is a2; [Equation 3] m is a positive integer and m≧2; The size L1 of the first display area in the first direction is [Equation 4] The display substrate according to claim 1 , which satisfies the above.

3. The display substrate according to claim 2 , wherein the size of the first display region in the second direction is approximately equal to the size of the first display region in the first direction.

4. The display substrate of claim 3 , wherein the gate lines and the data lines are located on different layers.

5. an orthogonal projection, on the display substrate, of a main body portion extending along the circumferential direction of the gate lines in the annular wiring region does not overlap with an orthogonal projection, on the display substrate, of a main body portion extending along the circumferential direction of the data lines in the annular wiring region; 2. The display substrate of claim 1, wherein the radial width of the annular wiring region is x*c1*Floor(L1 / b2) / 2+y*c2*s / 2.

6. 6. The display substrate of claim 5, wherein the diameter of the circular display area is s*a1-x*c1*Floor(L1 / b2)-y*c2*s / 2.

7. an orthogonal projection, on the display substrate, of a main body portion extending in a circumferential direction of the gate lines in the annular wiring region at least partially overlaps with an orthogonal projection, on the display substrate, of a main body portion extending in a circumferential direction of the data lines in the annular wiring region; 2. The display substrate of claim 1, wherein the radial width of the annular wiring region is max(x*c1*Floor(L1 / b2) / 2, y*c2*s / 2), where max() is a maximum value function.

8. 8. The display substrate of claim 7, wherein the diameter of the circular display area is s*a1-max(x*c1*Floor(L1 / b2), y*c2*s).

9. The size L2 of the second display area in the first direction is [Equation 5] The display substrate according to any one of claims 1 to 8, which satisfies the above.

10. 9. The display substrate according to claim 1, wherein the size of the second display area in the second direction is approximately equal to the size of the first display area in the second direction.

11. A display substrate described in any one of claims 1 to 8, wherein the size of the second display area in the second direction is larger than the size of the first display area in the second direction, and the difference between the size of the second display area in the second direction and the size of the first display area in the second direction is approximately equal to 4b1.

12. 9. The display substrate of claim 1, wherein the pitch of the fourth pixel repeat unit in the first direction is equal to the pitch of the second pixel repeat unit in the first direction.

13. 9. The display substrate of claim 1, wherein each of the first pixel repeat units includes eight first light-emitting elements arranged in a GGRB pixel arrangement manner, t=8, the number of gate lines corresponding to each of the first pixel repeat units is 4, and the number of data lines corresponding to each of the first pixel repeat units is 4.

14. 9. The display substrate of claim 1, wherein each of the first pixel repeat units includes 12 first light-emitting elements arranged in an RGB pixel arrangement manner, t=12, the number of gate lines corresponding to each of the first pixel repeat units is 2, and the number of data lines corresponding to each of the first pixel repeat units is 6.

15. 9. The display substrate of claim 1, wherein the first direction and the second direction are perpendicular to each other.

16. the display substrate includes an anode layer, a source / drain electrode layer, and a transparent connection wiring layer located between the anode layer and the source / drain electrode layer; the anode of the first light-emitting element is located on the anode layer, and the transparent connecting wire is located on the transparent connecting wire layer; the first pixel circuit includes a thin film transistor, the thin film transistor includes a source and a drain, and at least one of the source and the drain of the thin film transistor is located on the source-drain electrode layer; 9. The display substrate according to claim 1, wherein the anode of the first light-emitting element is electrically connected to at least one of the source and the drain of the thin film transistor via the transparent connecting wiring.

17. 9. The display substrate according to claim 1, wherein the anode of the first light-emitting element is a transparent electrode.

18. A display device comprising the display substrate according to any one of claims 1 to 17.

19. 20. The display device of claim 18, further comprising a sensor disposed on a second side of the display substrate, the sensor having an orthogonal projection on the display substrate at least partially overlapping with the first display area, the sensor configured to receive light from the first side.

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