Video transmission system, method, and video transmission cable

Abstract

To provide a technique for updating firmware for a video transmission cable.SOLUTION: A video transmission system according to one embodiment includes a source device, a sink device, and a video transmission cable connecting the source device and the sink device. The source device transmits a firmware image for updating firmware of the video transmission cable to the video transmission cable using first and second TMDS channels for transmitting a color difference signal of video data, and transmits a video indicating that the firmware image is being transmitted to the video transmission cable using a third TMDS channel for transmitting a luminance signal of the video data. The video transmission cable includes a memory and a processing circuit, and the processing circuit receives the firmware image and the video from the source device, stores the received firmware image in the memory, and transmits the received video to the sink device.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] FIELD OF THE INVENTION Embodiments of the present invention relate to a video transmission system, method, and video transmission cable. [Background technology]

[0002] Active cables are becoming more common in the HDMI (registered trademark) (High-Definition Multimedia Interface) industry. Active cables are cables that incorporate an LSI (large-scale integrated circuit) to process signals within the cable. Active optical cables (AOCs), for example, are known as active cables. An HDMI active optical cable includes a chip that converts electrical signals into optical signals, a chip that converts optical signals into electrical signals, and an optical fiber that connects these chips. An HDMI active optical cable converts input electrical signals conforming to the HDMI standard into optical signals, transmits the optical signals through an optical cable, converts the optical signals into electrical signals, and outputs electrical signals conforming to the HDMI standard. An HDMI active optical cable enables high-speed, long-distance transmission using a thin cable.

[0003] In the future, active cables are expected to become software-defined, meaning that signal processing will be performed by software within the cable, with a processor, memory, and firmware installed inside the cable.

[0004] If active cables continue to become software-defined, it is expected that there will be an increasing need to update the firmware of already manufactured active cables, for example to fix firmware bugs or to support version updates of the HDMI standard. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-274375 Summary of the Invention [Problem to be solved by the invention]

[0006] The problem to be solved by the present invention is to provide a technique for updating firmware in a video transmission cable. [Means for solving the problem]

[0007] According to one embodiment, a video transmission system includes a source device that transmits video data, a sink device that receives the video data, and a video transmission cable that connects the source device and the sink device. The source device transmits a firmware image for updating firmware in the video transmission cable to the video transmission cable using first and second TMDS channels for transmitting color-difference signals of the video data, and transmits a video indicating that the firmware image is being transmitted to the video transmission cable using a third TMDS channel for transmitting a luminance signal of the video data. The video transmission cable includes a memory and a processing circuit, and the processing circuit receives the firmware image and the video from the source device, stores the received firmware image in the memory, and transmits the received video to the sink device. The sink device receives the video from the video transmission cable and displays the received video. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram showing a video transmission system according to an embodiment. [Figure 2] FIG. 1 is a diagram for explaining communication channels of an HDMI cable. [Figure 3] 10A and 10B are diagrams for explaining a method of providing a firmware image to an HDMI cable according to an embodiment. [Figure 4] FIG. 2 is a diagram showing a master and a slave in the video transmission system of FIG. [Figure 5] FIG. 10 is a diagram showing the data format of a Read command. [Figure 6] FIG. 10 is a diagram showing the data format of a Write command. [Figure 7A] 2 is a diagram showing a firmware update start command to the E / O conversion processor shown in FIG. 1. [Figure 7B] FIG. 2 is a diagram showing a firmware update check command to the E / O conversion processor shown in FIG. 1. [Figure 7C] FIG. 2 is a diagram showing a firmware update end command to the E / O conversion processor shown in FIG. 1. [Figure 8A] 2 is a diagram showing a firmware update start command sent to the O / E conversion processor shown in FIG. 1. [Figure 8B] 2 is a diagram showing a firmware update check command to the O / E conversion processor shown in FIG. 1. [Figure 8C] FIG. 2 is a diagram showing a firmware update end command sent to the O / E conversion processor shown in FIG. 1. [Figure 9] FIG. 2 is a block diagram showing the hardware configuration of the E / O conversion processor shown in FIG. 1. [Figure 10] FIG. 2 is a block diagram showing the hardware configuration of the O / E conversion processor shown in FIG. [Figure 11] FIG. 2 is a sequence diagram showing the processing steps for updating the firmware of the HDMI cable shown in FIG. 1. [Figure 12] 4 is a flowchart showing the procedure of a process executed by the firmware update tool shown in FIG. 3. [Figure 13A] 2 is a flowchart showing the procedure of processing executed by the E / O conversion processor shown in FIG. [Figure 13B] 2 is a flowchart showing the procedure of processing executed by the E / O conversion processor shown in FIG. [Figure 14] 4 is a flowchart showing the procedure of a process executed by the firmware update tool shown in FIG. 3. [Figure 15] 2 is a flowchart showing the procedure of processing executed by the E / O conversion processor shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described with reference to the drawings. The embodiments relate to a technology for updating firmware in a software-defined video transmission cable that transmits video data and the like between two digital devices using the TMDS (Transition Minimized Differential Signaling) method. The software-defined video transmission cable includes a processor, a memory connected to the processor, and firmware stored in the memory. The processor operates according to the firmware to perform software-based signal processing on the video data and the like. In the embodiments described here, the video transmission cable is an HDMI (High-Definition Multimedia Interface) cable configured as an active optical cable.

[0010] Fig. 1 schematically illustrates an exemplary configuration of a video transmission system 100 according to an embodiment. As illustrated in Fig. 1, the video transmission system 100 includes a source device 10, a sink device 20, and an HDMI cable 30. The source device 10 and the sink device 20 are connected to each other via the HDMI cable 30.

[0011] The source device 10 corresponds to a transmitting device that transmits video data to the sink device 20 via the HDMI cable 30. Examples of the source device 10 include a digital video recorder, an optical disc player, a set-top box, a video camera, a streaming media stick, and a personal computer.

[0012] The sink device 20 corresponds to a receiving device that receives video data from the source device 10 via the HDMI cable 30. Examples of the sink device 20 include a television (television receiver), a monitor, and a projector.

[0013] An HDMI cable 30 connects a source device 10 to a sink device 20, enabling transmission of video data from the source device 10 to the sink device 20. The HDMI cable 30 transmits video data to the sink device 20 using the TMDS method. The HDMI standard broadly supports video formats that transmit video data using three color signals (RGB), and video formats that transmit video data using a luminance signal (Y) and two color difference signals (CbCr). The luminance signal is also called the Y component, and the two color difference signals are also called the Cb component and the Cr component.

[0014] In the present embodiment, the description will be given assuming that video data is transmitted from the source device 10 to the sink device 20, but audio data may be transmitted from the source device 10 to the sink device 20 together with the video data.

[0015] Referring to Figure 2, the communication channels provided in an HDMI cable such as the HDMI cable 30 shown in Figure 1 will be described. A standard HDMI cable has 19 physical signal lines that are used to configure the following logical communication channels: TMDS Channel 0~2 TMDS Clock Channel DDC (Display Data Channel) ·CEC(Consumer Electronics Control) Line Utility Line HPD (Hot Plug Detect) Line TMDS Channels 0-2 transmit video and audio data. According to the HDMI standard, if the video format is YCbCr 4:4:4 8-bit, TMDS Channel 0 transmits the Cb component, TMDS Channel 1 transmits the Y component, and TMDS Channel 2 transmits the Cr component. The TMDS Clock Channel transmits the video clock. The DDC Channel transmits commands that allow the source device to obtain and change the settings and status of the sink device and cables. The CEC Line transmits control commands such as remote control commands. The Utility Line is used as an Audio Return Channel (ARC) to transmit audio data from the sink device to the source device. The HPD Line notifies the sink device that a source device is connected.

[0016] Referring again to FIG. 1, the configurations of the source device 10, the sink device 20, and the HDMI cable 30 will be described.

[0017] The source device 10 includes a controller 11, an HDMI transmitter 12, an HDMI connector 13, and a communication interface 14. The controller 11 is connected to the HDMI transmitter 12 and the communication interface 14, and the HDMI connector 13 is connected to the HDMI transmitter 12. The HDMI connector 13 is a connector for connecting an HDMI cable 30.

[0018] The controller 11 includes, for example, a CPU (Central Processing Unit) and a memory, and controls the operations of components in the source device 10, including the HDMI transmitter 12 and the communication interface 14. For example, the controller 11 outputs video data to the HDMI transmitter 12 in order to transmit the video data to the sink device 20.

[0019] The HDMI transmitter 12 receives video data from the controller 11 and transmits the video data to the sink device 20 in TMDS format. The HDMI transmitter 12 also acquires data indicating the video transmission capabilities of the sink device 20 using the DDC channel of the HDMI cable 30. Specifically, the HDMI transmitter 12 receives EDID (Extended Display Information Data) from the sink device 20 as data indicating the video transmission capabilities of the sink device 20. The EDID includes data indicating the functions and performance supported by the sink device 20 based on a format defined in the CTA-861 standard.

[0020] The communication interface 14 is an interface for connecting to a communication network (not shown) which may include the Internet, and is used to communicate with computers on the communication network.

[0021] The sink device 20 is, for example, a liquid crystal display (LCD) including a controller 21, an HDMI receiver 22, an HDMI connector 23, and a liquid crystal panel 24. The controller 21 is connected to the HDMI receiver 22 and the liquid crystal panel 24, and the HDMI connector 23 is connected to the HDMI receiver 22. The HDMI connector 23 is a connector for connecting an HDMI cable 30.

[0022] The controller 21 includes, for example, a CPU, a memory, and an LCD panel driver, and controls the operations of components within the source device 10, including the HDMI receiver 22 and the LCD panel 24. The memory stores the above-mentioned EDID, and the controller 21 transmits the EDID to the source device 10 using the DDC channel of the HDMI cable 30.

[0023] The HDMI receiver 22 receives video data from the source device 10 and displays the video data on the liquid crystal panel 24 via the controller 21. If audio data is also transmitted by the source device 10, the HDMI receiver 22 outputs the audio data from a speaker (not shown) via the controller 21.

[0024] The HDMI cable 30 includes a first terminal unit 31, a second terminal unit 35, and an optical fiber 39. The first terminal unit 31 is provided at one end of the optical fiber 39, and the second terminal unit 35 is provided at the other end of the optical fiber 39. The optical fiber 39 may be, for example, a single-mode optical fiber or a multi-mode optical fiber.

[0025] The first terminal unit 31 includes an HDMI connector 32, an E / O (Electrical to Optical) conversion processor 33, and a flash memory 34. The HDMI connector 32 and the flash memory 34 are connected to the E / O conversion processor 33, which is connected to an optical fiber 39. The HDMI connector 32 is a connector for connecting the HDMI cable 30 to the source device 10. The HDMI connector 32, the E / O conversion processor 33, and the flash memory 34 are held by a connector mold made of, for example, resin.

[0026] The E / O conversion processor 33 includes a circuit for converting an electrical signal into an optical signal, a circuit for converting an optical signal into an electrical signal, etc. The E / O conversion processor 33 receives video data from the source device 10 via the HDMI connector 32, converts the received video data into an optical signal, and transmits the video data in the optical signal to the optical fiber 39. A detailed configuration of the E / O conversion processor 33 will be described later.

[0027] The flash memory 34 is a non-volatile memory that stores various data including firmware and cable data. The E / O conversion processor 33 reads the firmware from the flash memory 34 and operates in accordance with the firmware. Furthermore, the E / O conversion processor 33 reads the cable data from the flash memory 34 and transmits the cable data to the source device 10 using the DDC of the HDMI cable 30.

[0028] The second terminal unit 35 includes an HDMI connector 36, an O / E (Optical to Electrical) conversion processor 37, and a flash memory 38. The HDMI connector 36 and the flash memory 38 are connected to the O / E conversion processor 37, which is connected to an optical fiber 39. The HDMI connector 36 is a connector for connecting the HDMI cable 30 to the sink device 20. The HDMI connector 36, the O / E conversion processor 37, and the flash memory 38 are held by a connector mold made of, for example, resin.

[0029] The O / E conversion processor 37 includes a circuit for converting an optical signal into an electrical signal and a circuit for converting an electrical signal into an optical signal. The O / E conversion processor 37 receives video data from the optical fiber 39 via the HDMI connector 36, converts the received video data into an electrical signal, and transmits the video data in the electrical signal to the sink device 20. A detailed configuration of the O / E conversion processor 37 will be described later.

[0030] The flash memory 38 is a non-volatile memory that stores various data including firmware and cable data. The O / E conversion processor 37 reads the firmware from the flash memory 38 and operates in accordance with the firmware.

[0031] The E / O conversion processor 33, the O / E conversion processor 37, and the optical fiber 39 are collectively referred to as a processing circuit.

[0032] As described above, the E / O conversion processor 33 and the O / E conversion processor 37 of the HDMI cable 30 operate according to firmware. A server operated by the manufacturer of the HDMI cable 30 may distribute a firmware image, which is data for updating the firmware, via a communication network. The firmware image may be a patch to be applied to the firmware stored in the HDMI cable 30. The source device 10 downloads the firmware image from the server and transmits the firmware image to the HDMI cable 30. The firmware image includes a firmware image for the E / O conversion processor 33 and a firmware image for the O / E conversion processor 37.

[0033] An overview of a method for providing a firmware image to an HDMI cable 30 according to an embodiment will be described with reference to Fig. 3. Some components are not shown in Fig. 3. Here, a case where firmware for the E / O conversion processor 33 of the HDMI cable 30 is updated will be described.

[0034] The controller 11 of the source device 10 functions as a firmware update tool 111. The firmware update tool 111 obtains a firmware image from a server via the communication interface 14. The firmware update tool 111 outputs the firmware image on two color difference signals (Cr component and Cb component), and also outputs a video including a message for the user indicating that the firmware image is being transmitted over the HDMI cable 30 on a luminance signal (Y component). In other words, the firmware update tool 111 outputs video data consisting of a luminance signal carrying the video including the message and a color difference signal carrying the firmware image. The message may include information indicating the progress of the firmware image transmission.

[0035] The HDMI transmitter 12 transmits firmware images to the HDMI cable 30 on TMDS channels 0 and 2, and transmits video to the HDMI cable 30 on TMDS channel 1, thereby transmitting video data to the HDMI cable 30.

[0036] The E / O conversion processor 33 extracts the color difference signal carrying the firmware image from the video data and stores the firmware image in the flash memory 38. After receiving the firmware image, the E / O conversion processor 33 reads the firmware image from the flash memory 38 and updates the firmware according to the firmware image.

[0037] The E / O conversion processor 33 outputs the luminance signal included in the video data to the sink device 20. The sink device 20 displays a video based on the luminance signal. Since the video is represented only by the luminance signal, the displayed video is monochrome.

[0038] In this way, the firmware image for the HDMI cable 30 is transmitted as a color-difference signal of the video data on TMDS channels 0 and 2, and the video is transmitted as a luminance signal of the video data on TMDS channel 1. This configuration makes it possible to display video on the sink device 20 even while the firmware image for the HDMI cable 30 is being transmitted. For example, it becomes possible to display to the user the progress of updating the firmware for the HDMI cable 30. Furthermore, the above configuration makes it possible to transmit the firmware image at higher speeds than when using the CEC line, DDC channel, or InfoFrame.

[0039] Although the firmware update for the E / O conversion processor 33 has been described above, firmware updates are similarly performed for the O / E conversion processor 37. The firmware image for the E / O conversion processor 33 is transmitted at a timing different from the timing of transmitting the firmware image for the O / E conversion processor 37. Before transmitting the firmware image, the HDMI transmitter 12 of the source device 10 transmits identification information indicating whether the firmware image is intended for the E / O conversion processor 33 or the O / E conversion processor 37. The slave address of the DDC command can be used as the identification information.

[0040] DDC is a bus-type communication protocol that performs master / slave type communication control. The basic operation is that the master issues a command and the slave returns an Ack or a response. There can be multiple slaves, and each slave is assigned a unique address. In this embodiment, as shown in FIG. 4, the source device 10 serves as the master, and the sink device 20 and the E / O conversion processor 33 and O / E conversion processor 37 of the HDMI cable 30 serve as slaves. Here, the slave address of the E / O conversion processor 33 is set to "0x60," and the slave address of the O / E conversion processor 37 is set to "0x61."

[0041] There are two types of DDC commands: Read and Write. A Read command is a command used by the master to read some data from a slave. A Write command is a command used by the master to write some data to a slave.

[0042] Figure 5 shows an outline of the data format of a Read command. As shown in Figure 5, in a Read command, the master sends a Start signal, a slave address, and R / W to the slave. The Start signal notifies the start of the command. The slave address is represented by 7 bits. R / W is 1 bit of information that indicates whether it is a Read command or a Write command. A value of "0" indicates a Read command, and a value of "1" indicates a Write command. In this example, R / W is "0".

[0043] In response to receiving R / W of "0", the slave sends an Ack to the master, and then continues to send data to the master. In response to receiving the data, the master sends an Ack to the slave. The slave can then send more data. The Read command ends when the master sends a Stop signal to the slave and the slave receives a Stop signal from the master.

[0044] Figure 6 shows a schematic data format of a Write command. As shown in Figure 6, in a Write command, the master sends a Start signal, a slave address, and R / W to the slave. Here, R / W is "1".

[0045] The slave sends an Ack to the master in response to receiving a R / W of "1". The master sends data to the slave in response to receiving the Ack. The slave sends an Ack to the master in response to receiving the data. The master can then send more data. The Write command ends when the master sends a Stop signal to the slave and the slave receives a Stop signal from the master.

[0046] In this embodiment, as will be described later, three types of commands are used: a firmware update start command, a firmware update check command, and a firmware update end command. Subcommand numbers are assigned to the three types of commands as follows:

[0047] 0x01: Firmware update start command 0x02: Firmware update check command 0x03: Firmware update end command The master stores a subcommand number in the data of the Write command to transmit a firmware update start command, a firmware update check command, or a firmware update end command to the slave.

[0048] Figure 7A schematically shows a firmware update start command to the E / O conversion processor 33, Figure 7B schematically shows a firmware update check command to the E / O conversion processor 33, and Figure 7C schematically shows a firmware update end command to the E / O conversion processor 33.

[0049] 7A, 7B, and 7C, since the command is directed to the E / O conversion processor 33, the slave address is set to "0x60." Furthermore, since a Write command is used, R / W is set to "1." For a firmware update start command, "0x01" is sent as data, for a firmware update check command, "0x02" is sent as data, and for a firmware update end command, "0x03" is sent as data.

[0050] Figure 8A schematically shows a firmware update start command to the O / E conversion processor 37, Figure 8B schematically shows a firmware update check command to the O / E conversion processor 37, and Figure 8C schematically shows a firmware update end command to the O / E conversion processor 37.

[0051] 8A, 8B, and 8C, since the command is directed to the O / E conversion processor 37, the slave address is set to "0x61." Furthermore, since a Write command is used, R / W is set to "1." For a firmware update start command, "0x01" is sent as data, for a firmware update check command, "0x02" is sent as data, and for a firmware update end command, "0x03" is sent as data.

[0052] 9 schematically illustrates an example of the hardware configuration of the E / O conversion processor 33. As illustrated in FIG. 9, the E / O conversion processor 33 includes a main controller 331, a RAM 332, an HDMI receiver 333, a SerDes (Serializer / Deserializer) 334, switches 335 and 336, a light-emitting element 337, and a light-receiving element 338.

[0053] The main controller 331 controls the operation of the components in the E / O conversion processor 33. The RAM 332 is a volatile memory, and is used as a work area by the main controller 331. For example, the main controller 331 controls the operation of the components in the E / O conversion processor 33, including the HDMI receiver 333 and the SerDes 334, by loading firmware stored in the flash memory 34 into the RAM 332 and executing the firmware. In addition, in the firmware update mode, the RAM 332 temporarily stores a firmware image received from the source device 10. The firmware image is transferred from the RAM 332 to the flash memory 34.

[0054] The HDMI receiver 333 receives TMDS signals conforming to the HDMI standard from the source device 10 via TMDS channels 0 to 2 and the TMDS clock channel, and outputs the TMDS signals to the SerDes 334. The TMDS signals include video data, audio data, and a clock. The HDMI receiver 333 also exchanges signals with the source device 10 via the DDC channel, the CEC channel, the utility line, and the HPD line. The HDMI receiver 333 outputs signals received from the source device 10 via the DDC channel to the SerDes 334 and the main controller 331. The HDMI receiver 333 outputs signals received from the source device 10 via the CEC channel, the utility line, and the HPD line to the SerDes 334. The HDMI receiver 333 also outputs signals received from the SerDes 334 via the DDC channel, the CEC channel, the utility line, and the HPD line to the source device 10.

[0055] The SerDes 334 serializes the signals coming from the HDMI receiver 333 via the TMDS channels 0 to 2, the TMDS clock channel, the DDC channel, the CEC channel, the utility line, and the HPD line, and outputs the serialized signals to the light emitting element 337. The light emitting element 337 converts the signals coming from the SerDes 334 into optical signals and outputs the optical signals to the optical fiber 39. For example, a laser diode can be used as the light emitting element 337.

[0056] The light receiving element 338 converts the optical signal coming from the optical fiber 39 into an electrical signal and outputs it to the SerDes 334. For example, a photodiode can be used as the light receiving element 338. The SerDes 334 deserializes the signal coming from the light receiving element 338 into a DDC channel, a CEC channel, a utility line, and an HPD line and outputs them to the HDMI receiver 333.

[0057] The switch 335 is provided on TMDS channel 0. The switch 335 is controlled by the main controller 331 so that the color difference signal transmitted through TMDS channel 0 enters the main controller 331 when the E / O conversion processor 33 operates in the firmware update mode, and so that the color difference signal transmitted through TMDS channel 0 enters the SerDes 334 when the E / O conversion processor 33 operates in the normal mode (video transmission mode).

[0058] The switch 336 is provided in the TMDS channel 2. The switch 336 is controlled by the main controller 331 so that the color difference signal transmitted through the TMDS channel 2 enters the main controller 331 when the E / O conversion processor 33 operates in the firmware update mode, and so that the color difference signal transmitted through the TMDS channel 2 enters the SerDes 334 when the E / O conversion processor 33 operates in the normal mode.

[0059] 10 schematically illustrates an example of the hardware configuration of the O / E conversion processor 37. As illustrated in FIG. 10, the O / E conversion processor 37 includes a main controller 371, a RAM 372, an HDMI transmitter 373, a SerDes 374, switches 375 and 376, a light-emitting element 377, and a light-receiving element 378.

[0060] The main controller 371 controls the operation of the components in the O / E conversion processor 37. The RAM 372 is a volatile memory, and is used as a working area by the main controller 371. For example, the main controller 371 controls the operation of the components in the O / E conversion processor 37, including the HDMI transmitter 373 and SerDes 374, by loading firmware stored in the flash memory 38 into the RAM 372 and executing the firmware. In addition, in the firmware update mode, the RAM 372 temporarily stores a firmware image received from the source device 10. The firmware image is transferred from the RAM 372 to the flash memory 38.

[0061] The light receiving element 378 converts the optical signal coming from the optical fiber 39 into an electrical signal and outputs it to the SerDes 374. For example, a photodiode can be used as the light receiving element 378. The SerDes 374 divides the signal coming from the light receiving element 378 into TMDS channels 0 to 2, the TMDS clock channel, the DDC channel, the CEC channel, the utility line, and the HPD line and outputs them to the HDMI transmitter 373. The signal transmitted through the DDC channel is also output to the main controller 371. The HDMI transmitter 373 outputs the signals received from the SerDes 374 via the TMDS channels 0 to 2, the TMDS clock channel, the DDC channel, the CEC channel, the utility line, and the HPD line to the sink device 20.

[0062] Furthermore, the HDMI transmitter 373 outputs signals received from the sink device 20 via the DDC channel, CEC channel, utility line, and HPD line to the SerDes 374. The SerDes 374 combines the signals coming from the HDMI transmitter 373 via the DDC channel, CEC channel, utility line, and HPD line into one signal and outputs the combined signal to the light-emitting element 377. The light-emitting element 377 converts the signal coming from the SerDes 374 into an optical signal and outputs the optical fiber 39. A laser diode, for example, can be used as the light-emitting element 377.

[0063] The switch 375 is provided on TMDS channel 0. The switch 375 is controlled by the main controller 371 so that the color difference signal transmitted through TMDS channel 0 enters the main controller 371 when the O / E conversion processor 37 operates in the firmware update mode, and so that the color difference signal transmitted through TMDS channel 0 enters the HDMI transmitter 373 when the O / E conversion processor 37 operates in the normal mode.

[0064] The switch 376 is provided in the TMDS channel 2. The switch 376 is controlled by the main controller 371 so that the color difference signal transmitted through the TMDS channel 2 enters the main controller 371 when the O / E conversion processor 37 operates in the firmware update mode, and so that the color difference signal transmitted through the TMDS channel 2 enters the HDMI transmitter 373 when the O / E conversion processor 37 operates in the normal mode.

[0065] 11 shows an example of a processing procedure for updating the firmware of the HDMI cable 30. Here, a case where the firmware of the E / O conversion processor 33 is updated will be described.

[0066] First, the firmware update tool 111 transmits a firmware update start command using the DDC channel (step S1101). Specifically, the firmware update tool 111 transmits the firmware update start command, specifying the slave address "0x60" as shown in FIG. 7A, over the DDC channel. In response to receiving the firmware update start command, the main controller 331 of the E / O conversion processor 33 switches the operating mode to the firmware update mode. For example, the main controller 331 controls the switches 335 and 336 so that the color difference signals transmitted through TMDS channels 0 and 2 enter the main controller 331. Meanwhile, the operating mode of the O / E conversion processor 37 is maintained in the normal mode.

[0067] The firmware update tool 111 transmits the firmware image using TMDS channels 0 and 2 (step S1102). Furthermore, the firmware update tool 111 transmits video indicating that the firmware image is being transmitted using TMDS channel 1. Here, it is assumed that the firmware image does not fit into one video frame. In this case, the firmware update tool 111 divides the firmware image into multiple firmware image fragments. Sequence numbers may be assigned to the firmware image fragments. In this step, the firmware update tool 111 transmits one firmware image fragment (one frame's worth of firmware image). The main controller 331 buffers the received firmware image fragments in RAM 332 and writes the firmware image fragments to the flash memory 34.

[0068] When the firmware update tool 111 completes transmission of one firmware image fragment, it transmits a firmware update check command to the E / O conversion processor 33 using the DDC channel (step S1103). Specifically, the firmware update tool 111 transmits a firmware update check command specifying the slave address "0x60" as shown in FIG. 7B over the DDC channel. In response to receiving the firmware update check command from the firmware update tool 111, the main controller 331 transmits a firmware update check response to the firmware update tool 111 using the DDC channel (step S1104). The firmware update check response may be an ACK for the data transmission shown in FIG. 7B. Generally, writing data to flash memory is slow. For this reason, after receiving the firmware update check command, the main controller 331 delays transmission of the firmware update check response by clock stretching until writing of the firmware image fragment to the flash memory 34 is completed.

[0069] The processes shown in steps S1102 to S1104 are repeated until the entire firmware image is transmitted from the firmware update tool 111 to the main controller 331 of the E / O conversion processor 33. For example, if the firmware image is divided into N firmware image fragments, the processes shown in steps S1102 to S1104 are executed N times.

[0070] When the firmware update tool 111 has completed transmitting the entire firmware image, it transmits a firmware update end command, as shown in FIG. 7C , to the E / O conversion processor 33 using the DDC channel. In response to receiving the firmware update end command from the firmware update tool 111, the main controller 331 of the E / O conversion processor 33 switches the operating mode to normal mode. For example, the main controller 331 controls the switches 335 and 336 so that signals transmitted through TMDS channels 0 and 2 enter the SerDes 334. Next, the main controller 331 combines the firmware image fragments stored in the flash memory 34 according to the sequence numbers assigned to the firmware image fragments to obtain the firmware image. The main controller 331 updates the firmware by applying the firmware image, then reboots and loads the updated firmware.

[0071] Fig. 12 shows an outline of an example of the procedure of the process executed by the firmware update tool 111. The flow shown in Fig. 12 starts, for example, after the firmware update tool 111 receives a firmware image from the server.

[0072] First, the firmware update tool 111 changes the video format to YCbCr 4:4:4 8-bit (step S1201).

[0073] The firmware update tool 111 transmits a firmware update start command using the DDC channel (step S1202). For example, the firmware update tool 111 transmits the firmware update start command shown in Fig. 7A when updating the firmware of the E / O conversion processor 33 of the HDMI cable 30, and transmits the firmware update start command shown in Fig. 8A when updating the firmware of the O / E conversion processor 37 of the HDMI cable 30.

[0074] The firmware update tool 111 starts transmitting, using TMDS channel 1, a video including a progress bar indicating the progress of the firmware update of the HDMI cable 30 (step S1203).

[0075] The firmware update tool 111 uses TMDS channels 0 and 2 to transmit one frame of firmware image (step S1204).

[0076] The firmware update tool 111 transmits a firmware update check command using the DDC channel and waits for a response to the firmware update check command (step S1205). For example, the firmware update tool 111 transmits the firmware update check command shown in Fig. 7B when updating the firmware of the E / O conversion processor 33 of the HDMI cable 30, and transmits the firmware update check command shown in Fig. 8B when updating the firmware of the O / E conversion processor 37 of the HDMI cable 30.

[0077] When the firmware update tool 111 receives the firmware update check response, it updates the progress bar display (step S1206).

[0078] If the transmission of the firmware image is not complete (step S1207; No), the flow returns to step S1203, and the next frame of firmware image is transmitted.

[0079] The processes shown in steps S1204 to S1206 are repeated, and when the transmission of the firmware image is completed (step S1207; Yes), the flow proceeds to step S1208.

[0080] The firmware update tool 111 uses the DDC channel to transmit a firmware update end command (step S1208), terminates the progress bar display (step S1209), and restores the video format to its original state (step S1210). For example, the firmware update tool 111 transmits the firmware update end command shown in Fig. 7C when updating the firmware image of the E / O conversion processor 33 of the HDMI cable 30, and transmits the firmware update end command shown in Fig. 8C when updating the firmware image of the O / E conversion processor 37 of the HDMI cable 30.

[0081] 13A and 13B schematically show an example of the procedure of processing executed by the E / O conversion processor 33. Note that processing similar to the processing shown in FIGS. 13A and 13B is executed by the O / E conversion processor 37.

[0082] 13A and 13B starts when the HDMI cable 30 is connected to the source device 10 and the sink device 20. When the HDMI cable 30 is disconnected from the source device 10 (step S1301; No), the flow ends. When the HDMI cable 30 is connected to the source device 10 (step S1301; Yes), the flow proceeds to step S1302.

[0083] When the main controller 331 of the E / O conversion processor 33 receives a firmware update start command from the source device 10 via the DDC channel (step S1302; Yes), the main controller 331 changes the operation mode of the E / O conversion processor 33 to the firmware update mode (step S1303).When the main controller 331 receives a firmware update end command via the DDC channel (step S1304; Yes), the main controller 331 changes the operation mode of the E / O conversion processor 33 to the normal mode (step S1305).

[0084] That is, the E / O conversion processor 33 operates in the firmware update mode during the period from when the firmware update start command is received until when the firmware update end command is received, and operates in the normal mode during the other periods.

[0085] If the E / O conversion processor 33 is operating in the normal mode (step S1306; No), the flow proceeds to step S1307. The E / O conversion processor 33 relays the video data from the source device 10 to the sink device 20 as is (step S1307). Specifically, the E / O conversion processor 33 outputs the signals traveling on TMDS channels 0 to 2 to the sink device 20 as is.

[0086] If E / O conversion processor 33 is operating in firmware update mode (step 1306; Yes), the flow proceeds to step S1308 in Fig. 13B. E / O conversion processor 33 relays the data on TMDS channel 1 as is from source device 10 to sink device 20 (step S1308), and writes the data on TMDS channels 0 and 2 to flash memory 34 (step S1309).

[0087] The E / O conversion processor 33 receives the firmware update check command from the source device 10 via the DDC channel (step S1310; Yes), and after completing writing of data to the flash memory 34, transmits a firmware update check response via the DDC channel to the source device 10. Thereafter, the flow returns to step S1301 in Fig. 13A, and the processes from step S1301 onwards are repeated.

[0088] When the transmission of the firmware image is complete, the source device 10 transmits a firmware update end command on the DDC channel. Upon receiving the firmware update end command from the source device 10, the E / O conversion processor 33 switches the operation mode to the normal mode (step S1305) and relays the video data from the source device 10 to the sink device 20 as is (step S1307).

[0089] The firmware image needs to be transmitted without errors over the HDMI cable 30. One method for dealing with data transmission errors is to add an error detection code (e.g., CRC-32) to the firmware image when transmitting the firmware image on the transmitting side (source device 10 side).

[0090] The firmware update tool 111 divides the firmware image into multiple firmware image fragments so that each firmware image fragment and CRC fit into the color difference signal of one video frame. The firmware update tool 111 calculates a CRC for each firmware image fragment and appends the calculated CRC to the end of the firmware image fragment.

[0091] 11, the firmware update tool 111 transmits one firmware image fragment with a CRC attached via TMDS channels 0 and 1. The firmware update tool 111 transmits a firmware update check command via the DDC channel, and repeats transmitting one firmware image fragment with a CRC attached until it receives a firmware update check response from the E / O conversion processor 33.

[0092] The main controller 331 of the E / O conversion processor 33 uses the received CRC to perform error detection on the received firmware image fragment. If the main controller 331 detects a data error in the received firmware image fragment, it discards the firmware image fragment and performs the same process on any firmware image fragments that are sent again. If the main controller 331 confirms that the received firmware image fragment does not contain any data errors, it transmits a firmware update check response to the source device 10 via the DDC channel.

[0093] Fig. 14 shows an outline of an example of the processing procedure executed by the firmware update tool 111 when a CRC is added to a firmware image as an error detection code. In Fig. 14, the same processes as those shown in Fig. 12 are given the same reference numerals, and duplicated explanations will be omitted. Step S1401 has been added between step S1203 and step S1204.

[0094] In step S1401, the firmware update tool 111 assigns a CRC to the firmware image fragment to be transmitted next. The firmware update tool 111 transmits the firmware image fragment with the CRC assigned on TMDS channels 0 and 2 (step S1204), transmits a firmware update check command on the DDC channel, and waits for a response to the firmware update check command (step S1205). The firmware update tool 111 repeatedly executes the data transmission shown in step S1204 until it receives a response to the firmware update check command.

[0095] Figure 15 shows an outline of part of the processing steps executed by the E / O conversion processor 33 when a CRC is added to a firmware image as an error detection code. The flow shown in Figure 15 is executed when the E / O conversion processor 33 operates in firmware update mode (step S1306 in Figure 13A; Yes). In Figure 15, the same processes as those shown in Figure 13B are given the same reference numerals, and duplicate explanations will be omitted. Step S1501 has been added between step S1308 and step S1309.

[0096] The E / O conversion processor 33 receives the firmware image fragments and CRCs from the source device 10 via TMDS channels 0 and 2, and performs error detection on the received firmware image fragments using the received CRCs.

[0097] If there is no error in the received firmware image fragment (step S1501; No), the flow proceeds to step S1309, where the E / O conversion processor 33 writes the received firmware image fragment into the flash memory .

[0098] On the other hand, if there is an error in the received firmware image fragment (step S1501; Yes), the flow returns to step S1301 in Figure 13A. The E / O conversion processor 33 receives the firmware image fragment and CRC retransmitted by the source device 10, and performs error detection on the received firmware image fragment using the received CRC. If there is no error in the received firmware image fragment (step S1501; No), the flow proceeds to step S1309, where the E / O conversion processor 33 writes the received firmware image fragment to the flash memory 34.

[0099] As described above, in the video transmission system 100 according to this embodiment, the source device 10 transmits a firmware image for updating the firmware of the HDMI cable 30 to the HDMI cable 30 over TMDS channels 0 and 2, which are used to transmit color-difference signals of video data, and transmits a video indicating that the firmware image is being transmitted to the HDMI cable 30 over TMDS channel 1, which is used to transmit a luminance signal of video data. The processing circuit of the HDMI cable 30 receives the firmware image and the video from the source device 10, stores the received firmware image in flash memory, and transmits the received video to the sink device 20. The sink device 20 receives the video from the HDMI cable 30 and displays the received video.

[0100] Specifically, the processing circuit includes an E / O conversion processor 33, an O / E conversion processor 37, and an optical fiber 39 connecting the E / O conversion processor 33 and the O / E conversion processor 37, and the memory includes a flash memory 34 connected to the E / O conversion processor 33 and a flash memory 38 connected to the O / E conversion processor 37. The source device 10 notifies the processing circuit via the DDC channel whether the firmware image is intended for the E / O conversion processor 33 or the O / E conversion processor 37. This notification is achieved by a firmware update start command such as that shown in FIG. 7A or 8A. This makes it possible to update the firmware of the E / O conversion processor 33 and the firmware of the O / E conversion processor 37 separately.

[0101] If the firmware image is intended for the E / O conversion processor 33, the E / O conversion processor 33 receives the firmware image and video from the source device 10, stores the firmware image received from the source device 10 in flash memory 34, and transmits the video received from the source device 10 to the O / E conversion processor 37 via optical fiber 39. The O / E conversion processor 37 receives the video from the E / O conversion processor 33 and transmits the video received from the E / O conversion processor 33 to the sink device 20.

[0102] If the firmware image is intended for the O / E conversion processor 37, the E / O conversion processor 33 receives the firmware image and video from the source device 10 and transmits the firmware image and video received from the source device 10 to the O / E conversion processor 37 via the optical fiber 39. The O / E conversion processor 37 receives the firmware image and video from the E / O conversion processor 33, stores the firmware image received from the E / O conversion processor 33 in the flash memory 38, and transmits the video received from the E / O conversion processor 33 to the sink device 20.

[0103] According to the above configuration, it is possible to display video on the sink device 20 even during transmission of the firmware image. Furthermore, it is possible to transmit the firmware image at higher speeds than when using the CEC line or DDC channel.

[0104] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0105] 10...Source device, 11...Controller, 12...HDMI transmitter, 13...HDMI connector, 14...Communication interface, 20...Sink device, 21...Controller, 22...HDMI receiver, 23...HDMI connector, 24...LCD panel, 30...HDMI cable, 31...First terminal unit, 32...HDMI connector, 33...E / O conversion processor, 34...Flash memory, 35...Second terminal unit, 36...HDMI connector, 37...O / E conversion processor, 38...Flash memory, 39...optical fiber, 100...video transmission system, 111...firmware update tool, 331...main controller, 332...RAM, 333...HDMI receiver, 334...SerDes, 335, 336...switch, 337...light-emitting element, 338...light-receiving element, 371...main controller, 372...RAM, 373...HDMI transmitter, 374...SerDes, 375, 376...switch, 377...light-emitting element, 378...light-receiving element.

Claims

1. A video transmission system comprising: a source device that transmits video data; a sink device that receives the video data; and a video transmission cable that connects the source device and the sink device, the source device transmits a firmware image for updating firmware of the video transmission cable to the video transmission cable using first and second TMDS channels for transmitting a color difference signal of the video data, and transmits an image indicating that the firmware image is being transmitted to the video transmission cable using a third TMDS channel for transmitting a luminance signal of the video data; the video transmission cable includes a memory and a processing circuit; the processing circuit receives the firmware image and the video from the source device, stores the received firmware image in the memory, and transmits the received video to the sink device; Video transmission system.

2. the processing circuit comprises an E / O conversion processor including a circuit for converting an electrical signal into an optical signal, an O / E conversion processor including a circuit for converting an optical signal into an electrical signal, and an optical fiber connecting the E / O conversion processor and the O / E conversion processor; the memory comprises a first memory connected to the E / O conversion processor and a second memory connected to the O / E conversion processor; When the firmware image is intended for the E / O conversion processor, the E / O conversion processor receives the firmware image and the video from the source device, stores the firmware image received from the source device in the first memory, and transmits the video received from the source device to the O / E conversion processor via the optical fiber; the O / E conversion processor receives the video from the E / O conversion processor and transmits the video received from the E / O conversion processor to the sink device; The video transmission system according to claim 1 .

3. 3. The video transmission system according to claim 2, wherein the source device notifies the processing circuit via a DDC channel whether the firmware image is intended for the E / O conversion processor or the O / E conversion processor.

4. the processing circuit comprises an E / O conversion processor including a circuit for converting an electrical signal into an optical signal, an O / E conversion processor including a circuit for converting an optical signal into an electrical signal, and an optical fiber connecting the E / O conversion processor and the O / E conversion processor; the memory comprises a first memory connected to the E / O conversion processor and a second memory connected to the O / E conversion processor; When the firmware image is intended for the O / E conversion processor, the E / O conversion processor receives the firmware image and the video from the source device, and transmits the firmware image and the video received from the source device to the O / E conversion processor via the optical fiber; the O / E conversion processor receives the firmware image and the video from the E / O conversion processor, stores the firmware image received from the E / O conversion processor in the second memory, and transmits the video received from the E / O conversion processor to the sink device; The video transmission system according to claim 1 .

5. 5. The video transmission system according to claim 1, wherein the video transmission cable is an HDMI cable.

6. A method executed by a video transmission system including a source device that transmits video data, a sink device that receives the video data, and a video transmission cable that connects the source device and the sink device and that includes a memory and a processing circuit, the method comprising: the source device transmits a firmware image for updating firmware of the video transmission cable to the video transmission cable using first and second TMDS channels for transmitting a color difference signal of the video data, and transmits an image indicating that the firmware image is being transmitted to the video transmission cable using a third TMDS channel for transmitting a luminance signal of the video data; the processing circuit of the video transmission cable receiving the firmware image and the video from the source device; the processing circuit of the video transmission cable stores the firmware image received from the source device in the memory; the processing circuit of the video transmission cable transmits the video received from the source device to the sink device; the sink device receiving the video from the video transmission cable; the sink device displays the video received from the video transmission cable; A method for providing

7. A video transmission cable that connects a source device that transmits video data and a sink device that receives the video data, Memory and a processing circuit connected to the memory and operating according to firmware; Equipped with the source device transmits a firmware image for updating firmware of the video transmission cable to the video transmission cable using first and second TMDS channels for transmitting a color difference signal of the video data, and transmits an image indicating that the firmware image is being transmitted to the video transmission cable using a third TMDS channel for transmitting a luminance signal of the video data; the processing circuit receives the firmware image and the video from the source device, stores the received firmware image in the memory, and transmits the received video to the sink device; Video transmission cable.

Images