Wafer processing method

Abstract

To propose a new technique that can prevent the peeling of insulating layers, the peeling of a metal layer and an insulating layer, and the occurrence of burrs on the metal layer, when dividing a wafer by cutting with a cutting blade along streets where the metal layers are arranged.SOLUTION: A wafer processing method in which a device 11 is formed in each region partitioned by a plurality of intersecting streets 13, and insulating layers 17a and 17b and a metal layer 18 are laminated on at least a part of the streets 13 includes a removing step of positioning the tip of a cutting blade 51a having a blade thickness 51w equal to or greater than the width 18w of the metal layer 18 in the width direction (Y-axis direction) of the street 13 at a depth reaching the lower end of the metal layer 18, and removing the metal layer 18 by cutting along the streets 13 with the cutting blade 51a, and a splitting step of splitting the wafer 10 along the streets 13 after performing the removing step.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to a method for processing a wafer in which devices are formed in each area defined by a plurality of intersecting streets, and in which insulating layers and metal layers are stacked on at least some of the streets. [Background technology]

[0002] A typical semiconductor device consists of functional layers formed on the surface of a wafer made of semiconductor material. These functional layers include metal wiring layers and insulating layers (interlayer insulating films) disposed between the wiring layers. Low-k materials, or low-dielectric-constant materials, are used as the insulating layers.

[0003] Known low-k materials include inorganic materials such as SiO2, SiOC, and SiLK; organic materials such as polymers of polyimide, parylene, and polytetrafluoroethylene; and porous silica materials such as methyl-containing polysiloxane.

[0004] The device portion where the wiring layer is formed is formed in each area partitioned by streets set in a grid pattern, and an insulating layer exists between adjacent devices, straddling the streets. When this insulating layer is cut with a cutting blade, the insulating layer peels off like mica, and this peeling affects the insulating layer inside the device, causing delamination between the wiring layer and the insulating layer inside the device.

[0005] This interlayer peeling is also called delamination, and in consideration of this peeling problem, Patent Document 1 discloses a method of forming a laser-processed groove using a laser processing device and then cutting the laser-processed groove with a cutting blade. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-190779 Summary of the Invention [Problem to be solved by the invention]

[0007] However, laser processing devices such as that disclosed in Patent Document 1 are generally expensive, and there is a demand for processing using a cutting device while preventing delamination from occurring.

[0008] Furthermore, if there is a metal layer that constitutes a TEG (Test Element Group) on the street, when ablation processing is performed using a laser processing device, it has been confirmed that debris containing metal adheres to the surface of the wafer and grows larger over time.

[0009] If the enlarged metal-containing debris comes into contact with the terminals of the device or mounting board, there is a risk of short-circuiting the chip wiring or electrodes. Therefore, this risk still exists even with the method using a laser processing device such as that described in Patent Document 1.

[0010] There are various types of metal layers, such as TEGs, alignment pattern marks during device manufacturing, and metal structures embedded as a countermeasure against dishing during polishing. Some of these metal layers are exposed on the wafer surface, while others are buried within the wafer, and all of these forms of metal layers must be taken into consideration.

[0011] On the other hand, when cutting with a cutting device, if there is a metal layer on the street, delamination between the metal layer and the insulating layer or burrs on the metal layer may occur. If burrs are formed, the insulating layer on the street may be pushed up, affecting the insulating layer inside the device and causing delamination between the wiring layer and the insulating layer inside the device.

[0012] In view of the above problems, the present invention proposes a new technology that can prevent peeling of insulating layers, delamination between metal layers and insulating layers, and the occurrence of burrs in the metal layers when dividing a wafer by cutting with a cutting blade along the streets on which the metal layers are arranged. [Means for solving the problem]

[0013] The problem to be solved by the present invention is as described above, and the means for solving this problem will now be described.

[0014] According to one aspect of the present invention, there is provided a method for processing a wafer in which devices are formed in each area partitioned by a plurality of intersecting streets and in which an insulating layer and a metal layer are stacked on at least some of the streets, the method comprising: a removing step in which the tip of a cutting blade having a blade thickness equal to or greater than the width of the metal layer in the width direction of the streets is positioned at a depth reaching the lower end of the metal layer, and the metal layer is removed by cutting along the streets with the cutting blade; and a dividing step in which, after the removing step has been carried out, the wafer is divided along the streets.

[0015] According to one aspect of the present invention, the method further comprises a blade shape confirmation step of confirming the tip shape of the cutting blade after the removing step is performed on a plurality of wafers.

[0016] According to one aspect of the present invention, the dividing step divides the wafer by cutting along the streets with a second cutting blade that is thinner than the first cutting blade.

[0017] Furthermore, according to one aspect of the present invention, a metal layer confirmation step is further provided before the removal step, in which the street on which the metal layer is disposed, the position and width of the metal layer in the width direction of the street, and the position and thickness of the metal layer in the thickness direction of the street are confirmed, and the removal step is carried out only in the area where the metal layer is disposed. [Effects of the Invention]

[0018] The present invention has the following effects.

[0019] That is, according to one aspect of the present invention, the cutting blade used to remove the metal layer has a thickness greater than the width of the metal layer, allowing the entire metal layer to be removed, including the boundary between the metal layer and the insulating layer. By removing the boundary between the metal layer and the insulating layer, where delamination is likely to occur, delamination of the insulating layer in the street is suppressed, which in turn suppresses delamination between the insulating layer and the wiring layer present in the device. Furthermore, the occurrence of burrs on the metal layer and the metal layer pushing up the insulating layer can also be prevented.

[0020] Furthermore, according to one aspect of the present invention, the removal step is performed only on the portions of all the streets where the metal layer is disposed, thereby making it possible to reduce the overall processing time.

[0021] Furthermore, according to one aspect of the present invention, it is possible to prevent the metal layer from being left unremoved completely and forming a remaining portion. [Brief explanation of the drawings]

[0022] [Figure 1] 1A and 1B are diagrams showing an embodiment of a wafer processed by a processing method according to the present invention. [Figure 2] FIG. 1 is an enlarged view of a cross section of a wafer and a street portion. [Figure 3] FIG. 1 is a diagram illustrating an embodiment of a cutting device. [Figure 4] 1 is a flowchart showing a flow of an embodiment of a processing method according to the present invention. [Figure 5] 10A to 10C are diagrams showing cutting processing using a cutting blade. [Figure 6] FIG. [Figure 7] FIG. 10 is a diagram illustrating a division step. [Figure 8]1A is a diagram illustrating wear of a cutting blade, and FIG. 1B is a diagram illustrating a cross section of a groove formed by a worn cutting blade. DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a diagram showing an embodiment of a wafer 10 to be processed by a processing method according to the present invention. On the surface 10a of the wafer 10, devices 11, 11 are formed in regions defined by a plurality of intersecting streets 13. The streets 13 extend in a first direction F1 and a second direction F2 that are perpendicular to each other and are arranged in a lattice pattern.

[0024] The material of the wafer 10 is not particularly limited and may be silicon, glass, sapphire, SiC, or the like.

[0025] FIG. 2 is an enlarged view of the cross section of the wafer and the street portion. A functional layer 14 is laminated on the surface 10a of the wafer 10. A device 11 is formed between the streets 13, 13, and at the location of this device 11, a plurality of wiring layers made of metal and insulating layers disposed between the wiring layers are laminated to form an integrated circuit.

[0026] The insulating layer is made of low-k material (low dielectric constant material), also called low-k film. Low-k materials include inorganic materials such as SiO2, SiOC, and SiLK, organic materials such as polymers of polyimide, parylene, and polytetrafluoroethylene, and porous silica materials such as methyl-containing polysiloxane.

[0027] A plurality of insulating layers 17a, 17b... are laminated in the area of ​​the street 13. These insulating layers 17a, 17b... are continuous with the insulating layers present in the device 11 area.

[0028] A metal layer 18 is disposed between the stacked insulating layers 17a and 17b at the location of the street 13. This metal layer 18 is, for example, a TEG, a mark for an alignment pattern during device manufacturing, a metal structure embedded as a countermeasure against dishing during polishing, or the like.

[0029] As in the example of FIG. 2, some of the metal layers 18 are embedded in multiple locations between the stacked insulating layers 17a and 17b, while others are exposed on the wafer surface (surface of the street 13).

[0030] The metal layer 18 may be disposed on some of the streets 13 or on all of the streets 13. The metal layer 18 may be disposed at the intersections of the streets 13 or between adjacent devices 11, 11 across the street 13.

[0031] FIG. 3 is a diagram showing an example of a cutting device used for cutting the wafer 10. As shown in FIG. The cutting device 50 has two cutting units 51 and 52 and is configured as a dual dicer.

[0032] A holding table 60 is disposed on a base 55 of the cutting device 50. The holding table 60 is configured to move back and forth in the X-axis direction, which is the processing feed direction, by a movement mechanism (not shown), and is also configured to rotate within a horizontal plane by a rotation mechanism (not shown).

[0033] Wafer units U each having a wafer 10 attached to a tape T are sequentially supplied to the holding table 60, and the wafer 10 is suction-held via the tape T on the holding surface 61a of the holding table 60.

[0034] A gate-shaped column 56 is erected on a base 55, and the column 56 is provided with movement mechanisms 57, 58 that support the first cutting unit 51 and the second cutting unit 52 so that they can move in the Y-axis direction and the Z-axis direction, respectively. Each cutting unit 51, 52 is provided with a cutting blade 51a, 52a that is rotationally driven by a motor (not shown).

[0035] A plurality of clamps 63 and a water cover 64 are arranged around the holding table 60. A sub-chuck table 68 that holds the upper surface of the dress board 67 exposed is provided on the upper surface of the water cover 64. The water cover 64 moves in the X-axis direction together with the holding table 60, and as the water cover 64 moves, the sub-chuck table 68 also moves in the X-axis direction.

[0036] Next, an example of the wafer processing method according to the present invention will be described. 4 is a flow chart showing the flow of one embodiment of the processing method according to the present invention. Each step will be described below in order.

[0037] <Metal layer confirmation step> As shown in Figure 2, a street 13 on which a metal layer is disposed; and The position and width 18w of the metal layer 18 in the width direction (Y-axis direction) of the street 13; The position and thickness 18h of the metal layer 18 in the thickness direction (Z-axis direction) of the street 13; This is the step to confirm the above.

[0038] When design information for the wafer 10, including information such as the position of the metal layer 18 on the wafer and the size of the metal layer 18, is available, the design information is used to identify the streets 13 on which the metal layer 18 exists, the position and width 18w (size) of the metal layer 18 in the street 13 in the width direction (Y-axis direction), and the position and thickness of the street in the thickness direction (Z-axis direction). This information is stored in the controller 100 (FIG. 3), and the controller 100 determines the processing location and processing conditions in the subsequent removal step based on this information. Alternatively, the operator may input processing conditions (such as the Y-axis position of the cutting blade in the street and the cutting depth required to completely remove the metal layer) based on the design information and store them in the controller.

[0039] When design information for the wafer 10, including information such as the position of the metal layer 18 on the wafer and the size of the metal layer 18, is unavailable, for example, a wafer on which the same pattern is formed in advance is cut with a cutting blade, and the streets 13 on which the metal layer 18 exists, the position and width 18w (size) of the metal layer 18 in the street 13 in the width direction (Y-axis direction), and the position and thickness of the street in the thickness direction (Z-axis direction) are identified and stored in the controller 100. Based on this information, the controller 100 determines the processing location and processing conditions in the subsequent removal step. Alternatively, based on this identified information, the operator may input processing conditions (such as the position of the cutting blade in the street in the Y-axis direction and the cutting depth to completely remove the metal layer) and store them in the controller.

[0040] <Removal step> As shown in Figures 5 and 6, this is a step in which the tip of a cutting blade 51a, which has a blade thickness 51w that is equal to or greater than the width 18w of the metal layer 18 in the width direction (Y-axis direction) of the street 13, is positioned at a depth that reaches the bottom end of the metal layer 18, and the cutting blade 51a is used to cut along the street 13 to remove the metal layer 18.

[0041] As a result, the insulating layers 17a and 17b and the metal layer 18 are removed in an area corresponding to the blade thickness 51w of the cutting blade 51a in the street 13. Because the blade thickness 51w of the cutting blade 51a is set to be larger than the width 18w of the metal layer 18, the entire metal layer 18 is removed without leaving any residue, including the boundary portions between the metal layer 18 and the insulating layers 17a and 17b.

[0042] Here, removing the boundary portions between the metal layer 18 and the insulating layers 17a, 17b, where delamination is likely to occur, suppresses delamination of the insulating layers 17a, 17b within the streets 13, and thus suppresses delamination between the insulating layers and wiring layers present within the device 11. Furthermore, it is possible to prevent burrs on the metal layer 18 and the metal layer 18 from pushing up the insulating layer.

[0043] Also, as shown in Figure 6, the blade thickness 51w of the cutting blade 51a may be set to be larger than the width 18w of the widest metal layer 18 in the wafer 10 so that all of the metal layer 18 present on the wafer 10 can be removed.

[0044] Alternatively, in a configuration having two cutting units 51, 52 equipped with cutting blades 51a, 52a of different blade thicknesses, such as the configuration of the cutting device 50 shown in Figure 3, all of the metal layer 18 can be removed by using the two cutting units 51, 52 depending on the width 18w (Figure 6) of the metal layer 18 to be removed.

[0045] 6, the tip of the cutting blade 51a is set to be lower than the lower end of the metal layer 18 in the depth direction (Z-axis direction), but preferably cuts within the range of the functional layer 14. In other words, it does not cut into the wafer 10.

[0046] This makes it possible to reliably remove the metal layer 18 and reduce the load on the cutting blade 51a when cutting. This also makes it possible to increase the processing feed speed of the wafer 10, thereby shortening the time required for the removal step.

[0047] Moreover, the overall processing time can be reduced by performing this removal step only on the streets where the metal layer 18 is disposed, or only on the portions of each street where the metal layer is disposed. Note that cutting may be performed on all the streets with the cutting blade 51a to form shallow grooves 19 (FIG. 7) common to all the streets.

[0048] <Split Step> As shown in FIG. 7, after the removal step is performed, the wafer 10 is divided along the streets 13 . The example in Figure 7 is an example in which a full cut is made with cutting blade 52a, which has a thinner blade thickness than cutting blade 51a (Figure 6) used in the removal step.In the dual dicer shown in Figure 3, after the removal step is performed with cutting unit 51 to form shallow groove 19, a full cut is made with the other cutting unit 52, which is a so-called step cut.

[0049] In this step cut, the removal step and division step may be performed sequentially for each street 13, or the division step may be performed after the removal step has been performed for all streets 13.

[0050] As shown in FIG. 7, when cutting is performed by the cutting blade 52a, the metal layer 18 (FIG. 6) is completely removed, so that the insulating layer 17c remaining along the street and the wafer 10 can be cut without cutting the metal layer 18 (FIG. 6) by the cutting blade 52a.

[0051] The dividing step may be performed by full cutting using a cutting blade 52a as shown in FIG. 7, or may be performed by forming a modified layer along the street using a laser processing device and then expanding and dividing the material, or by laser ablation processing.

[0052] <Blade shape confirmation step> As shown in FIG. 8(A), this is a step in which the shape of the tip (shape of the cutting edge) of the cutting blade 51a is checked at a predetermined timing.

[0053] In the removal step, it is necessary to completely remove the metal layer 18 (FIG. 6), but as the removal step is repeated, the cutting edge of the cutting blade 51a wears down, the tip edge disappears, and a U-shaped tip cross section is formed, as shown in FIG. 8(A). In this case, for example, when the removal step is performed on another wafer 10, a groove with a U-shaped bottom is formed, and the metal layer 18 is not completely removed, leaving a remaining portion 18a.

[0054] Therefore, the shape of the tip of the cutting blade 51a is checked at a predetermined timing, such as after the removal step has been performed on a predetermined number of wafers, and necessary measures are taken as appropriate. This prevents the metal layer 18 from being completely removed and leaving a residual portion 18a. Note that the predetermined timing may be after the removal step has been performed on a predetermined number of wafers, or during or after the processing of one wafer.

[0055] Necessary measures include, for example, increasing the cutting depth so that the metal layer 18 can be removed (adjusting the height in the Z-axis direction), flattening the cutting edge by flat dressing, replacing the cutting blade, etc. Flat dressing is performed by flattening the cutting edge by cutting the top surface of the dressing board 67 shown in Figure 3.

[0056] The tip shape of the cutting blade 51a can be confirmed, for example, by first lowering a rotating cutting blade from above the wafer at the outer edge of the wafer and cutting into the wafer, leaving cutting marks on both ends that are imprinted with the tip shape of the cutting blade. Alternatively, the cutting blade positioned at a predetermined height cuts the outer edge of the wafer, and then retracts the cutting blade midway through cutting to leave cutting marks on one end that are imprinted with the tip shape of the cutting blade. The formed cutting marks can be confirmed by image analysis.

[0057] Alternatively, during the removal step, when the cutting blade reaches an outer peripheral excess area of ​​the wafer where no devices are formed, the cutting blade may be retracted above the wafer and the cutting marks formed may be image-analyzed.

[0058] In addition, the test piece may be held by the sub-chuck table 68 shown in FIG. 3, cutting marks may be formed on the test piece, and the cutting marks may be confirmed by image analysis, or the cross section of the wafer may be directly photographed and the image may be confirmed.

[0059] As described above, according to the present invention, the cutting blade 51a used to remove the metal layer 18 has a blade thickness 51w greater than the width 18w of the metal layer 18. This allows the entire metal layer 18 to be removed, including the boundary portions between the metal layer 18 and the insulating layers 17a and 17b. Removing the boundary portions between the metal layer 18 and the insulating layers 17a and 17b, where delamination is likely to occur, reduces delamination of the insulating layers 17a and 17b within the streets 13, thereby reducing delamination between the insulating layers and wiring layers present within the device 11. Furthermore, it is possible to prevent burrs on the metal layer 18 and the metal layer 18 from pushing up the insulating layers. [Explanation of symbols]

[0060] 10 wafers 10a surface 11 Devices 13th Street 14 Functional Layer 17a Insulating layer 17b Insulating layer 18 metal layer 50 Cutting equipment 51 Cutting unit 51a Cutting blade 52 Cutting unit 52a Cutting blade 55 Foundation Column 56 57 Moving mechanism 58 Moving mechanism 60 Holding Table 61a Holding surface 63 Clamp 64 Water Cover 67 Dress Board 68 Sub-chuck table T-tape U Wafer Unit

Claims

1. A method for processing a wafer in which devices are formed in each of areas partitioned by a plurality of intersecting streets, and in which an insulating layer and a metal layer are stacked on at least some of the streets, comprising the steps of: a removing step in which a tip of a cutting blade having a blade thickness equal to or greater than the width of the metal layer in the width direction of the street is positioned at a depth reaching the lower end of the metal layer, and the metal layer is removed by cutting along the street with the cutting blade; a dividing step of dividing the wafer along the streets after the removing step is performed, Prior to the removal step, a street on which the metal layer is disposed; the position and width of the metal layer in the width direction of the street; the position and thickness of the metal layer in the thickness direction of the street; The wafer processing method further comprises a metal layer confirmation step of confirming the metal layer.

2. the removing step is performed only on the street where the insulating layer and the metal layer are stacked; 2. The wafer processing method according to claim 1, wherein the wafer processing method comprises:

3. a blade shape confirmation step of confirming a tip shape of the cutting blade after the removing step is performed on a plurality of wafers; 3. The wafer processing method according to claim 1 or 2.

4. In the division step, 4. The wafer processing method according to claim 1, further comprising the step of cutting along the streets with a second cutting blade thinner than the first cutting blade to divide the wafer.

5. performing a removal step only where the metal layer is disposed; 5. The wafer processing method according to claim 1, wherein the wafer is processed by a wafer processing method.

6. In the removing step, the metal layer is removed with a cutting blade having a blade thickness greater than the width of the widest metal layer in the wafer.

6. The wafer processing method according to claim 1, wherein the wafer is processed by a wafer processing method.

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