Secondary battery protection circuit, secondary battery protection device, and battery pack

Abstract

This secondary battery protection circuit protects a secondary battery by using charging control and discharging control switch elements inserted between a positive terminal of the secondary battery and a high-potential terminal of a charger. The secondary battery protection circuit comprises: a first voltage detection circuit that detects whether the battery voltage is less than a first threshold; a switch circuit that outputs a high-potential voltage of the charger at the time of detection and outputs a battery voltage at the time of non-detection; a booster circuit that boosts and outputs the battery voltage by using the output voltage of the switch circuit; and a drive circuit that performs control to turn on only the charging control switch element by outputting the output volage of the booster circuit at the time of detection only to the control terminal of this switch element, and to turn on both the charging control switch element and the discharging control switch element by outputting the output volage of the booster circuit at the time of non-detection to the control terminals of these switch elements.

Description

[Technical Field]

[0001] The present invention relates to a secondary battery protection circuit, a secondary battery protection device, and a battery pack. [Background technology]

[0002] A conventional secondary battery protection circuit is known, which controls the on / off state of a pair of N-channel charge / discharge control MOS field-effect transistors (hereinafter, "field-effect transistor" is referred to as "FET," and "charge / discharge control MOSFET" is referred to as "charge / discharge control FET." Here, "charge / discharge control FET" includes "charge control FET" and "discharge control FET") by boosting the voltage supplied from the secondary battery using a charge pump and supplying it to the gates of the N-channel charge / discharge control FETs, which are inserted in series in the current path between the positive electrode of the secondary battery and the positive terminal connected to the high-potential side power supply terminal of the load and charger.

[0003] However, in the conventional secondary battery protection circuit according to Example 1, the boost operation is not possible at secondary battery voltages near zero volts, which are below the minimum operating voltage of the charge pump. As a result, it is not possible to supply the voltage necessary to turn on the charge control FET to the gate, and thus charging is not possible.

[0004] To solve this problem, conventionally, when the battery voltage is near zero volts, the gate voltage Vg of the charge control FET is set to the high potential voltage (positive electrode voltage) VP of the charger. + A secondary battery protection circuit according to Conventional Example 2 is already known, which uses a method that allows the charge control FET to be turned on even when the secondary battery is near zero volts by providing a switch in the secondary battery protection circuit to switch to supplying a certain amount of charge (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Patent No. 6614388 [Overview of the Initiative]

Problems to be Solved by the Invention

[0006] In the secondary battery protection circuit according to Conventional Example 2, when charging a secondary battery near zero volts, it is assumed that the charger starts charging with a constant current called so-called "CC charging". Here, in order to charge a secondary battery near zero volts, it is necessary to generate a gate-source voltage Vgs that allows the current supplied by the charger to flow in the charge control FET. In this case, assuming the gate-source voltage of the charge control FET required to drive the supply current of the charger as the threshold voltage Vth, the condition for driving the supply current of the charger is expressed by the following equation when the source voltage of the charge control FET is Vs.

[0007] Vg = charger voltage (≈ positive electrode voltage VP + ) Vs = battery voltage VB+(≈ power supply voltage VDD)

[0008] Therefore, the positive electrode voltage VP + becomes the charger voltage VP + and is expressed by the following equation.

[0009] Vgs > Vth

[0010] That is, the following equation is obtained.

[0011] VP + > VDD + Vth

[0012] The higher the charger voltage VP + , the greater the voltage drop between the positive electrode terminal (voltage VP + ) and the battery positive electrode terminal, and there is a problem that the heat generation loss associated with charging increases. In particular, it can become a bottleneck when charging with a large current from a state where the battery voltage is low in order to shorten the charging time. Therefore, it is desirable to perform charging with a lower charger voltage.

[0013] The object of the present invention is to provide a secondary battery protection circuit, a secondary battery protection device equipped with a secondary battery protection circuit, and a battery pack equipped with a secondary battery protection circuit that can reduce heat loss compared to conventional technology by charging a secondary battery near zero volts with a charger voltage lower than conventional technology. [Means for solving the problem]

[0014] The secondary battery protection circuit according to the present invention is A secondary battery protection circuit that protects the secondary battery by using a charge control switch element and a discharge control switch element inserted between the positive terminal of the secondary battery and the high-potential terminals of the load and charger and connected in series with each other, A first voltage detection circuit for detecting whether the battery voltage of the secondary battery is less than a predetermined first threshold, A switch circuit that outputs an output voltage which is the high potential voltage of the charger when it detects a voltage below the first threshold, and outputs an output voltage which is the battery voltage when it does not detect a voltage below the first threshold, A boost circuit that boosts the battery voltage using the output voltage of the switch circuit and outputs it, A drive circuit controls the following to turn on only the charge control switch element by outputting the output voltage of the boost circuit to the control terminal of the charge control switch element when it is detected that the voltage is below the first threshold, while turning on both the charge control switch element and the discharge control switch element by outputting the output voltage of the boost circuit to the respective control terminals of the charge control switch element and the discharge control switch element when it is not detected that the voltage is below the first threshold; It is equipped with. [Effects of the Invention]

[0015] Therefore, according to the secondary battery protection circuit of the present invention, by charging a secondary battery near zero volts with a lower charger voltage than conventional methods, heat loss can be reduced compared to conventional techniques. [Brief explanation of the drawing]

[0016] [Figure 1] This is a circuit diagram showing an example configuration of the battery pack BP1 and its peripheral circuitry according to Embodiment 1 of the present invention. [Figure 2] This block diagram shows an example configuration of the switch circuit 3 and the boost circuit 6 in Figure 1. [Figure 3] This is a timing chart showing the voltages after the charger connection in the secondary battery protection circuit according to Conventional Example 2. [Figure 4] Figure 1 shows a timing chart of the secondary battery protection circuit 16, indicating the voltages after the charger is connected. [Figure 5A] This is a circuit diagram showing an example configuration of the battery pack BP2 and its peripheral circuitry according to Embodiment 2 of the present invention. [Figure 5B] Figure 5A is a block diagram showing an example configuration of the switch circuit 3 and the boost circuit 6. [Figure 6] This is a circuit diagram showing an example configuration of the battery pack BP3 and its peripheral circuitry according to Embodiment 3 of the present invention. [Figure 7] This is a circuit diagram showing an example configuration of the battery pack BP4 and its peripheral circuitry according to Embodiment 4 of the present invention. [Figure 8A] This is a circuit diagram showing an example configuration of the battery pack BP5 and its peripheral circuitry according to Embodiment 5 of the present invention. [Figure 8B] This is a circuit diagram showing an example configuration of the battery pack BP6 and its peripheral circuitry according to Embodiment 6 of the present invention. [Modes for carrying out the invention]

[0017] Embodiments and modified examples of the present invention will be described below with reference to the drawings. The same or similar components are denoted by the same reference numerals.

[0018] (Embodiment 1) Figure 1 is a circuit diagram showing an example of the configuration of a battery pack BP1 and its peripheral circuitry according to Embodiment 1 of the present invention.

[0019] In Figure 1, the battery pack BP1 comprises a secondary battery B1 having a positive terminal 21 and a negative terminal 22, a secondary battery protection device 20, a positive terminal 13, and a negative terminal 12. Here, a parallel circuit of the system load RL and the charger CH1 is connected between the positive terminal 13 and the negative terminal 12. That is, the high-potential terminal of the charger CH1 is connected to the positive terminal 13, and the low-potential terminal of the charger CH1 is connected to the negative terminal 12. In addition, the negative terminal 22 of the secondary battery B1 has a ground voltage VSS and is connected to the negative terminal 12. The secondary battery B1 has a battery voltage (power supply voltage) VDD, which is the potential difference between its positive and negative terminals.

[0020] The secondary battery protection device 20 comprises a secondary battery protection circuit 16, a charge control FET (CFET) 14 which is, for example, an N-channel MOSFET and has a body diode 10, and a discharge control FET (DFET) 15 which is, for example, an N-channel MOSFET and has a body diode 11. Here, the charge control FET 14 and the discharge control FET 15 are connected in series with each other, and this series circuit is connected between the positive terminal 21 and the positive terminal 13. The secondary battery protection circuit 16 comprises an over-discharge detection circuit 2, a switch circuit 3 including a control circuit 3A, a boost circuit 6 including a control circuit 6A, and a drive circuit 7.

[0021] The over-discharge detection circuit 2 generates a detection signal S2, which is a comparison result signal, by comparing the battery voltage VDD with a predetermined over-discharge detection threshold Vthe. Here, if the battery voltage VDD is below the over-discharge detection threshold Vthe, the over-discharge detection circuit 2 outputs an L-level detection signal S2 indicating "over-discharge detected" to the drive circuit 7 and the control circuit 3A. On the other hand, if the battery voltage VDD is equal to or greater than the over-discharge detection threshold Vthe, the over-discharge detection circuit 2 outputs an H-level detection signal S2 indicating "over-discharge not detected" to the drive circuit 7 and the control circuit 3A. Here, the over-discharge detection threshold Vthe is set to, for example, the discharge termination voltage or a voltage slightly lower than the discharge termination voltage.

[0022] Switch circuit 3 comprises a control circuit 3A and switches 4 and 5. The control circuit 3A of switch circuit 3 responds to a high-level detection signal S2 by turning switch 4 off and switch 5 on, thereby outputting the battery voltage VDD as the output voltage VSW to the boost circuit 6. On the other hand, the control circuit 3A of switch circuit 3 responds to a low-level detection signal S2 by turning switch 4 on and switch 5 off, thereby outputting the positive voltage VP, which is the charger voltage at the positive terminal 13. + This is output to the boost circuit 6 as the output voltage VSW.

[0023] The boost circuit 6 operates using the output voltage VSW from the switch circuit 3 as the power supply voltage, and generates a boosted voltage VCP (=VDD + VSW) based on the battery voltage VDD and the output terminal VSW.

[0024] Based on the detection signal S2, the drive circuit 7 controls the on / off state of the charge control FET 14 and the discharge control FET 15 using a boosted voltage VCP. Here, based on the H-level detection signal S2, the drive circuit 7 outputs H-level (=VCP) control signals COUT and DOUT to the gates (control terminals) of the charge control FET 14 and the discharge control FET 15, respectively, thereby turning on both the charge control FET 14 and the discharge control FET 15. On the other hand, based on the L-level detection signal S2, the drive circuit 7 outputs an H-level (=VCP) control signal COUT to the gate of the charge control FET 14 and an L-level (=VSS) control signal DOUT to the gate of the discharge control FET 15, thereby turning on the charge control FET 14 and turning off the discharge control FET 15.

[0025] Figure 2 is a block diagram showing an example configuration of the switch circuit 3 and boost circuit 6 in Figure 1.

[0026] In FIG. 2, the switch circuit 3 includes a control circuit 3A and switches 4 and 5, and operates as described above. The booster circuit 6 is a general charge pump circuit, and includes a control circuit 6A, four switches 6a to 6d, and a boosting capacitor C1. In the booster circuit 6, the output voltage VSW from the switch circuit 3 is supplied as the power supply voltage of the control circuit 6A, and is output to the drive circuit 7 as the boosted voltage VCP via the switches 6a and 6b. The battery voltage VDD is grounded via the switches 6c and 6d. Here, the connection point of the switch 6a and the switch 6b is connected to the connection point of the switch 6c and the switch 6d via the boosting capacitor C1.

[0027] In the booster circuit 6 configured as described above, the control circuit 6A (1) By turning on the switch 6a, turning off the switch 6b, turning off the switch 6c and turning on the switch 6d, the operation of charging the capacitor C1 with the voltage difference charge between the output voltage VSW and the ground voltage VSS, and (2) By turning off the switch 6a, turning on the switch 6b, turning on the switch 6c and turning off the switch 6d, the operation of generating the boosted voltage VCP (= VDD + VSW) and outputting it to the drive circuit 7, controls the operation of the booster circuit 6 to repeat. In the switch circuit 3, when the battery voltage VDD is equal to or higher than the overdischarge detection threshold value Vthe, in response to the H-level detection signal S2 from the overdischarge detection circuit 2, the switch 5 is turned on and the switch 4 is turned off, and the positive voltage VDD of the positive terminal 21 is supplied to the booster circuit 6 as the output voltage VSW via the switch 5. Since the output voltage VSW is conductive to the battery voltage VDD as described above, VCP = VDD + VDD.

[0028] On the other hand, when the battery voltage VDD is lower than the overdischarge detection threshold value Vthe, in response to the L-level detection signal S2 from the overdischarge detection circuit 2, the switch 5 is turned off and the switch 4 is turned on, and the positive voltage VP of the positive terminal 13 +This is supplied to the boost circuit 6 as the output voltage VSW via switch 4. In this case, since the output voltage VSW is in contact with the positive terminal 13 as described above, the boosted voltage VCP = VDD + VP + This is the result.

[0029] Next, we will explain the method for charging the zero-volt battery according to this embodiment, and the output voltage conditions of the charger CH1 that enables charging.

[0030] (A) When the battery voltage VDD is greater than or equal to a predetermined over-discharge detection threshold Vthe, the over-discharge detection circuit 2 is in the "over-discharge not detected" state and outputs a detection signal S2 at the H level. By turning on switch 5 of the switch circuit 3 and turning off switch 4, the battery voltage VDD is output to the boost circuit 6 as the output voltage VSW. That is, VSW = VDD. Therefore, regardless of whether the charger CH1 is connected or not, the boosted voltage VCP generated by the boost circuit 6 is expressed by the following equation.

[0031] VCP = VDD + VSW = VDD + VDD = 2 × VDD

[0032] At this time, the drive circuit 7 outputs high-level (=VCP) control signals COUT and DOUT to the gates of the charge control FET 14 and the discharge control FET 15, respectively, turning on both the charge control FET 14 and the discharge control FET 15.

[0033] (B) On the other hand, when charging a zero-volt battery, that is, when the battery voltage VDD is below the over-discharge detection threshold Vthe, the over-discharge detection circuit 2 is in the "over-discharge detected" state and outputs an L-level detection signal S2. Therefore, the drive circuit 7 outputs an L-level (=VSS) control signal DOUT to the gate of the discharge control FET 15, thereby turning off the discharge control FET 15. The switch circuit 3 turns off switch 5 and on switch 4, and the charger voltage VP + The output voltage VSW is output as VSW. That is, VSW = VP + This is the result.

[0034] When charger CH1 is not connected, the discharge control FET 15 is off, and the discharge path from secondary battery B1 is blocked, resulting in a positive terminal voltage VP at positive terminal 13. + The voltage is pulled down to the ground voltage VSS by the system load RL. That is, VSW = VSS (= 0V). Here, since the boost circuit 6 uses the output voltage VSW as the power supply voltage, it does not perform a boost operation in this case, and does not supply a boost voltage VCP to the drive circuit 7 that would drive the charge control FET 14 ON, so the charge control FET 14 is driven OFF.

[0035] On the other hand, when charger CH1 is connected, the positive electrode voltage VP + This is equal to the output voltage of charger CH1. Therefore, the charger output voltage VP + =VSW. The boost circuit 6 uses the output voltage VSW as the power supply voltage to perform a boost operation, and the drive circuit 7 outputs a high-level (=VCP) control signal COUT to the gate of the charge control FET 14, turning on the charge control FET 14 and making the charge path conduction, thereby enabling charging of the zero-volt battery. Here, the boosted voltage VCP generated by the boost operation of the boost circuit 6 is expressed by the following equation.

[0036] VCP = VDD + VSW = VDD + VP +

[0037] Here, if we let Vgs be the gate-source voltage of the charge control FET 14, and Vth be the gate-source voltage of the charge control FET 14 required to drive the supply current of the charger CH1, then the difference voltage (Vg-Vs) between the gate voltage Vg and source voltage Vs of the charge control FET 14 is expressed by the following equation.

[0038] Vg-Vs =COUT-VDD =(VDD+VP + )-VDD =VP +

[0039] Here, the condition for charging to be possible is Vgs ≥ Vth, i.e., P + The result is ≥Vth.

[0040] Figure 3 is a timing chart showing the voltages after the charger connection in the secondary battery protection circuit according to Conventional Example 2. Figure 4 is a timing chart showing the voltages after the charger connection in the secondary battery protection circuit 16 of Figure 1. The timing charts during charging of a zero-volt battery in Conventional Example 2 and Embodiment 1 will be described below with reference to Figures 3 and 4.

[0041] In the secondary battery protection circuit according to Conventional Example 2, when a charger is connected to a secondary battery near zero volts, a potential difference is generated between the positive terminal 13 and the negative terminal 12 until the voltage satisfies the output voltage condition of the charger that enables charging. Specifically, the gate-source voltage Vgs of the charge control FET 14 is expressed by the following equation.

[0042] Vgs = COUT - VDD

[0043] Here, the control signal voltage COUT is expressed by the following equation (Figure 3). COUT=VP +

[0044] Therefore, the following equation holds.

[0045] Vons=VP + -VDD

[0046] If Vth is the gate-source voltage of the charge control FET 14 required to drive the supply current of charger CH1, then the condition for enabling charging is Vgs ≥ Vth, so VP + -VDD ≥ Vth, which means VP + The equation becomes ≥VDD + Vth (Figure 3).

[0047] In the secondary battery protection circuit 16 according to Embodiment 1, if the gate-source voltage of the charge control FET 14 is Vgs and the gate-source voltage of the charge control FET 14 required to drive the supply current of the charger CH1 is Vth, then it can be expressed by the following equation.

[0048] COUT=VCP=VDD+VSW=VDD+VP +

[0049] Therefore, it can be expressed by the following equation.

[0050] Vgs = COUT - VDD = (VDD + P + )-VDD=P +

[0051] Here, the condition for charging to be possible is Vgs > Vth, that is, P + ≥Vth This is the result (Figure 4). As is clear from Figure 4, unlike the conventional example 2, it does not depend on the battery voltage VDD, and as a result, it is charged at a lower charger voltage than the conventional example 2. On the other hand, the charging start condition when the VDD voltage rises as charging progresses further can be expressed by the following equation, where Vf is the forward voltage of the body diode 11 of the discharge control FET 15 and Vds is the drain-source voltage of the charge control FET.

[0052] VP + ≥VDD+Vds+Vf

[0053] To meet this condition, charger CH1 has a positive electrode voltage VP + CC charging is performed by increasing the voltage. In the conventional example 2 in Figure 3, the positive electrode voltage VP increases as the battery voltage VDD rises immediately after the start of charging. + The voltage rises. In contrast, in Embodiment 1 of Figure 4, the positive electrode voltage VP rises during a predetermined time period after the start of charging. + Because there is a period of time during which the voltage does not rise, charging can be maintained at a lower charger voltage than in conventional example 2.

[0054] As explained above, according to Embodiment 1, as is clear from Figure 4, by charging the secondary battery B1 near zero volts with a charger voltage lower than conventional methods, heat loss can be reduced compared to conventional techniques.

[0055] (Embodiment 2) Figure 5A is a circuit diagram showing an example configuration of the battery pack BP2 and its peripheral circuitry according to Embodiment 2 of the present invention, and Figure 5B is a block diagram showing an example configuration of the switch circuit 3 and boost circuit 6 in Figure 5A. The battery pack BP2 in Figure 5A differs from the battery pack BP1 in Figure 1 in the following respects. (1) Instead of the secondary battery protection circuit 16, a secondary battery protection circuit 16A is provided, which further includes a voltage detection circuit 1. (2) Instead of the secondary battery protection device 20, a secondary battery protection device 20A equipped with a secondary battery protection circuit 16A is provided. (3) The boost circuit 6 is equipped with a control circuit 6B instead of control circuit 6A. The differences are explained below.

[0056] In Figure 5A, the voltage detection circuit 1 is positive electrode voltage VP + The voltage detection circuit 1 compares the positive electrode voltage VP with a predetermined voltage threshold Vthd to generate a detection signal S1, which is the comparison result signal. + If the voltage threshold Vthd is greater than or equal to the above-mentioned voltage threshold, it is determined that the boost circuit 6 is in a state where it can operate normally, and a detection signal S1 at the H level is output to the drive circuit 7. On the other hand, the voltage detection circuit 1 detects the positive electrode voltage VP + If the voltage threshold Vthd is below a predetermined threshold, it is determined that the boost circuit 6 is not in a state where it can operate normally, and a detection signal S1 at an L level is output to the drive circuit 7. Here, the voltage threshold Vthd is set higher than the minimum operating voltage of the boost circuit 6.

[0057] Furthermore, in Figures 5A and 5B, the control circuit 6B of the boost circuit 6 operates the boost circuit 6 in response to the H-level detection signal S1 from the voltage detection circuit 1, but stops the boost operation of the boost circuit 6 in response to the H-level detection signal S2 (over-discharge detection signal) and L-level detection signal S1 from the over-discharge detection circuit 2. The detection signal S1 from the voltage detection circuit 1 is also output to the drive circuit 7, which notifies the driver of the cessation of the boost operation of the boost circuit 6.

[0058] The effects of further including the "voltage detection circuit 1" in the embodiment 2 configured as described above will be explained below.

[0059] When the over-discharge detection circuit 2 detects the "over-discharge" state of secondary battery B1, the discharge control FET 15 is turned off and the discharge from secondary battery B1 stops, the positive electrode voltage VP + and negative electrode voltage VP - The voltage between them is pulled down to 0V by the system load RL. When charger CH1 is connected, the positive terminal voltage VP + The voltage gradually increases from 0V. At this time, in order to charge the zero-volt battery, switch 5 of switch circuit 3 is turned off and switch 4 is turned on to change the positive electrode voltage VP + When the output voltage VSW is supplied as the power supply voltage for the boost circuit 6, the positive electrode voltage VP + If the boost circuit 6 is started during the period when the voltage drops from 0V to the minimum operating voltage of the boost circuit 6 (a period when the boost circuit 6 is not in a state where it can operate normally), it is expected that a malfunction or shoot-through current may occur depending on the configuration of the boost circuit 6.

[0060] Therefore, in Embodiment 2, the positive electrode voltage VP + When the voltage is below the minimum operating voltage of the boost circuit 6 (a period when the boost circuit 6 is not in a state where it can operate normally), the boost circuit 6 is controlled to stop. As a result, the positive electrode voltage VP + This prevents the boost circuit 6 from starting when the voltage is below its minimum operating voltage, thus preventing malfunction of the boost circuit 6 or the occurrence of a shoot-through current. Similarly, even in cases where a charger CH1 that outputs an abnormally low voltage due to a malfunction is connected and a voltage below the minimum operating voltage of the boost circuit 6 is continuously applied to the positive terminal 13, the voltage detection circuit 1 remains in a "not detected" state, outputs an L-level detection signal S1, and stops the boost circuit 6, thereby preventing malfunction of the boost circuit 6 or the occurrence of a shoot-through current.

[0061] Furthermore, the secondary battery protection circuit 16A according to Embodiment 2 has the same effects and advantages as the secondary battery protection circuit 16 according to Embodiment 1.

[0062] (Embodiment 3) Figure 6 is a circuit diagram showing an example configuration of the battery pack BP3 and its peripheral circuitry according to Embodiment 3 of the present invention. The battery pack BP3 in Figure 6 differs from the battery pack BP2 in Figure 2 in the following respects. (1) Instead of the secondary battery protection circuit 16A, a secondary battery protection circuit 16B is provided, which further includes a clamp circuit 8. (2) The secondary battery protection device 20A is replaced with a secondary battery protection device 20B equipped with a secondary battery protection circuit 16B. The differences are explained below.

[0063] In Figure 6, the clamp circuit 8 has a positive voltage VP. + and negative electrode voltage VP - The voltage between (=VSS) and the switch 3 is clamped to a constant clamp voltage VCL that is below the withstand voltage of switches 4 and 5 and the boost circuit 6, and output to one end of switch 4 of the switch circuit 3.

[0064] The effects of further including the "clamp circuit 8" in the embodiment 3 configured as described above will be explained below.

[0065] In Figure 1 or Figure 5A, (1) The over-discharge detection circuit 2 detects that the battery voltage VDD has fallen below the over-discharge threshold Vthe and outputs a detection signal S2 at an L level. (2) Switch 5 of switch circuit 3 is turned off and switch 4 is turned on, and the output voltage VSW is set to the positive voltage VP + With the output displayed, (3) A charger CH1 that outputs a voltage greater than or equal to the voltage threshold Vthd is connected to the positive terminal 13. (4) The voltage detection circuit 1 detects the connection of the charger CH1, (5) While the boost circuit 6 is performing a boost operation and the drive circuit 7 is outputting a high-level (=VCP) control signal COUT to the gate of the charge control FET 14 to turn on the charge control FET 14 and charging the secondary battery B1 which is near zero volts, (6) If the charger CH1 malfunctions for any reason, (7) The output voltage changes abruptly, causing a high voltage P+ When outputting to this, the output voltage VSW becomes a higher voltage. (8) That is, it is assumed that a voltage higher than the withstand voltage will be applied to the switches 4 and 5 and the boost circuit 6 connected to the output voltage VSW, causing the switches 4 and 5 and the boost circuit 6 to be destroyed.

[0066] To solve this problem, it is conceivable to construct switches 4 and 5 and the boost circuit 6 with high-voltage components, but this would result in disadvantages such as increased area, an increase in the number of masks used in the semiconductor manufacturing equipment manufacturing process, and an increase in lead time.

[0067] As described above, according to Embodiment 3, by further including the clamp circuit 8, damage to the switches 4 and 5 and the boost circuit 6 can be avoided.

[0068] Furthermore, since the secondary battery B1 is typically used at 4.2V or less, when the secondary battery protection circuit 16B is constructed using a semiconductor integrated circuit (IC), the protection circuit IC connected only to the battery voltage generally uses elements from a 5V process. Therefore, by setting the clamp voltage VCL from the clamp circuit 8 to 5V or less, the secondary battery protection circuit 16B, including switches 4 and 5 and the boost circuit 6, can be constructed using low-voltage elements from a 5V process, which are commonly used in protection circuit ICs. Thus, the benefits of area saving, reduction in the number of masks, and shortened lead time can be obtained.

[0069] Furthermore, the secondary battery protection circuit 16B according to Embodiment 3 has the same effects and advantages as the secondary battery protection circuits 16 and 16A according to Embodiments 1 and 2.

[0070] In the embodiment 3 shown in Figure 6 above, the voltage detection circuit 1 may be omitted (modified example of embodiment 3).

[0071] (Embodiment 4) Figure 7 is a circuit diagram showing an example configuration of the battery pack BP4 and its peripheral circuitry according to Embodiment 4 of the present invention. The battery pack BP4 in Figure 7 differs from the battery pack BP3 in Figure 6 in the following respects. (1) The secondary battery protection circuit 16C is provided in place of the secondary battery protection circuit 16B, with the insertion position of the clamp circuit 8 changed. The clamp circuit 8 is inserted between the positive terminal 13 and one end of the voltage detection circuit 1 and the switch 4 of the switch circuit 3. (2) The secondary battery protection device 20C, which is equipped with a secondary battery protection circuit 16C, is provided instead of the secondary battery protection device 20B. The differences are explained below.

[0072] In Figure 7, the clamp circuit 8 has a positive voltage VP. + and negative electrode voltage VP - The voltage between (=VSS) and the switch is clamped, and a constant clamp voltage VCL, which is below the withstand voltage of switches 4, 5 and the boost circuit 6, is output to one end of switch 4 of switch circuit 3 and to voltage detection circuit 1. The voltage detection circuit 1 generates an H-level detection signal S1 and outputs it to the drive circuit 7 if the clamp voltage VCL is equal to or greater than the voltage threshold Vthd, while generating an L-level detection signal S1 and outputting it to the drive circuit 7 if the clamp voltage VCL is less than the voltage threshold Vthd.

[0073] According to Embodiment 4 configured as described above, as shown in Figure 7, by arranging the voltage detection circuit 1 after the clamp circuit 8 and monitoring the clamp voltage VCL from the clamp circuit 8, it becomes possible to configure the voltage detection circuit 1 with a low voltage rating of 5V, thereby obtaining the advantages of space saving, reduction in the number of masks, and shortening of lead time.

[0074] Furthermore, the secondary battery protection circuit 16C according to Embodiment 4 has the same effects and advantages as the secondary battery protection circuits 16, 16A to 16B according to Embodiments 1 to 3.

[0075] (Embodiment 5) Figure 8A is a circuit diagram showing an example configuration of the battery pack BP5 and its peripheral circuitry according to Embodiment 5 of the present invention. The battery pack BP5 in Figure 8A differs from the battery pack BP4 in Figure 7 in the following respects. (1) Instead of the secondary battery protection circuit 16C, a secondary battery protection circuit 16D is provided, which further includes a voltage detection circuit 17. The voltage detection circuit 17 is inserted between the positive terminal 13 and the clamp circuit 8 and the voltage detection circuit 1. (2) Instead of the secondary battery protection device 20C, a secondary battery protection device 20D equipped with a secondary battery protection circuit 16D is provided. The differences are explained below.

[0076] In Figure 8A, the voltage detection circuit 17 is the positive electrode voltage VP, which is the charger voltage. + This is a charger voltage monitoring circuit that monitors the voltage, and has a voltage threshold Vthf set higher than the voltage threshold Vthd of the voltage detection circuit 1. The voltage detection circuit 17 monitors the positive electrode voltage VP + By comparing this with a voltage threshold Vthf, a so-called "high voltage" is detected, and a detection signal S17, which is the comparison result signal, is generated as follows. (A) Voltage detection circuit 17 detects positive voltage VP + When the voltage exceeds the voltage threshold Vthf, a detection signal S17 at the high level (=VCL) is generated and output to the voltage detection circuit 1. (B) On the other hand, the voltage detection circuit 17 detects the positive electrode voltage VP + If the voltage is below the voltage threshold Vthf, a detection signal S17 at L level (=VSS) is generated and output to the voltage detection circuit 1.

[0077] The voltage detection circuit 1 generates a low-level (=VSS) detection signal S1 in response to the high-level detection signal S17 and outputs it to the control circuit 6B of the drive circuit 7 and the boost circuit 6. Meanwhile, the voltage detection circuit 1 also generates a positive electrode voltage in response to the low-level detection signal S17. VP + If the voltage is above the voltage threshold Vthd, a detection signal S1 at the H level (=VCL) is generated and output to the control circuit 6B of the drive circuit 7 and the boost circuit 6, and the positive electrode voltage VP + If the voltage is below the voltage threshold Vthd, a detection signal S1 at L level (=VSS) is generated and output to the control circuit 6B of the drive circuit 7 and the boost circuit 6.

[0078] Next, the effects of the voltage detection circuit 17 according to Embodiment 5 will be described below.

[0079] In Conventional Example 2 and Embodiments 1-4, when a charger CH1 that outputs a relatively high voltage is connected between the positive terminal 13 and the negative terminal 12 to a secondary battery B1 that is near zero volts, the positive terminal VP + Because the potential difference between the charger voltage and the battery voltage VDD is large, an inrush current flows into the secondary battery B1, which can cause damage to the secondary battery B1 or even ignition. To solve this problem, a voltage detection circuit 17 is further provided.

[0080] In Figure 8A, by further including the voltage detection circuit 17, when the charger CH1, which outputs a relatively high voltage above the voltage threshold Vthf, is connected between the positive terminal 13 and the negative terminal 12, the voltage detection circuit 17 generates an H-level (=VCL) detection signal S17 and outputs it to the voltage detection circuit 1. In response to the H-level detection signal S17, the voltage detection circuit 1 generates an L-level (=VSS) detection signal S1 and outputs it to the control circuit 6B of the drive circuit 7 and the boost circuit 6. Consequently, the boost circuit 6 does not perform a boost operation, and the drive circuit 7 outputs an L-level control signal COUT to the gate of the charge control FET 14, turning off the charge control FET 14 and blocking the charging path. As a result, charging of the secondary battery B1 near zero volts is not started, so no inrush current flows into the secondary battery B1, thus avoiding damage to the secondary battery B1 or ignition.

[0081] Furthermore, the secondary battery protection circuit 16D according to Embodiment 5 has the same effects and advantages as the secondary battery protection circuits 16, 16A to 16C according to Embodiments 1 to 4.

[0082] (Embodiment 6) Figure 8B is a circuit diagram showing an example configuration of a battery pack BP6 and its peripheral circuitry according to Embodiment 6 of the present invention. The battery pack BP6 in Figure 8B differs from the battery pack BP5 in Figure 8A in the following respects. (1) Voltage detection circuit 17 detects positive voltage VP +Instead, the clamp voltage VCL from the clamp circuit 8 is detected. (2) Instead of the secondary battery protection device 20D having a secondary battery protection circuit 16D, a secondary battery protection device 20E equipped with a secondary battery protection circuit 16E is provided. The differences are explained below.

[0083] In Figure 8B, the voltage detection circuit 17 receives the positive electrode voltage VP from the clamp circuit 8 via the clamp voltage VCL. + This is a charger voltage monitoring circuit that monitors the voltage, and has a voltage threshold Vthf set higher than the voltage threshold Vthd of the voltage detection circuit 1. At this time, the voltage detection circuit 17 detects the positive electrode voltage VP based on the clamp voltage VCL from the clamp circuit 8. + In order to detect when the voltage exceeds the voltage threshold Vthf, the clamp voltage from the clamp circuit 8 is set higher than Vthf. The voltage detection circuit 17 detects the so-called "high voltage" by comparing the clamp voltage VCL with the voltage threshold Vthf, and generates the detection signal S17, which is the comparison result signal, as follows. (A) When the clamp voltage VCL becomes equal to or greater than the voltage threshold Vthf, the voltage detection circuit 17 generates a detection signal S17 at the H level (=VCL) and outputs it to the voltage detection circuit 1. (B) On the other hand, if the clamp voltage VCL is less than the voltage threshold Vthf, the voltage detection circuit 17 generates a detection signal S17 at L level (=VSS) and outputs it to the voltage detection circuit 1.

[0084] The secondary battery protection circuit 16E according to Embodiment 6, configured as described above, has the same effects and advantages as the secondary battery protection circuit 16D according to Embodiment 5, except for the voltage detected by the voltage detection circuit 17.

[0085] (modified version) In the embodiments described above, the over-discharge detection circuit 2 detects over-discharge of the secondary battery B1. However, the present invention is not limited to this, and may also detect a decrease in the battery voltage at the positive terminal 21 of the secondary battery B1, for example, due to an increase in the current consumption of the secondary battery B1. In other words, the over-discharge detection threshold Vthe may be a threshold for detecting other voltage drops.

[0086] In the embodiments described above, a secondary battery protection circuit, a secondary battery protection device, and a battery pack have been described. However, the present invention is not limited thereto, and a control circuit or control method for a secondary battery protection circuit may be configured, or various modifications may be made, such as combining some or all of another embodiment in one embodiment.

[0087] For example, the charge control FET 14 and the discharge control FET 15 may be arranged with their positions swapped.

[0088] In the embodiments described above, a charge control FET 14 and a discharge control FET 15 are used, but the present invention is not limited to these, and other types of switching elements, such as a bipolar transistor (which has a control terminal as its base), may be used for each. [Explanation of Symbols]

[0089] 1. Voltage detection circuit 2. Over-discharge detection circuit 3 Switch Circuit 3A control circuit 4,5 switches 6. Boost Circuit 6A, 6B control circuit 6a~6d Switch 7. Drive Circuit 8. Clamp Circuit 9. Control circuits 10,11 Body Diode 12 Negative terminal 13 Positive terminal 14 Charging control FET 15 Discharge-controlled FET 16,16A~16E Secondary battery protection circuit 17 Voltage detection circuit 20,20A~20E Secondary battery protection device 21 Positive terminal 22 Negative terminal B1 secondary battery BP1~BP6 Battery Pack C1 Capacitor CH1 charger RL System Load

Claims

1. A secondary battery protection circuit that protects the secondary battery by using a charge control switch element and a discharge control switch element inserted between the positive terminal of the secondary battery and the high-potential terminals of the load and charger and connected in series with each other, A first voltage detection circuit for detecting whether the battery voltage of the secondary battery is less than a predetermined first threshold, A switch circuit that outputs an output voltage which is the high potential voltage of the charger when it detects a voltage below the first threshold, and outputs an output voltage which is the battery voltage when it does not detect a voltage below the first threshold, A boost circuit that boosts the battery voltage using the output voltage of the switch circuit and outputs it, A drive circuit controls the following to turn on only the charge control switch element by outputting the output voltage of the boost circuit to the control terminal of the charge control switch element when it is detected that the voltage is below the first threshold, while turning on only the charge control switch element when it is not detected that the voltage is below the first threshold by outputting the output voltage of the boost circuit to the respective control terminals of the charge control switch element and the discharge control switch element, A secondary battery protection circuit equipped with this feature.

2. The secondary battery protection circuit further, The charger is equipped with a second voltage detection circuit that detects a state in which the boost circuit can operate normally, where the voltage at the high-potential terminal of the charger is above a predetermined second threshold that is higher than the minimum operating voltage of the boost circuit. The second voltage detection circuit operates the boost circuit when it detects that the boost circuit is in a state where it can operate normally, while stopping the operation of the boost circuit when it detects that the voltage is below the first threshold and that the boost circuit is not in a state where it can operate normally. The secondary battery protection circuit according to claim 1.

3. The secondary battery protection circuit further, The system includes a first clamping circuit that clamps the high potential voltage of the charger to a predetermined clamping voltage and outputs the clamping voltage to the switch circuit in place of the high potential voltage of the charger. The secondary battery protection circuit according to claim 1 or 2.

4. The secondary battery protection circuit further, The system includes a second clamping circuit that clamps the high potential voltage of the charger to a predetermined clamping voltage and outputs the clamping voltage to the switch circuit and the second voltage detection circuit in place of the high potential voltage of the charger. The secondary battery protection circuit according to claim 2.

5. The secondary battery protection circuit further, The charger includes a third voltage detection circuit that detects a high voltage where the voltage at the high-potential terminal is greater than or equal to a predetermined third threshold that is higher than the second threshold, The third voltage detection circuit stops the operation of the boost circuit when it detects the high voltage. The secondary battery protection circuit according to claim 2 or 4.

6. The secondary battery protection circuit further, The circuit includes a third voltage detection circuit that detects a high voltage where the clamp voltage is greater than or equal to a predetermined third threshold that is higher than the second threshold, The third voltage detection circuit stops the operation of the boost circuit when it detects the high voltage. The secondary battery protection circuit according to claim 4.

7. A secondary battery protection circuit according to claim 1 or 2, The aforementioned charge control switch element, The discharge control switch element, Equipped with, Secondary battery protection device.

8. A secondary battery protection circuit according to claim 1 or 2, The aforementioned secondary battery, The aforementioned charge control switch element, The discharge control switch element, Equipped with, Battery pack.

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