Signal coding system and method

Abstract

To provide efficient data transmission systems and methods that reduce signal loss.SOLUTION: In a system, an encoder 600 comprises: a transition encoder 502 configured to receive a first data signal 508 and generate a first stream 512 of first bits based on the first data signal; a bit generator 604 configured to receive a second data signal 510 and generate a second stream 614 of second bits based on the second data signal; and a PAM4 transmitter 506 configured to receive the first stream of first bits and the second stream of second bits, and generate PAM4 (pulse-amplitude_modulation_4-level) symbols based on at least the first stream of first bits.SELECTED DRAWING: Figure 6

Description

Technical Field

[0004]

[0001] The present invention relates to a signal encoding system and method, and more particularly, to encoding of pulse amplitude modulation 4-level (PAM4) compatible with transition encoding.

Background Art

[0002] Transition encoding is widely used in signal processing devices that transmit a large amount of data to a receiving end via a channel. This is particularly useful for signals in which a clock signal is inserted into a data signal. Examples of the use of transition encoding include large display devices such as televisions. As the size of the television increases, the signal has to travel a longer distance, and one of the problems with long-distance signal transmission is signal loss. Therefore, there is a need for a more efficient technique that can minimize loss and transmit more data in a shorter time.

Summary of the Invention

Problems to be Solved by the Invention

[0003] The problem to be solved by the present invention is to present an efficient data transmission system and method that reduces signal loss.

Means for Solving the Problems

[0004] A system according to an embodiment of the present invention includes a first encoder that receives a first input bit and generates a first stream of first bits based on the first input bit, a bit generator that receives a second input bit and generates a second stream of second bits based on the second input bit, and a PAM4 transmitter that receives the first stream of first bits and the second stream of second bits and generates PAM4 (Pulse Amplitude Modulation 4) symbols based at least on the first stream of first bits.

[0005] The first encoder can apply transition encoding to the first input bits to generate a first stream of the first bits.

[0006] The first stream of the first bit can correspond to the MSB (most significant bits) of the PAM4 symbol generated by the PAM4 oscillator.

[0007] The generation of the PAM4 symbol is also based on the second stream of the second bit, and the second stream of the second bit can correspond to the LSB (least significant bits) of the PAM4 symbol.

[0008] The second stream of the second bit can be generated by applying transition coding to the second input bit.

[0009] The bit generator can generate a second stream of the second bit by inserting a padding bit into the second input bit.

[0010] The first stream of first bits generated by the first encoder may include a transition key and encoded data bits.

[0011] The first encoder can generate the encoded data bits by performing an exclusive OR (XOR) operation on the transition key and the first input bit.

[0012] The second stream of the second bit generated by the bit generator may include the transition key and the second input bit.

[0013] The first stream of the first bit generated by the first encoder may include half the number of bits, including the transition key and the encoded data bits, and the second stream of the second bit generated by the bit generator may include half the number of bits, including the transition key and the second input bits.

[0014] Each of the PAM4 symbols can correspond to one bit from the first stream for the first bit and one bit from the second stream for the second bit.

[0015] A method according to one embodiment of the present invention includes the steps of: generating a first stream of first bits based on first input bits supplied to the first encoder by a first encoder; generating a second stream of second bits based on second input bits supplied to the bit generator by a bit generator; and generating a PAM4 symbol based on at least the first stream of first bits received by the PAM4 transmitter by a PAM4 transmitter.

[0016] The step of generating the first stream of the first bit may include the step of applying transition encoding to the first input bit.

[0017] The first stream of the first bit can correspond to the MSB (most significant bits) of the PAM4 symbol generated by the PAM4 oscillator.

[0018] The step of generating the PAM4 symbol is also based on the second stream of the second bit, and the second stream of the second bit can correspond to the LSB (least significant bits) of the PAM4 symbol generated by the PAM4 oscillator.

[0019] The step of generating the second stream of the second bit may include the step of applying transition coding to the second input bit.

[0020] The step of generating the second stream of the second bit may include the step of generating a padding bit and the step of inserting the padding bit into the second input bit.

[0021] The first stream of first bits generated by the first encoder may include a transition key and encoded data bits.

[0022] The step of generating the first stream of the first bit may further include the step of performing an exclusive OR operation on the transition key and the first input bit.

[0023] The second stream of the second bit generated by the bit generator may include the transition key and the second input bit.

[0024] The first stream of the first bit generated by the first encoder may include half the number of bits, including the transition key and the encoded data bits, and the second stream of the second bit generated by the bit generator may include half the number of bits, including the transition key and the second input bits.

[0025] A transition-encoded compatible PAM4 encoder according to an embodiment of the present invention receives a first input bit and generates a first stream of first bits that are transition-encoded based on the first input bit, a first transition encoder; a bit generator that receives a second input bit and generates a second stream of second bits based on the second input bit; and a PAM4 transmitter that receives the first stream of first bits and the second stream of second bits and generates PAM4 symbols, wherein the most significant bit (MSB) of the PAM4 symbol is based on the first stream of first bits, and the least significant bit (LSB) of the PAM4 symbol is based on the second stream of second bits.

Advantages of the Invention

[0026] By using a consistent embodiment of the present invention, signal loss can be reduced and data can be transmitted efficiently.

Brief Description of the Drawings

[0027] [Figure 1] An example of a transition-encoded NRZ-encoded data signal according to an embodiment of the present invention is shown. [Figure 2] Possible transitions in a PAM4-encoded signal according to an embodiment of the present invention are shown. [Figure 3] Eight possible transitions crossing the 0 threshold in a PAM4 encoding method according to an embodiment of the present invention are shown. [Figure 4] Possible transitions shown in FIG. 3 separated into different categories according to an embodiment of the present invention are shown. [Figure 5] FIG. 27 is a block diagram showing an example of an encoder that performs a PAM4 transition encoding method according to an embodiment of the present invention. [Figure 6] FIG. 30 is a block diagram showing an example of an encoder that performs a PAM4 transition encoding method according to another embodiment of the present invention. [Figure 7]This is a flowchart showing a method for performing PAM4-encodeable transition coding according to one embodiment of the present invention. [Modes for carrying out the invention]

[0028] Embodiments of the present invention and their advantages can be best understood from the following detailed description. Unless otherwise specified, the same reference numerals in the drawings and throughout the specification refer to the same components, and therefore the description will not be repeated. In addition, parts, layers, regions, etc., in the drawings may be exaggerated for clarity.

[0029] Embodiments of the present invention will be described in detail below with reference to the attached drawings. However, the present invention can be realized in various different forms and is not limited to the embodiments described herein. Providing such embodiments will make the detailed description of the invention complete and comprehensive and will fully demonstrate various aspects and features of the invention to those skilled in the art. Therefore, processes, apparatus, techniques, etc. that are not necessary for those skilled in the art to fully understand the various aspects and features of the present invention will be omitted from the description.

[0030] NRZ (non-return-to-zero) is a coding scheme that uses a digital signal that varies between two voltage levels, for example, -1V and +1V. In this example, -1V can be represented by a symbol such as the binary number 0, and +1V can be represented by the binary number 1. Therefore, an NRZ coded data signal can contain a symbol sequence consisting of 1s and 0s.

[0031] Transition encoding is an encoding scheme that takes input data and outputs encoded data with a limited run-length (e.g., a limited run of consecutive zeros and a limited run of consecutive ones). In other words, transition encoding generates a limited run-length data stream by encoding the input data such that the output data has at least one "transition" (e.g., data transitions or changes from 1 to 0, or from 0 to 1). Some transition encoding schemes use an input data transformation key. For example, an encoder can add a key (e.g., a transition key) to a data signal string and encode the data signal based on the key. Therefore, a decoder that receives a transition-encoded data signal can decode the data signal using the key.

[0032] Figure 1 shows an example of a data signal encoded by a transition coding scheme according to one embodiment of the present invention. According to one embodiment of the present invention, a key (e.g., KEY1) can be generated for each specific number of data bits (e.g., DATA1-DATA31). In the example shown in Figure 1, a unique key can be generated for each of the 31 6-bit data sets. According to one embodiment of the present invention, the key can further include 6 bits, and an exclusive OR (XOR) operation can be performed on the key and each of the 31 data sets. In other words, transition coding data can be generated by applying an exclusive OR operation to a 6-bit key and 6-bit data [e.g., the first set of the 31 data sets, DATA1]. The exclusive OR operation is then applied to all 31 data sets with the same key, such as applying the exclusive OR operation to the second set of the 31 data sets, DATA2, with the same key. Therefore, 186-bit (i.e., 31 sets × 6-bit) transition coding data can be generated based on the key, and the key can be inserted into the data stream for transmission. In the example shown in Figure 1, the key precedes the data bits.

[0033] The same process can be repeated for the next 31 (6-bit) data sets to generate other unique keys (e.g., KEY2), and these keys can be exclusively ORed with each of the next 31 (6-bit) data sets to generate other transition-coded data streams. Thus, although this data stream contains a total of 192 bits, 186 of which are transition-coded data bits and 6 bits are key bits, resulting in an overhead of approximately 3%. In the above embodiment, a data stream containing a key with 6 bits and 31 data sets was used for the explanation, but it should be noted that in other embodiments, the key may consist of more or less a number of bits, and the data stream may consist of more or less a number of data sets. Therefore, such transition coding techniques can be used, for example, in high-speed serial links in televisions. Thus, there is a need for a more efficient data transmission method that can reduce signal loss over lossy channels.

[0034] Pulse-amplitude modulation 4-level (PAM4) is an encoding scheme for digital signals that vary between four voltage levels, such as -3V, -1V, +1V, and +3V. Because PAM4 has four levels, it can transmit more data through a channel in a given time than NRZ encoding. For example, while NRZ encoding, which uses only two voltage levels, represents each voltage level with one bit, PAM4 has four levels, so each voltage level can be represented with two bits (e.g., 00, 01, 11, 10).

[0035] Figure 2 shows possible transitions in a PAM4 encoded signal that can transition between four different voltage levels. Thus, by applying a transition coding scheme to a PAM4 encoded signal in a manner similar to how transition coding was applied to an NRZ encoded signal as described above with reference to Figure 1, a more efficient encoding scheme can be obtained.

[0036] When considering possible transitions in a PAM4 encoded signal, transitions can be categorized into major transitions, where the voltage changes from the highest voltage level to the lowest voltage level or vice versa (e.g., from +3V to -3V, or from -3V to +3V); minor transitions, where the voltage changes to the next highest or next lowest level (e.g., from +3V to +1V, +1V to +3V, +1V to -1V, -1V to +1V, -1V to -3V, or -3V to -1V); and intermediate transitions, where the transition voltage difference is greater than a minor transition but smaller than a major transition (e.g., from +3V to -1V, -1V to +3V, +1V to -3V, or -3V to +1V). Of the 12 distinct transitions that can exist in a PAM4 encoding scheme, only four of the minor transitions do not pass through the zero threshold during the transition. Therefore, by ensuring that large transitions and intermediate transitions occur periodically, signals can be generated that can be detected by a slicer that monitors the zero threshold [e.g., a crossing slicer]. Consequently, the cost of adding a slicer for monitoring small transitions to the receiver can be eliminated, thereby providing a relatively inexpensive receiver.

[0037] Embodiments of the present invention relate to an encoding method that provides transitions (e.g., large transitions or intermediate transitions) that cross a zero threshold, enabling a clock regeneration process targeting such transitions in a data signal to extract a clock signal from the data signal. The examples of PAM4 transition voltages shown in Figure 2 are -3V, -1V, +1V, and +3V, but it should be noted that the actual transition voltages can be substituted with any of the four different transition voltages, for example, -5V, -2V, +2V, +5V or +1V, +2V, +3V, +4V, etc.

[0038] Figure 3 shows eight transitions that cross the zero threshold in the PAM4 coding scheme. According to one embodiment of the present invention, a 2-bit binary symbol can be assigned to each voltage level (e.g., -3V, -1V, +1V, +3V). For example, the +3V level can be assigned the symbol 10, the +1V level the symbol 11, the -1V level the symbol 01, and the -3V level the symbol 00. Therefore, when a data signal transitions from one level to another and crosses the zero threshold, the MSB (most significant bit) of the 2-bit code always changes. In other words, if the voltage level transitions from, for example, +3V to -1V, the 2-bit code changes from 10 to 01, and the MSB changes from 1 to 0. Similarly, if the voltage level transitions from -3V to +3V, the 2-bit code changes from 00 to 10, and the MSB changes from 0 to 1. Therefore, all transitions shown in Figure 3 intersect the 0 threshold and go through a change in the MSB of the 2-bit symbol.

[0039] Figure 4 shows that the transitions shown in Figure 3 are separated into different categories. For the purposes of the present invention, Type 1 transitions are transitions in which the voltage level transitions from a positive voltage potential to the corresponding negative voltage potential, or from a negative voltage potential to the corresponding positive voltage potential. For example, the voltage level can transition from +3V to -3V, from -3V to +3V, from +1V to -1V, or from -1V to +1V. Type 2 transitions are transitions in which the polarity of the voltage level does not change, and thereby the transition does not cross the 0 threshold. For example, the voltage level can transition from +3V to +1V, from +1V to +3V, from -3V to -1V, or from -1V to -3V. Type 3 transitions are transitions in which the voltage level transitions from a positive voltage potential to another negative voltage potential, or from a negative voltage potential to another positive voltage potential. For example, the voltage level can transition from +3V to -1V, from -1V to +3V, from -3V to +1V, or from +1V to -3V.

[0040] Therefore, all transitions in the categories of Type 1 and Type 3 result in a change in the MSB of the 2-bit code, whereas transitions in the category of Type 2 maintain the same MSB of the 2-bit code. Thus, applying transition coding to the MSB of the 2-bit code to produce an MSB transition should result in a transition that crosses the 0 threshold. An oscillator that provides such a transition can be used with a receiver that includes one or more slicers that monitor the 0V threshold, but does not necessarily include slicers that monitor other thresholds. Thus, the described oscillator is compatible with less complex receivers. According to one embodiment of the present invention, the LSB (also known as the least significant bit) of the 2-bit code can be ignored. Furthermore, according to another embodiment of the present invention, transition coding of the MSB can be applied to the LSB of the 2-bit code to detect errors / errors, which will be described in detail later with reference to Figure 6.

[0041] Figure 5 is a block diagram showing an example of an encoder 500 performing a PAM4 transition coding scheme according to one embodiment of the present invention. The encoder 500 includes two transition encoders 502 and 504 connected in parallel, each of which applies transition coding to an input signal and outputs an NRZ data stream. According to one embodiment of the present invention, the output NRZ data stream further includes the key described above. The PAM4 transmitter 506 can convert the NRZ data stream into a PAM4 data stream and transmit it to a receiver.

[0042] According to one embodiment of the present invention, a first data signal 508 is provided to a first transition encoder 502. The first transition encoder 502 applies transition coding to the first data signal 508 to generate a first stream 512 of first bits. Transition coding limits the run length of repeating values ​​within the first stream 512 of first bits, so that a transition occurs and crosses the 0V threshold. According to one embodiment of the present invention, the first stream 512 of first bits may contain only a stream of NRZ encoded data bits, but according to another embodiment of the present invention, the first stream 512 of first bits may contain data bits and TCD key bits.

[0043] In the illustrated embodiment, the first bit first stream 512 includes 6 bits of overhead (e.g., key bits) for every 186 bits of data, although other encoding efficiencies are possible. According to one embodiment of the present invention, the first transition encoder 502 divides the first data signal 508 into packets, each packet containing 31 sets of 6-bit data. The first transition encoder 502 can then identify 6-bit keys for transformations that, when applied to the 31 sets, result in 31 transformed sets having at least one transition point (e.g., the 31 transformed sets do not contain 000000 or 111111). The first transition encoder 502 can output the 31 transformed sets and 6-bit keys as part of the first bit first stream 512. Thus, one packet in the first bit first stream 512 can contain 192 bits, of which 186 bits are data and 6 bits are overhead. While it is stated that the first transition encoder 502 generates a 192-bit packet having 186 data bits and 6 key bits, it should be noted that the number of bits in the packets generated by the first transition encoder 502 may differ, and the size of the sets (e.g., words) and / or keys contained in the packets may also differ. Furthermore, although the above describes a packet-based transition coding scheme, it should be noted that the first transition encoder 502 can operate using a stream-based transition coding scheme or any other type of transition coding scheme.

[0044] According to one embodiment of the present invention, the encoder 500 further includes a second transition encoder 504. A second data signal 510 is provided to the second transition encoder 504, and the second transition encoder 504 applies transition coding to the second data signal 510 to generate a second stream 514 of second bits. According to one embodiment of the present invention, the second stream 514 of second bits may also be NRZ coded bits. As described above in relation to the first transition encoder 502, the second transition encoder 504 can also be implemented with any kind of transition coding scheme. In the illustrated embodiment, the second stream 514 of second bits includes 6 bits of overhead (e.g., key bits) for every 186 bits of data in the second data signal 510, but other coding efficiencies are also possible. According to one embodiment of the present invention, the first data signal 508 and the second data signal 510 may be the same data signal. According to another embodiment of the present invention, the first data signal 508 and the second data signal 510 may be different signals from each other.

[0045] According to one embodiment of the present invention, a first transition encoder 502 takes a first data signal 508, for example, a 3.875 Gbps signal, and generates a first stream 512 of first bits containing encoded bits. According to one embodiment of the present invention, the first stream 512 of first bits may also contain a key. A second transition encoder 504 takes a second data signal 510, for example, a 3.875 Gbps signal, and generates a second stream 514 of second bits containing encoded bits. According to one embodiment of the present invention, the second stream 514 of second bits may contain other keys. For the purpose of illustrating the embodiment, we can assume that the key for the first stream 512 of first bits is 011011 and the key for the second stream 514 of second bits is 110100. This allows the encoding scheme using a key to limit the run length of both the data bits and the selected key.

[0046] According to one embodiment of the present invention, a first stream 512 of the first bit and a second stream 514 of the second bit, both with limited run length, are supplied in parallel to a PAM4 oscillator 506. The PAM4 oscillator 506 converts the first stream 512 of the first bit and the second stream 514 of the second bit from an NRZ coding scheme to a PAM4 coding scheme that includes four voltage levels. The first stream 512 of the first bit is converted to the MSB of the PAM4 symbol, and the second stream 514 of the second bit is converted to the LSB of the PAM4 symbol. For example, if the key for the first stream 512 of the first bit is 011011 and the key for the second stream 514 of the second bit is 110100, the PAM4 oscillator 506 generates PAM4 symbols 01, 11, 10, 01, 11, 11, which in the example of four voltage levels correspond to voltage levels -1V, +1V, +3V, -1V, +3V, +3V. The transition coding of the first data signal 508 by the first transition encoder 502 limits the run length in the MSB of the symbol transmitted by the PAM4 oscillator 506, so that voltage transitions crossing 0V are provided to the output of the PAM4 oscillator 506. These voltage transitions do not necessarily depend on whether the LSB of the output of the PAM4 oscillator 506 changes or not. Therefore, according to one embodiment of the present invention, the cost and / or complexity of the oscillator can be reduced by omitting the second transition encoder 504 and replacing it with a simpler block such as a bit generator. It should be noted that the same process used in the above example to convert key bits from NRZ to PAM4 can also be used to convert data bits from NRZ to PAM4.

[0047] According to one embodiment of the present invention, the converted PAM4 symbol is transmitted, for example, to a television receiver. Thus, a single 8Gbps PAM4 signal can be generated by encoding two 3.875Gbps digital signals in parallel.

[0048] Figure 6 is a block diagram showing an example of an encoder 600 without a second transition encoder, according to one embodiment of the present invention. Components of the encoder 600 shown in Figure 6 that are identical to those of the encoder 500 in Figure 5 will not be explained again. Instead, only the differences will be explained.

[0049] According to one embodiment of the present invention, the second transition encoder 504 in Figure 5 can be replaced with a bit generator 604 that satisfies, for example, a number of bits equivalent to the number of overhead bits added to the second data signal 510 by the first transition encoder 502. The actual bit values ​​used to satisfy the second data signal 510 are not important, and therefore, as long as the number of padding bits is the same as the number of overhead bits added by the first transition encoder 502, it can be all zeros (000000), all ones (111111), or any other arbitrary value. This is because the second stream 614 of the second bit corresponds to the LSB of the PAM4 symbol and can therefore be ignored. The bit generator 604 must know that it simply inserts the padding bits into the second data signal 510 and does not change the bits of the second data signal 510 as the first transition encoder 502 does with the first data signal 508. Thus, by inserting all zeros, all ones, or arbitrary values, it becomes unnecessary to use an encoder for the second data signal 510, and a simpler and less complex bit generator 604 can be used in place of the encoder, thereby reducing the cost of the oscillator while maintaining alignment between the output of the first transition encoder 502 and the output of the bit generator 604. As described above, the PAM4 oscillator 506 converts the first stream 512 of the first bit into the MSB of the output PAM4 symbol and transmits the PAM4 symbol to the receiver. Since the first transition encoder 502 limits the run length in the MSB, a transition crossing 0V is provided to the output of the PAM4 oscillator 506.

[0050] According to one embodiment of the present invention, the key generated by the first transition encoder 502 can be duplicated and inserted into the second data signal 510 to generate a second stream 614 of the second bit that simply contains the same key as the key for the first bit of the first stream 512. In other words, the data bits of the second data signal 510 do not change or undergo transition encoding, and are simply filled with the key for the second stream 614 of the second bit. Therefore, the alignment of the first stream 512 of the first bit and the second stream 614 of the second bit can be maintained. By duplicating the key generated by the first transition encoder 502 and inserting it into the second data signal 510, key error detection can be performed. For example, according to one embodiment of the present invention, if the PAM4 transmitter 506 receives the first stream 512 of the first bit and the second stream 614 of the second bit and detects that the overhead bits for each stream are not the same, there may be an error in the data stream, and the PAM4 transmitter 506 will not transmit that signal to the receiver. According to another embodiment of the present invention, the receiver detects errors and rejects the input if it detects that the data stream contains errors.

[0051] According to another embodiment of the present invention, the first transition encoder 502 can generate a 6-bit key and perform transition coding on the first data signal 508, but instead of inserting all 6 bits into the first stream 512 of the first bit, it can insert only a portion of the 6 bits (e.g., 3 bits) into the first stream 512 of the first bit. The 3 additional bits (of the total 6 bits generated) can be inserted as padding bits into the second stream 614 of the second bit, thereby reducing the total bit length of both the first stream 512 of the first bit and the second stream 614 of the second bit from 192 bits to 189 bits. In this case, only 3 bits of the 189 bits are overhead, thereby reducing the percentage of overhead bits in each stream.

[0052] According to one embodiment of the present invention, a receiver can take 3 overhead bits from the LSB of the PAM4 symbol and mimic a key for the MSB of the PAM4 symbol. Thus, efficiency is improved. It should be noted that embodiments of the present invention have been described by reference to specific examples such as a data signal containing 31 6-bit data sets, a 6-bit key, etc. However, such specific examples are provided simply as a means of illustrating various embodiments of the present invention and are not intended to limit the invention. Rather, other modifications can be conceived by those skilled in the art. For example, the data may be in the form of packets or data streams, and each data set may be 8-bit, 4-bit, or n-bit in length, or the key may be 8-bit or m-bit in length. Thus, the percentage of overhead bits may also vary.

[0053] Figure 7 is a flowchart showing a method for performing transition coding compatible with PAM4 coding according to one embodiment of the present invention. According to one embodiment of the present invention, a first encoder can receive a first input. For example, the first input bits may be a high-speed (e.g., 3.875 Gbps) packet of data bits or a stream of data bits. The first encoder may be a transition encoder that encodes the received first input bits and generates a first stream of first bits based on the first input bits (702). According to one embodiment of the present invention, the first encoder can generate a first stream of first bits by applying transition coding to the first input bits. According to one embodiment of the present invention, a bit generator can receive a second input bit. According to one embodiment of the present invention, the bit generator may be an encoder such as a transition encoder. However, according to another embodiment of the present invention, the bit generator may be a device that simply generates additional bits. Thus, the bit generator can generate a second stream of second bits based on the second input bit (704). For example, the bit generator can generate padding bits (e.g., bits whose value is not important) to insert or add to the second input bit. According to one embodiment of the present invention, the number of padding bits generated by the bit generator may be the same as the number of key bits generated by the first encoder (as described above with reference to Figure 5). According to one embodiment of the present invention, the PAM4 oscillator can generate a PAM4 symbol based on a first stream of first bits received from at least the first encoder (706). For example, according to one embodiment of the present invention, the first stream of first bits may correspond to the MSB of the generated PAM4 symbol. According to one embodiment of the present invention, the generation of the PAM4 symbol may also be based on a second stream of second bits. In this case, the second stream of second bits may correspond to the LSB of the generated PAM4 symbol. Thus, input NRZ data bits can be transition coded and converted to a PAM4 symbol to improve the efficiency of a high-speed serial link.

[0054] Terms such as "first," "second," and "third" are used for various elements, components, regions, layers, and parts, but these are not limited by such modifiers. Such terms are used to distinguish one element, component, region, layer, or part from other elements, components, regions, layers, and parts. Therefore, the first element, component, region, layer, or part may be the second element, component, region, layer, or part without departing from the spirit and scope of the present invention.

[0055] For the sake of clarity, spatial relation terms such as “bottom,” “below,” and “above” may be used to indicate the relationship between one part or feature and another part or feature shown in the drawing. Such spatial relation terms are intended to indicate the different positions and / or orientations of the device being used or operating as shown in the drawing. For example, a part shown as “bottom” or “below” a part in a drawing will become “above” the device when it is turned upside down. Therefore, for example, “bottom” and “below” can represent both top and bottom. The device may be rotated, for example, by 90 degrees or oriented in another direction, in which case the spatial relation terms must be interpreted accordingly.

[0056] When describing an ingredient or layer as being "on top of" or "connected to" another ingredient or layer, this includes not only cases where it is "directly" on top of or "directly connected," but also cases where other ingredients or layers are sandwiched in between. However, describing it as being "directly on top of" or "directly connected" means that there are no other parts in between. Also, when describing an ingredient or layer as being "between" two other ingredients or layers, it is possible that only that ingredient or layer exists between the two ingredients or layers, but there may also be one or more other ingredients or layers.

[0057] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the invention. Unless otherwise specified, numbers here include both singular and plural cases. The expression "includes" a certain feature, integer, stage, operation, part, component, etc., means that it may also include other features, integers, stages, operations, parts, components, etc., in addition to the part in question. The expression "and / or" includes all combinations of one or more of the listed items. Expressions such as "at least one" preceding a listed item modify the entire list, not each individual item within it.

[0058] Here, "substantially," "about," "generally," and similar expressions are merely approximations and do not indicate "degree," but are used to indicate the inherent error of measured or calculated values ​​known to those skilled in the art. Furthermore, the expression "may be" used when describing embodiments of the present invention means applicable to "one or more embodiments of the present invention." The term "exemplary" refers to examples or drawings. "Use," "utilize," etc., are used similarly with other similar expressions.

[0059] The electronic, electrical devices and / or other related devices or parts described in the embodiments of the present invention can be realized using appropriate hardware, firmware [e.g., application-specific integrated circuit (ASIC)], software, or a combination thereof. For example, the diverse components of these devices may be formed on a single integrated circuit chip, or they may be realized on different integrated circuit chips. Alternatively, the diverse components of these devices can be realized on flexible printed circuit film, tape carrier package (TCP), printed circuit board, etc., or formed on a single substrate. Furthermore, the diverse components of these devices may be processes or threads executable by one or more processors in one or more computer devices that execute computer program instructions to perform the diverse functions described herein and interact with other system elements. The computer program instructions are stored in memory implemented in a computer device using standard memory devices such as RAM (random access memory). In addition, those skilled in the art can combine or integrate the functions of diverse computer devices into a single computer device, or distribute the functions of a particular computer device to one or more other computer devices, without departing from the concepts and scope of the embodiments of the present invention.

[0060] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as those generally known to those skilled in the art in the field to which this invention pertains. Terms such as those defined in commonly used dictionaries should be construed to have the meaning consistent with their meaning in the relevant art and / or herein, and should not be construed in an ideal or overly strict sense unless expressly stated herein.

[0061] The embodiments described above are merely examples. Those skilled in the art will be able to learn of a variety of alternative embodiments from those described herein. Such alternative embodiments are within the scope of the present invention. Thus, the embodiments are limited only by the following claims and their equivalents. [Explanation of symbols]

[0062] 500, 600: Encoder 502, 504: Transition encoder 506: PAM4 Transmitter 508, 510: Data signals 512, 514, 614: Bitstream 604: Bit Generator

Claims

1. A first encoder receives a first input bit and applies transition encoding to the first input bit based on a transition key to generate a first stream of the first bit, A bit generator that receives a second input bit and generates a second stream of the second bit based on the second input bit, The system includes a PAM4 transmitter that receives a first stream of the first bit and a second stream of the second bit, and generates a PAM4 (pulse-amplitude modulation 4-level) symbol based at least on the first stream of the first bit, The first stream of the first bit generated by the first encoder includes half of the transition key and the encoded data bit. The second stream of the second bit generated by the bit generator includes the remaining half of the transition key and the second input bit, in a system.

2. The system according to claim 1, wherein the first stream of the first bit corresponds to the MSB (most distinctive bits) of the PAM4 symbol generated by the PAM4 transmitter.

3. The generation of the PAM4 symbol is also based on the second stream of the second bit, The system according to claim 2, wherein the second stream of the second bit corresponds to the LSB (least distinctive bits) of the PAM4 symbol.

4. The system according to claim 3, wherein the second stream of the second bit is generated by applying transition coding to the second input bit.

5. The system according to claim 3, wherein the bit generator inserts padding bits into the second input bits to generate a second stream of the second bits.

6. The system according to claim 1, wherein the first encoder generates the encoded data bits by performing an exclusive OR (XOR) operation on the transition key and the first input bit.

7. The system according to claim 2, wherein each of the PAM4 symbols corresponds to one bit from the first stream of the first bit and one bit from the second stream of the second bit.

8. The first step is to generate a first stream of first bits by applying transition encoding to the first input bits supplied to the first encoder based on the transition key using a first encoder, A bit generator generates a second stream of second bits based on the second input bits supplied to the bit generator, The step of a PAM4 transmitter generating a PAM4 symbol based on a first stream of at least the first bits received by the PAM4 transmitter, The first stream of the first bit generated by the first encoder includes half of the transition key and the encoded data bit. A method wherein the second stream of the second bit generated by the bit generator includes the remaining half of the transition key and the second input bit.

9. The method according to claim 8, wherein the first stream of the first bit corresponds to the MSB (most distinctive bits) of the PAM4 symbol generated by the PAM4 transmitter.

10. The step of generating the PAM4 symbol is also based on the second stream of the second bit, The method according to claim 9, wherein the second stream of the second bit corresponds to the LSB (least distinctive bits) of the PAM4 symbol generated by the PAM4 transmitter.

11. The method according to claim 10, wherein the step of generating a second stream of the second bit includes the step of applying transition coding to the second input bit.

12. The step of generating the second stream of the second bit is: The stage of generating padding bits, The step of inserting the padding bit into the second input bit. The method according to claim 10, including the method described in claim 10.

13. The method according to claim 8, further comprising the step of generating a first stream of the first bit by performing an exclusive OR (XOR) operation on the transition key and the first input bit.

14. A first transition encoder receives a first input bit and applies transition encoding to the first input bit based on a transition key to generate a first stream of the first bit, A bit generator that receives a second input bit and generates a second stream of the second bit based on the second input bit, A PAM4 transmitter that receives a first stream of the first bit and a second stream of the second bit and generates a PAM4 symbol, The MSB (most distinctive bit) of the PAM4 symbol is determined based on the first stream of the first bit. The LSB (least distinctive bit) of the PAM4 symbol is based on the second stream of the second bit, The first stream of the first bit generated by the first transition encoder includes half of the transition key and the encoded data bit. The second stream of the second bit generated by the bit generator is a compatible PAM4 encoder, comprising the remaining half of the transition key and the second input bit.

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