Electronic equipment with a boost circuit

By utilizing a first storage capacity to activate a boost circuit and transfer power to a second storage capacity, the device addresses the need for large capacitors, achieving efficient and cost-effective load operation with smaller capacitors.

JP7840117B2Active Publication Date: 2026-04-03SEIKO INSTR INC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-03-16
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Conventional electronic devices with boost circuits require large storage capacitors or capacitors with high capacitance values to store power for load operation, leading to increased mounting area and cost.

Method used

The electronic device employs a first energy storage capacity to store input power, which activates a boost circuit when its voltage reaches a starting voltage, converting the stored power into boosted power, and transfers it to a second energy storage capacity for further storage, allowing the boost circuit to operate multiple times, thereby reducing the size and capacity requirements of both storage capacitors.

Benefits of technology

This configuration enables the use of smaller storage capacitors with lower capacity values to sustain load operation for a predetermined time, reducing the physical size and cost compared to conventional devices.

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Patent Text Reader

Abstract

To provide an electronic device provided with a booster circuit using the small number of pieces of power storage capacity, or a booster circuit using small-sized power storage capacity whose capacitance value is small, according to the present invention.SOLUTION: An electronic device 100 provided with a booster circuit comprises a first booster circuit 103, an output circuit 105, a load 106, first power storage capacity 102, second power storage capacity 104, and an input terminal 107. The input terminal 107 is connected to input terminals of the first power storage capacity 102 and the first booster circuit 103. The second power storage capacity 104 is connected to an output terminal of the first booster circuit 103 and an input terminal of the output circuit 105. The load 106 is connected to an output terminal of the output circuit 105.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to an electronic device having a boost circuit.

Background Art

[0002] When converting input power into boosted power by a boost circuit and operating a load with this boosted power, if the input power is not more than the self-consumption power of the boost circuit, the load cannot be operated. Therefore, a conventional electronic device having a boost circuit is configured to provide a storage capacitor at the input of the boost circuit, store the power required to operate the load for a predetermined time in this storage capacitor, and intermittently operate the load with the power stored in this storage capacitor (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] A conventional electronic device having a boost circuit had a storage capacitor on the input side of the boost circuit. When the input voltage was low, it was necessary to increase the capacitance value of the storage capacitor in order to store the power required to operate the load for a predetermined time. For this reason, it was necessary to increase the number of storage capacitors or use a storage capacitor with a large capacitance value. There were problems such as an increase in the mounting area of the storage capacitor component and an increase in the cost of the storage capacitor component. An object of the present invention is to provide an electronic device having a boost circuit with a small number of storage capacitors or a boost circuit using a small-sized storage capacitor with a small capacitance value.

Means for Solving the Problems

[0005] An electronic device having a boost circuit according to an embodiment of the present invention includes one end connected to an input terminal Furthermore, the input power received from the aforementioned input terminal is stored.It includes a first energy storage capacity, an input terminal connected to one end of the first energy storage capacity, and an output terminal. When stopped, the voltage of the first storage capacity reaches the starting voltage due to the storage of the input power, and when operating... Convert the stored power of the first storage capacity into boosted power. As a result, the stored power of the first storage capacity decreases, and when the voltage of the first storage capacity falls below the operating voltage, it stops. A boost circuit, a second energy storage capacity having one end connected to the output terminal of the boost circuit and storing the boosted piezoelectric force converted by the boost circuit, and an input terminal connected to one end of the second energy storage capacity, Power consumption is greater than the aforementioned input power. The device is characterized by comprising an output terminal to which a load is connected, and an output circuit that converts power supplied to an input terminal connected to one end of the second energy storage capacity into output power. [Effects of the Invention]

[0006] The second energy storage capacity stores the boosted piezoelectric power generated by the first boost circuit, so even a small energy storage capacity with a low capacity value can store enough power to operate a load for a certain period of time. Since the first boost circuit can be operated multiple times to store the power from the first energy storage capacity into the second energy storage capacity, the first energy storage capacity can also be small and have a lower capacity value compared to conventional configurations. [Brief explanation of the drawing]

[0007] [Figure 1] This is a circuit diagram showing an example of the first embodiment of the present invention. [Figure 2] This is a circuit diagram showing an example of a first boost circuit according to the first embodiment of the present invention. [Figure 3] This is a circuit diagram showing an example of a first output circuit according to the first embodiment of the present invention. [Figure 4] This is a circuit diagram showing an example of a second output circuit according to a second embodiment of the present invention. [Figure 5] This is a circuit diagram showing an example of a third output circuit according to a third embodiment of the present invention. [Modes for carrying out the invention]

[0008] [First Embodiment] A first embodiment of the present invention will be described below with reference to the drawings. Figure 1 is a circuit diagram showing an example of an electronic device 100 having a boost circuit according to this embodiment.

[0009] The electronic device 100 having a boost circuit according to the first embodiment of the present invention comprises a first boost circuit 103, a first output circuit 105, a first energy storage capacity 102, a second energy storage capacity 104, a load 106, a first input terminal 107, and a second input terminal 108.

[0010] The connections of the electronic device 100 having a boost circuit will be described. An external power generation element 101 is connected from the outside between the first input terminal 107 and the second input terminal 108. The first input terminal 107 is connected to the first terminal of the first energy storage capacity 102 and to the first terminal 151 of the first boost circuit 103. The second input terminal 108 and the second terminal of the first energy storage capacity 102 are connected to the GND power supply. The second terminal 152 of the first boost circuit 103 is connected to the first terminal of the second energy storage capacity 104 and to the first terminal 161 of the first output circuit 105. 103 The third terminal 153 of the first output circuit 105 and the second terminal of the second energy storage capacity 104 are connected to the GND power supply. The second terminal 162 of the first output circuit 105 is connected to the first terminal 171 of the load 106. The third terminal 163 of the first output circuit 105 and the second terminal 172 of the load 106 are connected to the GND power supply.

[0011] The operation of the electronic device 100 having a boost circuit according to the first embodiment will be described. When the power generation element 101 outputs the first generated power, the first generated power is stored in the first storage capacity 102. When the stored voltage of the first storage capacity 102 reaches the starting voltage of the first boost circuit 103, the first boost circuit 103 starts up with the stored power of the first storage capacity 102 and begins the boosting operation. Once the boosting operation begins, the first boost circuit 103 converts the stored power of the first storage capacity 102 into the first boosted power. The first boosted power is stored in the second storage capacity 104. When the stored voltage of the first storage capacity 102 falls below the operating voltage of the first boost circuit 103, the first boost circuit 103 stops the boosting operation. The power generated from the power generation element 101 is converted back into the stored voltage of the first storage capacity 102, and the same operation is repeated. When the stored voltage of the second storage capacity 104 reaches the starting voltage of the first output circuit 105, the first output circuit 105 converts the stored power of the second storage capacity 104 into output power. The output power is supplied to the load 106, and the load 106 operates using the output power.

[0012] For example, if the capacity of the first storage capacity 102 is 0.68mF, the capacity of the second storage capacity 104 is also 0.68mF, the starting voltage of the first boost circuit 103 is 0.3V, and the starting voltage of the first output circuit 105 is 1.9V, then if the conversion of the stored power of the first storage capacity 102 to the first boosted power is repeated approximately 100 times, the stored voltage of the second storage capacity 104 will reach the starting voltage of the first output circuit 105. The first output circuit 105 generates output power from the stored voltage of the second storage capacity 104 and supplies it to the load 106.

[0013] As described above, the starting power of the first boost circuit 103 uses the stored power of the first storage capacity 102. Therefore, even if the power generated by the power generation element 101 is less than the starting power of the first boost circuit 103, the first boost circuit 103 can convert the stored power of the first storage capacity 102 into the first boosted power. The stored power of the first storage capacity 102 is less than the power required to operate the load 106 for a predetermined time, but by starting the first boost circuit 103 multiple times, enough power to operate the load 106 for a predetermined time can be stored in the second storage capacity 104. In addition, the stored voltage of the second storage capacity 104 is higher than the stored voltage of the first storage capacity 102. Therefore, even without increasing the capacity value of the second storage capacity 104, the stored power of the second storage capacity 104 is sufficient to operate the load 106 for a predetermined time.

[0014] Figure 2 shows an example of the first boost circuit 103. The first boost circuit 103 includes a second boost circuit 202, a first control circuit 208, a third energy storage capacity 205, a fourth energy storage capacity 207, a first coil 201, a first diode 203, a first N-channel MOS transistor (hereinafter referred to as NMOS transistor) 204, a first switch 206, a first terminal 151, a second terminal 152, and a third terminal 153.

[0015] The connections of the first boost circuit 103 will now be explained. The first terminal 151 of the first boost circuit 103 is connected to the first terminal of the first coil 201 and the first terminal 250 of the second boost circuit 202. The second terminal 251 of the second boost circuit 202 is connected to the control terminal of the first switch 206. The third terminal 252 of the second boost circuit 202 is connected to the first terminal of the first switch 206 and the first terminal of the third energy storage capacity 205. The fourth terminal 253 of the second boost circuit 202 and the second terminal of the third energy storage capacity 205 are connected to the GND power supply. The second terminal of the first switch 206 is connected to the first terminal of the fourth energy storage capacity 207 and the second terminal 261 of the first control circuit 208. The third terminal 262 of the first control circuit 208 and the second terminal of the fourth energy storage capacity 207 are connected to the GND power supply. The drain terminal of the first NMOS transistor 204 is connected to the second terminal of the first coil 201 and the anode terminal of the first diode 203. The gate terminal of the first NMOS transistor 204 is connected to the first terminal 260 of the first control circuit 208. The source terminal of the first NMOS transistor 204 is connected to the GND power supply. The cathode terminal of the first diode 203 is connected to the second terminal 152 of the first boost circuit 103. The third terminal 153 of the first boost circuit 103 is connected to the GND power supply.

[0016] The operation of the first boost circuit 103 will now be explained. When the voltage at the first terminal 151 of the first boost circuit 103 reaches the startup voltage of the second boost circuit 202, the second boost circuit 202 starts its boosting operation. When the second boost circuit starts its boosting operation, it converts the power supplied to the first terminal 151 of the first boost circuit 103 into the second boost power. The second boost power is stored in the third capacitor 205. The second boost circuit 202 monitors the stored voltage of the third capacitor 205 to detect that the stored power of the third capacitor 205 has been stored up to the power that the first control circuit 208 can operate for a predetermined time. When the second boost circuit 202 detects that the stored voltage of the third capacitor 205 has reached or exceeded a predetermined voltage, it turns on the first switch 206 and supplies the stored power of the third capacitor 205 to the second terminal 261 of the first control circuit 208. The first control circuit 208 operates with the stored power of the third capacitor 205. The first control circuit 208 outputs a control signal that repeatedly turns on and off the first NMOS transistor 204 . When the first NMOS transistor 204 is on, the power accumulated in the first inductor 201 is output to the second terminal 152 of the first boost circuit 103 via the first diode 203 when the first NMOS transistor 204 is off, so that the first boost voltage is output from the second terminal 152 of the first boost circuit 103.

[0017] For example, when the capacitance value of the third capacitor 205 is 1 μF, the capacitance value of the fourth capacitor 207 is 0.1 μF, and the stored voltage of the third capacitor 205 when the first switch 206 is on is 2.4 V, the first control circuit 208 operates for about 0.1 seconds. The fourth capacitor 207 is a capacitor for power smoothing of the first control circuit 208.

[0018] As described above, the first boost circuit 103 can convert the power input to the first terminal 151 of the first boost circuit 103 into the first boost power for a predetermined time by operating the first control circuit 208 with the stored power of the third capacitor 205 for a predetermined time, and output the first boost power from the second terminal 152 of the first boost circuit 103 for a predetermined time.

[0019] Figure 3 shows an example of the first output circuit 105. The first output circuit 105 includes a first voltage detection circuit 306, a second control circuit 308, a second diode 301, a third diode 309, a fourth diode 310, a fifth energy storage capacity 303, a sixth energy storage capacity 304, a seventh energy storage capacity 311, a second NMOS transistor 307, a second switch 302, a second coil 305, a first terminal 161, a second terminal 162, and a third terminal 163. Here, the second control circuit 308, the third diode 309, the sixth energy storage capacity 304, the seventh energy storage capacity 311, the second NMOS transistor 307, and the second coil 305 constitute the third boost circuit 356.

[0020] The connections of the first output circuit 105 are described below. The first terminal 161 of the first output circuit 105 is connected to the anode terminal of the second diode 301 and the first terminal of the second switch 302. The cathode terminal of the second diode 301 is connected to the first terminal of the fifth energy storage device 303, the first terminal 350 of the first voltage detection circuit 306, and the cathode terminal of the fourth diode 310. The second terminal 351 of the first voltage detection circuit 306 is connected to the control terminal of the second switch 302. The third terminal 352 of the first voltage detection circuit 306 and the second terminal of the fifth energy storage device 303 are connected to the GND power supply. The second terminal of the second switch 302 is connected to the first terminal of the sixth energy storage device 304 and the first terminal of the second coil 305. The second terminal of the second coil 305 is connected to the anode terminal of the third diode 309 and the drain terminal of the second NMOS transistor 307. The gate terminal of the second NMOS transistor 307 is connected to the first terminal 353 of the second control circuit 308. The cathode terminal of the third diode 309 is connected to the anode terminal of the fourth diode 310, the second terminal 354 of the second control circuit 308, the first terminal of the seventh energy storage capacitor 311, and the second terminal 162 of the first output circuit 105. The third terminal 163 of the first output circuit 105, the source terminal of the second NMOS transistor 307, the third terminal 355 of the second control circuit 308, the second terminal of the sixth energy storage capacitor 304, and the second terminal of the seventh energy storage capacitor 311 are connected to the GND power supply.

[0021] The operation of the first output circuit 105 shown in Figure 3 will be explained. The power supplied to the first terminal 161 of the first output circuit 105 is stored in the fifth energy storage capacity 303 via the second diode 301. The stored voltage of the fifth energy storage capacity 303 is monitored by the first voltage detection circuit 306. When the first voltage detection circuit 306 detects that the stored voltage of the fifth energy storage capacity 303 has reached a predetermined voltage, the first voltage detection circuit 306 turns on the second switch 302. When the second switch 302 is turned on, the power supplied to the first terminal 161 of the first output circuit 105 is supplied to the second terminal 354 of the second control circuit 308 via the second coil 305 and the third diode 309. The second control circuit 308 starts operating with the power supplied to the second terminal 354. The second control circuit 308 outputs a control signal from the first terminal 353 that repeatedly turns the second NMOS transistor 307 on and off. When the second NMOS transistor 307 is ON, the power stored in the second coil 305 is output to the second terminal 162 of the first output circuit 105 via the third diode 309 when the second NMOS transistor 307 is OFF, so that output power is output from the second terminal 162 of the first output circuit 105. The output power sustains the operation of the second control circuit 308 and is stored in the fifth energy storage capacity 303 via the fourth diode 310.

[0022] For example, if the capacity of the fifth storage capacity 303 is 10μF, the detection voltage of the first voltage detection circuit 306 is 1.8V, and the detection release voltage is 1.5V, then when a voltage of approximately 1.9V is input to the first terminal 161 of the first output circuit 105, the second switch 302 turns on, and the third boost circuit 356 starts up. When the third boost circuit starts up, for example, an output power of 2V is output. When an output power of 2V is output, the voltage of the fifth storage capacity 303 is charged by the output power and does not fall below 1.5V. . It rises to 9V. Therefore, the voltage at the first terminal 161 of the first output circuit 105 is 1 .The second switch 302 can remain on even if the voltage drops below 6V. The sixth energy storage capacity 304 is for smoothing the second coil 305, and the seventh energy storage capacity 311 is for power supply smoothing of the second control circuit 308.

[0023] As described above, the first output circuit 105 starts up and can output power when a predetermined voltage is input to the first terminal 161 of the first output circuit 105. The load 106 is driven for a predetermined time by the output power of the first output circuit 105 supplied from the second terminal 162 of the first output circuit 105 to the first terminal 171 of the load 106.

[0024] As described above, according to the electronic device having a boost circuit of this embodiment, by activating the first boost circuit 103 multiple times and storing energy in the second energy storage capacity 104, it is possible to drive the load 106 for a predetermined time using the power of the power generation element 101 with the power of the first energy storage capacity 102 and the second energy storage capacity 104, which are smaller in size than conventional devices. [Second Embodiment] A second embodiment of the present invention will be described below with reference to the drawings. The second embodiment is a configuration in which the first output circuit 105 of the first embodiment is replaced with a second output circuit 105a.

[0025] Figure 4 is a circuit diagram showing an example of a second output circuit 105a of an electronic device having a boost circuit according to this embodiment. The second output circuit 105a includes a first voltage detection circuit 306, a fifth energy storage capacity 303, a seventh energy storage capacity 311, a second switch 302, a first terminal 161, a second terminal 162, and a third terminal 163.

[0026] The connections of the second output circuit 105a will now be explained. The first terminal 161 of the second output circuit 105a is connected to the first terminal of the fifth energy storage capacity 303, the first terminal 350 of the first voltage detection circuit 306, and the first terminal of the second switch 302. The second terminal 351 of the first voltage detection circuit 306 is connected to the control terminal of the second switch 302. The third terminal 352 of the first voltage detection circuit 306 and the second terminal of the fifth energy storage capacity 303 are connected to the GND power supply. The second terminal of the second switch 302 is connected to the first terminal of the seventh energy storage capacity 311 and the second terminal 162 of the second output circuit 105a. The third terminal 163 of the second output circuit 105a and the second terminal of the seventh energy storage capacity 311 are connected to the GND power supply.

[0027] The operation of the second output circuit 105a of the electronic device having a boost circuit according to the second embodiment will be described. The second output circuit 105a monitors the voltage of the power input to its first terminal 161 using the first voltage detection circuit 306. When the first voltage detection circuit 306 detects that the voltage at the first terminal 161 of the second output circuit 105a has reached a predetermined voltage, it turns on the second switch 302. When the second switch 302 is turned on, the power input to the first terminal 161 of the second output circuit 105a is output as output power from the second terminal 162 of the second output circuit 105a. The load 106 is driven for a predetermined time by the output power of the second output circuit 105a supplied to the first terminal 171 of the load 106. The seventh energy storage capacity 311 is the capacity for power supply smoothing of the load 106.

[0028] For example, if the detection voltage of the first voltage detection circuit 306 is set to 1.9V and the detection release voltage to 1.6V, when a voltage of 1.9V is input to the first terminal 161 of the second output circuit 105a, the second output circuit 105a outputs output power from its second terminal 162. When the second output circuit 105a outputs output power, the voltage at the first terminal 161 of the second output circuit 105a begins to decrease, and when the voltage at the first terminal 161 of the second output circuit 105a falls below 1.6V, it stops outputting output power. When a predetermined voltage is input to the first terminal 161 of the second output circuit 105a, it starts up and can drive the load 106 for a predetermined time.

[0029] As described above, according to the electronic device having the boost circuit of this embodiment, by activating the first boost circuit 103 multiple times and storing energy in the second energy storage capacity 104, the load 106 can be driven for a predetermined time by the power of the power generation element 101 using the first energy storage capacity 102 and the second energy storage capacity 104, which are smaller and have a smaller capacity compared to conventional devices.

[0030] [Third Embodiment] A third embodiment of the present invention will now be described with reference to the drawings. The third embodiment is a configuration in which the first output circuit 105 of the first embodiment is replaced with a third output circuit 105b.

[0031] Figure 5 is a circuit diagram showing an example of a third output circuit 105b of an electronic device having a boost circuit according to this embodiment. The third output circuit 105b includes a first voltage detection circuit 306, a second control circuit 308, a third diode 309, a fifth diode 313, a seventh energy storage capacitor 311, an eighth energy storage capacitor 316, a second NMOS transistor 307, a third NMOS transistor 315, a first resistor 317, a second coil 305, a first terminal 161, a second terminal 162, and a third terminal 163. Here, the second control circuit 308, the third diode 309, the seventh energy storage capacitor 311, the second NMOS transistor 307, and the second coil 305 constitute a fourth boost circuit 357.

[0032] The connection of the third output circuit 105b will now be described. The first terminal 161 of the third output circuit 105b is connected to the first terminal of the second coil 305. The second terminal of the second coil 305 is connected to the anode terminal of the third diode 309 and the drain terminal of the second NMOS transistor 307. The cathode terminal of the third diode 309 is connected to the first terminal 350 of the first voltage detection circuit 306, the second terminal 354 of the second control circuit 308, the first terminal of the seventh energy storage capacitor 311, and the second terminal 162 of the third output circuit 105b. The first terminal 353 of the second control circuit 308 is connected to the gate terminal of the second NMOS transistor 307. The third terminal 355 of the second control circuit 308 is connected to the source terminal of the second NMOS transistor 307 and the drain terminal of the third NMOS transistor 315. The second terminal 351 of the first voltage detection circuit 306 is connected to the anode terminal of the fifth diode 313. The third terminal 352 of the first voltage detection circuit 306 is connected to the GND power supply. The cathode terminal of the fifth diode 313 is connected to the first terminal of the eighth capacitor 316, the first terminal of the first resistor 317, and the gate terminal of the third NMOS transistor 315. The third terminal 163 of the third output circuit 105b, the second terminal of the eighth capacitor 316, the second terminal of the first resistor 317, and the source terminal of the third NMOS transistor 315 are connected to the GND power supply.

[0033] Here, the first terminal of the second coil 305 corresponds to the input terminal of the fourth boost circuit 357. The connection point between the source terminal of the second NMOS transistor 307 and the third terminal 355 of the second control circuit 308 corresponds to the negative power supply terminal of the fourth boost circuit 357. The connection point between the cathode terminal of the third diode 309 and the first terminal of the seventh energy storage capacitor 311 corresponds to the fourth Boost This corresponds to the output terminal of circuit 357.

[0034] The operation of the third output circuit 105b of the electronic device having a boost circuit according to the third embodiment will be described. The power input to the first terminal 161 of the third output circuit 105b is supplied to the second terminal 162 of the third output circuit 105b, the second terminal 354 of the second control circuit 308, and the first terminal 350 of the first voltage detection circuit 306 via the second coil 305 and the third diode 309. The first voltage detection circuit 306 operates on the power supplied to its first terminal 350 and monitors the voltage at its first terminal 350. When the first voltage detection circuit 306 detects that the voltage at its first terminal 350 has exceeded a predetermined voltage, it outputs the voltage at its first terminal 350 from its second terminal 351. The voltage at the first terminal 350 of the first voltage detection circuit 306, output from the second terminal 351 of the first voltage detection circuit 306, is supplied to the gate terminal of the third NMOS transistor 315 via the fifth diode 313, causing the third NMOS transistor 315 to turn on. When the third NMOS transistor 315 turns on, the second control circuit 308 of the fourth boost circuit 357 starts operating. The second control circuit 308 repeatedly turns the second NMOS transistor 307 on and off. The power stored in the second coil 305 when the second NMOS transistor 307 is on is output to the second terminal 162 via the third diode 309 when the second NMOS transistor 307 is off, and the output power of the fourth boost circuit 357 is output from the second terminal 162. The voltage of the output power of the fourth boost circuit 357 is greater than or equal to the detection voltage of the first voltage detection circuit 306. Therefore, when the output power of the fourth boost circuit 357 is supplied to the first terminal 350 of the first voltage detection circuit 306, the first voltage detection circuit 306 outputs the voltage from the second terminal 351 of the first voltage detection circuit 306 to the first terminal 350 of the first voltage detection circuit 306. Therefore, the third NMOS transistor 315 remains on. The seventh energy storage capacity 311 is the capacity for power supply smoothing of the second control circuit 308, and the eighth energy storage capacity 316 remains on even when no voltage is output from the second terminal 351 of the first voltage detection circuit 306. 315This is the capacitance required to maintain the gate voltage for a predetermined time. The first resistor 317 is the discharge resistor for the seventh energy storage capacity 311.

[0035] For example, if the detection voltage of the first voltage detection circuit 306 is set to 1.8V and the detection release voltage to 1.7V, the capacitance value of the eighth energy storage capacity 316 is set to 1μF, the resistance value of the first resistor 317 is set to 1MΩ, and the output power voltage of the fourth boost circuit 357 is set to 2.0V, then the third output circuit 105b will have a first terminal 161 of the third output circuit 105b connected to 1 . 9V Voltage When a voltage is input, the first voltage detection circuit 306 outputs the voltage at its first terminal 350 from its second terminal 351. As a result, the second control circuit 308 starts operating. When the second control circuit 308 starts operating, the input power voltage falls below 1.8V, so the first voltage detection circuit 306 does not output the voltage at its first terminal 350 from its second terminal 351. At this time, due to the fifth diode 313 and the eighth energy storage capacitor 316, the voltage of the third NMOS transistor 315 hardly drops, and the third NMOS transistor 315 can remain in the ON state. As a result, the second control circuit 308 can continue to operate, and a 2.0V output power is output from the fourth boost circuit 357. When the fourth boost circuit 357 outputs a power output of 2.0V, the first voltage detection circuit 306 outputs the voltage at its first terminal 350 from its second terminal 351. As a result, the fourth boost circuit 357 can continue to output power from the second terminal 162 of the third output circuit 105b until the voltage of the power input to the first terminal 161 of the third output circuit 105b drops to about 0.1V.

[0036] As described above, the third output circuit 105b starts up when a predetermined voltage is input to the first terminal 161, and can drive the load 106 for a predetermined time.

[0037] As explained above, according to the electronic device having a boost circuit of this embodiment, by activating the first boost circuit 103 multiple times and storing energy in the second energy storage capacity 104, the power of the power generation element is used to load the first energy storage capacity 102 and the second energy storage capacity 104, which are smaller in size than conventional devices, by using the power of the power generation element to load the load. 106 It can be driven for a predetermined time.

[0038] According to the present invention, the first boost circuit can be operated with the stored power of a small first storage capacity with a small capacity value, which is charged by the power of the power generation element, and the power of the first storage capacity can be stored in the second storage capacity. Since the stored power stored in the second storage capacity has a higher voltage than the stored power stored in the first storage capacity, the small second storage capacity with a small capacity value can store enough power to operate a load for a predetermined time. When the first boost circuit has operated multiple times and enough power to operate the load for a predetermined time has been stored in the second storage capacity, the output circuit outputs the power to operate the load for a predetermined time to the load.

[0039] Conventional electronic devices with boost circuits require a large storage capacity because they store the power needed to operate a load for a predetermined time at a low voltage in a storage capacity directly connected to the power generation element. The second storage capacity of the present invention stores the power needed to operate a load for a predetermined time at a higher voltage, so a small storage capacity with a smaller capacity value is sufficient. Furthermore, the first storage capacity of the present invention, which is directly connected to the power generation element, operates the first boost circuit multiple times (for example, 100 times in the first embodiment) to generate the second storage. electric To store a predetermined amount of power in its capacity, a smaller storage capacity is sufficient compared to conventional electronic devices with boost circuits. [Explanation of symbols]

[0040] 100 Electronic devices with a boost circuit 101 Power generation element 102, 104 Storage capacity 103, 202, 356, 357 Boost Circuit 105, 105a, 105b output circuits 106 load

Claims

1. A first energy storage capacity, which includes one end connected to an input terminal and stores the input power input from the input terminal, A boost circuit includes an input terminal connected to one end of the first energy storage capacity and an output terminal, which starts when the voltage of the first energy storage capacity reaches the starting voltage due to the storage of the input power when stopped, and stops when the stored power of the first energy storage capacity decreases due to the conversion of the stored power of the first energy storage capacity into boosted power when operating and the voltage of the first energy storage capacity falls below the operating voltage, A second energy storage capacity, which includes one end connected to the output terminal of the boost circuit, and stores the boosted voltage converted by the boost circuit, An output circuit having an input terminal connected to one end of the second energy storage capacity and an output terminal to which a load with a power consumption greater than the input power is connected, and converting the power supplied to the input terminal connected to one end of the second energy storage capacity into output power, An electronic device having a boost circuit characterized by being equipped with a boost circuit.

2. An electronic device having a boost circuit according to claim 1, wherein the stored voltage of the second stored capacity is higher than the stored voltage of the first stored capacity.

3. The output circuit includes a voltage detection circuit, a second boost circuit, and a switch. The switch is installed between the input terminal of the output circuit and the second boost circuit, and the control terminal of the switch is connected to the voltage detection circuit. An electronic device having a boost circuit according to claim 1 or claim 2.

4. The electronic device having a boost circuit according to claim 1 or claim 2, wherein the output circuit comprises a voltage detection circuit and a switch installed in a path connecting the input terminal and output terminal of the output circuit, and whose opening and closing is controlled according to the voltage detected by the voltage detection circuit.

5. The output circuit includes a voltage detection circuit, a second boost circuit, and a switch. The electronic device having a boost circuit according to claim 1 or claim 2, wherein the switch is installed between the negative power supply terminal of the second boost circuit and the GND power supply, and the control terminal of the switch is connected to the voltage detection circuit.

Citation Information

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