Indication device

Abstract

To prevent or delay entry of foreign substances such as moisture, hydrogen, and the like penetrating from the outside to prevent a defect such as corrosion or damage to a metal line and the like in a display panel.SOLUTION: A display device comprises: a substrate including a display region, a non-display region, and a bending region; an adhesive layer disposed on the substrate; a pixel driving circuit disposed on the adhesive layer in the display region; a buffer layer disposed on the adhesive layer and covering a side surface of the pixel driving circuit; a first protective pattern disposed in the non-display region to surround the display region; a first inorganic film disposed on the buffer layer and the pixel driving circuit; and a second inorganic film disposed on the display region, the first protective pattern, and the non-display region. The first inorganic film and the second inorganic film overlap in the first protective pattern.SELECTED DRAWING: Figure 12A

Description

Technical Field

[0001] The present invention relates to a display device using an inorganic light-emitting diode as a light source.

Background Art

[0002] Electroluminescent display devices include an organic light-emitting display device in which an organic light-emitting diode (OLED) is arranged, and an inorganic light-emitting display device (hereinafter referred to as an "LED display device") in which an inorganic light-emitting diode (Light Emitting Diode: hereinafter referred to as "LED") is arranged.

[0003] Since an electroluminescent display device displays an image using a self-emitting element, it does not require another light source, for example, a backlight unit, and thus can be realized in a thin and various forms.

[0004] In an organic light-emitting display device, an oxidation phenomenon may occur between the organic light-emitting layer and the electrode due to the intrusion of moisture and oxygen, and thus a design for preventing the intrusion of oxygen and moisture is required.

[0005] Recently, as an example of an inorganic light-emitting display device, a micro-LED display device in which micro-LEDs are arranged in pixels has attracted attention as a next-generation display device. The micro-LED may be an inorganic LED having a size of 100 μm or less. The micro-LEDs are fabricated in a separate semiconductor process and may be transferred to pixel positions on a display panel substrate of the display device and arranged in each sub-pixel for each color.

Summary of the Invention

Problems to be Solved by the Invention

[0006] The insulating layer and optical layer are composed of organic materials, making it difficult to prevent foreign substances such as moisture and hydrogen present outside the display panel from entering the panel, which can cause malfunctions in the pixel drive circuit and metal wiring. Furthermore, when placing the insulating layer or optical layer on the display panel, defects can occur where the insulating layer or optical layer placed in the non-display area flows out of the display panel.

[0007] The present invention prevents or delays the intrusion of foreign substances such as moisture and hydrogen from the outside by arranging a first protective pattern, a second protective pattern, a first inorganic film, and a second inorganic film, thereby preventing defects such as corrosion or damage to metal wiring inside the display panel. Furthermore, by arranging an outer optical layer and an outer bank pattern, the thickness of the second optical layer and the second inorganic film arranged in the non-display area can be the same as or approximately the same as that of the display area, thereby preventing defects in which organic layers such as the second optical layer flow out of the non-display area of ​​the display panel due to manufacturing problems.

[0008] The problems that this invention aims to solve are not limited to those mentioned above, and other problems not mentioned herein will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0009] The above problems can be solved by a display device that includes a substrate including a display area, a non-display area, and a bending area, an adhesive layer disposed on the substrate, a pixel driving circuit disposed on the adhesive layer in the display area, a buffer layer disposed on the adhesive layer and covering the pixel driving circuit, a second protective pattern disposed on the non-display area so as to surround the display area, a first inorganic film disposed on the pixel driving circuit, and a second inorganic film disposed on the display area, the second protective pattern, and the non-display area, wherein the first inorganic film and the second inorganic film overlap in the area overlapping with the second protective pattern.

[0010] According to the present invention, by arranging a first protective pattern, a second protective pattern, a first inorganic film, and a second inorganic film, it is possible to prevent or delay the entry of foreign substances such as moisture and hydrogen from the outside, thereby preventing defects such as corrosion or damage to metal wiring inside the display panel. Furthermore, by arranging an outer optical layer and an outer bank pattern, the thickness of the second optical layer and the second inorganic film arranged in the non-display area can be the same as or approximately the same as that of the display area, thereby preventing defects in which organic layers such as the second optical layer flow out of the non-display area of ​​the display panel due to manufacturing problems.

[0011] The diverse and beneficial advantages and effects of the present invention are not limited to those described above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief explanation of the drawing]

[0012] [Figure 1] This figure shows a display device according to one embodiment of the present invention. [Figure 2] This figure shows an enlarged view of area A in Figure 1. [Figure 3] This is a diagram showing a portion of a pixel. [Figure 4] This is a cross-sectional view along the line I-I' in Figure 3. [Figure 5] This is a cross-sectional view along line II-II' in Figure 3. [Figure 6] This is a cross-sectional view along line III-III' in Figure 3. [Figure 7] This is a cross-sectional view showing an example in which a main light-emitting element and a sub-light-emitting element are electrically connected to a pixel driving circuit. [Figure 8] This figure shows a display device according to another embodiment of the present invention. [Figure 9] This is a cross-sectional view along line IV-IV' in Figure 8. [Figure 10A] This figure shows a display device according to another embodiment of the present invention. [Figure 10B] This is an enlarged view of area B in Figure 10A. [Figure 11A]It is a cross-sectional view taken along line Y-Y' in FIG. 10B. [Figure 11B] It is a cross-sectional view taken along line Y-Y' in FIG. 10B of a display device according to another embodiment of the present invention. [Figure 11C] It is a cross-sectional view taken along line Y-Y' in FIG. 10B of a display device according to still another embodiment of the present invention. [Figure 12A] It is a cross-sectional view taken along line Z-Z' in FIG. 10A. [Figure 12B] It is a cross-sectional view taken along Z-Z' in FIG. 10A of a display device according to another embodiment of the present invention. [Figure 12C] It is a cross-sectional view taken along line Z-Z' in FIG. 10A of a display device according to still another embodiment of the present invention.

Mode for Carrying Out the Invention

[0013] The advantages, features, and methods for achieving them of the present invention will become clear by referring to the embodiments described in detail below together with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but is embodied in various different forms, and the embodiments are merely provided to make the disclosure of the present invention complete and to fully inform those with ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention, and the present invention is only defined by the scope of the claims.

[0014] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, so the present invention is not limited to the matters shown in the drawings. Throughout the specification, the same reference numerals indicate the same components. Also, when it is determined that a detailed description of related known technologies will obscure the gist of the present invention in explaining the present invention, the detailed description thereof will be omitted.

[0015] When terms such as "comprising", "including", "having", and "consisting of" mentioned in this specification are used, other parts can be added as long as "only" is not used. When a component is expressed in the singular, it can be interpreted as plural unless there are specific explicit descriptions.

[0016] When interpreting a component, even without a separate explicit description, it should be interpreted as including an error range.

[0017] When the positional relationship and the interconnection relationship between two components are described, such as "on", "above", "below", "sideways", "connect or couple", "crossing or intersecting", etc., one or more other components can be interposed between those components unless there is a reference like "immediately" or "directly".

[0018] When the temporal sequence relationship is described, such as "after", "subsequent to", "next to", "before", etc., it may not be continuous on the time axis as long as "immediately" or "directly" is not used.

[0019] The first, second, etc. can be used to distinguish components, but the function and structure are not limited by this ordinal number or the name of the component.

[0020] The following embodiments can be partially or entirely combined or combined with each other, and various linkages and drives are technically possible. Each embodiment can be implemented independently of each other or can be implemented together with a linkage relationship.

[0021] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings.

[0022] A display device according to one embodiment of the present invention includes a display panel on which a display area or screen on which an image is displayed is arranged, and a pixel driving circuit for driving the pixels of the display panel. The display area includes a pixel area on which pixels are arranged. The pixel area includes a plurality of light-emitting areas. A light-emitting element is arranged in each of the light-emitting areas. The pixel driving circuit may be built into the display panel.

[0023] Figure 1 shows a display device according to one embodiment of this specification. Figure 2 is a magnified view of area A in Figure 1. Figure 3 shows a portion of a pixel.

[0024] Referring to Figures 1 and 2, the display device 100 according to an embodiment of the present invention includes a display panel on which an input image is visually reproduced. The display panel may include a display area AA on which the image is displayed and a non-display area NA on which the image is not displayed. Various wiring and drive circuits can be mounted in the non-display area NA, and a pad area PAD on which integrated circuits and printed circuits are connected may be arranged. Here, the display panel may be a rectangular panel having a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. In this case, the width and length of the display panel can be set to various design values ​​depending on the application field of the display device. The X-axis direction can mean the width direction, row direction, or horizontal direction, the Y-axis direction can mean the longitudinal direction, column direction, or vertical direction, and the Z-axis direction can mean the up-down direction or thickness direction. Furthermore, the X-axis direction, Y-axis direction, and Z-axis direction may be perpendicular to each other, but they can also mean different directions that are not perpendicular to each other. Accordingly, each of the X-axis direction, Y-axis direction, and Z-axis direction may be described as one of the first direction, second direction, and third direction. Furthermore, the planes extending in the X-axis and Y-axis directions can represent horizontal planes.

[0025] Multiple light-emitting elements 10 arranged in display area AA to form pixel PXL may be micro-sized inorganic light-emitting elements. After being grown on a silicon wafer, the inorganic light-emitting elements can be attached to the display panel by a transfer process.

[0026] The transfer process of the light-emitting element 10 may be carried out for each pre-partitioned region. In Figure 1, the display region AA is shown as being divided into 12 transfer regions ST, but the size and number of divisions of the transfer regions are not limited thereto. The transfer process may be carried out sequentially or simultaneously in the first to twelfth transfer regions ST. In the transfer regions ST, a blue light-emitting element 10, a green light-emitting element 10, and a red light-emitting element 10 may be transferred sequentially, respectively.

[0027] A data drive circuit or gate drive circuit may be placed in the non-display area NA, and wiring may be provided to supply control signals for controlling such drive circuits. Here, the control signals include various timing signals, including a clock signal, an input data enable signal, and a synchronization signal, and are receivable via the pad section PAD.

[0028] Pixel PXL can be driven by a pixel driving circuit. The pixel driving circuit receives a driving voltage, a video signal (digital signal), a synchronization signal synchronized with the video signal, etc., and can drive multiple pixels by outputting the anode voltage and cathode voltage of the light-emitting element 10. The driving voltage may be a high potential voltage (EVDD). The cathode voltage may be a low potential voltage (EVSS) applied commonly to the pixels. The anode voltage may be a voltage corresponding to the pixel data value of the video signal. The pixel driving circuit may be located in the non-display area NA, or it may be located at the bottom of the display area AA.

[0029] Each pixel PXL may contain multiple sub-pixels, each having a different color from the others. For example, the multiple pixels may include a red sub-pixel with a light-emitting element 10 that emits red wavelength light, a green sub-pixel with a light-emitting element 10 that emits green wavelength light, and a blue sub-pixel with a light-emitting element 10 that emits blue wavelength light. The multiple pixels may further include a white pixel.

[0030] Referring to Figures 2 and 3, multiple pixels PXL may be arranged consecutively in a first direction (X-axis direction) and a second direction (Y-axis direction). Multiple subpixels of the same color may be arranged within the pixels of the display area AA. For example, each of the multiple pixels may include a first red subpixel with a 1-1 light-emitting element 11a that emits red wavelength light, a second red subpixel with a 1-2 light-emitting element 11b that emits red wavelength light, a first green subpixel with a 2-1 light-emitting element 12a that emits green wavelength light, a second green subpixel with a 2-2 light-emitting element 12b that emits green wavelength light, a first blue subpixel with a 3-1 light-emitting element 13a that emits blue wavelength light, and a second blue subpixel with a 3-2 light-emitting element 13b that emits blue wavelength light. The 1-1 light-emitting element 11a, the 2-1 light-emitting element 12a, and the 3-1 light-emitting element 13a may be understood as main light-emitting elements. The first-second light-emitting element 11b, the second-second light-emitting element 12b, and the third-second light-emitting element 13b may be understood as sub-light-emitting elements.

[0031] A subpixel may contain at least one light-emitting element, and if one light-emitting element fails, the brightness of the subpixel can be adjusted by increasing the brightness of the other light-emitting elements. However, this is not necessarily the only option; a subpixel may contain only one light-emitting element.

[0032] Multiple first electrodes 161 are each positioned below the light-emitting element 10 and can be selectively connected to multiple signal lines TL1 to TL6 by connecting portions 161a. A high potential voltage can be applied to the pixel driving circuit via the signal lines TL1 to TL6. The signal lines TL1 to TL6 and the first electrodes 161 may be formed into an integrated electrode pattern during the electrode patterning process.

[0033] For example, the first signal wire TL1 may be connected to the anode electrode of the first red subpixel, and the second signal wire TL2 may be connected to the anode electrode of the second red subpixel. The third signal wire TL3 may be connected to the anode electrode of the first green subpixel, and the fourth signal wire TL4 may be connected to the anode electrode of the second green subpixel. The fifth signal wire TL5 may be connected to the anode electrode of the first blue subpixel, and the sixth signal wire TL6 may be connected to the anode electrode of the second blue subpixel. If one subpixel contains only one light-emitting element, the number of signal wires TL can be reduced by half.

[0034] The second electrode 170 may be a cathode electrode that applies a cathode voltage to the light-emitting elements 10 arranged in a row and continuously in the first direction (X-axis direction). Multiple second electrodes 170 can be spaced apart from each other in the second direction (Y-axis direction). Multiple second electrodes 170 can be connected to the cathode voltage via the contact electrode 163. Each of the multiple second electrodes 170 can be electrically connected to the contact electrode 163. However, this is not necessarily the case, and the second electrode 170 may be composed of a single electrode layer without being divided into multiple parts and function as a common electrode.

[0035] Figure 4 is a cross-sectional view along line I-I' in Figure 3. Figure 5 is a cross-sectional view along line II-II' in Figure 3. Figure 6 is a cross-sectional view along line III-III' in Figure 3. Figure 7 is a cross-sectional view showing an example in which two light-emitting elements are connected to a pixel driving circuit.

[0036] Referring to Figures 3 to 5, the display device according to the embodiment includes a plurality of first electrodes 161 and contact electrodes 163 arranged on a substrate 110, a plurality of light-emitting elements 10 arranged on the plurality of first electrodes 161, a first optical layer 141 arranged between the plurality of light-emitting elements 10, and a second electrode 170 arranged on the plurality of light-emitting elements 10.

[0037] The substrate 110 may be made of a flexible plastic. For example, the substrate 110 can be made as a single-layer or multi-layer substrate from a material selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, or cyclic-olefin copolymer, but is not limited to these. For example, the substrate 110 may be a ceramic substrate or a glass substrate.

[0038] A pixel driving circuit 20 may be arranged in the display area AA on the substrate 110. The pixel driving circuit 20 may include a plurality of thin-film transistors made of amorphous silicon semiconductor, polycrystalline silicon semiconductor, or oxide semiconductor.

[0039] The pixel driving circuit 20 may include at least one driving thin-film transistor, at least one switching thin-film transistor, and at least one storage capacitor. If the pixel driving circuit 20 includes multiple thin-film transistors, they may be formed on the substrate 110 by a TFT (Thin Film Transistor) manufacturing process. In the embodiment, the pixel driving circuit 20 may be a general concept referring to a plurality of thin-film transistors electrically connected to the light-emitting element 10.

[0040] The pixel driving circuit 20 may be a driving driver manufactured on a single-crystal semiconductor substrate 110 using a MOSFET (Metal-oxide-silicon field effect transistor) manufacturing process. The driving driver may include multiple pixel driving circuits and be capable of driving multiple sub-pixels. When the pixel driving circuit 20 is implemented as a driving driver, the driving driver can be mounted on the adhesive layer by a transfer process after the adhesive layer is placed on the substrate 110.

[0041] A buffer layer 121 covering the pixel driving circuit 20 may be placed on the substrate 110. The buffer layer 121 may, but is not limited to, an organic insulating material, such as photosensitive photoacrylic or photosensitive polyimide.

[0042] The buffer layer 121 can be made by laminating multiple layers of inorganic insulating materials, such as silicon nitride (SiNx) or silicon oxide (SiO2), and can be made by laminating multiple layers of organic insulating materials and inorganic insulating materials.

[0043] An insulating layer 122 may be placed on the buffer layer 121. The insulating layer 122 may, but is not limited to, an organic insulating material, such as photosensitive photoacrylic or photosensitive polyimide. Connecting wiring may be placed on the buffer layer 121. The connecting wiring may include multiple connecting wirings, such as a first connecting wiring RT1, a second connecting wiring RT2, etc. The connecting wiring can be connected to the corresponding signal wiring TL. The signal wiring may include, but is not limited to, a first signal wiring TL1 to a sixth signal wiring TL6. The connecting wiring may include multiple wiring patterns placed on different layers separated by one or more insulating layers. The wiring patterns placed on different layers can be electrically connected via contact holes that penetrate the insulating layers.

[0044] Multiple bank patterns 130 may be arranged on the insulating layer 122. At least one light-emitting element 10 may be arranged on each bank pattern 130. For example, the first light-emitting element 11 may be arranged on the first bank pattern 130a, the second light-emitting element 12 on the second bank pattern 130b, and the third light-emitting element 13 on the third bank pattern 130c.

[0045] The bank pattern 130 may, but is not limited to, an organic insulating material, such as photosensitive photoacrylic or photosensitive polyimide. The bank pattern 130 can guide the position where the light-emitting element 10 is attached during the transfer process of the light-emitting element 10. The bank pattern 130 may be omitted.

[0046] A solder pattern 162 may be placed on the first electrode 161. The solder pattern 162 may, but is not limited to, indium (In), tin (Sn), or an alloy thereof.

[0047] Multiple light-emitting elements 10 can each be mounted on the solder pattern 162. A single pixel may contain three colored light-emitting elements 10. The first light-emitting element 11 may be a red light-emitting element, the second light-emitting element 12 a green light-emitting element, and the third light-emitting element 13 a blue light-emitting element. Each sub-pixel can have two light-emitting elements mounted on it.

[0048] The first optical layer 141 can cover multiple light-emitting elements 10 and bank patterns 130. Therefore, the first optical layer 141 can cover between multiple light-emitting elements 10 and between multiple bank patterns 130. The first optical layer 141 extends in a first direction X and is spaced apart in a second direction Y, thereby separating pixels that are spaced apart in the second direction. Thus, the first optical layer 141 is separable between pixel rows, where "row" can mean the first direction. A pixel row consisting of multiple pixels spaced apart along the first direction may be called a pixel group. Thus, the display panel can include multiple pixel groups spaced apart from each other in the second direction. For example, a first optical layer 141 arranged along a first direction is positioned around a pixel, and multiple first optical layers 141 arranged corresponding to multiple pixel groups are positioned spaced apart from each other in a second direction. Therefore, one first optical layer 141 positioned around a row of pixels is separable from another first optical layer 141 positioned around a row of pixels.

[0049] The first optical layer 141 may include an organic insulating material in which fine metal particles, such as titanium dioxide particles, are dispersed. Light emitted from multiple light-emitting elements 10 can be scattered by the fine metal particles dispersed in the first optical layer 141 and emitted to the outside.

[0050] The second electrode 170 may be arranged on multiple light-emitting elements 10. The second electrode 170 can be commonly connected to multiple pixels PXL. The second electrode 170 may be a thin electrode that transmits light. The second electrode 170 may be, but is not limited to, a transparent electrode material, such as indium tin oxide (ITO).

[0051] The second electrode 170 extends in a first direction (X-axis direction) and can be separated in a second direction (Y-axis direction). For example, one second electrode 170 may be formed extending in the first direction, and multiple second electrodes 170 extending in the first direction may be arranged to be separated from each other along the second direction. In this case, the second electrodes 170 may be arranged corresponding to each pixel that is arranged to be separated from each other in the second direction. The second electrode 170 may include a first region 171 arranged on the upper surface of the light-emitting element 10 and the upper surface of the first optical layer 141, a second region 172 that contacts the contact electrode 163 and is electrically connected to the contact electrode 163, and a third region 173 arranged on the side surface of the first optical layer 141 and connecting the first region 171 and the second region 172.

[0052] On a plane, multiple second electrodes 170 may each overlap with the first optical layer 141, and the third region 173 can cover the plane outside the first optical layer 141.

[0053] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The first optical layer 141 and the second optical layer 142 may contain the same material (e.g., siloxane). For example, the first optical layer 141 may be a siloxane containing titanium oxide (TiOx), and the second optical layer 142 may be a siloxane that does not contain titanium oxide (TiOx). However, the invention is not necessarily limited to this, and the first optical layer 141 and the second optical layer 142 may be formed from the same material or from different materials.

[0054] According to the embodiment, the second region 172 of the second electrode 170 is connected to the contact electrode 163 in a state where it is formed to be flat overall, so that excessive stress does not concentrate at the point where it is connected to the contact electrode 163. Therefore, the occurrence of cracks in the second electrode 170 can be effectively prevented.

[0055] The second optical layer 142 can cover the second region 172 and the third region 173 of the second electrode 170. The upper surface of the second optical layer 142 and the upper surface of the first region 171 of the second electrode 170 can be coplanar. That is, the first region 171 and the second optical layer 142 can function as a planarization layer. As a result, there is no step on the surface where the black matrix 190 is formed, and the pattern of the black matrix 190 can be easily formed on the first optical layer 141 and the second optical layer 142. However, it is not necessarily limited to this, and the upper surfaces of the second optical layer 142 and the second electrode 170 may have different heights.

[0056] The black matrix 190 may be an organic insulating material to which a black pigment has been added. The second electrode 170 can contact the contact electrode 163 beneath the black matrix 190. Transmissive holes 191 may be formed between the patterns of the black matrix 190, through which light emitted from the light-emitting element 10 is emitted to the outside. The transmissive holes 191 may overlap with the light-emitting element 10 in the Z-axis direction, and a portion of the black matrix 190 may overlap with the first optical layer 141 in the Z-axis direction. Here, the Z-axis direction may be called the third direction. Thus, the black matrix 190 can improve the problem that light emitted from each adjacent light-emitting element 10 is mixed by the first optical layer 141 before being emitted.

[0057] The cover layer 180 may be an organic insulating material that covers the black matrix 190 and the second electrode 170. In Figures 2 and 3, the configuration of the black matrix 190 and the cover layer 180 is omitted.

[0058] The contact electrode 163 is electrically connected to the first connecting wiring RT1 located at the bottom, and the first connecting wiring RT1 may be connected to the pixel driving circuit 20. Therefore, the second electrode 170 can have a cathode voltage applied to it via the contact electrode 163. The first electrode 161 can be electrically connected to the second connecting wiring RT2. This will be described later.

[0059] Referring to Figure 5, the contact electrode 163 and the signal wiring TL1 to TL6 may be arranged on the same plane. The pixel driving circuit 20 may be arranged below the contact electrode 163 and the signal wiring TL1 to TL6. If the pixel driving circuit 20 is a driving driver, multiple driving drivers may be arranged within the display panel.

[0060] The passivation layer 133 allows the contact electrode 163 to be exposed so that it is electrically connected to the second electrode 170. Furthermore, the passivation layer 133 can insulate the signal wiring TL2-TL5 from the second electrode 170. The passivation layer 133 may be made of an inorganic material.

[0061] Referring to Figure 6, the connecting portion 161a of the first electrode 161 extends to one side surface 131 of the bank pattern 130 and can be electrically connected to the connecting wiring RT2 located on the insulating layer 122.

[0062] The first electrode 161, the connecting portion 161a, the signal wiring TL and / or the connecting wiring RT1, RT2 may include single or multilayer metal layers selected from titanium (Ti), molybdenum (Mo), and aluminum (Al).

[0063] The first electrode 161 or the signal wiring TL may be formed to have a metal laminated structure in which multiple metal layers are formed using metal materials with different properties and thicknesses. In this case, the first electrode 161, the connecting portion 161a, and the signal wiring TL can be formed simultaneously by the same manufacturing process. Here, thickness can refer to the width between one surface and the other of the metal layers arranged in the Z direction.

[0064] The first electrode 161 may include a first metal layer ML1 located below the solder pattern 162, a second metal layer ML2 located below the first metal layer ML1, a third metal layer ML3 located below the second metal layer ML2, and a fourth metal layer ML4 located below the third metal layer ML3. When the first electrode 161 is formed from the first metal layer ML1, the second metal layer ML2, the third metal layer ML3, and the fourth metal layer ML4, the first electrode 161 can be patterned by depositing the layers in the order of fourth metal layer ML4 → third metal layer ML3 → second metal layer ML2 → first metal layer ML1, followed by photolithography and etching processes.

[0065] The first metal layer ML1 is positioned in contact with the underside of the solder pattern 162 and is electrically connectable to the solder pattern 162.

[0066] Furthermore, the first metal layer ML1 may include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) that has good adhesion, corrosion resistance, and acid resistance. Here, the first metal layer ML1 may also be called the adhesive layer.

[0067] The second metal layer ML2 may be formed from a material with a different resistance value than the first metal layer ML1 and the third metal layer ML3. In this case, the second metal layer ML2 may be formed from a material with lower light reflectivity but higher resistance than the third metal layer ML3. For example, the second metal layer ML2 may contain titanium (Ti) or molybdenum (Mo).

[0068] The third metal layer ML3 may be formed of a material with higher light reflectivity than the first metal layer ML1. In this case, the third metal layer ML3 may be formed of a material with higher light reflectivity than the second metal layer ML2. For example, the third metal layer ML3 may contain aluminum (Al) or silver (Ag).

[0069] In other words, the light reflectance of the third metal layer ML3 may be greater than the light reflectances of the first metal layer ML1 and the second metal layer ML2.

[0070] The fourth metal layer ML4 may be formed from the same material as the second metal layer ML2. For example, the fourth metal layer ML4 may contain titanium (Ti) or molybdenum (Mo).

[0071] After forming the first metal layer ML1, a reflective aperture OP can be formed on the first electrode 161. The reflective aperture OP may be a region where the first metal layer ML1 and the second metal layer ML2 are removed, exposing only a portion of the third metal layer ML3. The reflective aperture OP may be in the form of surrounding the solder pattern 162 on a plane, or it may be circular or rectangular, but is not limited to these.

[0072] The light emitted from the light-emitting element 10 is reflected off the surface of the third metal layer ML3 exposed by the reflective aperture OP, thereby increasing the light efficiency of the display device.

[0073] The passivation layer 133 is positioned on the first electrode 161 and the signal wiring TL and may include an opening hole 133a that exposes the solder pattern 162. Here, the opening hole 133a that exposes the solder pattern 162 may be called the first opening hole. In this case, a reflective opening OP may be formed to surround the first opening hole.

[0074] The light-emitting element 10 may include a first conductivity type semiconductor layer 10-1, an active layer 10-2 disposed on the first conductivity type semiconductor layer 10-1, and a second conductivity type semiconductor layer 10-3 disposed on the active layer 10-2. A first drive electrode 15 may be disposed below the first conductivity type semiconductor layer 10-1, and a second drive electrode 14 may be disposed above the second conductivity type semiconductor layer 10-3.

[0075] The light-emitting element 10 can be formed on a silicon wafer using methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), and sputtering.

[0076] The first conductivity semiconductor layer 10-1 can be realized from compound semiconductors such as those of the III-V or II-VI groups, and may be doped with a first dopant. The first conductivity semiconductor layer 10-1 may be formed from one or more semiconductor materials having the compositional formula Alx1Iny1Ga(1-x1-y1)N(0≦x1≦1, 0≦y1≦1, 0≦x1+y1≦1), InAlGaN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP, but is not limited to these. If the first dopant is an n-type dopant such as Si, Ge, Sn, Se, or Te, the first conductivity semiconductor layer 10-1 may be an n-type nitride semiconductor layer. However, if the first dopant is a p-type dopant, the first conductivity semiconductor layer 10-1 may be a p-type nitride semiconductor layer.

[0077] The active layer 10-2 is the layer where electrons (or holes) injected through the first conductivity type semiconductor layer 10-1 meet holes (or electrons) injected through the second conductivity type semiconductor layer 10-3. The active layer 10-2 can transition to a lower energy level through the recombination of electrons and holes, thereby generating light with a corresponding wavelength.

[0078] The active layer 10-2 can have any one of the following structures: a single-well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, or a quantum beam structure, and is not limited to these. The active layer 10-2 can generate light in the visible light wavelength range. For example, the active layer 10-2 can output light in any one of the blue, green, and red wavelength ranges.

[0079] The second conductivity semiconductor layer 10-3 may be placed on the active layer 10-2. The second conductivity semiconductor layer 10-3 can be realized from compound semiconductors such as those of the III-V or II-VI groups, and the second conductivity semiconductor layer 10-3 may be doped with a second dopant. The second conductivity semiconductor layer 10-3 may be formed from a semiconductor material having the compositional formula Inx2Aly2Ga1-x2-y2N (0≦x2≦1, 0≦y2≦1, 0≦x2+y2≦1) or a material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. If the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductivity semiconductor layer 10-3 doped with the second dopant may be a p-type semiconductor layer. If the second dopant is an n-type dopant, the second conductive semiconductor layer 10-3 may be an n-type nitride semiconductor layer.

[0080] In the embodiment, the light-emitting structure was described as a vertical structure in which drive electrodes 14 and 15 are arranged at the top and bottom of the light-emitting structure. However, the light-emitting element may have a lateral structure or a flip-chip structure in addition to a vertical structure.

[0081] Referring to Figure 7, the main light-emitting element 12a and the sub-light-emitting element 12b of the sub-pixel may be arranged on the bank pattern 130. The second light-emitting element 12 will be described as an example. The first-first electrode 161-1 connected to the main light-emitting element 12a extends to one side of the bank pattern 130 and can be electrically connected to the second-first connecting wiring RT21 located at the bottom. The first-second electrode 161-2 connected to the sub-light-emitting element 12b extends to the other side of the bank pattern 130 and can be electrically connected to the second-second connecting wiring RT22 located at the bottom.

[0082] The pixel driving circuit 20 can apply an anode voltage to the main light-emitting element 12a via the second-first connecting wiring RT21, and can apply an anode voltage to the sub-light-emitting element 12b via the second-second connecting wiring RT22. The pixel driving circuit 20 can also apply a cathode voltage to the main light-emitting element 12a and the sub-light-emitting element 12b via the first connecting wiring RT1 and the second electrode 170.

[0083] The pixel driving circuit 20 may adjust the brightness by driving only the main light-emitting element 12a, or it may adjust the brightness by driving both the main light-emitting element 12a and the sub-light-emitting element 12b simultaneously. If the main light-emitting element 12a becomes a dark spot, the brightness can be adjusted by driving only the sub-light-emitting element 12b.

[0084] Figure 8 shows a display device according to another embodiment of this specification. Figure 9 is a cross-sectional view along line IV-IV' in Figure 8.

[0085] Referring to Figures 8 and 9, the second electrode 170 can be electrically connected to the contact electrode 163 via a contact hole TH1 formed in the second optical layer 142. The second optical layer 142 may include a contact hole TH1 that exposes the contact electrode 163. The second electrode 170, inserted into the contact hole TH1 of the second optical layer 142, can contact the upper surface of the contact electrode 163. The contact hole TH1 may be formed in the outer region of the pixel.

[0086] Figure 10A shows a display device according to another embodiment of the present invention. Figure 10B is an enlarged view of area B in Figure 10A. Figures 11A, 11B, and 11C are cross-sectional views along the line Y-Y' in Figure 10B. Figures 12A, 12B, and 12C are cross-sectional views along the line Z-Z' in Figure 10A.

[0087] The following explanation will omit details about configurations that are the same as those described in the embodiments shown in Figures 1 to 9, as these will be redundant, and will focus on describing the differences.

[0088] Referring to Figures 10A and 10B, the display panel may include a display area AA on which an image is displayed and a non-display area NA on which no image is displayed. Various wiring and drive circuits can be mounted in the non-display area NA, and a pad area PC on which integrated circuits and printed circuits are connected may be placed. A bending area BE may be placed between the non-display area NA and the pad area PC, and a connecting wiring area CL may be placed between the bending area BE and the pad area PC.

[0089] A data drive circuit or gate drive circuit may be placed in the non-display area NA, and wiring for supplying control signals to control such drive circuits may be placed there. Here, the control signals include various timing signals, including a clock signal, an input data enable signal, and a synchronization signal, and can be received by the pad area PC via wiring placed in the connecting wiring area CL.

[0090] A protective pattern TRE may be formed in the non-display area NA so as to surround the display area AA. The non-display area NA may also include an outer bank pattern 130a arranged to surround the protective pattern TRE, and an outer optical layer 143 arranged to cover the outer bank pattern 130a.

[0091] The pad portion PC may include a first region (Film on Panel, FP) to which a chip-on film (COF) is attached. As will be described later, some of the insulating layer in the first region (FP) can be removed.

[0092] Circuit components can be placed directly on the pad portion PC, or they can be attached to the pad portion PC in the form of COP or COF.

[0093] The circuit components may include a printed circuit board (PCB). The chip-on film (COF) can process various signals input from the printed circuit board (PCB) and output them to the display panel. For this purpose, one end of the chip-on film (COF) may be attached to the display panel, and the other end may be attached to the printed circuit board (PCB).

[0094] A printed circuit board (PCB) can be equipped with various drive circuits, such as timing control units, and various signals generated by these drive circuits can be output to the chip-on-film (COF) side. A printed circuit board (PCB) can include, for example, a flexible printed circuit board (FPCB).

[0095] A display panel and a chip-on film (COF) that overlaps it to some extent can be bonded together by an anisotropic conductive film (ACF) placed between them.

[0096] Referring to other embodiments of the present invention shown in Figures 11A and 12A, the present invention includes a plurality of first electrodes 161 and contact electrodes 163 arranged on a substrate 110, a plurality of light-emitting elements 10 arranged on the plurality of first electrodes 161, a first optical layer 141 arranged between the plurality of light-emitting elements 10, and a second electrode 170 arranged on the plurality of light-emitting elements 10.

[0097] An adhesive layer AD may be placed on the substrate 110. There may be areas in the non-display area NA or the bending area BE where the adhesive layer AD has been removed. This is because the more organic layers there are in the bending area BE, the greater the risk of damage or breakage of the organic layers in the bending area BE. The adhesive layer AD can be selected as, for example, one of the following: adhesive polymer, epoxy resin, UV resin, polyimide-based, acrylate-based, urethane-based, or polydimethylsiloxane (PDMS), but is not limited to these.

[0098] A pixel driving circuit 20, implemented by a driving driver, may be placed on the adhesive layer AD in the display area AA.

[0099] A protective layer 120 may be formed on the adhesive layer AD to protect the pixel driving circuit 20. The protective layer 120 can cover at least a portion or all of the side surface of the pixel driving circuit 20, and can cover a portion of the top surface of the pixel driving circuit 20. The protective layer 120 can cover the entire substrate 110, and can also cover a portion or all of the pad portion PC. The protective layer 120 may, but is not limited to, an organic insulating material, such as photosensitive photoacrylic or photosensitive polyimide.

[0100] A buffer layer 121 covering the pixel driving circuit 20 may be placed on the protective layer 120.

[0101] A first inorganic film INO1 may be placed on the protective layer 120. The first inorganic film INO1 may be formed in a single layer or multiple layers of an inorganic material such as SiNx and / or SiOx. If the protective layer 120 is made of an organic material, it may not be able to prevent the intrusion of moisture and hydrogen, which may cause defects such as corrosion of metal wiring and affect the normal operation of the pixel driving circuit 20. The first inorganic film INO1 is made of an inorganic material and is resistant to the intrusion of external moisture, so it can prevent defects caused by moisture.

[0102] A third connecting wiring RT3 may be placed on the protective layer 120.

[0103] An insulating layer 122 may be placed on the buffer layer 121. An intermediate connecting wiring RTN connected to the firsta connecting wiring RT1a, the seconda connecting wiring RT2a, and the third connecting wiring RT3 may be placed on the buffer layer 121.

[0104] A first insulating layer 122a may be placed on the buffer layer 121, covering the first a-connection wiring RT1a, the second a-connection wiring RT2a, and the intermediate connection wiring RTN.

[0105] On the first insulating layer 122a, the first b connecting wiring RT1b and the second b connecting wiring RT2b may be arranged.

[0106] On the first insulating layer 122a, a second insulating layer 122b covering the first b connecting wiring RT1b and the second b connecting wiring RT2b may be arranged.

[0107] On the second insulating layer 122b, the first c connecting wiring RT1c and the second c connecting wiring RT2c may be arranged.

[0108] On the second insulating layer 122b, a third insulating layer 122c covering the first c connecting wiring RT1c and the second c connecting wiring RT2c may be arranged.

[0109] On the third insulating layer 122c, the first d connecting wiring RT1d and the second d connecting wiring RT2d may be arranged.

[0110] On the third insulating layer 122c, a fourth insulating layer 122d covering the first d connecting wiring RT1d and the second d connecting wiring RT2d may be arranged. The more insulating layers there are in the bending region BE, the more likely it is that the insulating layer will be damaged during bending. Although not shown, the fourth insulating layer 122d may not be arranged in the bending region BE and in the regions of the non-display region NA and the connecting wiring region CL adjacent to the bending region BE. In the bending region BE, n (0 < n < 5 and n is an integer) insulating layers may be arranged.

[0111] On the fourth insulating layer 122d, a plurality of signal wirings TL, contact electrodes, and the seventh signal wiring may be arranged. That is, the plurality of signal wirings TL, contact electrodes, and the seventh signal wiring may be arranged on the same layer. Arranged on the same layer can mean that they are formed entirely on any one layer and then separated and formed by a patterning process or the like. However, it is not necessarily limited to this. The heights may be different, but as long as a plurality of wirings or electrodes are formed on the same layer, the plurality of wirings or electrodes can be defined as being arranged on the same layer.

[0112] The first a-connection wiring RT1a, the first b-connection wiring RT1b, the first c-connection wiring RT1c, the first d-connection wiring RT1d, and the multiple signal wirings TL can be electrically connected via contact holes that penetrate the insulating layer and inorganic film on which each is located.

[0113] The seconda connecting wiring RT2a, the secondb connecting wiring RT2b, the secondc connecting wiring RT2c, the secondd connecting wiring RT2d, and the contact electrode 163 can be electrically connected via contact holes that penetrate the insulating layer and inorganic film on which each is located.

[0114] The anode voltage supplied from the pixel driving circuit 20 can be supplied to the light-emitting element 10 via the first a-connection wiring RT1a, the first b-connection wiring RT1b, the first c-connection wiring RT1c, the first d-connection wiring RT1d, the multiple signal wirings TL, and the first electrode 161.

[0115] The cathode voltage supplied from the pixel driving circuit 20 can be supplied to the light-emitting element 10 via the seconda connection wiring RT2a, the secondb connection wiring RT2b, the secondc connection wiring RT2c, the secondd connection wiring RT2d, the multiple signal wirings TL, and the first electrode 161.

[0116] The aforementioned connecting wiring is illustrative, and each connecting wiring may include multiple wiring patterns arranged in different layers separated by one or more insulating layers. Wiring patterns arranged in different layers can be electrically connected via contact holes that penetrate the insulating layers.

[0117] The third connecting wire RT3 is positioned on the protective layer 120. The third connecting wire RT3 can extend from the display area AA to the pad area PC.

[0118] The fourth connecting wiring is positioned on the first insulating layer 122a and can extend to the pad portion PC and the connecting wiring area CL.

[0119] The fifth connecting wiring is positioned on the second insulating layer 122b and can extend to the pad portion PC and the connecting wiring area CL.

[0120] The sixth connecting wire is positioned on the third insulating layer 122c and can extend to the pad portion PC and the connecting wire area CL.

[0121] The seventh signal wiring is positioned on the fourth insulating layer 122d and can extend to the pad area PC and the connecting wiring area CL.

[0122] Signals from circuit components such as printed circuit boards (PCBs) can be transmitted to the pixel driving circuit 20 located in the display area AA via chip-on-film (COF), the 7th signal wiring, the 6th coupling wiring, the 5th coupling wiring, the 4th coupling wiring, and the 3rd coupling wiring RT3.

[0123] Multiple bank patterns 130 may be arranged on the insulating layer 122. At least one light-emitting element 10 may be arranged on each bank pattern 130. For example, referring to Figures 3 and 11A and 12A, the first light-emitting element 11 may be arranged on the first bank pattern 130a, the second light-emitting element 12 on the second bank pattern 130b, and the third light-emitting element 13 on the third bank pattern 130c.

[0124] A first electrode 161 may be placed on the bank pattern 130. In this embodiment, the first electrode 161 includes a plurality of metal layers ML2, ML3, and ML4, with the first metal layer ML1 removed during the formation process. In another step, the first metal layer ML1 may be placed only in the region overlapping with the first electrode 161 and the light-emitting element 10. An opening OP may be placed on the first electrode 161. In this embodiment, the opening OP can be formed by removing the second metal layer ML2. The first metal layer ML1 does not have to be placed on the pad portion PC. Furthermore, the first metal layer ML1 does not have to be placed in any region other than the region overlapping with the light-emitting element 10.

[0125] A solder pattern 162 may be placed on the first electrode 161. The solder pattern 162 may, but is not limited to, indium (In), tin (Sn), or an alloy thereof. The solder pattern 162 may include a first portion 162a and a second portion 162b. The first portion 162a may be indium (In), and the second portion 162b may be gold (Au). The first portion 162a and the second portion 162b can be bonded by pressure when the light-emitting element 10 is transferred, and then eutectic bonded by heat. When the second portion 162b is subjected to pressure, a portion of the second portion 162b may cover at least a portion or all of the side surface of the first portion 162a. In this case, the contact area between the first portion 162a and the second portion 162b is increased, resulting in higher adhesion and better electrical signal transmission.

[0126] Multiple light-emitting elements 10 can each be mounted on the solder pattern 162.

[0127] The first-1 optical layer 141a can cover multiple light-emitting elements 10 and bank patterns 130. Therefore, the first-1 optical layer 141a can cover the spaces between the multiple light-emitting elements 10 and the spaces between the multiple bank patterns 130. The planar arrangement of the first-1 optical layer 141a is the same as the planar arrangement of the first optical layer 141.

[0128] The second electrode 170 may be arranged on multiple light-emitting elements 10. The second electrode 170 can be commonly connected to multiple pixels PXL.

[0129] In the non-display area NA, a second protective pattern TRE2 may be formed so as to surround the display area AA. The second protective pattern TRE2 may be formed by removing the first to fourth insulating layers 122a, 122b, 122c, 122d and the second optical layer 142 after the first to second optical layers 141b have been placed. In the non-display area NA, an outer bank pattern 130a may be placed so as to surround the second protective pattern TRE2, and an outer optical layer 143 may be placed so as to cover the outer bank pattern 130a. The outer bank pattern 130a and the outer optical layer 143 may be formed on the remaining three surfaces of the four surfaces surrounding the display panel, excluding the surface adjacent to the bending area BE. The outer bank pattern 130a may be formed using the same process and material as the bank pattern 130. The outer optical layer 143 may be formed using the same process and material as the first optical layer 141a.

[0130] After forming the first protective pattern TRE1 and the second protective pattern TRE2, the second inorganic film INO2 can be positioned to cover the display area AA and the non-display area NA. The second inorganic film INO2 completely covers the interiors of the first protective pattern TRE1 and the second protective pattern TRE2, and a portion of the second inorganic film INO2 is in contact with the first inorganic film INO1 inside the second protective pattern TRE2. Alternatively, the second protective pattern TRE2 may be positioned between the second electrode 170 and the first-to-second optical layer 141b in a region adjacent to the light-emitting element 10 in the process sequence. The second protective pattern TRE2 can completely cover the outer optical layer 143 in the non-display area NA, or it can only cover a portion of it. The second inorganic film INO2 may be formed from the same material as the first inorganic film INO1, but is not limited to this.

[0131] In this way, by arranging the first protective pattern TRE1, the second protective pattern TRE2, the first inorganic film INO1, and the second inorganic film INO2, it is possible to prevent or delay the intrusion of foreign substances such as moisture and hydrogen from the outside, thereby preventing defects such as corrosion or damage to metal wiring inside the display panel. Furthermore, by arranging the outer optical layer 143 and the outer bank pattern 130a, the thickness of the second optical layer 142 and the second inorganic film INO2 arranged in the non-display area NA can be the same as or approximately the same as that of the display area AA, thereby preventing defects in which organic layers such as the second optical layer 142 flow out of the non-display area NA of the display panel due to process problems.

[0132] The first- and second optical layers 141b may be arranged on the second electrode 170 so as to overlap with the first- and second optical layers 141a. By placing the first- and second optical layers 141b on the second electrode 170, the amount of light emitted to the front can be increased.

[0133] After forming the first-1 optical layer 141a, the portion of the first-1 optical layer 141a adjacent to the upper surface of the light-emitting element 10 is removed in order to bring the second electrode 170 into contact with the light-emitting element 10. Subsequently, the second electrode 170 is placed on the first-1 optical layer 141a. Furthermore, in order to supply a cathode voltage to the second electrode 170, the first-1 optical layer 141a or the first-2 optical layer 141b is removed to form the first protection pattern TRE1. The second electrode 170 is electrically connected to the signal wiring TL formed on the fourth insulating layer 122d via the first protection pattern TRE1 and can receive the cathode voltage.

[0134] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be placed on the insulating layer 122 together with the first optical layer 141. The first-1 optical layer 141a and the first-2 optical layer 141b may be placed in the display area AA, but the second optical layer 142 may be placed on the display area AA and the non-display area NA. The black matrix 190 may be placed on the first-2 optical layer 141b. The black matrix 190 may be placed on the first-2 optical layer 141b, the second inorganic film INO2, and the second optical layer 142. Transmissive holes may be formed between the patterns of the black matrix 190, through which light emitted from the light-emitting element 10 is emitted to the outside.

[0135] The cover layer 180 may be an organic insulating material that covers the black matrix 190 and the second inorganic film INO2.

[0136] Although not shown in the drawing, in order to protect the multiple connecting wires RT1a, RT1b, RT1c, RT1d, RT2a, RT2b, RT2c, and RT2d arranged within the display area AA from foreign matter such as moisture, an inorganic film can be further arranged to cover each connecting wire after it has been formed. For example, after forming the firsta connecting wire RT1a and the seconda connecting wire RT2a, an inorganic film can be additionally arranged to cover the firsta connecting wire RT1a and the seconda connecting wire RT2a and the buffer layer 121.

[0137] According to one embodiment of the present invention shown in Figure 11A, the third connecting wiring RT3 can transmit electrical signals transmitted from the pad portion to the pixel driving circuit 20 via the intermediate connecting wiring RTN and the firsta connecting wiring RT1a and the seconda connecting wiring RT2a.

[0138] The intermediate connecting wiring RTN may be formed using the same process and material as the first connecting wiring RT1a and the second connecting wiring RT2a.

[0139] The second protective pattern TRE2 is formed such that the upper part of the third connecting wiring RT3 is exposed, and thereafter it may be covered by the second inorganic film INO2.

[0140] The third connecting wiring RT3 is capable of direct contact with a portion of the first inorganic film INO1 and at least a portion of the second inorganic film INO2.

[0141] According to one embodiment of the present invention shown in Figures 11A and 12A, the second protective pattern TRE2, the buffer layer 121, the plurality of insulating layers 122a, 122b, 122c, 122d, and the second optical layer 142 may be formed without flat portions at their boundaries and have the same taper.

[0142] According to another embodiment of the present invention shown in Figures 11B and 12B, when forming the second protective pattern TRE2, the multiple insulating layers 122a, 122b, 122c, 122d and the second optical layer 142 can be removed in a separate process by the process environment and equipment. That is, after placing the fourth insulating layer 122d, the multiple insulating layers 122a, 122b, 122c, 122d in the area where the second protective pattern TRE2 is formed can be temporarily removed, and thereafter, the second optical layer 142 can be placed and removed to form the second protective pattern TRE2. This makes it possible to form a region with a flat surface at the boundary between the uppermost surfaces of the multiple insulating layers 122a, 122b, 122c, and 122d and the second optical layer 142, and the inclination angle (taper) of the second inorganic film INO2 placed on the inclined surfaces of the multiple insulating layers 122a, 122b, 122c, and 122d may be different from the inclination angle of the second inorganic film INO2 placed on the inclined surface of the second optical layer 142.

[0143] According to other embodiments of the present invention shown in Figures 11C and 12C, when forming the second protective pattern TRE2, the process environment and apparatus can remove each insulating layer contained in the plurality of insulating layers 122a, 122b, 122c, and 122d from the second optical layer 142 in separate processes for each layer. This makes it possible to form regions with flat surfaces at the boundaries between each insulating layer 122a, 122b, 122c, and 122d, and at the boundary between the fourth insulating layer 122d and the second optical layer 142, and the taper angles of the second inorganic film INO2 placed on the inclined surfaces of each insulating layer 122a, 122b, 122c, and 122d and the second optical layer 142 may be different from each other.

[0144] In the embodiment, the light-emitting structure was described as a vertical structure in which drive electrodes 14 and 15 are arranged at the top and bottom of the light-emitting structure. However, the light-emitting element may have a lateral structure or a flip-chip structure in addition to a vertical structure.

[0145] The display devices according to embodiments of the present invention are applicable to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic organizers, e-books, PMPs (portable multimedia players), PDAs (personal digital assistants), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation systems, vehicle display devices, theater display devices, televisions, wallpaper devices, signage devices, game consoles, laptop computers, monitors, cameras, camcorders, and home appliances, etc. Furthermore, one or more display devices according to embodiments of this specification can be applied to organic light-emitting illumination devices or inorganic light-emitting illumination devices.

[0146] A display device according to one or more embodiments of the present invention can be described as follows.

[0147] A display device according to one or more embodiments of the present invention includes a substrate including a display area, a non-display area, and a bending area, and includes an adhesive layer disposed on the substrate, a pixel driving circuit disposed on the adhesive layer in the display area, a buffer layer disposed on the adhesive layer and covering the pixel driving circuit, a second protective pattern disposed on the non-display area so as to surround the display area, a first inorganic film disposed on the pixel driving circuit, and a second inorganic film disposed on the display area, the second protective pattern, and the non-display area, wherein the first inorganic film and the second inorganic film may overlap in areas that overlap with the second protective pattern.

[0148] The first inorganic film can extend only to the region that overlaps with the second protective pattern.

[0149] Furthermore, a display device according to one or more embodiments of the present invention may further include a protective layer disposed on the adhesive layer and below the first inorganic film, the protective layer covering at least a portion or all of the side surface of the pixel driving circuit; a plurality of insulating layers disposed on the buffer; a bank pattern disposed on the plurality of insulating layers; a plurality of light-emitting elements disposed on the bank pattern; a first-first optical layer disposed on at least one of the plurality of insulating layers and covering the plurality of light-emitting elements and the bank pattern; and a second optical layer disposed in the same layer as the first-first optical layer and arranged to surround the side surface of the first-first optical layer.

[0150] Furthermore, a display device according to one or more embodiments of the present invention further includes an outer bank pattern formed in the same layer as the bank pattern, and an outer optical layer disposed to cover the outer bank pattern, wherein the second inorganic film is disposed on the outer optical layer, and the outer bank pattern may be disposed further from the display area than the second protective pattern.

[0151] Furthermore, a display device according to one or more embodiments of the present invention further includes a plurality of connecting wires arranged on the plurality of insulating layers, and a third connecting wire arranged on the protective layer so as to extend from the bending region to the display region, wherein the surface of the third connecting wire may overlap with the first inorganic film and the second inorganic film in a region that overlaps with the second protective pattern.

[0152] The second protective pattern may be formed by removing the plurality of insulating layers and the second optical layer.

[0153] The second inorganic film, positioned on the inclined surface within the second protective pattern, can have the same angle.

[0154] The second inorganic film, positioned on the inclined surface within the second protective pattern, may have a flat surface on the uppermost surface of the plurality of insulating layers.

[0155] The second inorganic film, positioned on the inclined surface within the second protective pattern, may have a flat surface on the upper surface of each of the plurality of insulating layers.

[0156] Furthermore, a display device according to one or more embodiments of the present invention includes a first electrode arranged on the bank pattern, a first metal layer arranged on the first electrode, a solder pattern arranged on the first metal layer, and a second electrode arranged on one of the plurality of light-emitting elements, wherein the one of the plurality of light-emitting elements may be arranged on the solder pattern.

[0157] Therefore, since the contents of the specification describing the problem the invention aims to solve, the means for solving the problem, and the effects of the invention do not specify the essential features of the claims, the scope of rights of the claims is not limited by the matters described in the specification.

[0158] While embodiments of the present invention have been described in more detail above with reference to the attached drawings, the present invention is not necessarily limited to these embodiments and can be implemented in various modified forms without departing from the technical concept of the present invention. Therefore, the embodiments disclosed herein are for illustrative purposes only, not to limit the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. Accordingly, the embodiments described above should be understood to be illustrative and non-limiting in all respects. The scope of protection of the present invention should be interpreted by the claims, and all technical concepts within an equivalent scope should be interpreted as being included within the scope of the rights of the present invention. [Explanation of symbols]

[0159] 10: Light-emitting element 10: Circuit board 20: Pixel driving circuit 121: Buffer layer 122: Insulating layer 130: Bank Pattern 141: 1st optical layer 142:Second optical layer 161: 1st electrode 163: Contact electrodes 170:Second electrode

Claims

1. A substrate including a display area, a non-display area, and a bending area, An adhesive layer disposed on the substrate, A pixel driving circuit arranged on the adhesive layer in the display area, A buffer layer disposed on the adhesive layer and covering the pixel driving circuit, A second protective pattern is arranged so as to surround the display area with the non-display area, A first inorganic film arranged on the pixel driving circuit, The second protective pattern and the second inorganic film disposed on the display area and the non-display area, A display device in which the first inorganic film and the second inorganic film overlap within the region of the second protective pattern.

2. The display device according to claim 1, wherein the first inorganic film is stretched and brought into contact with the second inorganic film.

3. A protective layer disposed on the adhesive layer and below the first inorganic film, the protective layer covering at least a portion or all of the side surface of the pixel driving circuit, Multiple insulating layers arranged on the buffer layer, A bank pattern arranged on the plurality of insulating layers, Multiple light-emitting elements arranged on the bank pattern, A first-first optical layer is disposed on at least one of the plurality of insulating layers and covers the plurality of light-emitting elements and the bank pattern, The display device according to claim 1, further comprising a second optical layer disposed on the same layer as the first-1 optical layer and disposed so as to surround the side surface of the first-1 optical layer.

4. An outer bank pattern formed in the same layer as the bank pattern and arranged to surround the second protective pattern, The system further includes an outer optical layer arranged to cover the outer bank pattern, The second inorganic film is placed on the outer optical layer. The display device according to claim 3, wherein the outer bank pattern is positioned further from the display area than the second protective pattern.

5. Multiple connecting wires, each arranged on the aforementioned multiple insulating layers, The present invention further includes a third connecting wire disposed on the protective layer so as to extend from the bending region to the display region, The display device according to claim 4, wherein the surface of the third connecting wiring overlaps with the first inorganic film and the second inorganic film within the region of the second protective pattern.

6. The display device according to claim 5, wherein the second protective pattern does not have the plurality of insulating layers and the second optical layer.

7. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protective pattern has the same angle.

8. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protective pattern has a flat surface on the uppermost surface of the plurality of insulating layers.

9. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protective pattern has a flat surface on the upper surface of each of the plurality of insulating layers.

10. A first electrode arranged on the bank pattern, A first metal layer disposed on the first electrode, A solder pattern arranged on the first metal layer, A second electrode is placed on one of the plurality of light-emitting elements, The display device according to claim 7, wherein one of the plurality of light-emitting elements is arranged on the solder pattern.

11. A first-second optical layer is placed on the second electrode and overlaps with the first-first optical layer, The display device according to claim 10, further comprising a first protective pattern disposed on the plurality of insulating layers and formed without at least one of the 1-1 optical layer and the 1-2 optical layer.

12. The display device according to claim 1, wherein at least one of the non-display area and the bending area has an area that does not have the adhesive layer.

13. The outer bank pattern and the bank pattern contain the same material. The display device according to claim 4, wherein the outer optical layer and the first-first optical layer comprise the same material.

Images