Electroluminescent display device, and method for driving the electroluminescent display device.

Abstract

To decrease a luminance deviation occurring between a sensing pixel and a non-sensing pixel.SOLUTION: An electroluminescent display apparatus comprises: a display panel including a target pixel for sensing; a data driver that supplies display data voltage to the target pixel in an image writing period of one frame, supplies sensing data voltage to the target pixel in a sensing period, supplies luminance compensation data voltage to the target pixel in a sensing line compensation period, and supplies luminance recovery data voltage to the target pixel in a recovery period; and a sensing circuit that obtains an electrical characteristic of the target pixel in the sensing period. The image writing period, the sensing period, the sensing line compensation period, and the recovery period are sequentially arranged. The luminance compensation data voltage has a voltage level higher than display data voltage, and the luminance recovery data voltage is set within a predetermined recovery voltage range including the display data voltage and the luminance compensation data voltage.SELECTED DRAWING: Figure 11

Description

Technical Field

[0001] This specification relates to an electroluminescent display device and a driving method thereof.

Background Art

[0002] Each pixel of an electroluminescent display device includes a light-emitting element that emits light by itself. The electroluminescent display device controls the light emission amount of the light-emitting element with a data voltage according to the gradation of video data to adjust the luminance.

[0003] The electroluminescent display device employs an external compensation technique to improve the quality of an image. The external compensation technique senses the electrical characteristics of pixels during a video display and compensates for the deviation in electrical characteristics between pixels by adjusting the data of the input video based on the sensed results.

[0004] The electrical characteristics of pixels may be sensed during the display of an input video. At this time, the sensing pixel stops emitting light for a while during the sensing period. That is, the electrical characteristics of the pixel are performed in a non-light-emitting state. As a result, a luminance deviation may occur between the sensing pixel and the non-sensing pixel. Such a problem becomes more prominent during VRR (Variable Refresh Rate) driving in which the frame frequency changes according to the input video.

Summary of the Invention

Problems to be Solved by the Invention

[0005] Therefore, the present embodiment provides an electroluminescent display device capable of reducing the luminance deviation occurring between a sensing pixel and a non-sensing pixel, and a driving method of the electroluminescent display device.

Means for Solving the Problems

[0006] The electroluminescent display device according to this embodiment includes a display panel equipped with target pixels to be sensed, a data driver that supplies a display data voltage to the target pixels in a video writing section of one frame, a sensing data voltage to the target pixels in a sensing section, a brightness compensation data voltage to the target pixels in a sensing line compensation section, and a brightness recovery data voltage to the target pixels in a recovery section, and a sensing circuit that senses the electrical characteristics of the target pixels in the sensing section according to the sensing data voltage, wherein the video writing section, the sensing section, the sensing line compensation section, and the recovery section are arranged in order, the brightness compensation data voltage has a higher voltage level than the display data voltage, and the brightness recovery data voltage is determined within a predetermined recovery voltage range that includes the display data voltage and the brightness compensation data voltage.

[0007] The driving method for an electroluminescent display device having a display panel equipped with a target pixel to be sensed according to this embodiment includes the steps of supplying a display data voltage to the target pixel in a video writing section of one frame, supplying a sensing data voltage to the target pixel in a sensing section, supplying a luminance compensation data voltage to the target pixel in a sensing line compensation section, and supplying a luminance recovery data voltage to the target pixel in a recovery section, and sensing the electrical characteristics of the target pixel in the sensing section according to the sensing data voltage, wherein the video writing section, the sensing section, the sensing line compensation section, and the recovery section are arranged in order, the luminance compensation data voltage has a higher voltage level than the display data voltage, and the luminance recovery data voltage is determined within a predetermined recovery voltage range that includes the display data voltage and the luminance compensation data voltage. [Effects of the Invention]

[0008] This embodiment can effectively reduce the brightness deviation that occurs between sensing pixels and non-sensing pixels.

[0009] The effects of this embodiment are not limited to those exemplified above, and a wider variety of effects are included in this specification. [Brief explanation of the drawing]

[0010] [Figure 1] This figure shows the electroluminescent display device according to this embodiment. [Figure 2] This figure shows the pixel array included in the electroluminescent display device shown in Figure 1. [Figure 3] This figure shows one pixel included in the pixel array in Figure 2 and the sensing circuit connected to it. [Figure 4] This is a diagram to explain VRR drive. [Figure 5] This is a diagram to explain VRR drive. [Figure 6] This diagram shows how RT sensing drive, SLC drive, and recovery drive proceed, targeting a different sensing pixel line at a different position each frame. [Figure 7] This figure shows an example where the compensation gain is set differentially according to the length of the SLC section. [Figure 8] This figure shows the display driving of non-sensing pixel lines. [Figure 9] This figure shows the display driving of non-sensing pixel lines. [Figure 10] As a comparative example, this figure shows that long-duration SLC driving is performed following RT sensing driving on the sensing pixel line. [Figure 11] As a comparative example, this figure shows that long-duration SLC driving is performed following RT sensing driving on the sensing pixel line. [Figure 12] This figure shows, as one embodiment, the RT sensing drive, SLC drive, and recovery RECV drive of the sensing pixel line. [Figure 13]This figure shows, as one embodiment, the RT sensing drive, SLC drive, and recovery RECV drive of the sensing pixel line. [Figure 14] This figure shows the driving method for the electroluminescent display device according to this embodiment. [Modes for carrying out the invention]

[0011] The advantages and features of this specification, as well as methods for achieving them, will become apparent by referring to the embodiments described below in detail with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below and should be implemented in various forms, and these embodiments are provided to ensure that the disclosure of this specification is complete and to fully inform those ordinary skill in the art to which this specification belongs, and this specification is defined only by the scope of its claims.

[0012] The shapes, sizes, proportions, angles, numbers, etc., disclosed in the drawings illustrating embodiments of this specification are illustrative and not limited to those shown herein. Throughout the specification, the same reference numeral refers to the same component. Wherever “includes,” “has,” “achieved,” etc., are used herein, other parts may be added unless “only” is used. This includes cases where a component is expressed singly and includes multiple components unless otherwise explicitly stated.

[0013] When interpreting the constituent elements, they shall be interpreted as including a margin of error, even if not explicitly stated otherwise.

[0014] When describing the spatial relationship between two parts, for example, "above," "above," "below," or "next to," one or more other parts may be placed between the two parts unless "immediately" or "directly" is used.

[0015] The terms such as "first" and "second" may be used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical idea of this specification.

[0016] Throughout the specification, the same reference numerals refer to substantially the same components. In this specification, the pixel circuit and the gate driver formed on the substrate of the display panel may be implemented by transistors having an n-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) structure, but are not limited thereto, and can be implemented by transistors having a p-type MOSFET structure. A transistor is a three-electrode element including a gate, a source, and a drain. The source is an electrode that supplies carriers to the transistor. Inside the transistor, carriers start flowing from the source. The drain is an electrode through which carriers exit the transistor to the outside. That is, in a MOSFET, the flow of carriers is from the source to the drain. In the case of an n-type transistor (NMOS), since the carriers are electrons, the source voltage has a lower voltage than the drain voltage so that electrons flow from the source to the drain. In an n-type transistor, since electrons flow from the source toward the drain, the direction of the current is from the drain to the source. On the other hand, in the case of a p-type transistor (PMOS), since the carriers are holes, the source voltage is higher than the drain voltage so that holes flow from the source to the drain. In a p-type transistor, since holes flow from the source toward the drain, the current flows from the source to the drain. It should be noted that the source and drain of a MOSFET are not fixed. For example, the source and drain of a MOSFET can be changed according to the applied voltage. Therefore, in the description of the embodiments of this specification, one of the source and the drain is described as the first electrode, and the other of the source and the drain is described as the second electrode.

[0017] In the following description, when it is determined that a detailed description of known functions or configurations related to this specification may unnecessarily obscure the gist of this specification, the detailed description thereof will be omitted. Hereinafter, embodiments of this specification will be described in detail with reference to the accompanying drawings.

[0018] FIG. 1 is a diagram showing an electroluminescent display device according to this embodiment. FIG. 2 is a diagram showing a pixel array included in the electroluminescent display device of FIG. 1. FIG. 3 is a diagram showing one pixel included in the pixel array of FIG. 2 and a sensing circuit connected thereto. FIGS. 4 and 5 are diagrams for explaining VRR driving.

[0019] Referring to FIGS. 1 and 2, the electroluminescent display device according to this embodiment may include a display panel 10, a timing controller 11, a data driver 12, a gate driver 13, and a sensing circuit 122.

[0020] The display panel 10 may include a plurality of data lines 15 and lead-out lines 16, and a plurality of gate lines 17. And pixel PXLs may be arranged in the intersection regions of the data lines 15, the lead-out lines 16, and the gate lines 17. A pixel array as shown in FIG. 2 may be formed in the display area AA of the display panel 10 by the pixel PXLs arranged in a matrix.

[0021] In the pixel array, pixel lines PL1 to PL4 may be realized by pixel PXLs adjacent to each other in the extending direction of the gate line 17 (i.e., the X-axis direction). Each of the pixel lines PL1 to PL4 includes a plurality of pixel PXLs adjacent to each other in the X-axis direction. The pixel PXLs constituting the same pixel line PL may be connected to the same gate line 17 and may be connected to different data lines 15. The pixel PXLs constituting the same pixel line PL may be connected to different lead-out lines 16. However, it is not limited thereto, and a plurality of pixel PXLs for realizing different colors may share one lead-out line 16.

[0022] In a pixel array, each pixel PXL may be connected to a data voltage supply unit DAC, 121 via one of the data lines 15, to a sensing circuit 122 via one of the readout lines 16, and to a gate driver 13 via one of the gate lines 17. Additionally, each pixel PXL may be connected to a high-potential pixel power supply EVDD via a high-potential power supply line 18.

[0023] In a pixel array, a pixel PXL includes a pixel that embodies a first color, a pixel that embodies a second color, a pixel that embodies a third color, and may further include a pixel that embodies a fourth color. The first to fourth colors can be any one of red, green, blue, or white.

[0024] Each pixel PXL can be implemented as shown in Figure 3.

[0025] Referring to Figure 3, a single pixel PXL located on the k-th (where k is an integer) pixel line PLk may include a light-emitting element EL, a drive transistor DT, a storage capacitor Cst, a first switch transistor (ST1), and a second switch transistor ST2, where the first switch transistor ST1 and the second switch transistor ST2 are connected to the same gate line 17(k).

[0026] The light-emitting element (EL) emits light in response to the pixel current. The EL includes an anode electrode connected to a source node Ns, a cathode electrode connected to a low-potential pixel power supply EVSS, and an organic or inorganic compound layer located between the anode and cathode electrodes. The organic or inorganic compound layer consists of a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The EL turns on when the voltage applied to the anode electrode becomes higher than the EL operating point voltage compared to the low-potential pixel power supply EVSS applied to the cathode electrode. When the EL turns on, holes that have passed through the hole transport layer HTL and electrons that have passed through the electron transport layer ETL move to the emission layer EML to form excitons, and as a result, light is generated in the emission layer EML.

[0027] The drive transistor DT is a drive element. The drive transistor DT generates the pixel current supplied to the light-emitting element EL in accordance with the voltage difference between the gate node Ng and the source node Ns. The drive transistor DT includes a gate electrode connected to the gate node Ng, a first electrode connected to the high-potential pixel power supply EVDD, and a second electrode connected to the source node Ns.

[0028] The storage capacitor Cst is connected between the gate node Ng and the source node Ns, and stores the gate-source voltage of the drive transistor DT.

[0029] The first switch transistor ST1 electrically connects the data line 15 and the gate node Ng in response to the gate signal SCAN(k), and applies the data voltage VDATA charged on the data line 15 to the gate node Ng. The first switch transistor ST1 comprises a gate electrode connected to the gate line 17(k), a first electrode connected to the data line 15, and a second electrode connected to the gate node Ng.

[0030] The second switch transistor ST2 electrically connects the readout line 16 and the source node Ns in response to the gate signal SCAN(k), and transmits the voltage of the source node Ns corresponding to the pixel current to the readout line 16, or applies a reference voltage Vref charged on the readout line 16 to the source node Ns. The second switch transistor ST2 comprises a gate electrode connected to the gate line 17(k), a first electrode connected to the source node Ns, and a second electrode connected to the readout line 16.

[0031] Such a pixel structure is merely an example, and the technical concepts described herein are not limited to pixel structures. It should be noted that the technical concepts described herein can be applied to various pixel structures that can sense the electrical characteristics (threshold voltage or electron mobility) of a drive transistor DT.

[0032] The timing controller 11 may be connected to the host system 14 via a first interface circuit and to the data driver 12 via a second interface circuit. The first interface circuit and the second interface circuit may be the same or different from each other.

[0033] The timing controller 11 receives a vertical synchronization signal Vsync, a data enable signal DE, input video data DATA, etc., from the host system 14 via the first interface circuit.

[0034] As shown in Figure 4, a frame can be defined by the vertical synchronization signal Vsync and the data enable signal DE, and a vertical active interval ACT and a vertical blank interval BLK can be defined within a frame. A frame can be defined as one period of the vertical synchronization signal Vsync. The vertical active interval ACT can be defined as the interval in a frame during which the data enable signal DE transitions between logic high and logic low. The vertical blank interval BLK can be defined as the interval in a frame during which the data enable signal DE remains logic low.

[0035] The length of the vertical blank section BLK can be varied by the vertical synchronization signal Vsync and the data enable signal DE. The host system 14 can change the frame frequency during operation by varying the length of the vertical blank section BLK based on the complexity of the input video data DATA, the amount of inter-frame variation of the input video data DATA, etc.

[0036] When the input video data is complex and the amount of change between frames is large (for example, game footage with many scene changes), the host system 14 may shorten the length of the vertical blank section BLK to which each frame belongs to increase the frame frequency. Conversely, when the amount of change between frames is small or nonexistent, such as in still images, the host system 14 may lengthen the length of the vertical blank section BLK to which each frame belongs to decrease the frame frequency. This technique of varying the frame frequency by adjusting the length of the vertical blank section BLK is called VRR (Variable Refresh Rate) technology. VRR technology is used to ensure sufficient rendering time for graphics processing in the host system 14, suppress tearing of the video, and provide smoother video.

[0037] The electroluminescent display device of this embodiment may be a variable frequency display device operating in VRR mode. In VRR mode, the frame frequency can change within a preset variable frequency range.

[0038] For example, the frame frequency can vary to A, B, and CHz, as shown in Figure 5. The length of the vertical active section ACT is determined based on the maximum frame frequency REF within the frequency variable range. The length of the vertical active section ACT is fixed regardless of the change in frame frequency. In contrast, the length of the vertical blank section BLK changes according to the frame frequency. The smaller the frame frequency, the longer the length of the vertical blank section BLK. In Figure 5, the length of the vertical blank section BLK is BLK1 for AHz, BLK2 for BHz, and BLK3 for CHz. Since the relative magnitude of the frame frequencies is A>B>C, BLK1 <BLK2<BLK3となる。

[0039] The host system 14 can be mounted on a system board. The host system 14 may include an input unit for receiving user commands / data, a main power supply unit for generating main power, a VRR control circuit for varying the frame frequency according to the input video, and an output unit for outputting transmission signals. The host system 14 can be implemented in, but is not limited to, an application processor, a personal computer, a set-top box, or a graphics processor unit.

[0040] The timing controller 11 generates timing control signals necessary for display driving, real-time (RT) sensing driving, sensing line compensation (SLC) driving, and recovery driving, and these timing control signals can be provided to the data driver 12 and gate driver 13 via a second interface circuit. The timing control signals include a data timing control signal (DDC) for controlling the operation timing of the data driver 12 and a gate timing control signal (GDC) for controlling the operation timing of the gate driver 13.

[0041] Referring further to Figure 4, the display drive is for image writing, which takes place during the vertical active interval (ACT). During the vertical active interval (ACT), image writing is performed sequentially for all pixels (PXL) in the pixel array. That is, all pixels (PXL) emit light during the vertical active interval (ACT) according to the sequential image writing order, which proceeds on a pixel-line basis.

[0042] RT sensing is performed within the vertical blank section (BLK) where no image is written. RT sensing targets a single pixel line at a predetermined location and senses the electrical characteristics (i.e., the threshold voltage or electron mobility of the driving transistor) of the target pixel belonging to that pixel line. The position of the pixel line being RT-sensed changes from frame to frame. To improve sensing performance, the target pixel ceases emitting light during the RT sensing section.

[0043] RT sensing drive may be performed sequentially or non-sequentially, one pixel line at a time, within the vertical blank section (BLK) of each frame. The remaining pixel lines, excluding the one pixel line driven by RT sensing within the vertical blank section (BLK) of each frame, maintain the illumination state (i.e., display state) of the previous vertical active section (ACT).

[0044] SLC driving is performed on the target pixel of a pixel line (i.e., a sensing pixel line) where RT sensing driving has been completed. SLC driving is intended to compensate for the brightness loss that occurs when the target pixel is not emitting light during the RT sensing interval. The brightness compensation data voltage for SLC driving is greater than the display data voltage written for display driving.

[0045] Recovery (RECV) drive is performed on target pixels in sensing pixel lines where SLC drive has been completed. Because SLC drive provides a brightness boost to the target pixels, SLC drive is performed for a predetermined short time, and recovery drive is performed for the remaining time. The recovery interval for recovery drive may continue until before the image of the subsequent frame is written.

[0046] Recovery (RECV) driving helps to reduce the brightness of a target pixel from the boost level to the display driving level. The brightness recovery data voltage for recovery driving may be the same as, or higher than, the data voltage for the display. During long-duration SLC driving, brightness boosting can cause sensing pixel lines to be perceived as bright lines, but recovery driving coupled with short SLC driving is effective in mitigating such side effects.

[0047] The timing controller 11 receives sensing data corresponding to the RT sensing drive from the data driver 12 via the second interface circuit. The sensing data reflects the electrical characteristics of the drive transistor DT included in the sensed pixel PXL. Based on the sensing data, the timing controller 11 calculates a pixel compensation value that can compensate for the electrical characteristic deviation of the pixel PXL, and corrects the input image data DATA based on this pixel compensation value. The timing controller 11 supplies the video data DATA corrected with the pixel compensation value to the data driver 12 via the second interface circuit.

[0048] The gate driver 13 can be formed in the non-display area NA of the display panel 10 according to the Gate-driver In Panel (GIP) scheme. The gate driver 13 generates a gate signal SCAN that swings between on and off voltages based on a gate timing control signal GDC. In the vertical active section ACT of each frame, the gate driver 13 sequentially supplies the gate signal SCAN to the gate lines 17(1) to 17(4), ... In the vertical blank section BLK of each frame, the gate driver 13 supplies the gate signal SCAN to the gate line 17 connected to the pixel PXL of the sensing pixel line.

[0049] The data driver 12 can be implemented as a data integrated circuit. The data driver 12 includes a data voltage supply unit DAC, 121 that generates a data voltage VDATA based on a data timing control signal DDC, and a sensing circuit SU, 122. The data voltage (VDATA) can be divided into sections for display, sensing, brightness compensation, and brightness recovery.

[0050] The data voltage supply unit DAC, 121 is connected to the pixel array via one of the data lines 15. In the vertical active section ACT of each frame, the data voltage supply unit DAC, 121 generates display data voltages with different voltage levels according to the gradation of the video data DATA for display driving and supplies them to the data line 15. The display data voltage is supplied to the gate node Ng of all pixels PXL in synchronization with the gate signal SCAN. In the vertical blank section BLK of each frame, the data voltage supply unit DAC, 121 generates a sensing data voltage for RT sensing driving and supplies it to the data line 15, then generates a brightness compensation data voltage for SLC driving and supplies it to the data line 15, and finally generates a brightness recovery data voltage for recovery driving and supplies it to the data line 15. The sensing data voltage, brightness compensation data voltage, and brightness recovery data voltage are supplied to the gate node Ng of the target pixel PXL in synchronization with different pulses of the gate signal SCAN.

[0051] The sensing circuits SU and 122 are connected to the target pixel PXL of the sensing pixel line via the readout line 18. The sensing circuit SU senses the pixel current flowing through the target pixel PXL in response to the sensing data voltage, or the source node voltage of the target pixel PXL corresponding to the pixel current, via the readout line 18. The pixel current or source node voltage varies depending on the degree of degradation of the target pixel PXL.

[0052] The sensing circuits SU, 122 may be implemented as a voltage sensing type that samples the source node voltage, or as a current sensing type that samples the pixel current.

[0053] The voltage-sensing sensing circuits SU, 122 may include a sampling circuit SAM and an analog-to-digital converter ADC, similar to those in Figure 3. The sampling circuit SAM directly samples the source node voltage of the pixel PXL to be sensed, which is stored in the parasitic capacitor of the leadout line 16. The analog-to-digital converter ADC converts the analog voltage sampled by the sampling circuit SAM into a digital sensing result value and then transmits it to the timing controller 11.

[0054] The current-sensing sensing circuits SU, 122 may include a current integrator, a sampling circuit, and an analog-to-digital converter. The current integrator integrates the pixel current flowing through the pixel PXL to be sensed and outputs a sensing voltage. The sampling circuit samples the sensing voltage output from the current integrator. The analog-to-digital converter converts the analog voltage sampled by the sampling circuit into a digital sensing result value and then transmits it to the timing controller 11.

[0055] In each of the display drive, RT sensing drive, SLC drive, and recovery RECV drive, the sensing circuits SU and 122 turn on the first switch SW1 to supply a reference voltage Vref to the readout line 16, in accordance with the timing at which the data voltage VDATA is supplied to the data line 15. The reference voltage Vref charged in the readout line 16 is supplied to the source node Ns of the pixel PXL in synchronization with the gate signal SCAN.

[0056] Figure 6 shows how the RT sensing drive, SLC drive, and recovery drive proceed for one sensing pixel line at a different position each frame. Figure 7 shows an example where the compensation gain is set differentially according to the length of the SLC section.

[0057] Referring to Figure 6, in the video writing section belonging to the vertical active section ACT of the Nth frame, display drive DIS is performed line sequentially for all pixel lines. In the sensing section belonging to the vertical blank section BLK of the Nth frame, RT sensing drive is performed for the sensing pixel line PLx. Then, in the sensing line compensation section following the sensing section, SLC drive is performed for the sensing pixel line PLx, and in the recovery section following the sensing line compensation section, recovery RECV drive is performed for the sensing pixel line PLx.

[0058] In the video writing section belonging to the vertical active section ACT of the N+1 frame, display drive DIS is performed line sequentially for all pixel lines. In the sensing section belonging to the vertical blank section BLK of the N+1 frame, RT sensing drive is performed for the sensing pixel line PLy. Then, in the SLC section following the sensing section, SLC drive is performed for the sensing pixel line PLy, and in the recovery section following the SLC section, recovery RECV drive is performed for the sensing pixel line PLy.

[0059] The display drive DIS sequence has the shortest SLC interval length at the frontmost panel top edge and the longest SLC interval length at the rearmost panel bottom edge. For uniform compensation at all panel positions, the compensation gain can be differentially set according to the length of the SLC interval, as shown in Figure 7. That is, the compensation gain may be set highest corresponding to the panel top edge with the shortest SLC interval length and lowest corresponding to the panel bottom edge with the longest SLC interval length.

[0060] Figures 8 and 9 show the display driving of non-sensing pixel lines.

[0061] Referring to Figures 8 and 9, in the video writing intervals of the Nth frame and the N+1th frame, non-sensing pixels included in the non-sensing pixel line PLa are supplied with a display data voltage VD-DIS synchronized to the first gate pulse GP1, and the display is driven DIS.

[0062] The brightness of non-sensing pixels may vary depending on the level of the display data voltage VD-DIS. The brightness of non-sensing pixels in the Nth frame may be L1, and the brightness of non-sensing pixels in the N+1st frame may be Lx. The brightness of non-sensing pixels is updated during the vertical active section ACT of each frame, and the updated pixel brightness is maintained during the vertical blank section BLK.

[0063] Figures 10 and 11 illustrate, as a comparative example, that long-duration SLC driving is performed following RT sensing driving on a sensing pixel line. Referring to Figures 10 and 11, in the video writing section within the vertical active section ACT of the Nth frame, the target pixels (i.e., sensing pixels) included in the sensing pixel line PLb are displayed and driven by the first gate pulse GP1, which is supplied with the synchronous display data voltage VD-DIS.

[0064] Next, in the sensing section within the vertical blank section BLK of the Nth frame, the target pixel is driven by RT sensing by being supplied with a sensing data voltage VD-RT synchronized with the second gate pulse GP2. Then, in the SLC section following the sensing section, the target pixel is driven by SLC by being supplied with a brightness compensation data voltage VD-SLC synchronized with the third gate pulse GP3. The SLC section may continue until before the N+1th frame is written to the image.

[0065] The brightness of the target pixel is L1 in the video writing section, L2 corresponding to black gradation in the sensing section, and may be L3, which is greater than L1, in the SLC section. By boosting the brightness of the target pixel to L3, which is greater than L1, through SLC driving, brightness loss due to non-emitting in the sensing section can be compensated for.

[0066] According to this comparative example, in VRR mode, when the frame frequency is low, the SLC section in which brightness is boosted becomes longer, and the sensing pixel line PLb can be recognized as an emission line.

[0067] Figures 12 and 13 show, as one embodiment, the RT sensing drive, SLC drive, and recovery RECV drive of the sensing pixel line.

[0068] Referring to Figures 12 and 13, in the video writing section within the vertical active section ACT of the Nth frame, the target pixels (i.e., sensing pixels) included in the sensing pixel line PLb are supplied with a synchronous display data voltage VD-DIS to the first gate pulse GP1, and the display drive DIS is performed.

[0069] Next, in the sensing section within the vertical blank section BLK of the Nth frame, the target pixel is driven by RT sensing by being supplied with a sensing data voltage VD-RT synchronized with the second gate pulse GP2. Then, in the SLC section following the sensing section, the target pixel is driven by SLC by being supplied with a brightness compensation data voltage VD-SLC synchronized with the third gate pulse GP3. Finally, in the recovery RECV section following the SLC section, the target pixel is driven by recovery RECV by being supplied with a brightness recovery data voltage VD-RECV synchronized with the fourth gate pulse GP4.

[0070] The video writing section, sensing section, SLC section, and recovery RECV section are sequentially consecutive.

[0071] The luminance compensation data voltage VD-SLC has a higher voltage level than the display data voltage VD-DIS because it is for luminance boosting. In contrast, the luminance recovery data voltage VD-RECV has the same voltage level as the display data voltage VD-DIS because it is intended to prevent the sensing pixel line PLb from being perceived as an emission line.

[0072] The brightness of the target pixel is L1 in the video writing section and the recovery RECV section, L2 corresponding to black gradation in the sensing section, and L3 which is greater than L1 in the SLC section. By boosting the brightness of the target pixel to L3, which is greater than L1, through SLC driving, the brightness loss due to non-emitting in the sensing section can be compensated for.

[0073] In the comparative example described above, the length of the SLC section targeting the same sensing pixel line PLb became longer in proportion to the frame frequency, which was problematic. In this embodiment, the length of the SLC section targeting the same sensing pixel line PLb is fixed regardless of the change in frame frequency. That is, in this embodiment, the length of the SLC section targeting the same sensing pixel line PLb is fixed based on the maximum frame frequency REFHz that belongs to a preset frequency variable range. However, the SLC sections have different fixed lengths depending on the position of the sensing pixel line PLb.

[0074] Thus, in this embodiment, SLC driving is performed for a predetermined short time, and recovery RECV driving is performed for the remaining time. The recovery RECV section may continue until before the N+1th frame's video is written. Recovery RECV driving plays the role of lowering the brightness of the target pixel from boost level L3 to display driving level L1. While the length of the SLC section targeting the same sensing pixel line PLb is fixed regardless of the change in frame frequency, the length of the recovery RECV section targeting the same sensing pixel line PLb changes according to the change in frame frequency. The smaller the frame frequency, the longer the recovery RECV section becomes, and the larger the frame frequency, the shorter the recovery RECV section becomes.

[0075] On the other hand, in the embodiments described above, the luminance recovery data voltage VD-RECV was assumed to have the same voltage level as the display data voltage VD-DIS. However, the luminance recovery data voltage VD-RECV can be applied at a higher voltage level than the display data voltage VD-DIS, depending on the gradation of the display data voltage VD-DIS. For example, if the gradation of the display data voltage VD-DIS is intermediate gradation or higher, the luminance recovery data voltage VD-RECV has the same voltage level as the display data voltage VD-DIS. In contrast, if the gradation of the display data voltage VD-DIS is low gradation, the luminance recovery data voltage VD-RECV can be further adjusted to have a voltage level between the display data voltage VD-DIS and the luminance compensation data voltage VD-SLC. This is because, in low gradation representation, a luminance difference occurs due to changes in frame frequency, causing the sensing pixel lines to appear relatively dark. However, this problem does not occur in intermediate gradation or higher.

[0076] Figure 14 shows the driving method of the electroluminescent display device according to this embodiment.

[0077] Referring to Figure 14, the driving method of this embodiment involves applying a display data voltage VD-DIS synchronized with the first gate pulse GP1 to a target pixel (i.e., a sensing pixel) included in the sensing pixel line PLb during the video writing section within the vertical active section ACT, thereby driving the target pixel to the display (S1, S2). The target pixel emits light as a result of the display driving.

[0078] Next, the driving method of this embodiment applies a sensing data voltage VD-RT synchronized with the second gate pulse GP2 to the target pixel in the sensing section within the vertical blank section BLK to drive the target pixel in RT sensing mode (S3, S4). The emission of light from the target pixel is stopped during RT sensing mode. In order to stop the emission of light from the target pixel, this embodiment allows the low-potential pixel power supply (Figure 3, EVSS) applied to the cathode electrode of the light-emitting element during the sensing section to be higher than the reference voltage (Figure 3, Vref).

[0079] When RT sensing in the non-emitting state is completed in S5, the driving method of this embodiment applies a luminance compensation data voltage VD-SLC synchronized with the third gate pulse GP3 to the target pixel in the SLC section following the sensing section to drive the target pixel with SLC (S6). The length of the SLC section is fixed to a short time regardless of changes in the frame frequency. SLC driving compensates for luminance loss due to non-emitting in the sensing section.

[0080] Next, in the driving method of this embodiment, a brightness recovery data voltage VD-RECV synchronized with the fourth gate pulse GP4 is applied to the target pixel in the recovery RECV section following the SLC section, thereby driving the target pixel to the recovery RECV (S7). Since the brightness recovery data voltage VD-REC has the same magnitude as the display data voltage VD-DIS, the brightness of the target pixel can be reduced to the display driving level at the boost level.

[0081] From the above explanation, a person skilled in the art will understand that various changes and modifications are possible without departing from the technical concept of this specification. Therefore, the technical scope of this specification is not limited to the contents described in the detailed description of the specification, but should be defined by the claims. [Explanation of Symbols]

[0082] 10 Display Panel 11 Timing Controller 12 Data Drivers 13 Gate Driver 121 Data voltage supply unit 122 Sensing Circuit

Claims

1. A display panel equipped with target pixels to be sensed, A data driver that supplies display data voltage to the target pixel during the video writing section of one frame, supplies sensing data voltage to the target pixel during the sensing section, supplies brightness compensation data voltage to the target pixel during the sensing line compensation section, and supplies brightness recovery data voltage to the target pixel during the recovery section. In the sensing section, a sensing circuit that senses the electrical characteristics of the target pixel according to the sensing data voltage, Includes, The video writing section, the sensing section, the sensing line compensation section, and the recovery section are arranged in order, The luminance compensation data voltage has a higher voltage level than the display data voltage. When the grayscale level of the display data voltage is lower than the intermediate grayscale level, the luminance recovery data voltage is within a predetermined recovery voltage range between the display data voltage and the luminance compensation data voltage. When the gradation level of the display data voltage is the intermediate gradation level, and when the gradation level of the display data voltage is higher than the intermediate gradation level, the luminance recovery data voltage has the same voltage level as the display data voltage. Electroluminescent display device.

2. The electroluminescent display device according to claim 1, wherein the length of the sensing line compensation interval is constant regardless of changes in the frame frequency.

3. The electroluminescent display device according to claim 1, wherein the length of the sensing line compensation interval is constant based on the maximum frame frequency within a preset frequency variable range.

4. The electroluminescent display device according to claim 1, wherein the length of the recovery interval changes in accordance with the change in frame frequency.

5. The electroluminescent display device according to claim 4, wherein the length of the recovery interval increases as the frame frequency decreases.

6. The electroluminescent display device according to claim 1, wherein the compensation gain for determining the magnitude of the luminance compensation data voltage is set differently depending on the position of the pixel line including the target pixel.

7. The electroluminescent display device according to claim 1, further comprising a gate driver that supplies a first gate pulse synchronized with the display data voltage to the target pixel in the video writing section, a second gate pulse corresponding to the sensing data voltage to the target pixel in the sensing section, a third gate pulse corresponding to the brightness compensation data voltage to the target pixel in the sensing line compensation section, and a fourth gate pulse corresponding to the brightness recovery data voltage to the target pixel in the recovery section.

8. In a method for driving an electroluminescent display device having a display panel equipped with target pixels to be sensed, The steps include supplying a display data voltage to the target pixel during the video writing section of one frame, supplying a sensing data voltage to the target pixel during the sensing section, supplying a brightness compensation data voltage to the target pixel during the sensing line compensation section, and supplying a brightness recovery data voltage to the target pixel during the recovery section. The steps include: sensing the electrical characteristics of the target pixel in accordance with the sensing data voltage in the sensing section; Includes, The video writing section, the sensing section, the sensing line compensation section, and the recovery section are arranged in order, The brightness compensation data voltage has a higher voltage level than the display data voltage. When the grayscale level of the display data voltage is lower than the intermediate grayscale level, the luminance recovery data voltage is within a predetermined recovery voltage range between the display data voltage and the luminance compensation data voltage. When the gradation level of the display data voltage is the intermediate gradation level, and when the gradation level of the display data voltage is higher than the intermediate gradation level, the luminance recovery data voltage has the same voltage level as the display data voltage. A method for driving an electroluminescent display device.

9. A method for driving an electroluminescent display device according to claim 8, wherein the length of the sensing line compensation interval is constant regardless of changes in the frame frequency.

10. A method for driving an electroluminescent display device according to claim 8, wherein the length of the sensing line compensation interval is constant based on the maximum frame frequency that falls within a preset variable frequency range.

11. The method for driving an electroluminescent display device according to claim 8, wherein the length of the recovery interval changes in accordance with the change in frame frequency.

12. The method for driving an electroluminescent display device according to claim 11, wherein the length of the recovery interval increases as the frame frequency decreases.

13. A method for driving an electroluminescent display device according to claim 8, wherein the compensation gain for determining the magnitude of the luminance compensation data voltage is set differently depending on the position of the pixel line including the target pixel.

14. A method for driving an electroluminescent display device according to claim 8, further comprising the steps of supplying a first gate pulse synchronized with the display data voltage to the target pixel in the video writing section, supplying a second gate pulse corresponding to the sensing data voltage to the target pixel in the sensing section, supplying a third gate pulse corresponding to the brightness compensation data voltage to the target pixel in the sensing line compensation section, and supplying a fourth gate pulse corresponding to the brightness recovery data voltage to the target pixel in the recovery section.

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